1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun STV0900/0903 Multistandard Broadcast Frontend driver 4*4882a593Smuzhiyun Copyright (C) Manu Abraham <abraham.manu@gmail.com> 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun Copyright (C) ST Microelectronics 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef __STV090x_PRIV_H 11*4882a593Smuzhiyun #define __STV090x_PRIV_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <media/dvb_frontend.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define FE_ERROR 0 16*4882a593Smuzhiyun #define FE_NOTICE 1 17*4882a593Smuzhiyun #define FE_INFO 2 18*4882a593Smuzhiyun #define FE_DEBUG 3 19*4882a593Smuzhiyun #define FE_DEBUGREG 4 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define dprintk(__y, __z, format, arg...) do { \ 22*4882a593Smuzhiyun if (__z) { \ 23*4882a593Smuzhiyun if ((verbose > FE_ERROR) && (verbose > __y)) \ 24*4882a593Smuzhiyun printk(KERN_ERR "%s: " format "\n", __func__ , ##arg); \ 25*4882a593Smuzhiyun else if ((verbose > FE_NOTICE) && (verbose > __y)) \ 26*4882a593Smuzhiyun printk(KERN_NOTICE "%s: " format "\n", __func__ , ##arg); \ 27*4882a593Smuzhiyun else if ((verbose > FE_INFO) && (verbose > __y)) \ 28*4882a593Smuzhiyun printk(KERN_INFO "%s: " format "\n", __func__ , ##arg); \ 29*4882a593Smuzhiyun else if ((verbose > FE_DEBUG) && (verbose > __y)) \ 30*4882a593Smuzhiyun printk(KERN_DEBUG "%s: " format "\n", __func__ , ##arg); \ 31*4882a593Smuzhiyun } else { \ 32*4882a593Smuzhiyun if (verbose > __y) \ 33*4882a593Smuzhiyun printk(format, ##arg); \ 34*4882a593Smuzhiyun } \ 35*4882a593Smuzhiyun } while (0) 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #define STV090x_READ_DEMOD(__state, __reg) (( \ 38*4882a593Smuzhiyun (__state)->demod == STV090x_DEMODULATOR_1) ? \ 39*4882a593Smuzhiyun stv090x_read_reg(__state, STV090x_P2_##__reg) : \ 40*4882a593Smuzhiyun stv090x_read_reg(__state, STV090x_P1_##__reg)) 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #define STV090x_WRITE_DEMOD(__state, __reg, __data) (( \ 43*4882a593Smuzhiyun (__state)->demod == STV090x_DEMODULATOR_1) ? \ 44*4882a593Smuzhiyun stv090x_write_reg(__state, STV090x_P2_##__reg, __data) :\ 45*4882a593Smuzhiyun stv090x_write_reg(__state, STV090x_P1_##__reg, __data)) 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #define STV090x_ADDR_OFFST(__state, __x) (( \ 48*4882a593Smuzhiyun (__state->demod) == STV090x_DEMODULATOR_1) ? \ 49*4882a593Smuzhiyun STV090x_P1_##__x : \ 50*4882a593Smuzhiyun STV090x_P2_##__x) 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #define STV090x_SETFIELD(mask, bitf, val) (mask = (mask & (~(((1 << STV090x_WIDTH_##bitf) - 1) <<\ 54*4882a593Smuzhiyun STV090x_OFFST_##bitf))) | \ 55*4882a593Smuzhiyun (val << STV090x_OFFST_##bitf)) 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #define STV090x_GETFIELD(val, bitf) ((val >> STV090x_OFFST_##bitf) & ((1 << STV090x_WIDTH_##bitf) - 1)) 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun #define STV090x_SETFIELD_Px(mask, bitf, val) (mask = (mask & (~(((1 << STV090x_WIDTH_Px_##bitf) - 1) <<\ 61*4882a593Smuzhiyun STV090x_OFFST_Px_##bitf))) | \ 62*4882a593Smuzhiyun (val << STV090x_OFFST_Px_##bitf)) 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun #define STV090x_GETFIELD_Px(val, bitf) ((val >> STV090x_OFFST_Px_##bitf) & ((1 << STV090x_WIDTH_Px_##bitf) - 1)) 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun #define MAKEWORD16(__a, __b) (((__a) << 8) | (__b)) 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun #define MSB(__x) ((__x >> 8) & 0xff) 69*4882a593Smuzhiyun #define LSB(__x) (__x & 0xff) 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun #define STV090x_IQPOWER_THRESHOLD 30 73*4882a593Smuzhiyun #define STV090x_SEARCH_AGC2_TH_CUT20 700 74*4882a593Smuzhiyun #define STV090x_SEARCH_AGC2_TH_CUT30 1400 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun #define STV090x_SEARCH_AGC2_TH(__ver) \ 77*4882a593Smuzhiyun ((__ver <= 0x20) ? \ 78*4882a593Smuzhiyun STV090x_SEARCH_AGC2_TH_CUT20 : \ 79*4882a593Smuzhiyun STV090x_SEARCH_AGC2_TH_CUT30) 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun enum stv090x_signal_state { 82*4882a593Smuzhiyun STV090x_NOAGC1, 83*4882a593Smuzhiyun STV090x_NOCARRIER, 84*4882a593Smuzhiyun STV090x_NODATA, 85*4882a593Smuzhiyun STV090x_DATAOK, 86*4882a593Smuzhiyun STV090x_RANGEOK, 87*4882a593Smuzhiyun STV090x_OUTOFRANGE 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun enum stv090x_fec { 91*4882a593Smuzhiyun STV090x_PR12 = 0, 92*4882a593Smuzhiyun STV090x_PR23, 93*4882a593Smuzhiyun STV090x_PR34, 94*4882a593Smuzhiyun STV090x_PR45, 95*4882a593Smuzhiyun STV090x_PR56, 96*4882a593Smuzhiyun STV090x_PR67, 97*4882a593Smuzhiyun STV090x_PR78, 98*4882a593Smuzhiyun STV090x_PR89, 99*4882a593Smuzhiyun STV090x_PR910, 100*4882a593Smuzhiyun STV090x_PRERR 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun enum stv090x_modulation { 104*4882a593Smuzhiyun STV090x_QPSK, 105*4882a593Smuzhiyun STV090x_8PSK, 106*4882a593Smuzhiyun STV090x_16APSK, 107*4882a593Smuzhiyun STV090x_32APSK, 108*4882a593Smuzhiyun STV090x_UNKNOWN 109*4882a593Smuzhiyun }; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun enum stv090x_frame { 112*4882a593Smuzhiyun STV090x_LONG_FRAME, 113*4882a593Smuzhiyun STV090x_SHORT_FRAME 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun enum stv090x_pilot { 117*4882a593Smuzhiyun STV090x_PILOTS_OFF, 118*4882a593Smuzhiyun STV090x_PILOTS_ON 119*4882a593Smuzhiyun }; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun enum stv090x_rolloff { 122*4882a593Smuzhiyun STV090x_RO_35, 123*4882a593Smuzhiyun STV090x_RO_25, 124*4882a593Smuzhiyun STV090x_RO_20 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun enum stv090x_inversion { 128*4882a593Smuzhiyun STV090x_IQ_AUTO, 129*4882a593Smuzhiyun STV090x_IQ_NORMAL, 130*4882a593Smuzhiyun STV090x_IQ_SWAP 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun enum stv090x_modcod { 134*4882a593Smuzhiyun STV090x_DUMMY_PLF = 0, 135*4882a593Smuzhiyun STV090x_QPSK_14, 136*4882a593Smuzhiyun STV090x_QPSK_13, 137*4882a593Smuzhiyun STV090x_QPSK_25, 138*4882a593Smuzhiyun STV090x_QPSK_12, 139*4882a593Smuzhiyun STV090x_QPSK_35, 140*4882a593Smuzhiyun STV090x_QPSK_23, 141*4882a593Smuzhiyun STV090x_QPSK_34, 142*4882a593Smuzhiyun STV090x_QPSK_45, 143*4882a593Smuzhiyun STV090x_QPSK_56, 144*4882a593Smuzhiyun STV090x_QPSK_89, 145*4882a593Smuzhiyun STV090x_QPSK_910, 146*4882a593Smuzhiyun STV090x_8PSK_35, 147*4882a593Smuzhiyun STV090x_8PSK_23, 148*4882a593Smuzhiyun STV090x_8PSK_34, 149*4882a593Smuzhiyun STV090x_8PSK_56, 150*4882a593Smuzhiyun STV090x_8PSK_89, 151*4882a593Smuzhiyun STV090x_8PSK_910, 152*4882a593Smuzhiyun STV090x_16APSK_23, 153*4882a593Smuzhiyun STV090x_16APSK_34, 154*4882a593Smuzhiyun STV090x_16APSK_45, 155*4882a593Smuzhiyun STV090x_16APSK_56, 156*4882a593Smuzhiyun STV090x_16APSK_89, 157*4882a593Smuzhiyun STV090x_16APSK_910, 158*4882a593Smuzhiyun STV090x_32APSK_34, 159*4882a593Smuzhiyun STV090x_32APSK_45, 160*4882a593Smuzhiyun STV090x_32APSK_56, 161*4882a593Smuzhiyun STV090x_32APSK_89, 162*4882a593Smuzhiyun STV090x_32APSK_910, 163*4882a593Smuzhiyun STV090x_MODCODE_UNKNOWN 164*4882a593Smuzhiyun }; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun enum stv090x_search { 167*4882a593Smuzhiyun STV090x_SEARCH_DSS = 0, 168*4882a593Smuzhiyun STV090x_SEARCH_DVBS1, 169*4882a593Smuzhiyun STV090x_SEARCH_DVBS2, 170*4882a593Smuzhiyun STV090x_SEARCH_AUTO 171*4882a593Smuzhiyun }; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun enum stv090x_algo { 174*4882a593Smuzhiyun STV090x_BLIND_SEARCH, 175*4882a593Smuzhiyun STV090x_COLD_SEARCH, 176*4882a593Smuzhiyun STV090x_WARM_SEARCH 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun enum stv090x_delsys { 180*4882a593Smuzhiyun STV090x_ERROR = 0, 181*4882a593Smuzhiyun STV090x_DVBS1 = 1, 182*4882a593Smuzhiyun STV090x_DVBS2, 183*4882a593Smuzhiyun STV090x_DSS 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun struct stv090x_long_frame_crloop { 187*4882a593Smuzhiyun enum stv090x_modcod modcod; 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun u8 crl_pilots_on_2; 190*4882a593Smuzhiyun u8 crl_pilots_off_2; 191*4882a593Smuzhiyun u8 crl_pilots_on_5; 192*4882a593Smuzhiyun u8 crl_pilots_off_5; 193*4882a593Smuzhiyun u8 crl_pilots_on_10; 194*4882a593Smuzhiyun u8 crl_pilots_off_10; 195*4882a593Smuzhiyun u8 crl_pilots_on_20; 196*4882a593Smuzhiyun u8 crl_pilots_off_20; 197*4882a593Smuzhiyun u8 crl_pilots_on_30; 198*4882a593Smuzhiyun u8 crl_pilots_off_30; 199*4882a593Smuzhiyun }; 200*4882a593Smuzhiyun 201*4882a593Smuzhiyun struct stv090x_short_frame_crloop { 202*4882a593Smuzhiyun enum stv090x_modulation modulation; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun u8 crl_2; /* SR < 3M */ 205*4882a593Smuzhiyun u8 crl_5; /* 3 < SR <= 7M */ 206*4882a593Smuzhiyun u8 crl_10; /* 7 < SR <= 15M */ 207*4882a593Smuzhiyun u8 crl_20; /* 10 < SR <= 25M */ 208*4882a593Smuzhiyun u8 crl_30; /* 10 < SR <= 45M */ 209*4882a593Smuzhiyun }; 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun struct stv090x_reg { 212*4882a593Smuzhiyun u16 addr; 213*4882a593Smuzhiyun u8 data; 214*4882a593Smuzhiyun }; 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun struct stv090x_tab { 217*4882a593Smuzhiyun s32 real; 218*4882a593Smuzhiyun s32 read; 219*4882a593Smuzhiyun }; 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun struct stv090x_internal { 222*4882a593Smuzhiyun struct i2c_adapter *i2c_adap; 223*4882a593Smuzhiyun u8 i2c_addr; 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun struct mutex demod_lock; /* Lock access to shared register */ 226*4882a593Smuzhiyun struct mutex tuner_lock; /* Lock access to tuners */ 227*4882a593Smuzhiyun s32 mclk; /* Masterclock Divider factor */ 228*4882a593Smuzhiyun u32 dev_ver; 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun int num_used; 231*4882a593Smuzhiyun }; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun struct stv090x_state { 234*4882a593Smuzhiyun enum stv090x_device device; 235*4882a593Smuzhiyun enum stv090x_demodulator demod; 236*4882a593Smuzhiyun enum stv090x_mode demod_mode; 237*4882a593Smuzhiyun struct stv090x_internal *internal; 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun struct i2c_adapter *i2c; 240*4882a593Smuzhiyun struct stv090x_config *config; 241*4882a593Smuzhiyun struct dvb_frontend frontend; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun u32 *verbose; /* Cached module verbosity */ 244*4882a593Smuzhiyun 245*4882a593Smuzhiyun enum stv090x_delsys delsys; 246*4882a593Smuzhiyun enum stv090x_fec fec; 247*4882a593Smuzhiyun enum stv090x_modulation modulation; 248*4882a593Smuzhiyun enum stv090x_modcod modcod; 249*4882a593Smuzhiyun enum stv090x_search search_mode; 250*4882a593Smuzhiyun enum stv090x_frame frame_len; 251*4882a593Smuzhiyun enum stv090x_pilot pilots; 252*4882a593Smuzhiyun enum stv090x_rolloff rolloff; 253*4882a593Smuzhiyun enum stv090x_inversion inversion; 254*4882a593Smuzhiyun enum stv090x_algo algo; 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun u32 frequency; 257*4882a593Smuzhiyun u32 srate; 258*4882a593Smuzhiyun 259*4882a593Smuzhiyun s32 tuner_bw; 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun s32 search_range; 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun s32 DemodTimeout; 264*4882a593Smuzhiyun s32 FecTimeout; 265*4882a593Smuzhiyun }; 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun #endif /* __STV090x_PRIV_H */ 268