1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * stv0367_priv.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Driver for ST STV0367 DVB-T & DVB-C demodulator IC. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright (C) ST Microelectronics. 8*4882a593Smuzhiyun * Copyright (C) 2010,2011 NetUP Inc. 9*4882a593Smuzhiyun * Copyright (C) 2010,2011 Igor M. Liplianin <liplianin@netup.ru> 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun /* Common driver error constants */ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #ifndef STV0367_PRIV_H 14*4882a593Smuzhiyun #define STV0367_PRIV_H 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #ifndef TRUE 17*4882a593Smuzhiyun #define TRUE (1 == 1) 18*4882a593Smuzhiyun #endif 19*4882a593Smuzhiyun #ifndef FALSE 20*4882a593Smuzhiyun #define FALSE (!TRUE) 21*4882a593Smuzhiyun #endif 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #ifndef NULL 24*4882a593Smuzhiyun #define NULL 0 25*4882a593Smuzhiyun #endif 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun /* MACRO definitions */ 28*4882a593Smuzhiyun #define MAX(X, Y) ((X) >= (Y) ? (X) : (Y)) 29*4882a593Smuzhiyun #define MIN(X, Y) ((X) <= (Y) ? (X) : (Y)) 30*4882a593Smuzhiyun #define INRANGE(X, Y, Z) \ 31*4882a593Smuzhiyun ((((X) <= (Y)) && ((Y) <= (Z))) || \ 32*4882a593Smuzhiyun (((Z) <= (Y)) && ((Y) <= (X))) ? 1 : 0) 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #ifndef MAKEWORD 35*4882a593Smuzhiyun #define MAKEWORD(X, Y) (((X) << 8) + (Y)) 36*4882a593Smuzhiyun #endif 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define LSB(X) (((X) & 0xff)) 39*4882a593Smuzhiyun #define MSB(Y) (((Y) >> 8) & 0xff) 40*4882a593Smuzhiyun #define MMSB(Y)(((Y) >> 16) & 0xff) 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun enum stv0367_ter_signal_type { 43*4882a593Smuzhiyun FE_TER_NOAGC = 0, 44*4882a593Smuzhiyun FE_TER_AGCOK = 5, 45*4882a593Smuzhiyun FE_TER_NOTPS = 6, 46*4882a593Smuzhiyun FE_TER_TPSOK = 7, 47*4882a593Smuzhiyun FE_TER_NOSYMBOL = 8, 48*4882a593Smuzhiyun FE_TER_BAD_CPQ = 9, 49*4882a593Smuzhiyun FE_TER_PRFOUNDOK = 10, 50*4882a593Smuzhiyun FE_TER_NOPRFOUND = 11, 51*4882a593Smuzhiyun FE_TER_LOCKOK = 12, 52*4882a593Smuzhiyun FE_TER_NOLOCK = 13, 53*4882a593Smuzhiyun FE_TER_SYMBOLOK = 15, 54*4882a593Smuzhiyun FE_TER_CPAMPOK = 16, 55*4882a593Smuzhiyun FE_TER_NOCPAMP = 17, 56*4882a593Smuzhiyun FE_TER_SWNOK = 18 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun enum stv0367_ts_mode { 60*4882a593Smuzhiyun STV0367_OUTPUTMODE_DEFAULT, 61*4882a593Smuzhiyun STV0367_SERIAL_PUNCT_CLOCK, 62*4882a593Smuzhiyun STV0367_SERIAL_CONT_CLOCK, 63*4882a593Smuzhiyun STV0367_PARALLEL_PUNCT_CLOCK, 64*4882a593Smuzhiyun STV0367_DVBCI_CLOCK 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun enum stv0367_clk_pol { 68*4882a593Smuzhiyun STV0367_CLOCKPOLARITY_DEFAULT, 69*4882a593Smuzhiyun STV0367_RISINGEDGE_CLOCK, 70*4882a593Smuzhiyun STV0367_FALLINGEDGE_CLOCK 71*4882a593Smuzhiyun }; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun enum stv0367_ter_bw { 74*4882a593Smuzhiyun FE_TER_CHAN_BW_6M = 6, 75*4882a593Smuzhiyun FE_TER_CHAN_BW_7M = 7, 76*4882a593Smuzhiyun FE_TER_CHAN_BW_8M = 8 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun #if 0 80*4882a593Smuzhiyun enum FE_TER_Rate_TPS { 81*4882a593Smuzhiyun FE_TER_TPS_1_2 = 0, 82*4882a593Smuzhiyun FE_TER_TPS_2_3 = 1, 83*4882a593Smuzhiyun FE_TER_TPS_3_4 = 2, 84*4882a593Smuzhiyun FE_TER_TPS_5_6 = 3, 85*4882a593Smuzhiyun FE_TER_TPS_7_8 = 4 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun #endif 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun enum stv0367_ter_mode { 90*4882a593Smuzhiyun FE_TER_MODE_2K, 91*4882a593Smuzhiyun FE_TER_MODE_8K, 92*4882a593Smuzhiyun FE_TER_MODE_4K 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun #if 0 95*4882a593Smuzhiyun enum FE_TER_Hierarchy_Alpha { 96*4882a593Smuzhiyun FE_TER_HIER_ALPHA_NONE, /* Regular modulation */ 97*4882a593Smuzhiyun FE_TER_HIER_ALPHA_1, /* Hierarchical modulation a = 1*/ 98*4882a593Smuzhiyun FE_TER_HIER_ALPHA_2, /* Hierarchical modulation a = 2*/ 99*4882a593Smuzhiyun FE_TER_HIER_ALPHA_4 /* Hierarchical modulation a = 4*/ 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun #endif 102*4882a593Smuzhiyun enum stv0367_ter_hierarchy { 103*4882a593Smuzhiyun FE_TER_HIER_NONE, /*Hierarchy None*/ 104*4882a593Smuzhiyun FE_TER_HIER_LOW_PRIO, /*Hierarchy : Low Priority*/ 105*4882a593Smuzhiyun FE_TER_HIER_HIGH_PRIO, /*Hierarchy : High Priority*/ 106*4882a593Smuzhiyun FE_TER_HIER_PRIO_ANY /*Hierarchy :Any*/ 107*4882a593Smuzhiyun }; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun #if 0 110*4882a593Smuzhiyun enum fe_stv0367_ter_spec { 111*4882a593Smuzhiyun FE_TER_INVERSION_NONE = 0, 112*4882a593Smuzhiyun FE_TER_INVERSION = 1, 113*4882a593Smuzhiyun FE_TER_INVERSION_AUTO = 2, 114*4882a593Smuzhiyun FE_TER_INVERSION_UNK = 4 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun #endif 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun enum stv0367_ter_if_iq_mode { 119*4882a593Smuzhiyun FE_TER_NORMAL_IF_TUNER = 0, 120*4882a593Smuzhiyun FE_TER_LONGPATH_IF_TUNER = 1, 121*4882a593Smuzhiyun FE_TER_IQ_TUNER = 2 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun }; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun #if 0 126*4882a593Smuzhiyun enum FE_TER_FECRate { 127*4882a593Smuzhiyun FE_TER_FEC_NONE = 0x00, /* no FEC rate specified */ 128*4882a593Smuzhiyun FE_TER_FEC_ALL = 0xFF, /* Logical OR of all FECs */ 129*4882a593Smuzhiyun FE_TER_FEC_1_2 = 1, 130*4882a593Smuzhiyun FE_TER_FEC_2_3 = (1 << 1), 131*4882a593Smuzhiyun FE_TER_FEC_3_4 = (1 << 2), 132*4882a593Smuzhiyun FE_TER_FEC_4_5 = (1 << 3), 133*4882a593Smuzhiyun FE_TER_FEC_5_6 = (1 << 4), 134*4882a593Smuzhiyun FE_TER_FEC_6_7 = (1 << 5), 135*4882a593Smuzhiyun FE_TER_FEC_7_8 = (1 << 6), 136*4882a593Smuzhiyun FE_TER_FEC_8_9 = (1 << 7) 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun enum FE_TER_Rate { 140*4882a593Smuzhiyun FE_TER_FE_1_2 = 0, 141*4882a593Smuzhiyun FE_TER_FE_2_3 = 1, 142*4882a593Smuzhiyun FE_TER_FE_3_4 = 2, 143*4882a593Smuzhiyun FE_TER_FE_5_6 = 3, 144*4882a593Smuzhiyun FE_TER_FE_6_7 = 4, 145*4882a593Smuzhiyun FE_TER_FE_7_8 = 5 146*4882a593Smuzhiyun }; 147*4882a593Smuzhiyun #endif 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun enum stv0367_ter_force { 150*4882a593Smuzhiyun FE_TER_FORCENONE = 0, 151*4882a593Smuzhiyun FE_TER_FORCE_M_G = 1 152*4882a593Smuzhiyun }; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun enum stv0367cab_mod { 155*4882a593Smuzhiyun FE_CAB_MOD_QAM4, 156*4882a593Smuzhiyun FE_CAB_MOD_QAM16, 157*4882a593Smuzhiyun FE_CAB_MOD_QAM32, 158*4882a593Smuzhiyun FE_CAB_MOD_QAM64, 159*4882a593Smuzhiyun FE_CAB_MOD_QAM128, 160*4882a593Smuzhiyun FE_CAB_MOD_QAM256, 161*4882a593Smuzhiyun FE_CAB_MOD_QAM512, 162*4882a593Smuzhiyun FE_CAB_MOD_QAM1024 163*4882a593Smuzhiyun }; 164*4882a593Smuzhiyun #if 0 165*4882a593Smuzhiyun enum { 166*4882a593Smuzhiyun FE_CAB_FEC_A = 1, /* J83 Annex A */ 167*4882a593Smuzhiyun FE_CAB_FEC_B = (1 << 1),/* J83 Annex B */ 168*4882a593Smuzhiyun FE_CAB_FEC_C = (1 << 2) /* J83 Annex C */ 169*4882a593Smuzhiyun } FE_CAB_FECType_t; 170*4882a593Smuzhiyun #endif 171*4882a593Smuzhiyun struct stv0367_cab_signal_info { 172*4882a593Smuzhiyun int locked; 173*4882a593Smuzhiyun u32 frequency; /* kHz */ 174*4882a593Smuzhiyun u32 symbol_rate; /* Mbds */ 175*4882a593Smuzhiyun enum stv0367cab_mod modulation; 176*4882a593Smuzhiyun enum fe_spectral_inversion spect_inv; 177*4882a593Smuzhiyun s32 Power_dBmx10; /* Power of the RF signal (dBm x 10) */ 178*4882a593Smuzhiyun u32 CN_dBx10; /* Carrier to noise ratio (dB x 10) */ 179*4882a593Smuzhiyun u32 BER; /* Bit error rate (x 10000000) */ 180*4882a593Smuzhiyun }; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun enum stv0367_cab_signal_type { 183*4882a593Smuzhiyun FE_CAB_NOTUNER, 184*4882a593Smuzhiyun FE_CAB_NOAGC, 185*4882a593Smuzhiyun FE_CAB_NOSIGNAL, 186*4882a593Smuzhiyun FE_CAB_NOTIMING, 187*4882a593Smuzhiyun FE_CAB_TIMINGOK, 188*4882a593Smuzhiyun FE_CAB_NOCARRIER, 189*4882a593Smuzhiyun FE_CAB_CARRIEROK, 190*4882a593Smuzhiyun FE_CAB_NOBLIND, 191*4882a593Smuzhiyun FE_CAB_BLINDOK, 192*4882a593Smuzhiyun FE_CAB_NODEMOD, 193*4882a593Smuzhiyun FE_CAB_DEMODOK, 194*4882a593Smuzhiyun FE_CAB_DATAOK 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun #endif 198