xref: /OK3568_Linux_fs/kernel/drivers/media/dvb-frontends/stv0288.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun 	Driver for ST STV0288 demodulator
4*4882a593Smuzhiyun 	Copyright (C) 2006 Georg Acher, BayCom GmbH, acher (at) baycom (dot) de
5*4882a593Smuzhiyun 		for Reel Multimedia
6*4882a593Smuzhiyun 	Copyright (C) 2008 TurboSight.com, Bob Liu <bob@turbosight.com>
7*4882a593Smuzhiyun 	Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
8*4882a593Smuzhiyun 		Removed stb6000 specific tuner code and revised some
9*4882a593Smuzhiyun 		procedures.
10*4882a593Smuzhiyun 	2010-09-01 Josef Pavlik <josef@pavlik.it>
11*4882a593Smuzhiyun 		Fixed diseqc_msg, diseqc_burst and set_tone problems
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun */
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <linux/init.h>
17*4882a593Smuzhiyun #include <linux/kernel.h>
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/string.h>
20*4882a593Smuzhiyun #include <linux/slab.h>
21*4882a593Smuzhiyun #include <linux/jiffies.h>
22*4882a593Smuzhiyun #include <asm/div64.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #include <media/dvb_frontend.h>
25*4882a593Smuzhiyun #include "stv0288.h"
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun struct stv0288_state {
28*4882a593Smuzhiyun 	struct i2c_adapter *i2c;
29*4882a593Smuzhiyun 	const struct stv0288_config *config;
30*4882a593Smuzhiyun 	struct dvb_frontend frontend;
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun 	u8 initialised:1;
33*4882a593Smuzhiyun 	u32 tuner_frequency;
34*4882a593Smuzhiyun 	u32 symbol_rate;
35*4882a593Smuzhiyun 	enum fe_code_rate fec_inner;
36*4882a593Smuzhiyun 	int errmode;
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun #define STATUS_BER 0
40*4882a593Smuzhiyun #define STATUS_UCBLOCKS 1
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun static int debug;
43*4882a593Smuzhiyun static int debug_legacy_dish_switch;
44*4882a593Smuzhiyun #define dprintk(args...) \
45*4882a593Smuzhiyun 	do { \
46*4882a593Smuzhiyun 		if (debug) \
47*4882a593Smuzhiyun 			printk(KERN_DEBUG "stv0288: " args); \
48*4882a593Smuzhiyun 	} while (0)
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun 
stv0288_writeregI(struct stv0288_state * state,u8 reg,u8 data)51*4882a593Smuzhiyun static int stv0288_writeregI(struct stv0288_state *state, u8 reg, u8 data)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun 	int ret;
54*4882a593Smuzhiyun 	u8 buf[] = { reg, data };
55*4882a593Smuzhiyun 	struct i2c_msg msg = {
56*4882a593Smuzhiyun 		.addr = state->config->demod_address,
57*4882a593Smuzhiyun 		.flags = 0,
58*4882a593Smuzhiyun 		.buf = buf,
59*4882a593Smuzhiyun 		.len = 2
60*4882a593Smuzhiyun 	};
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	ret = i2c_transfer(state->i2c, &msg, 1);
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	if (ret != 1)
65*4882a593Smuzhiyun 		dprintk("%s: writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
66*4882a593Smuzhiyun 			__func__, reg, data, ret);
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	return (ret != 1) ? -EREMOTEIO : 0;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun 
stv0288_write(struct dvb_frontend * fe,const u8 buf[],int len)71*4882a593Smuzhiyun static int stv0288_write(struct dvb_frontend *fe, const u8 buf[], int len)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun 	struct stv0288_state *state = fe->demodulator_priv;
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	if (len != 2)
76*4882a593Smuzhiyun 		return -EINVAL;
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	return stv0288_writeregI(state, buf[0], buf[1]);
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun 
stv0288_readreg(struct stv0288_state * state,u8 reg)81*4882a593Smuzhiyun static u8 stv0288_readreg(struct stv0288_state *state, u8 reg)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun 	int ret;
84*4882a593Smuzhiyun 	u8 b0[] = { reg };
85*4882a593Smuzhiyun 	u8 b1[] = { 0 };
86*4882a593Smuzhiyun 	struct i2c_msg msg[] = {
87*4882a593Smuzhiyun 		{
88*4882a593Smuzhiyun 			.addr = state->config->demod_address,
89*4882a593Smuzhiyun 			.flags = 0,
90*4882a593Smuzhiyun 			.buf = b0,
91*4882a593Smuzhiyun 			.len = 1
92*4882a593Smuzhiyun 		}, {
93*4882a593Smuzhiyun 			.addr = state->config->demod_address,
94*4882a593Smuzhiyun 			.flags = I2C_M_RD,
95*4882a593Smuzhiyun 			.buf = b1,
96*4882a593Smuzhiyun 			.len = 1
97*4882a593Smuzhiyun 		}
98*4882a593Smuzhiyun 	};
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	ret = i2c_transfer(state->i2c, msg, 2);
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	if (ret != 2)
103*4882a593Smuzhiyun 		dprintk("%s: readreg error (reg == 0x%02x, ret == %i)\n",
104*4882a593Smuzhiyun 				__func__, reg, ret);
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	return b1[0];
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun 
stv0288_set_symbolrate(struct dvb_frontend * fe,u32 srate)109*4882a593Smuzhiyun static int stv0288_set_symbolrate(struct dvb_frontend *fe, u32 srate)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun 	struct stv0288_state *state = fe->demodulator_priv;
112*4882a593Smuzhiyun 	unsigned int temp;
113*4882a593Smuzhiyun 	unsigned char b[3];
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	if ((srate < 1000000) || (srate > 45000000))
116*4882a593Smuzhiyun 		return -EINVAL;
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	stv0288_writeregI(state, 0x22, 0);
119*4882a593Smuzhiyun 	stv0288_writeregI(state, 0x23, 0);
120*4882a593Smuzhiyun 	stv0288_writeregI(state, 0x2b, 0xff);
121*4882a593Smuzhiyun 	stv0288_writeregI(state, 0x2c, 0xf7);
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	temp = (unsigned int)srate / 1000;
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	temp = temp * 32768;
126*4882a593Smuzhiyun 	temp = temp / 25;
127*4882a593Smuzhiyun 	temp = temp / 125;
128*4882a593Smuzhiyun 	b[0] = (unsigned char)((temp >> 12) & 0xff);
129*4882a593Smuzhiyun 	b[1] = (unsigned char)((temp >> 4) & 0xff);
130*4882a593Smuzhiyun 	b[2] = (unsigned char)((temp << 4) & 0xf0);
131*4882a593Smuzhiyun 	stv0288_writeregI(state, 0x28, 0x80); /* SFRH */
132*4882a593Smuzhiyun 	stv0288_writeregI(state, 0x29, 0); /* SFRM */
133*4882a593Smuzhiyun 	stv0288_writeregI(state, 0x2a, 0); /* SFRL */
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	stv0288_writeregI(state, 0x28, b[0]);
136*4882a593Smuzhiyun 	stv0288_writeregI(state, 0x29, b[1]);
137*4882a593Smuzhiyun 	stv0288_writeregI(state, 0x2a, b[2]);
138*4882a593Smuzhiyun 	dprintk("stv0288: stv0288_set_symbolrate\n");
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	return 0;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun 
stv0288_send_diseqc_msg(struct dvb_frontend * fe,struct dvb_diseqc_master_cmd * m)143*4882a593Smuzhiyun static int stv0288_send_diseqc_msg(struct dvb_frontend *fe,
144*4882a593Smuzhiyun 				    struct dvb_diseqc_master_cmd *m)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun 	struct stv0288_state *state = fe->demodulator_priv;
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	int i;
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	dprintk("%s\n", __func__);
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	stv0288_writeregI(state, 0x09, 0);
153*4882a593Smuzhiyun 	msleep(30);
154*4882a593Smuzhiyun 	stv0288_writeregI(state, 0x05, 0x12);/* modulated mode, single shot */
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	for (i = 0; i < m->msg_len; i++) {
157*4882a593Smuzhiyun 		if (stv0288_writeregI(state, 0x06, m->msg[i]))
158*4882a593Smuzhiyun 			return -EREMOTEIO;
159*4882a593Smuzhiyun 	}
160*4882a593Smuzhiyun 	msleep(m->msg_len*12);
161*4882a593Smuzhiyun 	return 0;
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun 
stv0288_send_diseqc_burst(struct dvb_frontend * fe,enum fe_sec_mini_cmd burst)164*4882a593Smuzhiyun static int stv0288_send_diseqc_burst(struct dvb_frontend *fe,
165*4882a593Smuzhiyun 				     enum fe_sec_mini_cmd burst)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun 	struct stv0288_state *state = fe->demodulator_priv;
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	dprintk("%s\n", __func__);
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	if (stv0288_writeregI(state, 0x05, 0x03))/* burst mode, single shot */
172*4882a593Smuzhiyun 		return -EREMOTEIO;
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	if (stv0288_writeregI(state, 0x06, burst == SEC_MINI_A ? 0x00 : 0xff))
175*4882a593Smuzhiyun 		return -EREMOTEIO;
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	msleep(15);
178*4882a593Smuzhiyun 	if (stv0288_writeregI(state, 0x05, 0x12))
179*4882a593Smuzhiyun 		return -EREMOTEIO;
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	return 0;
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun 
stv0288_set_tone(struct dvb_frontend * fe,enum fe_sec_tone_mode tone)184*4882a593Smuzhiyun static int stv0288_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun 	struct stv0288_state *state = fe->demodulator_priv;
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	switch (tone) {
189*4882a593Smuzhiyun 	case SEC_TONE_ON:
190*4882a593Smuzhiyun 		if (stv0288_writeregI(state, 0x05, 0x10))/* cont carrier */
191*4882a593Smuzhiyun 			return -EREMOTEIO;
192*4882a593Smuzhiyun 	break;
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	case SEC_TONE_OFF:
195*4882a593Smuzhiyun 		if (stv0288_writeregI(state, 0x05, 0x12))/* burst mode off*/
196*4882a593Smuzhiyun 			return -EREMOTEIO;
197*4882a593Smuzhiyun 	break;
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	default:
200*4882a593Smuzhiyun 		return -EINVAL;
201*4882a593Smuzhiyun 	}
202*4882a593Smuzhiyun 	return 0;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun static u8 stv0288_inittab[] = {
206*4882a593Smuzhiyun 	0x01, 0x15,
207*4882a593Smuzhiyun 	0x02, 0x20,
208*4882a593Smuzhiyun 	0x09, 0x0,
209*4882a593Smuzhiyun 	0x0a, 0x4,
210*4882a593Smuzhiyun 	0x0b, 0x0,
211*4882a593Smuzhiyun 	0x0c, 0x0,
212*4882a593Smuzhiyun 	0x0d, 0x0,
213*4882a593Smuzhiyun 	0x0e, 0xd4,
214*4882a593Smuzhiyun 	0x0f, 0x30,
215*4882a593Smuzhiyun 	0x11, 0x80,
216*4882a593Smuzhiyun 	0x12, 0x03,
217*4882a593Smuzhiyun 	0x13, 0x48,
218*4882a593Smuzhiyun 	0x14, 0x84,
219*4882a593Smuzhiyun 	0x15, 0x45,
220*4882a593Smuzhiyun 	0x16, 0xb7,
221*4882a593Smuzhiyun 	0x17, 0x9c,
222*4882a593Smuzhiyun 	0x18, 0x0,
223*4882a593Smuzhiyun 	0x19, 0xa6,
224*4882a593Smuzhiyun 	0x1a, 0x88,
225*4882a593Smuzhiyun 	0x1b, 0x8f,
226*4882a593Smuzhiyun 	0x1c, 0xf0,
227*4882a593Smuzhiyun 	0x20, 0x0b,
228*4882a593Smuzhiyun 	0x21, 0x54,
229*4882a593Smuzhiyun 	0x22, 0x0,
230*4882a593Smuzhiyun 	0x23, 0x0,
231*4882a593Smuzhiyun 	0x2b, 0xff,
232*4882a593Smuzhiyun 	0x2c, 0xf7,
233*4882a593Smuzhiyun 	0x30, 0x0,
234*4882a593Smuzhiyun 	0x31, 0x1e,
235*4882a593Smuzhiyun 	0x32, 0x14,
236*4882a593Smuzhiyun 	0x33, 0x0f,
237*4882a593Smuzhiyun 	0x34, 0x09,
238*4882a593Smuzhiyun 	0x35, 0x0c,
239*4882a593Smuzhiyun 	0x36, 0x05,
240*4882a593Smuzhiyun 	0x37, 0x2f,
241*4882a593Smuzhiyun 	0x38, 0x16,
242*4882a593Smuzhiyun 	0x39, 0xbe,
243*4882a593Smuzhiyun 	0x3a, 0x0,
244*4882a593Smuzhiyun 	0x3b, 0x13,
245*4882a593Smuzhiyun 	0x3c, 0x11,
246*4882a593Smuzhiyun 	0x3d, 0x30,
247*4882a593Smuzhiyun 	0x40, 0x63,
248*4882a593Smuzhiyun 	0x41, 0x04,
249*4882a593Smuzhiyun 	0x42, 0x20,
250*4882a593Smuzhiyun 	0x43, 0x00,
251*4882a593Smuzhiyun 	0x44, 0x00,
252*4882a593Smuzhiyun 	0x45, 0x00,
253*4882a593Smuzhiyun 	0x46, 0x00,
254*4882a593Smuzhiyun 	0x47, 0x00,
255*4882a593Smuzhiyun 	0x4a, 0x00,
256*4882a593Smuzhiyun 	0x50, 0x10,
257*4882a593Smuzhiyun 	0x51, 0x38,
258*4882a593Smuzhiyun 	0x52, 0x21,
259*4882a593Smuzhiyun 	0x58, 0x54,
260*4882a593Smuzhiyun 	0x59, 0x86,
261*4882a593Smuzhiyun 	0x5a, 0x0,
262*4882a593Smuzhiyun 	0x5b, 0x9b,
263*4882a593Smuzhiyun 	0x5c, 0x08,
264*4882a593Smuzhiyun 	0x5d, 0x7f,
265*4882a593Smuzhiyun 	0x5e, 0x0,
266*4882a593Smuzhiyun 	0x5f, 0xff,
267*4882a593Smuzhiyun 	0x70, 0x0,
268*4882a593Smuzhiyun 	0x71, 0x0,
269*4882a593Smuzhiyun 	0x72, 0x0,
270*4882a593Smuzhiyun 	0x74, 0x0,
271*4882a593Smuzhiyun 	0x75, 0x0,
272*4882a593Smuzhiyun 	0x76, 0x0,
273*4882a593Smuzhiyun 	0x81, 0x0,
274*4882a593Smuzhiyun 	0x82, 0x3f,
275*4882a593Smuzhiyun 	0x83, 0x3f,
276*4882a593Smuzhiyun 	0x84, 0x0,
277*4882a593Smuzhiyun 	0x85, 0x0,
278*4882a593Smuzhiyun 	0x88, 0x0,
279*4882a593Smuzhiyun 	0x89, 0x0,
280*4882a593Smuzhiyun 	0x8a, 0x0,
281*4882a593Smuzhiyun 	0x8b, 0x0,
282*4882a593Smuzhiyun 	0x8c, 0x0,
283*4882a593Smuzhiyun 	0x90, 0x0,
284*4882a593Smuzhiyun 	0x91, 0x0,
285*4882a593Smuzhiyun 	0x92, 0x0,
286*4882a593Smuzhiyun 	0x93, 0x0,
287*4882a593Smuzhiyun 	0x94, 0x1c,
288*4882a593Smuzhiyun 	0x97, 0x0,
289*4882a593Smuzhiyun 	0xa0, 0x48,
290*4882a593Smuzhiyun 	0xa1, 0x0,
291*4882a593Smuzhiyun 	0xb0, 0xb8,
292*4882a593Smuzhiyun 	0xb1, 0x3a,
293*4882a593Smuzhiyun 	0xb2, 0x10,
294*4882a593Smuzhiyun 	0xb3, 0x82,
295*4882a593Smuzhiyun 	0xb4, 0x80,
296*4882a593Smuzhiyun 	0xb5, 0x82,
297*4882a593Smuzhiyun 	0xb6, 0x82,
298*4882a593Smuzhiyun 	0xb7, 0x82,
299*4882a593Smuzhiyun 	0xb8, 0x20,
300*4882a593Smuzhiyun 	0xb9, 0x0,
301*4882a593Smuzhiyun 	0xf0, 0x0,
302*4882a593Smuzhiyun 	0xf1, 0x0,
303*4882a593Smuzhiyun 	0xf2, 0xc0,
304*4882a593Smuzhiyun 	0x51, 0x36,
305*4882a593Smuzhiyun 	0x52, 0x09,
306*4882a593Smuzhiyun 	0x53, 0x94,
307*4882a593Smuzhiyun 	0x54, 0x62,
308*4882a593Smuzhiyun 	0x55, 0x29,
309*4882a593Smuzhiyun 	0x56, 0x64,
310*4882a593Smuzhiyun 	0x57, 0x2b,
311*4882a593Smuzhiyun 	0xff, 0xff,
312*4882a593Smuzhiyun };
313*4882a593Smuzhiyun 
stv0288_set_voltage(struct dvb_frontend * fe,enum fe_sec_voltage volt)314*4882a593Smuzhiyun static int stv0288_set_voltage(struct dvb_frontend *fe,
315*4882a593Smuzhiyun 			       enum fe_sec_voltage volt)
316*4882a593Smuzhiyun {
317*4882a593Smuzhiyun 	dprintk("%s: %s\n", __func__,
318*4882a593Smuzhiyun 		volt == SEC_VOLTAGE_13 ? "SEC_VOLTAGE_13" :
319*4882a593Smuzhiyun 		volt == SEC_VOLTAGE_18 ? "SEC_VOLTAGE_18" : "??");
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	return 0;
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun 
stv0288_init(struct dvb_frontend * fe)324*4882a593Smuzhiyun static int stv0288_init(struct dvb_frontend *fe)
325*4882a593Smuzhiyun {
326*4882a593Smuzhiyun 	struct stv0288_state *state = fe->demodulator_priv;
327*4882a593Smuzhiyun 	int i;
328*4882a593Smuzhiyun 	u8 reg;
329*4882a593Smuzhiyun 	u8 val;
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	dprintk("stv0288: init chip\n");
332*4882a593Smuzhiyun 	stv0288_writeregI(state, 0x41, 0x04);
333*4882a593Smuzhiyun 	msleep(50);
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	/* we have default inittab */
336*4882a593Smuzhiyun 	if (state->config->inittab == NULL) {
337*4882a593Smuzhiyun 		for (i = 0; !(stv0288_inittab[i] == 0xff &&
338*4882a593Smuzhiyun 				stv0288_inittab[i + 1] == 0xff); i += 2)
339*4882a593Smuzhiyun 			stv0288_writeregI(state, stv0288_inittab[i],
340*4882a593Smuzhiyun 					stv0288_inittab[i + 1]);
341*4882a593Smuzhiyun 	} else {
342*4882a593Smuzhiyun 		for (i = 0; ; i += 2)  {
343*4882a593Smuzhiyun 			reg = state->config->inittab[i];
344*4882a593Smuzhiyun 			val = state->config->inittab[i+1];
345*4882a593Smuzhiyun 			if (reg == 0xff && val == 0xff)
346*4882a593Smuzhiyun 				break;
347*4882a593Smuzhiyun 			stv0288_writeregI(state, reg, val);
348*4882a593Smuzhiyun 		}
349*4882a593Smuzhiyun 	}
350*4882a593Smuzhiyun 	return 0;
351*4882a593Smuzhiyun }
352*4882a593Smuzhiyun 
stv0288_read_status(struct dvb_frontend * fe,enum fe_status * status)353*4882a593Smuzhiyun static int stv0288_read_status(struct dvb_frontend *fe, enum fe_status *status)
354*4882a593Smuzhiyun {
355*4882a593Smuzhiyun 	struct stv0288_state *state = fe->demodulator_priv;
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun 	u8 sync = stv0288_readreg(state, 0x24);
358*4882a593Smuzhiyun 	if (sync == 255)
359*4882a593Smuzhiyun 		sync = 0;
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	dprintk("%s : FE_READ_STATUS : VSTATUS: 0x%02x\n", __func__, sync);
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	*status = 0;
364*4882a593Smuzhiyun 	if (sync & 0x80)
365*4882a593Smuzhiyun 		*status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;
366*4882a593Smuzhiyun 	if (sync & 0x10)
367*4882a593Smuzhiyun 		*status |= FE_HAS_VITERBI;
368*4882a593Smuzhiyun 	if (sync & 0x08) {
369*4882a593Smuzhiyun 		*status |= FE_HAS_LOCK;
370*4882a593Smuzhiyun 		dprintk("stv0288 has locked\n");
371*4882a593Smuzhiyun 	}
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 	return 0;
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun 
stv0288_read_ber(struct dvb_frontend * fe,u32 * ber)376*4882a593Smuzhiyun static int stv0288_read_ber(struct dvb_frontend *fe, u32 *ber)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun 	struct stv0288_state *state = fe->demodulator_priv;
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	if (state->errmode != STATUS_BER)
381*4882a593Smuzhiyun 		return 0;
382*4882a593Smuzhiyun 	*ber = (stv0288_readreg(state, 0x26) << 8) |
383*4882a593Smuzhiyun 					stv0288_readreg(state, 0x27);
384*4882a593Smuzhiyun 	dprintk("stv0288_read_ber %d\n", *ber);
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 	return 0;
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun 
stv0288_read_signal_strength(struct dvb_frontend * fe,u16 * strength)390*4882a593Smuzhiyun static int stv0288_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
391*4882a593Smuzhiyun {
392*4882a593Smuzhiyun 	struct stv0288_state *state = fe->demodulator_priv;
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun 	s32 signal =  0xffff - ((stv0288_readreg(state, 0x10) << 8));
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	signal = signal * 5 / 4;
398*4882a593Smuzhiyun 	*strength = (signal > 0xffff) ? 0xffff : (signal < 0) ? 0 : signal;
399*4882a593Smuzhiyun 	dprintk("stv0288_read_signal_strength %d\n", *strength);
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun 	return 0;
402*4882a593Smuzhiyun }
stv0288_sleep(struct dvb_frontend * fe)403*4882a593Smuzhiyun static int stv0288_sleep(struct dvb_frontend *fe)
404*4882a593Smuzhiyun {
405*4882a593Smuzhiyun 	struct stv0288_state *state = fe->demodulator_priv;
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun 	stv0288_writeregI(state, 0x41, 0x84);
408*4882a593Smuzhiyun 	state->initialised = 0;
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun 	return 0;
411*4882a593Smuzhiyun }
stv0288_read_snr(struct dvb_frontend * fe,u16 * snr)412*4882a593Smuzhiyun static int stv0288_read_snr(struct dvb_frontend *fe, u16 *snr)
413*4882a593Smuzhiyun {
414*4882a593Smuzhiyun 	struct stv0288_state *state = fe->demodulator_priv;
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun 	s32 xsnr = 0xffff - ((stv0288_readreg(state, 0x2d) << 8)
417*4882a593Smuzhiyun 			   | stv0288_readreg(state, 0x2e));
418*4882a593Smuzhiyun 	xsnr = 3 * (xsnr - 0xa100);
419*4882a593Smuzhiyun 	*snr = (xsnr > 0xffff) ? 0xffff : (xsnr < 0) ? 0 : xsnr;
420*4882a593Smuzhiyun 	dprintk("stv0288_read_snr %d\n", *snr);
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun 	return 0;
423*4882a593Smuzhiyun }
424*4882a593Smuzhiyun 
stv0288_read_ucblocks(struct dvb_frontend * fe,u32 * ucblocks)425*4882a593Smuzhiyun static int stv0288_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
426*4882a593Smuzhiyun {
427*4882a593Smuzhiyun 	struct stv0288_state *state = fe->demodulator_priv;
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun 	if (state->errmode != STATUS_BER)
430*4882a593Smuzhiyun 		return 0;
431*4882a593Smuzhiyun 	*ucblocks = (stv0288_readreg(state, 0x26) << 8) |
432*4882a593Smuzhiyun 					stv0288_readreg(state, 0x27);
433*4882a593Smuzhiyun 	dprintk("stv0288_read_ber %d\n", *ucblocks);
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun 	return 0;
436*4882a593Smuzhiyun }
437*4882a593Smuzhiyun 
stv0288_set_frontend(struct dvb_frontend * fe)438*4882a593Smuzhiyun static int stv0288_set_frontend(struct dvb_frontend *fe)
439*4882a593Smuzhiyun {
440*4882a593Smuzhiyun 	struct stv0288_state *state = fe->demodulator_priv;
441*4882a593Smuzhiyun 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 	char tm;
444*4882a593Smuzhiyun 	unsigned char tda[3];
445*4882a593Smuzhiyun 	u8 reg, time_out = 0;
446*4882a593Smuzhiyun 
447*4882a593Smuzhiyun 	dprintk("%s : FE_SET_FRONTEND\n", __func__);
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 	if (c->delivery_system != SYS_DVBS) {
450*4882a593Smuzhiyun 		dprintk("%s: unsupported delivery system selected (%d)\n",
451*4882a593Smuzhiyun 			__func__, c->delivery_system);
452*4882a593Smuzhiyun 		return -EOPNOTSUPP;
453*4882a593Smuzhiyun 	}
454*4882a593Smuzhiyun 
455*4882a593Smuzhiyun 	if (state->config->set_ts_params)
456*4882a593Smuzhiyun 		state->config->set_ts_params(fe, 0);
457*4882a593Smuzhiyun 
458*4882a593Smuzhiyun 	/* only frequency & symbol_rate are used for tuner*/
459*4882a593Smuzhiyun 	if (fe->ops.tuner_ops.set_params) {
460*4882a593Smuzhiyun 		fe->ops.tuner_ops.set_params(fe);
461*4882a593Smuzhiyun 		if (fe->ops.i2c_gate_ctrl)
462*4882a593Smuzhiyun 			fe->ops.i2c_gate_ctrl(fe, 0);
463*4882a593Smuzhiyun 	}
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun 	udelay(10);
466*4882a593Smuzhiyun 	stv0288_set_symbolrate(fe, c->symbol_rate);
467*4882a593Smuzhiyun 	/* Carrier lock control register */
468*4882a593Smuzhiyun 	stv0288_writeregI(state, 0x15, 0xc5);
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun 	tda[2] = 0x0; /* CFRL */
471*4882a593Smuzhiyun 	for (tm = -9; tm < 7;) {
472*4882a593Smuzhiyun 		/* Viterbi status */
473*4882a593Smuzhiyun 		reg = stv0288_readreg(state, 0x24);
474*4882a593Smuzhiyun 		if (reg & 0x8)
475*4882a593Smuzhiyun 				break;
476*4882a593Smuzhiyun 		if (reg & 0x80) {
477*4882a593Smuzhiyun 			time_out++;
478*4882a593Smuzhiyun 			if (time_out > 10)
479*4882a593Smuzhiyun 				break;
480*4882a593Smuzhiyun 			tda[2] += 40;
481*4882a593Smuzhiyun 			if (tda[2] < 40)
482*4882a593Smuzhiyun 				tm++;
483*4882a593Smuzhiyun 		} else {
484*4882a593Smuzhiyun 			tm++;
485*4882a593Smuzhiyun 			tda[2] = 0;
486*4882a593Smuzhiyun 			time_out = 0;
487*4882a593Smuzhiyun 		}
488*4882a593Smuzhiyun 		tda[1] = (unsigned char)tm;
489*4882a593Smuzhiyun 		stv0288_writeregI(state, 0x2b, tda[1]);
490*4882a593Smuzhiyun 		stv0288_writeregI(state, 0x2c, tda[2]);
491*4882a593Smuzhiyun 		msleep(30);
492*4882a593Smuzhiyun 	}
493*4882a593Smuzhiyun 	state->tuner_frequency = c->frequency;
494*4882a593Smuzhiyun 	state->fec_inner = FEC_AUTO;
495*4882a593Smuzhiyun 	state->symbol_rate = c->symbol_rate;
496*4882a593Smuzhiyun 
497*4882a593Smuzhiyun 	return 0;
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun 
stv0288_i2c_gate_ctrl(struct dvb_frontend * fe,int enable)500*4882a593Smuzhiyun static int stv0288_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
501*4882a593Smuzhiyun {
502*4882a593Smuzhiyun 	struct stv0288_state *state = fe->demodulator_priv;
503*4882a593Smuzhiyun 
504*4882a593Smuzhiyun 	if (enable)
505*4882a593Smuzhiyun 		stv0288_writeregI(state, 0x01, 0xb5);
506*4882a593Smuzhiyun 	else
507*4882a593Smuzhiyun 		stv0288_writeregI(state, 0x01, 0x35);
508*4882a593Smuzhiyun 
509*4882a593Smuzhiyun 	udelay(1);
510*4882a593Smuzhiyun 
511*4882a593Smuzhiyun 	return 0;
512*4882a593Smuzhiyun }
513*4882a593Smuzhiyun 
stv0288_release(struct dvb_frontend * fe)514*4882a593Smuzhiyun static void stv0288_release(struct dvb_frontend *fe)
515*4882a593Smuzhiyun {
516*4882a593Smuzhiyun 	struct stv0288_state *state = fe->demodulator_priv;
517*4882a593Smuzhiyun 	kfree(state);
518*4882a593Smuzhiyun }
519*4882a593Smuzhiyun 
520*4882a593Smuzhiyun static const struct dvb_frontend_ops stv0288_ops = {
521*4882a593Smuzhiyun 	.delsys = { SYS_DVBS },
522*4882a593Smuzhiyun 	.info = {
523*4882a593Smuzhiyun 		.name			= "ST STV0288 DVB-S",
524*4882a593Smuzhiyun 		.frequency_min_hz	=  950 * MHz,
525*4882a593Smuzhiyun 		.frequency_max_hz	= 2150 * MHz,
526*4882a593Smuzhiyun 		.frequency_stepsize_hz	=    1 * MHz,
527*4882a593Smuzhiyun 		.symbol_rate_min	= 1000000,
528*4882a593Smuzhiyun 		.symbol_rate_max	= 45000000,
529*4882a593Smuzhiyun 		.symbol_rate_tolerance	= 500,	/* ppm */
530*4882a593Smuzhiyun 		.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
531*4882a593Smuzhiyun 		      FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 |
532*4882a593Smuzhiyun 		      FE_CAN_QPSK |
533*4882a593Smuzhiyun 		      FE_CAN_FEC_AUTO
534*4882a593Smuzhiyun 	},
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun 	.release = stv0288_release,
537*4882a593Smuzhiyun 	.init = stv0288_init,
538*4882a593Smuzhiyun 	.sleep = stv0288_sleep,
539*4882a593Smuzhiyun 	.write = stv0288_write,
540*4882a593Smuzhiyun 	.i2c_gate_ctrl = stv0288_i2c_gate_ctrl,
541*4882a593Smuzhiyun 	.read_status = stv0288_read_status,
542*4882a593Smuzhiyun 	.read_ber = stv0288_read_ber,
543*4882a593Smuzhiyun 	.read_signal_strength = stv0288_read_signal_strength,
544*4882a593Smuzhiyun 	.read_snr = stv0288_read_snr,
545*4882a593Smuzhiyun 	.read_ucblocks = stv0288_read_ucblocks,
546*4882a593Smuzhiyun 	.diseqc_send_master_cmd = stv0288_send_diseqc_msg,
547*4882a593Smuzhiyun 	.diseqc_send_burst = stv0288_send_diseqc_burst,
548*4882a593Smuzhiyun 	.set_tone = stv0288_set_tone,
549*4882a593Smuzhiyun 	.set_voltage = stv0288_set_voltage,
550*4882a593Smuzhiyun 
551*4882a593Smuzhiyun 	.set_frontend = stv0288_set_frontend,
552*4882a593Smuzhiyun };
553*4882a593Smuzhiyun 
stv0288_attach(const struct stv0288_config * config,struct i2c_adapter * i2c)554*4882a593Smuzhiyun struct dvb_frontend *stv0288_attach(const struct stv0288_config *config,
555*4882a593Smuzhiyun 				    struct i2c_adapter *i2c)
556*4882a593Smuzhiyun {
557*4882a593Smuzhiyun 	struct stv0288_state *state = NULL;
558*4882a593Smuzhiyun 	int id;
559*4882a593Smuzhiyun 
560*4882a593Smuzhiyun 	/* allocate memory for the internal state */
561*4882a593Smuzhiyun 	state = kzalloc(sizeof(struct stv0288_state), GFP_KERNEL);
562*4882a593Smuzhiyun 	if (state == NULL)
563*4882a593Smuzhiyun 		goto error;
564*4882a593Smuzhiyun 
565*4882a593Smuzhiyun 	/* setup the state */
566*4882a593Smuzhiyun 	state->config = config;
567*4882a593Smuzhiyun 	state->i2c = i2c;
568*4882a593Smuzhiyun 	state->initialised = 0;
569*4882a593Smuzhiyun 	state->tuner_frequency = 0;
570*4882a593Smuzhiyun 	state->symbol_rate = 0;
571*4882a593Smuzhiyun 	state->fec_inner = 0;
572*4882a593Smuzhiyun 	state->errmode = STATUS_BER;
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun 	stv0288_writeregI(state, 0x41, 0x04);
575*4882a593Smuzhiyun 	msleep(200);
576*4882a593Smuzhiyun 	id = stv0288_readreg(state, 0x00);
577*4882a593Smuzhiyun 	dprintk("stv0288 id %x\n", id);
578*4882a593Smuzhiyun 
579*4882a593Smuzhiyun 	/* register 0x00 contains 0x11 for STV0288  */
580*4882a593Smuzhiyun 	if (id != 0x11)
581*4882a593Smuzhiyun 		goto error;
582*4882a593Smuzhiyun 
583*4882a593Smuzhiyun 	/* create dvb_frontend */
584*4882a593Smuzhiyun 	memcpy(&state->frontend.ops, &stv0288_ops,
585*4882a593Smuzhiyun 			sizeof(struct dvb_frontend_ops));
586*4882a593Smuzhiyun 	state->frontend.demodulator_priv = state;
587*4882a593Smuzhiyun 	return &state->frontend;
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun error:
590*4882a593Smuzhiyun 	kfree(state);
591*4882a593Smuzhiyun 
592*4882a593Smuzhiyun 	return NULL;
593*4882a593Smuzhiyun }
594*4882a593Smuzhiyun EXPORT_SYMBOL(stv0288_attach);
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun module_param(debug_legacy_dish_switch, int, 0444);
597*4882a593Smuzhiyun MODULE_PARM_DESC(debug_legacy_dish_switch,
598*4882a593Smuzhiyun 		"Enable timing analysis for Dish Network legacy switches");
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun module_param(debug, int, 0644);
601*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
602*4882a593Smuzhiyun 
603*4882a593Smuzhiyun MODULE_DESCRIPTION("ST STV0288 DVB Demodulator driver");
604*4882a593Smuzhiyun MODULE_AUTHOR("Georg Acher, Bob Liu, Igor liplianin");
605*4882a593Smuzhiyun MODULE_LICENSE("GPL");
606*4882a593Smuzhiyun 
607