xref: /OK3568_Linux_fs/kernel/drivers/media/dvb-frontends/or51132.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *    Support for OR51132 (pcHDTV HD-3000) - VSB/QAM
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *    Copyright (C) 2007 Trent Piepho <xyzzy@speakeasy.org>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  *    Copyright (C) 2005 Kirk Lapray <kirk_lapray@bigfoot.com>
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  *    Based on code from Jack Kelliher (kelliher@xmission.com)
10*4882a593Smuzhiyun  *                           Copyright (C) 2002 & pcHDTV, inc.
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun /*
14*4882a593Smuzhiyun  * This driver needs two external firmware files. Please copy
15*4882a593Smuzhiyun  * "dvb-fe-or51132-vsb.fw" and "dvb-fe-or51132-qam.fw" to
16*4882a593Smuzhiyun  * /usr/lib/hotplug/firmware/ or /lib/firmware/
17*4882a593Smuzhiyun  * (depending on configuration of firmware hotplug).
18*4882a593Smuzhiyun  */
19*4882a593Smuzhiyun #define OR51132_VSB_FIRMWARE "dvb-fe-or51132-vsb.fw"
20*4882a593Smuzhiyun #define OR51132_QAM_FIRMWARE "dvb-fe-or51132-qam.fw"
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #include <linux/kernel.h>
23*4882a593Smuzhiyun #include <linux/module.h>
24*4882a593Smuzhiyun #include <linux/init.h>
25*4882a593Smuzhiyun #include <linux/delay.h>
26*4882a593Smuzhiyun #include <linux/string.h>
27*4882a593Smuzhiyun #include <linux/slab.h>
28*4882a593Smuzhiyun #include <asm/byteorder.h>
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #include <media/dvb_math.h>
31*4882a593Smuzhiyun #include <media/dvb_frontend.h>
32*4882a593Smuzhiyun #include "or51132.h"
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun static int debug;
35*4882a593Smuzhiyun #define dprintk(args...) \
36*4882a593Smuzhiyun 	do { \
37*4882a593Smuzhiyun 		if (debug) printk(KERN_DEBUG "or51132: " args); \
38*4882a593Smuzhiyun 	} while (0)
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun struct or51132_state
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun 	struct i2c_adapter* i2c;
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	/* Configuration settings */
46*4882a593Smuzhiyun 	const struct or51132_config* config;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	struct dvb_frontend frontend;
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun 	/* Demodulator private data */
51*4882a593Smuzhiyun 	enum fe_modulation current_modulation;
52*4882a593Smuzhiyun 	u32 snr; /* Result of last SNR calculation */
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	/* Tuner private data */
55*4882a593Smuzhiyun 	u32 current_frequency;
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun /* Write buffer to demod */
or51132_writebuf(struct or51132_state * state,const u8 * buf,int len)60*4882a593Smuzhiyun static int or51132_writebuf(struct or51132_state *state, const u8 *buf, int len)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun 	int err;
63*4882a593Smuzhiyun 	struct i2c_msg msg = { .addr = state->config->demod_address,
64*4882a593Smuzhiyun 			       .flags = 0, .buf = (u8*)buf, .len = len };
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	/* msleep(20); */ /* doesn't appear to be necessary */
67*4882a593Smuzhiyun 	if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
68*4882a593Smuzhiyun 		printk(KERN_WARNING "or51132: I2C write (addr 0x%02x len %d) error: %d\n",
69*4882a593Smuzhiyun 		       msg.addr, msg.len, err);
70*4882a593Smuzhiyun 		return -EREMOTEIO;
71*4882a593Smuzhiyun 	}
72*4882a593Smuzhiyun 	return 0;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun /* Write constant bytes, e.g. or51132_writebytes(state, 0x04, 0x42, 0x00);
76*4882a593Smuzhiyun    Less code and more efficient that loading a buffer on the stack with
77*4882a593Smuzhiyun    the bytes to send and then calling or51132_writebuf() on that. */
78*4882a593Smuzhiyun #define or51132_writebytes(state, data...)  \
79*4882a593Smuzhiyun 	({ static const u8 _data[] = {data}; \
80*4882a593Smuzhiyun 	or51132_writebuf(state, _data, sizeof(_data)); })
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun /* Read data from demod into buffer.  Returns 0 on success. */
or51132_readbuf(struct or51132_state * state,u8 * buf,int len)83*4882a593Smuzhiyun static int or51132_readbuf(struct or51132_state *state, u8 *buf, int len)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun 	int err;
86*4882a593Smuzhiyun 	struct i2c_msg msg = { .addr = state->config->demod_address,
87*4882a593Smuzhiyun 			       .flags = I2C_M_RD, .buf = buf, .len = len };
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 	/* msleep(20); */ /* doesn't appear to be necessary */
90*4882a593Smuzhiyun 	if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
91*4882a593Smuzhiyun 		printk(KERN_WARNING "or51132: I2C read (addr 0x%02x len %d) error: %d\n",
92*4882a593Smuzhiyun 		       msg.addr, msg.len, err);
93*4882a593Smuzhiyun 		return -EREMOTEIO;
94*4882a593Smuzhiyun 	}
95*4882a593Smuzhiyun 	return 0;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun /* Reads a 16-bit demod register.  Returns <0 on error. */
or51132_readreg(struct or51132_state * state,u8 reg)99*4882a593Smuzhiyun static int or51132_readreg(struct or51132_state *state, u8 reg)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun 	u8 buf[2] = { 0x04, reg };
102*4882a593Smuzhiyun 	struct i2c_msg msg[2] = {
103*4882a593Smuzhiyun 		{.addr = state->config->demod_address, .flags = 0,
104*4882a593Smuzhiyun 		 .buf = buf, .len = 2 },
105*4882a593Smuzhiyun 		{.addr = state->config->demod_address, .flags = I2C_M_RD,
106*4882a593Smuzhiyun 		 .buf = buf, .len = 2 }};
107*4882a593Smuzhiyun 	int err;
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	if ((err = i2c_transfer(state->i2c, msg, 2)) != 2) {
110*4882a593Smuzhiyun 		printk(KERN_WARNING "or51132: I2C error reading register %d: %d\n",
111*4882a593Smuzhiyun 		       reg, err);
112*4882a593Smuzhiyun 		return -EREMOTEIO;
113*4882a593Smuzhiyun 	}
114*4882a593Smuzhiyun 	return buf[0] | (buf[1] << 8);
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun 
or51132_load_firmware(struct dvb_frontend * fe,const struct firmware * fw)117*4882a593Smuzhiyun static int or51132_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun 	struct or51132_state* state = fe->demodulator_priv;
120*4882a593Smuzhiyun 	static const u8 run_buf[] = {0x7F,0x01};
121*4882a593Smuzhiyun 	u8 rec_buf[8];
122*4882a593Smuzhiyun 	u32 firmwareAsize, firmwareBsize;
123*4882a593Smuzhiyun 	int i,ret;
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	dprintk("Firmware is %zd bytes\n",fw->size);
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	/* Get size of firmware A and B */
128*4882a593Smuzhiyun 	firmwareAsize = le32_to_cpu(*((__le32*)fw->data));
129*4882a593Smuzhiyun 	dprintk("FirmwareA is %i bytes\n",firmwareAsize);
130*4882a593Smuzhiyun 	firmwareBsize = le32_to_cpu(*((__le32*)(fw->data+4)));
131*4882a593Smuzhiyun 	dprintk("FirmwareB is %i bytes\n",firmwareBsize);
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	/* Upload firmware */
134*4882a593Smuzhiyun 	if ((ret = or51132_writebuf(state, &fw->data[8], firmwareAsize))) {
135*4882a593Smuzhiyun 		printk(KERN_WARNING "or51132: load_firmware error 1\n");
136*4882a593Smuzhiyun 		return ret;
137*4882a593Smuzhiyun 	}
138*4882a593Smuzhiyun 	if ((ret = or51132_writebuf(state, &fw->data[8+firmwareAsize],
139*4882a593Smuzhiyun 				    firmwareBsize))) {
140*4882a593Smuzhiyun 		printk(KERN_WARNING "or51132: load_firmware error 2\n");
141*4882a593Smuzhiyun 		return ret;
142*4882a593Smuzhiyun 	}
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	if ((ret = or51132_writebuf(state, run_buf, 2))) {
145*4882a593Smuzhiyun 		printk(KERN_WARNING "or51132: load_firmware error 3\n");
146*4882a593Smuzhiyun 		return ret;
147*4882a593Smuzhiyun 	}
148*4882a593Smuzhiyun 	if ((ret = or51132_writebuf(state, run_buf, 2))) {
149*4882a593Smuzhiyun 		printk(KERN_WARNING "or51132: load_firmware error 4\n");
150*4882a593Smuzhiyun 		return ret;
151*4882a593Smuzhiyun 	}
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	/* 50ms for operation to begin */
154*4882a593Smuzhiyun 	msleep(50);
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	/* Read back ucode version to besure we loaded correctly and are really up and running */
157*4882a593Smuzhiyun 	/* Get uCode version */
158*4882a593Smuzhiyun 	if ((ret = or51132_writebytes(state, 0x10, 0x10, 0x00))) {
159*4882a593Smuzhiyun 		printk(KERN_WARNING "or51132: load_firmware error a\n");
160*4882a593Smuzhiyun 		return ret;
161*4882a593Smuzhiyun 	}
162*4882a593Smuzhiyun 	if ((ret = or51132_writebytes(state, 0x04, 0x17))) {
163*4882a593Smuzhiyun 		printk(KERN_WARNING "or51132: load_firmware error b\n");
164*4882a593Smuzhiyun 		return ret;
165*4882a593Smuzhiyun 	}
166*4882a593Smuzhiyun 	if ((ret = or51132_writebytes(state, 0x00, 0x00))) {
167*4882a593Smuzhiyun 		printk(KERN_WARNING "or51132: load_firmware error c\n");
168*4882a593Smuzhiyun 		return ret;
169*4882a593Smuzhiyun 	}
170*4882a593Smuzhiyun 	for (i=0;i<4;i++) {
171*4882a593Smuzhiyun 		/* Once upon a time, this command might have had something
172*4882a593Smuzhiyun 		   to do with getting the firmware version, but it's
173*4882a593Smuzhiyun 		   not used anymore:
174*4882a593Smuzhiyun 		   {0x04,0x00,0x30,0x00,i+1} */
175*4882a593Smuzhiyun 		/* Read 8 bytes, two bytes at a time */
176*4882a593Smuzhiyun 		if ((ret = or51132_readbuf(state, &rec_buf[i*2], 2))) {
177*4882a593Smuzhiyun 			printk(KERN_WARNING
178*4882a593Smuzhiyun 			       "or51132: load_firmware error d - %d\n",i);
179*4882a593Smuzhiyun 			return ret;
180*4882a593Smuzhiyun 		}
181*4882a593Smuzhiyun 	}
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	printk(KERN_WARNING
184*4882a593Smuzhiyun 	       "or51132: Version: %02X%02X%02X%02X-%02X%02X%02X%02X (%02X%01X-%01X-%02X%01X-%01X)\n",
185*4882a593Smuzhiyun 	       rec_buf[1],rec_buf[0],rec_buf[3],rec_buf[2],
186*4882a593Smuzhiyun 	       rec_buf[5],rec_buf[4],rec_buf[7],rec_buf[6],
187*4882a593Smuzhiyun 	       rec_buf[3],rec_buf[2]>>4,rec_buf[2]&0x0f,
188*4882a593Smuzhiyun 	       rec_buf[5],rec_buf[4]>>4,rec_buf[4]&0x0f);
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	if ((ret = or51132_writebytes(state, 0x10, 0x00, 0x00))) {
191*4882a593Smuzhiyun 		printk(KERN_WARNING "or51132: load_firmware error e\n");
192*4882a593Smuzhiyun 		return ret;
193*4882a593Smuzhiyun 	}
194*4882a593Smuzhiyun 	return 0;
195*4882a593Smuzhiyun };
196*4882a593Smuzhiyun 
or51132_init(struct dvb_frontend * fe)197*4882a593Smuzhiyun static int or51132_init(struct dvb_frontend* fe)
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun 	return 0;
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun 
or51132_read_ber(struct dvb_frontend * fe,u32 * ber)202*4882a593Smuzhiyun static int or51132_read_ber(struct dvb_frontend* fe, u32* ber)
203*4882a593Smuzhiyun {
204*4882a593Smuzhiyun 	*ber = 0;
205*4882a593Smuzhiyun 	return 0;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun 
or51132_read_ucblocks(struct dvb_frontend * fe,u32 * ucblocks)208*4882a593Smuzhiyun static int or51132_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun 	*ucblocks = 0;
211*4882a593Smuzhiyun 	return 0;
212*4882a593Smuzhiyun }
213*4882a593Smuzhiyun 
or51132_sleep(struct dvb_frontend * fe)214*4882a593Smuzhiyun static int or51132_sleep(struct dvb_frontend* fe)
215*4882a593Smuzhiyun {
216*4882a593Smuzhiyun 	return 0;
217*4882a593Smuzhiyun }
218*4882a593Smuzhiyun 
or51132_setmode(struct dvb_frontend * fe)219*4882a593Smuzhiyun static int or51132_setmode(struct dvb_frontend* fe)
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun 	struct or51132_state* state = fe->demodulator_priv;
222*4882a593Smuzhiyun 	u8 cmd_buf1[3] = {0x04, 0x01, 0x5f};
223*4882a593Smuzhiyun 	u8 cmd_buf2[3] = {0x1c, 0x00, 0 };
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	dprintk("setmode %d\n",(int)state->current_modulation);
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	switch (state->current_modulation) {
228*4882a593Smuzhiyun 	case VSB_8:
229*4882a593Smuzhiyun 		/* Auto CH, Auto NTSC rej, MPEGser, MPEG2tr, phase noise-high */
230*4882a593Smuzhiyun 		cmd_buf1[2] = 0x50;
231*4882a593Smuzhiyun 		/* REC MODE inv IF spectrum, Normal */
232*4882a593Smuzhiyun 		cmd_buf2[1] = 0x03;
233*4882a593Smuzhiyun 		/* Channel MODE ATSC/VSB8 */
234*4882a593Smuzhiyun 		cmd_buf2[2] = 0x06;
235*4882a593Smuzhiyun 		break;
236*4882a593Smuzhiyun 	/* All QAM modes are:
237*4882a593Smuzhiyun 	   Auto-deinterleave; MPEGser, MPEG2tr, phase noise-high
238*4882a593Smuzhiyun 	   REC MODE Normal Carrier Lock */
239*4882a593Smuzhiyun 	case QAM_AUTO:
240*4882a593Smuzhiyun 		/* Channel MODE Auto QAM64/256 */
241*4882a593Smuzhiyun 		cmd_buf2[2] = 0x4f;
242*4882a593Smuzhiyun 		break;
243*4882a593Smuzhiyun 	case QAM_256:
244*4882a593Smuzhiyun 		/* Channel MODE QAM256 */
245*4882a593Smuzhiyun 		cmd_buf2[2] = 0x45;
246*4882a593Smuzhiyun 		break;
247*4882a593Smuzhiyun 	case QAM_64:
248*4882a593Smuzhiyun 		/* Channel MODE QAM64 */
249*4882a593Smuzhiyun 		cmd_buf2[2] = 0x43;
250*4882a593Smuzhiyun 		break;
251*4882a593Smuzhiyun 	default:
252*4882a593Smuzhiyun 		printk(KERN_WARNING
253*4882a593Smuzhiyun 		       "or51132: setmode: Modulation set to unsupported value (%d)\n",
254*4882a593Smuzhiyun 		       state->current_modulation);
255*4882a593Smuzhiyun 		return -EINVAL;
256*4882a593Smuzhiyun 	}
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	/* Set Receiver 1 register */
259*4882a593Smuzhiyun 	if (or51132_writebuf(state, cmd_buf1, 3)) {
260*4882a593Smuzhiyun 		printk(KERN_WARNING "or51132: set_mode error 1\n");
261*4882a593Smuzhiyun 		return -EREMOTEIO;
262*4882a593Smuzhiyun 	}
263*4882a593Smuzhiyun 	dprintk("set #1 to %02x\n", cmd_buf1[2]);
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	/* Set operation mode in Receiver 6 register */
266*4882a593Smuzhiyun 	if (or51132_writebuf(state, cmd_buf2, 3)) {
267*4882a593Smuzhiyun 		printk(KERN_WARNING "or51132: set_mode error 2\n");
268*4882a593Smuzhiyun 		return -EREMOTEIO;
269*4882a593Smuzhiyun 	}
270*4882a593Smuzhiyun 	dprintk("set #6 to 0x%02x%02x\n", cmd_buf2[1], cmd_buf2[2]);
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun 	return 0;
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun /* Some modulations use the same firmware.  This classifies modulations
276*4882a593Smuzhiyun    by the firmware they use. */
277*4882a593Smuzhiyun #define MOD_FWCLASS_UNKNOWN	0
278*4882a593Smuzhiyun #define MOD_FWCLASS_VSB		1
279*4882a593Smuzhiyun #define MOD_FWCLASS_QAM		2
modulation_fw_class(enum fe_modulation modulation)280*4882a593Smuzhiyun static int modulation_fw_class(enum fe_modulation modulation)
281*4882a593Smuzhiyun {
282*4882a593Smuzhiyun 	switch(modulation) {
283*4882a593Smuzhiyun 	case VSB_8:
284*4882a593Smuzhiyun 		return MOD_FWCLASS_VSB;
285*4882a593Smuzhiyun 	case QAM_AUTO:
286*4882a593Smuzhiyun 	case QAM_64:
287*4882a593Smuzhiyun 	case QAM_256:
288*4882a593Smuzhiyun 		return MOD_FWCLASS_QAM;
289*4882a593Smuzhiyun 	default:
290*4882a593Smuzhiyun 		return MOD_FWCLASS_UNKNOWN;
291*4882a593Smuzhiyun 	}
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun 
or51132_set_parameters(struct dvb_frontend * fe)294*4882a593Smuzhiyun static int or51132_set_parameters(struct dvb_frontend *fe)
295*4882a593Smuzhiyun {
296*4882a593Smuzhiyun 	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
297*4882a593Smuzhiyun 	int ret;
298*4882a593Smuzhiyun 	struct or51132_state* state = fe->demodulator_priv;
299*4882a593Smuzhiyun 	const struct firmware *fw;
300*4882a593Smuzhiyun 	const char *fwname;
301*4882a593Smuzhiyun 	int clock_mode;
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun 	/* Upload new firmware only if we need a different one */
304*4882a593Smuzhiyun 	if (modulation_fw_class(state->current_modulation) !=
305*4882a593Smuzhiyun 	    modulation_fw_class(p->modulation)) {
306*4882a593Smuzhiyun 		switch (modulation_fw_class(p->modulation)) {
307*4882a593Smuzhiyun 		case MOD_FWCLASS_VSB:
308*4882a593Smuzhiyun 			dprintk("set_parameters VSB MODE\n");
309*4882a593Smuzhiyun 			fwname = OR51132_VSB_FIRMWARE;
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 			/* Set non-punctured clock for VSB */
312*4882a593Smuzhiyun 			clock_mode = 0;
313*4882a593Smuzhiyun 			break;
314*4882a593Smuzhiyun 		case MOD_FWCLASS_QAM:
315*4882a593Smuzhiyun 			dprintk("set_parameters QAM MODE\n");
316*4882a593Smuzhiyun 			fwname = OR51132_QAM_FIRMWARE;
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 			/* Set punctured clock for QAM */
319*4882a593Smuzhiyun 			clock_mode = 1;
320*4882a593Smuzhiyun 			break;
321*4882a593Smuzhiyun 		default:
322*4882a593Smuzhiyun 			printk("or51132: Modulation type(%d) UNSUPPORTED\n",
323*4882a593Smuzhiyun 			       p->modulation);
324*4882a593Smuzhiyun 			return -1;
325*4882a593Smuzhiyun 		}
326*4882a593Smuzhiyun 		printk("or51132: Waiting for firmware upload(%s)...\n",
327*4882a593Smuzhiyun 		       fwname);
328*4882a593Smuzhiyun 		ret = request_firmware(&fw, fwname, state->i2c->dev.parent);
329*4882a593Smuzhiyun 		if (ret) {
330*4882a593Smuzhiyun 			printk(KERN_WARNING "or51132: No firmware uploaded(timeout or file not found?)\n");
331*4882a593Smuzhiyun 			return ret;
332*4882a593Smuzhiyun 		}
333*4882a593Smuzhiyun 		ret = or51132_load_firmware(fe, fw);
334*4882a593Smuzhiyun 		release_firmware(fw);
335*4882a593Smuzhiyun 		if (ret) {
336*4882a593Smuzhiyun 			printk(KERN_WARNING "or51132: Writing firmware to device failed!\n");
337*4882a593Smuzhiyun 			return ret;
338*4882a593Smuzhiyun 		}
339*4882a593Smuzhiyun 		printk("or51132: Firmware upload complete.\n");
340*4882a593Smuzhiyun 		state->config->set_ts_params(fe, clock_mode);
341*4882a593Smuzhiyun 	}
342*4882a593Smuzhiyun 	/* Change only if we are actually changing the modulation */
343*4882a593Smuzhiyun 	if (state->current_modulation != p->modulation) {
344*4882a593Smuzhiyun 		state->current_modulation = p->modulation;
345*4882a593Smuzhiyun 		or51132_setmode(fe);
346*4882a593Smuzhiyun 	}
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	if (fe->ops.tuner_ops.set_params) {
349*4882a593Smuzhiyun 		fe->ops.tuner_ops.set_params(fe);
350*4882a593Smuzhiyun 		if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
351*4882a593Smuzhiyun 	}
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 	/* Set to current mode */
354*4882a593Smuzhiyun 	or51132_setmode(fe);
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 	/* Update current frequency */
357*4882a593Smuzhiyun 	state->current_frequency = p->frequency;
358*4882a593Smuzhiyun 	return 0;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun 
or51132_get_parameters(struct dvb_frontend * fe,struct dtv_frontend_properties * p)361*4882a593Smuzhiyun static int or51132_get_parameters(struct dvb_frontend* fe,
362*4882a593Smuzhiyun 				  struct dtv_frontend_properties *p)
363*4882a593Smuzhiyun {
364*4882a593Smuzhiyun 	struct or51132_state* state = fe->demodulator_priv;
365*4882a593Smuzhiyun 	int status;
366*4882a593Smuzhiyun 	int retry = 1;
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun start:
369*4882a593Smuzhiyun 	/* Receiver Status */
370*4882a593Smuzhiyun 	if ((status = or51132_readreg(state, 0x00)) < 0) {
371*4882a593Smuzhiyun 		printk(KERN_WARNING "or51132: get_parameters: error reading receiver status\n");
372*4882a593Smuzhiyun 		return -EREMOTEIO;
373*4882a593Smuzhiyun 	}
374*4882a593Smuzhiyun 	switch(status&0xff) {
375*4882a593Smuzhiyun 	case 0x06:
376*4882a593Smuzhiyun 		p->modulation = VSB_8;
377*4882a593Smuzhiyun 		break;
378*4882a593Smuzhiyun 	case 0x43:
379*4882a593Smuzhiyun 		p->modulation = QAM_64;
380*4882a593Smuzhiyun 		break;
381*4882a593Smuzhiyun 	case 0x45:
382*4882a593Smuzhiyun 		p->modulation = QAM_256;
383*4882a593Smuzhiyun 		break;
384*4882a593Smuzhiyun 	default:
385*4882a593Smuzhiyun 		if (retry--)
386*4882a593Smuzhiyun 			goto start;
387*4882a593Smuzhiyun 		printk(KERN_WARNING "or51132: unknown status 0x%02x\n",
388*4882a593Smuzhiyun 		       status&0xff);
389*4882a593Smuzhiyun 		return -EREMOTEIO;
390*4882a593Smuzhiyun 	}
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun 	/* FIXME: Read frequency from frontend, take AFC into account */
393*4882a593Smuzhiyun 	p->frequency = state->current_frequency;
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 	/* FIXME: How to read inversion setting? Receiver 6 register? */
396*4882a593Smuzhiyun 	p->inversion = INVERSION_AUTO;
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun 	return 0;
399*4882a593Smuzhiyun }
400*4882a593Smuzhiyun 
or51132_read_status(struct dvb_frontend * fe,enum fe_status * status)401*4882a593Smuzhiyun static int or51132_read_status(struct dvb_frontend *fe, enum fe_status *status)
402*4882a593Smuzhiyun {
403*4882a593Smuzhiyun 	struct or51132_state* state = fe->demodulator_priv;
404*4882a593Smuzhiyun 	int reg;
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 	/* Receiver Status */
407*4882a593Smuzhiyun 	if ((reg = or51132_readreg(state, 0x00)) < 0) {
408*4882a593Smuzhiyun 		printk(KERN_WARNING "or51132: read_status: error reading receiver status: %d\n", reg);
409*4882a593Smuzhiyun 		*status = 0;
410*4882a593Smuzhiyun 		return -EREMOTEIO;
411*4882a593Smuzhiyun 	}
412*4882a593Smuzhiyun 	dprintk("%s: read_status %04x\n", __func__, reg);
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 	if (reg & 0x0100) /* Receiver Lock */
415*4882a593Smuzhiyun 		*status = FE_HAS_SIGNAL|FE_HAS_CARRIER|FE_HAS_VITERBI|
416*4882a593Smuzhiyun 			  FE_HAS_SYNC|FE_HAS_LOCK;
417*4882a593Smuzhiyun 	else
418*4882a593Smuzhiyun 		*status = 0;
419*4882a593Smuzhiyun 	return 0;
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun /* Calculate SNR estimation (scaled by 2^24)
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun    8-VSB SNR and QAM equations from Oren datasheets
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun    For 8-VSB:
427*4882a593Smuzhiyun      SNR[dB] = 10 * log10(897152044.8282 / MSE^2 ) - K
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun      Where K = 0 if NTSC rejection filter is OFF; and
430*4882a593Smuzhiyun 	   K = 3 if NTSC rejection filter is ON
431*4882a593Smuzhiyun 
432*4882a593Smuzhiyun    For QAM64:
433*4882a593Smuzhiyun      SNR[dB] = 10 * log10(897152044.8282 / MSE^2 )
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun    For QAM256:
436*4882a593Smuzhiyun      SNR[dB] = 10 * log10(907832426.314266  / MSE^2 )
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun    We re-write the snr equation as:
439*4882a593Smuzhiyun      SNR * 2^24 = 10*(c - 2*intlog10(MSE))
440*4882a593Smuzhiyun    Where for QAM256, c = log10(907832426.314266) * 2^24
441*4882a593Smuzhiyun    and for 8-VSB and QAM64, c = log10(897152044.8282) * 2^24 */
442*4882a593Smuzhiyun 
calculate_snr(u32 mse,u32 c)443*4882a593Smuzhiyun static u32 calculate_snr(u32 mse, u32 c)
444*4882a593Smuzhiyun {
445*4882a593Smuzhiyun 	if (mse == 0) /* No signal */
446*4882a593Smuzhiyun 		return 0;
447*4882a593Smuzhiyun 
448*4882a593Smuzhiyun 	mse = 2*intlog10(mse);
449*4882a593Smuzhiyun 	if (mse > c) {
450*4882a593Smuzhiyun 		/* Negative SNR, which is possible, but realisticly the
451*4882a593Smuzhiyun 		demod will lose lock before the signal gets this bad.  The
452*4882a593Smuzhiyun 		API only allows for unsigned values, so just return 0 */
453*4882a593Smuzhiyun 		return 0;
454*4882a593Smuzhiyun 	}
455*4882a593Smuzhiyun 	return 10*(c - mse);
456*4882a593Smuzhiyun }
457*4882a593Smuzhiyun 
or51132_read_snr(struct dvb_frontend * fe,u16 * snr)458*4882a593Smuzhiyun static int or51132_read_snr(struct dvb_frontend* fe, u16* snr)
459*4882a593Smuzhiyun {
460*4882a593Smuzhiyun 	struct or51132_state* state = fe->demodulator_priv;
461*4882a593Smuzhiyun 	int noise, reg;
462*4882a593Smuzhiyun 	u32 c, usK = 0;
463*4882a593Smuzhiyun 	int retry = 1;
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun start:
466*4882a593Smuzhiyun 	/* SNR after Equalizer */
467*4882a593Smuzhiyun 	noise = or51132_readreg(state, 0x02);
468*4882a593Smuzhiyun 	if (noise < 0) {
469*4882a593Smuzhiyun 		printk(KERN_WARNING "or51132: read_snr: error reading equalizer\n");
470*4882a593Smuzhiyun 		return -EREMOTEIO;
471*4882a593Smuzhiyun 	}
472*4882a593Smuzhiyun 	dprintk("read_snr noise (%d)\n", noise);
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun 	/* Read status, contains modulation type for QAM_AUTO and
475*4882a593Smuzhiyun 	   NTSC filter for VSB */
476*4882a593Smuzhiyun 	reg = or51132_readreg(state, 0x00);
477*4882a593Smuzhiyun 	if (reg < 0) {
478*4882a593Smuzhiyun 		printk(KERN_WARNING "or51132: read_snr: error reading receiver status\n");
479*4882a593Smuzhiyun 		return -EREMOTEIO;
480*4882a593Smuzhiyun 	}
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun 	switch (reg&0xff) {
483*4882a593Smuzhiyun 	case 0x06:
484*4882a593Smuzhiyun 		if (reg & 0x1000) usK = 3 << 24;
485*4882a593Smuzhiyun 		fallthrough;
486*4882a593Smuzhiyun 	case 0x43: /* QAM64 */
487*4882a593Smuzhiyun 		c = 150204167;
488*4882a593Smuzhiyun 		break;
489*4882a593Smuzhiyun 	case 0x45:
490*4882a593Smuzhiyun 		c = 150290396;
491*4882a593Smuzhiyun 		break;
492*4882a593Smuzhiyun 	default:
493*4882a593Smuzhiyun 		printk(KERN_WARNING "or51132: unknown status 0x%02x\n", reg&0xff);
494*4882a593Smuzhiyun 		if (retry--) goto start;
495*4882a593Smuzhiyun 		return -EREMOTEIO;
496*4882a593Smuzhiyun 	}
497*4882a593Smuzhiyun 	dprintk("%s: modulation %02x, NTSC rej O%s\n", __func__,
498*4882a593Smuzhiyun 		reg&0xff, reg&0x1000?"n":"ff");
499*4882a593Smuzhiyun 
500*4882a593Smuzhiyun 	/* Calculate SNR using noise, c, and NTSC rejection correction */
501*4882a593Smuzhiyun 	state->snr = calculate_snr(noise, c) - usK;
502*4882a593Smuzhiyun 	*snr = (state->snr) >> 16;
503*4882a593Smuzhiyun 
504*4882a593Smuzhiyun 	dprintk("%s: noise = 0x%08x, snr = %d.%02d dB\n", __func__, noise,
505*4882a593Smuzhiyun 		state->snr >> 24, (((state->snr>>8) & 0xffff) * 100) >> 16);
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun 	return 0;
508*4882a593Smuzhiyun }
509*4882a593Smuzhiyun 
or51132_read_signal_strength(struct dvb_frontend * fe,u16 * strength)510*4882a593Smuzhiyun static int or51132_read_signal_strength(struct dvb_frontend* fe, u16* strength)
511*4882a593Smuzhiyun {
512*4882a593Smuzhiyun 	/* Calculate Strength from SNR up to 35dB */
513*4882a593Smuzhiyun 	/* Even though the SNR can go higher than 35dB, there is some comfort */
514*4882a593Smuzhiyun 	/* factor in having a range of strong signals that can show at 100%   */
515*4882a593Smuzhiyun 	struct or51132_state* state = (struct or51132_state*) fe->demodulator_priv;
516*4882a593Smuzhiyun 	u16 snr;
517*4882a593Smuzhiyun 	int ret;
518*4882a593Smuzhiyun 
519*4882a593Smuzhiyun 	ret = fe->ops.read_snr(fe, &snr);
520*4882a593Smuzhiyun 	if (ret != 0)
521*4882a593Smuzhiyun 		return ret;
522*4882a593Smuzhiyun 	/* Rather than use the 8.8 value snr, use state->snr which is 8.24 */
523*4882a593Smuzhiyun 	/* scale the range 0 - 35*2^24 into 0 - 65535 */
524*4882a593Smuzhiyun 	if (state->snr >= 8960 * 0x10000)
525*4882a593Smuzhiyun 		*strength = 0xffff;
526*4882a593Smuzhiyun 	else
527*4882a593Smuzhiyun 		*strength = state->snr / 8960;
528*4882a593Smuzhiyun 
529*4882a593Smuzhiyun 	return 0;
530*4882a593Smuzhiyun }
531*4882a593Smuzhiyun 
or51132_get_tune_settings(struct dvb_frontend * fe,struct dvb_frontend_tune_settings * fe_tune_settings)532*4882a593Smuzhiyun static int or51132_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
533*4882a593Smuzhiyun {
534*4882a593Smuzhiyun 	fe_tune_settings->min_delay_ms = 500;
535*4882a593Smuzhiyun 	fe_tune_settings->step_size = 0;
536*4882a593Smuzhiyun 	fe_tune_settings->max_drift = 0;
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun 	return 0;
539*4882a593Smuzhiyun }
540*4882a593Smuzhiyun 
or51132_release(struct dvb_frontend * fe)541*4882a593Smuzhiyun static void or51132_release(struct dvb_frontend* fe)
542*4882a593Smuzhiyun {
543*4882a593Smuzhiyun 	struct or51132_state* state = fe->demodulator_priv;
544*4882a593Smuzhiyun 	kfree(state);
545*4882a593Smuzhiyun }
546*4882a593Smuzhiyun 
547*4882a593Smuzhiyun static const struct dvb_frontend_ops or51132_ops;
548*4882a593Smuzhiyun 
or51132_attach(const struct or51132_config * config,struct i2c_adapter * i2c)549*4882a593Smuzhiyun struct dvb_frontend* or51132_attach(const struct or51132_config* config,
550*4882a593Smuzhiyun 				    struct i2c_adapter* i2c)
551*4882a593Smuzhiyun {
552*4882a593Smuzhiyun 	struct or51132_state* state = NULL;
553*4882a593Smuzhiyun 
554*4882a593Smuzhiyun 	/* Allocate memory for the internal state */
555*4882a593Smuzhiyun 	state = kzalloc(sizeof(struct or51132_state), GFP_KERNEL);
556*4882a593Smuzhiyun 	if (state == NULL)
557*4882a593Smuzhiyun 		return NULL;
558*4882a593Smuzhiyun 
559*4882a593Smuzhiyun 	/* Setup the state */
560*4882a593Smuzhiyun 	state->config = config;
561*4882a593Smuzhiyun 	state->i2c = i2c;
562*4882a593Smuzhiyun 	state->current_frequency = -1;
563*4882a593Smuzhiyun 	state->current_modulation = -1;
564*4882a593Smuzhiyun 
565*4882a593Smuzhiyun 	/* Create dvb_frontend */
566*4882a593Smuzhiyun 	memcpy(&state->frontend.ops, &or51132_ops, sizeof(struct dvb_frontend_ops));
567*4882a593Smuzhiyun 	state->frontend.demodulator_priv = state;
568*4882a593Smuzhiyun 	return &state->frontend;
569*4882a593Smuzhiyun }
570*4882a593Smuzhiyun 
571*4882a593Smuzhiyun static const struct dvb_frontend_ops or51132_ops = {
572*4882a593Smuzhiyun 	.delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
573*4882a593Smuzhiyun 	.info = {
574*4882a593Smuzhiyun 		.name			= "Oren OR51132 VSB/QAM Frontend",
575*4882a593Smuzhiyun 		.frequency_min_hz	=  44 * MHz,
576*4882a593Smuzhiyun 		.frequency_max_hz	= 958 * MHz,
577*4882a593Smuzhiyun 		.frequency_stepsize_hz	= 166666,
578*4882a593Smuzhiyun 		.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
579*4882a593Smuzhiyun 			FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
580*4882a593Smuzhiyun 			FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_QAM_AUTO |
581*4882a593Smuzhiyun 			FE_CAN_8VSB
582*4882a593Smuzhiyun 	},
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 	.release = or51132_release,
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun 	.init = or51132_init,
587*4882a593Smuzhiyun 	.sleep = or51132_sleep,
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun 	.set_frontend = or51132_set_parameters,
590*4882a593Smuzhiyun 	.get_frontend = or51132_get_parameters,
591*4882a593Smuzhiyun 	.get_tune_settings = or51132_get_tune_settings,
592*4882a593Smuzhiyun 
593*4882a593Smuzhiyun 	.read_status = or51132_read_status,
594*4882a593Smuzhiyun 	.read_ber = or51132_read_ber,
595*4882a593Smuzhiyun 	.read_signal_strength = or51132_read_signal_strength,
596*4882a593Smuzhiyun 	.read_snr = or51132_read_snr,
597*4882a593Smuzhiyun 	.read_ucblocks = or51132_read_ucblocks,
598*4882a593Smuzhiyun };
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun module_param(debug, int, 0644);
601*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
602*4882a593Smuzhiyun 
603*4882a593Smuzhiyun MODULE_DESCRIPTION("OR51132 ATSC [pcHDTV HD-3000] (8VSB & ITU J83 AnnexB FEC QAM64/256) Demodulator Driver");
604*4882a593Smuzhiyun MODULE_AUTHOR("Kirk Lapray");
605*4882a593Smuzhiyun MODULE_AUTHOR("Trent Piepho");
606*4882a593Smuzhiyun MODULE_LICENSE("GPL");
607*4882a593Smuzhiyun 
608*4882a593Smuzhiyun EXPORT_SYMBOL(or51132_attach);
609