1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Montage Technology M88DS3103/M88RS6000 demodulator driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #ifndef M88DS3103_H
9*4882a593Smuzhiyun #define M88DS3103_H
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/dvb/frontend.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun /*
14*4882a593Smuzhiyun * I2C address
15*4882a593Smuzhiyun * 0x68,
16*4882a593Smuzhiyun */
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun /**
19*4882a593Smuzhiyun * enum m88ds3103_ts_mode - TS connection mode
20*4882a593Smuzhiyun * @M88DS3103_TS_SERIAL: TS output pin D0, normal
21*4882a593Smuzhiyun * @M88DS3103_TS_SERIAL_D7: TS output pin D7
22*4882a593Smuzhiyun * @M88DS3103_TS_PARALLEL: TS Parallel mode
23*4882a593Smuzhiyun * @M88DS3103_TS_CI: TS CI Mode
24*4882a593Smuzhiyun */
25*4882a593Smuzhiyun enum m88ds3103_ts_mode {
26*4882a593Smuzhiyun M88DS3103_TS_SERIAL,
27*4882a593Smuzhiyun M88DS3103_TS_SERIAL_D7,
28*4882a593Smuzhiyun M88DS3103_TS_PARALLEL,
29*4882a593Smuzhiyun M88DS3103_TS_CI
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun /**
33*4882a593Smuzhiyun * enum m88ds3103_clock_out
34*4882a593Smuzhiyun * @M88DS3103_CLOCK_OUT_DISABLED: Clock output is disabled
35*4882a593Smuzhiyun * @M88DS3103_CLOCK_OUT_ENABLED: Clock output is enabled with crystal
36*4882a593Smuzhiyun * clock.
37*4882a593Smuzhiyun * @M88DS3103_CLOCK_OUT_ENABLED_DIV2: Clock output is enabled with half
38*4882a593Smuzhiyun * crystal clock.
39*4882a593Smuzhiyun */
40*4882a593Smuzhiyun enum m88ds3103_clock_out {
41*4882a593Smuzhiyun M88DS3103_CLOCK_OUT_DISABLED,
42*4882a593Smuzhiyun M88DS3103_CLOCK_OUT_ENABLED,
43*4882a593Smuzhiyun M88DS3103_CLOCK_OUT_ENABLED_DIV2
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun /**
47*4882a593Smuzhiyun * struct m88ds3103_platform_data - Platform data for the m88ds3103 driver
48*4882a593Smuzhiyun * @clk: Clock frequency.
49*4882a593Smuzhiyun * @i2c_wr_max: Max bytes I2C adapter can write at once.
50*4882a593Smuzhiyun * @ts_mode: TS mode.
51*4882a593Smuzhiyun * @ts_clk: TS clock (KHz).
52*4882a593Smuzhiyun * @ts_clk_pol: TS clk polarity. 1-active at falling edge; 0-active at rising
53*4882a593Smuzhiyun * edge.
54*4882a593Smuzhiyun * @spec_inv: Input spectrum inversion.
55*4882a593Smuzhiyun * @agc: AGC configuration.
56*4882a593Smuzhiyun * @agc_inv: AGC polarity.
57*4882a593Smuzhiyun * @clk_out: Clock output.
58*4882a593Smuzhiyun * @envelope_mode: DiSEqC envelope mode.
59*4882a593Smuzhiyun * @lnb_hv_pol: LNB H/V pin polarity. 0: pin high set to VOLTAGE_18, pin low to
60*4882a593Smuzhiyun * set VOLTAGE_13. 1: pin high set to VOLTAGE_13, pin low to set VOLTAGE_18.
61*4882a593Smuzhiyun * @lnb_en_pol: LNB enable pin polarity. 0: pin high to disable, pin low to
62*4882a593Smuzhiyun * enable. 1: pin high to enable, pin low to disable.
63*4882a593Smuzhiyun * @get_dvb_frontend: Get DVB frontend.
64*4882a593Smuzhiyun * @get_i2c_adapter: Get I2C adapter.
65*4882a593Smuzhiyun */
66*4882a593Smuzhiyun struct m88ds3103_platform_data {
67*4882a593Smuzhiyun u32 clk;
68*4882a593Smuzhiyun u16 i2c_wr_max;
69*4882a593Smuzhiyun enum m88ds3103_ts_mode ts_mode;
70*4882a593Smuzhiyun u32 ts_clk;
71*4882a593Smuzhiyun enum m88ds3103_clock_out clk_out;
72*4882a593Smuzhiyun u8 ts_clk_pol:1;
73*4882a593Smuzhiyun u8 spec_inv:1;
74*4882a593Smuzhiyun u8 agc;
75*4882a593Smuzhiyun u8 agc_inv:1;
76*4882a593Smuzhiyun u8 envelope_mode:1;
77*4882a593Smuzhiyun u8 lnb_hv_pol:1;
78*4882a593Smuzhiyun u8 lnb_en_pol:1;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun struct dvb_frontend* (*get_dvb_frontend)(struct i2c_client *);
81*4882a593Smuzhiyun struct i2c_adapter* (*get_i2c_adapter)(struct i2c_client *);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun /* private: For legacy media attach wrapper. Do not set value. */
84*4882a593Smuzhiyun u8 attach_in_use:1;
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /**
88*4882a593Smuzhiyun * struct m88ds3103_config - m88ds3102 configuration
89*4882a593Smuzhiyun *
90*4882a593Smuzhiyun * @i2c_addr: I2C address. Default: none, must set. Example: 0x68, ...
91*4882a593Smuzhiyun * @clock: Device's clock. Default: none, must set. Example: 27000000
92*4882a593Smuzhiyun * @i2c_wr_max: Max bytes I2C provider is asked to write at once.
93*4882a593Smuzhiyun * Default: none, must set. Example: 33, 65, ...
94*4882a593Smuzhiyun * @ts_mode: TS output mode, as defined by &enum m88ds3103_ts_mode.
95*4882a593Smuzhiyun * Default: M88DS3103_TS_SERIAL.
96*4882a593Smuzhiyun * @ts_clk: TS clk in KHz. Default: 0.
97*4882a593Smuzhiyun * @ts_clk_pol: TS clk polarity.Default: 0.
98*4882a593Smuzhiyun * 1-active at falling edge; 0-active at rising edge.
99*4882a593Smuzhiyun * @spec_inv: Spectrum inversion. Default: 0.
100*4882a593Smuzhiyun * @agc_inv: AGC polarity. Default: 0.
101*4882a593Smuzhiyun * @clock_out: Clock output, as defined by &enum m88ds3103_clock_out.
102*4882a593Smuzhiyun * Default: M88DS3103_CLOCK_OUT_DISABLED.
103*4882a593Smuzhiyun * @envelope_mode: DiSEqC envelope mode. Default: 0.
104*4882a593Smuzhiyun * @agc: AGC configuration. Default: none, must set.
105*4882a593Smuzhiyun * @lnb_hv_pol: LNB H/V pin polarity. Default: 0. Values:
106*4882a593Smuzhiyun * 1: pin high set to VOLTAGE_13, pin low to set VOLTAGE_18;
107*4882a593Smuzhiyun * 0: pin high set to VOLTAGE_18, pin low to set VOLTAGE_13.
108*4882a593Smuzhiyun * @lnb_en_pol: LNB enable pin polarity. Default: 0. Values:
109*4882a593Smuzhiyun * 1: pin high to enable, pin low to disable;
110*4882a593Smuzhiyun * 0: pin high to disable, pin low to enable.
111*4882a593Smuzhiyun */
112*4882a593Smuzhiyun struct m88ds3103_config {
113*4882a593Smuzhiyun u8 i2c_addr;
114*4882a593Smuzhiyun u32 clock;
115*4882a593Smuzhiyun u16 i2c_wr_max;
116*4882a593Smuzhiyun u8 ts_mode;
117*4882a593Smuzhiyun u32 ts_clk;
118*4882a593Smuzhiyun u8 ts_clk_pol:1;
119*4882a593Smuzhiyun u8 spec_inv:1;
120*4882a593Smuzhiyun u8 agc_inv:1;
121*4882a593Smuzhiyun u8 clock_out;
122*4882a593Smuzhiyun u8 envelope_mode:1;
123*4882a593Smuzhiyun u8 agc;
124*4882a593Smuzhiyun u8 lnb_hv_pol:1;
125*4882a593Smuzhiyun u8 lnb_en_pol:1;
126*4882a593Smuzhiyun };
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun #if defined(CONFIG_DVB_M88DS3103) || \
129*4882a593Smuzhiyun (defined(CONFIG_DVB_M88DS3103_MODULE) && defined(MODULE))
130*4882a593Smuzhiyun /**
131*4882a593Smuzhiyun * Attach a m88ds3103 demod
132*4882a593Smuzhiyun *
133*4882a593Smuzhiyun * @config: pointer to &struct m88ds3103_config with demod configuration.
134*4882a593Smuzhiyun * @i2c: i2c adapter to use.
135*4882a593Smuzhiyun * @tuner_i2c: on success, returns the I2C adapter associated with
136*4882a593Smuzhiyun * m88ds3103 tuner.
137*4882a593Smuzhiyun *
138*4882a593Smuzhiyun * return: FE pointer on success, NULL on failure.
139*4882a593Smuzhiyun * Note: Do not add new m88ds3103_attach() users! Use I2C bindings instead.
140*4882a593Smuzhiyun */
141*4882a593Smuzhiyun extern struct dvb_frontend *m88ds3103_attach(
142*4882a593Smuzhiyun const struct m88ds3103_config *config,
143*4882a593Smuzhiyun struct i2c_adapter *i2c,
144*4882a593Smuzhiyun struct i2c_adapter **tuner_i2c);
145*4882a593Smuzhiyun extern int m88ds3103_get_agc_pwm(struct dvb_frontend *fe, u8 *_agc_pwm);
146*4882a593Smuzhiyun #else
m88ds3103_attach(const struct m88ds3103_config * config,struct i2c_adapter * i2c,struct i2c_adapter ** tuner_i2c)147*4882a593Smuzhiyun static inline struct dvb_frontend *m88ds3103_attach(
148*4882a593Smuzhiyun const struct m88ds3103_config *config,
149*4882a593Smuzhiyun struct i2c_adapter *i2c,
150*4882a593Smuzhiyun struct i2c_adapter **tuner_i2c)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun pr_warn("%s: driver disabled by Kconfig\n", __func__);
153*4882a593Smuzhiyun return NULL;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun #define m88ds3103_get_agc_pwm NULL
156*4882a593Smuzhiyun #endif
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun #endif
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