1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Driver for Sharp IX2505V (marked B0017) DVB-S silicon tuner
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2010 Malcolm Priestley
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/dvb/frontend.h>
10*4882a593Smuzhiyun #include <linux/slab.h>
11*4882a593Smuzhiyun #include <linux/types.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include "ix2505v.h"
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun static int ix2505v_debug;
16*4882a593Smuzhiyun #define dprintk(level, args...) do { \
17*4882a593Smuzhiyun if (ix2505v_debug & level) \
18*4882a593Smuzhiyun printk(KERN_DEBUG "ix2505v: " args); \
19*4882a593Smuzhiyun } while (0)
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define deb_info(args...) dprintk(0x01, args)
22*4882a593Smuzhiyun #define deb_i2c(args...) dprintk(0x02, args)
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun struct ix2505v_state {
25*4882a593Smuzhiyun struct i2c_adapter *i2c;
26*4882a593Smuzhiyun const struct ix2505v_config *config;
27*4882a593Smuzhiyun u32 frequency;
28*4882a593Smuzhiyun };
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun /*
31*4882a593Smuzhiyun * Data read format of the Sharp IX2505V B0017
32*4882a593Smuzhiyun *
33*4882a593Smuzhiyun * byte1: 1 | 1 | 0 | 0 | 0 | MA1 | MA0 | 1
34*4882a593Smuzhiyun * byte2: POR | FL | RD2 | RD1 | RD0 | X | X | X
35*4882a593Smuzhiyun *
36*4882a593Smuzhiyun * byte1 = address
37*4882a593Smuzhiyun * byte2;
38*4882a593Smuzhiyun * POR = Power on Reset (VCC H=<2.2v L=>2.2v)
39*4882a593Smuzhiyun * FL = Phase Lock (H=lock L=unlock)
40*4882a593Smuzhiyun * RD0-2 = Reserved internal operations
41*4882a593Smuzhiyun *
42*4882a593Smuzhiyun * Only POR can be used to check the tuner is present
43*4882a593Smuzhiyun *
44*4882a593Smuzhiyun * Caution: after byte2 the I2C reverts to write mode continuing to read
45*4882a593Smuzhiyun * may corrupt tuning data.
46*4882a593Smuzhiyun *
47*4882a593Smuzhiyun */
48*4882a593Smuzhiyun
ix2505v_read_status_reg(struct ix2505v_state * state)49*4882a593Smuzhiyun static int ix2505v_read_status_reg(struct ix2505v_state *state)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun u8 addr = state->config->tuner_address;
52*4882a593Smuzhiyun u8 b2[] = {0};
53*4882a593Smuzhiyun int ret;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun struct i2c_msg msg[1] = {
56*4882a593Smuzhiyun { .addr = addr, .flags = I2C_M_RD, .buf = b2, .len = 1 }
57*4882a593Smuzhiyun };
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun ret = i2c_transfer(state->i2c, msg, 1);
60*4882a593Smuzhiyun deb_i2c("Read %s ", __func__);
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun return (ret == 1) ? (int) b2[0] : -1;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
ix2505v_write(struct ix2505v_state * state,u8 buf[],u8 count)65*4882a593Smuzhiyun static int ix2505v_write(struct ix2505v_state *state, u8 buf[], u8 count)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun struct i2c_msg msg[1] = {
68*4882a593Smuzhiyun { .addr = state->config->tuner_address, .flags = 0,
69*4882a593Smuzhiyun .buf = buf, .len = count },
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun int ret;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun ret = i2c_transfer(state->i2c, msg, 1);
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun if (ret != 1) {
77*4882a593Smuzhiyun deb_i2c("%s: i2c error, ret=%d\n", __func__, ret);
78*4882a593Smuzhiyun return -EIO;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun return 0;
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
ix2505v_release(struct dvb_frontend * fe)84*4882a593Smuzhiyun static void ix2505v_release(struct dvb_frontend *fe)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun struct ix2505v_state *state = fe->tuner_priv;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun fe->tuner_priv = NULL;
89*4882a593Smuzhiyun kfree(state);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun /*
94*4882a593Smuzhiyun * Data write format of the Sharp IX2505V B0017
95*4882a593Smuzhiyun *
96*4882a593Smuzhiyun * byte1: 1 | 1 | 0 | 0 | 0 | 0(MA1)| 0(MA0)| 0
97*4882a593Smuzhiyun * byte2: 0 | BG1 | BG2 | N8 | N7 | N6 | N5 | N4
98*4882a593Smuzhiyun * byte3: N3 | N2 | N1 | A5 | A4 | A3 | A2 | A1
99*4882a593Smuzhiyun * byte4: 1 | 1(C1) | 1(C0) | PD5 | PD4 | TM | 0(RTS)| 1(REF)
100*4882a593Smuzhiyun * byte5: BA2 | BA1 | BA0 | PSC | PD3 |PD2/TS2|DIV/TS1|PD0/TS0
101*4882a593Smuzhiyun *
102*4882a593Smuzhiyun * byte1 = address
103*4882a593Smuzhiyun *
104*4882a593Smuzhiyun * Write order
105*4882a593Smuzhiyun * 1) byte1 -> byte2 -> byte3 -> byte4 -> byte5
106*4882a593Smuzhiyun * 2) byte1 -> byte4 -> byte5 -> byte2 -> byte3
107*4882a593Smuzhiyun * 3) byte1 -> byte2 -> byte3 -> byte4
108*4882a593Smuzhiyun * 4) byte1 -> byte4 -> byte5 -> byte2
109*4882a593Smuzhiyun * 5) byte1 -> byte2 -> byte3
110*4882a593Smuzhiyun * 6) byte1 -> byte4 -> byte5
111*4882a593Smuzhiyun * 7) byte1 -> byte2
112*4882a593Smuzhiyun * 8) byte1 -> byte4
113*4882a593Smuzhiyun *
114*4882a593Smuzhiyun * Recommended Setup
115*4882a593Smuzhiyun * 1 -> 8 -> 6
116*4882a593Smuzhiyun */
117*4882a593Smuzhiyun
ix2505v_set_params(struct dvb_frontend * fe)118*4882a593Smuzhiyun static int ix2505v_set_params(struct dvb_frontend *fe)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun struct dtv_frontend_properties *c = &fe->dtv_property_cache;
121*4882a593Smuzhiyun struct ix2505v_state *state = fe->tuner_priv;
122*4882a593Smuzhiyun u32 frequency = c->frequency;
123*4882a593Smuzhiyun u32 b_w = (c->symbol_rate * 27) / 32000;
124*4882a593Smuzhiyun u32 div_factor, N , A, x;
125*4882a593Smuzhiyun int ret = 0, len;
126*4882a593Smuzhiyun u8 gain, cc, ref, psc, local_osc, lpf;
127*4882a593Smuzhiyun u8 data[4] = {0};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun if ((frequency < fe->ops.info.frequency_min_hz / kHz)
130*4882a593Smuzhiyun || (frequency > fe->ops.info.frequency_max_hz / kHz))
131*4882a593Smuzhiyun return -EINVAL;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun if (state->config->tuner_gain)
134*4882a593Smuzhiyun gain = (state->config->tuner_gain < 4)
135*4882a593Smuzhiyun ? state->config->tuner_gain : 0;
136*4882a593Smuzhiyun else
137*4882a593Smuzhiyun gain = 0x0;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun if (state->config->tuner_chargepump)
140*4882a593Smuzhiyun cc = state->config->tuner_chargepump;
141*4882a593Smuzhiyun else
142*4882a593Smuzhiyun cc = 0x3;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun ref = 8; /* REF =1 */
145*4882a593Smuzhiyun psc = 32; /* PSC = 0 */
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun div_factor = (frequency * ref) / 40; /* local osc = 4Mhz */
148*4882a593Smuzhiyun x = div_factor / psc;
149*4882a593Smuzhiyun N = x/100;
150*4882a593Smuzhiyun A = ((x - (N * 100)) * psc) / 100;
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun data[0] = ((gain & 0x3) << 5) | (N >> 3);
153*4882a593Smuzhiyun data[1] = (N << 5) | (A & 0x1f);
154*4882a593Smuzhiyun data[2] = 0x81 | ((cc & 0x3) << 5) ; /*PD5,PD4 & TM = 0|C1,C0|REF=1*/
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun deb_info("Frq=%d x=%d N=%d A=%d\n", frequency, x, N, A);
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun if (frequency <= 1065000)
159*4882a593Smuzhiyun local_osc = (6 << 5) | 2;
160*4882a593Smuzhiyun else if (frequency <= 1170000)
161*4882a593Smuzhiyun local_osc = (7 << 5) | 2;
162*4882a593Smuzhiyun else if (frequency <= 1300000)
163*4882a593Smuzhiyun local_osc = (1 << 5);
164*4882a593Smuzhiyun else if (frequency <= 1445000)
165*4882a593Smuzhiyun local_osc = (2 << 5);
166*4882a593Smuzhiyun else if (frequency <= 1607000)
167*4882a593Smuzhiyun local_osc = (3 << 5);
168*4882a593Smuzhiyun else if (frequency <= 1778000)
169*4882a593Smuzhiyun local_osc = (4 << 5);
170*4882a593Smuzhiyun else if (frequency <= 1942000)
171*4882a593Smuzhiyun local_osc = (5 << 5);
172*4882a593Smuzhiyun else /*frequency up to 2150000*/
173*4882a593Smuzhiyun local_osc = (6 << 5);
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun data[3] = local_osc; /* all other bits set 0 */
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun if (b_w <= 10000)
178*4882a593Smuzhiyun lpf = 0xc;
179*4882a593Smuzhiyun else if (b_w <= 12000)
180*4882a593Smuzhiyun lpf = 0x2;
181*4882a593Smuzhiyun else if (b_w <= 14000)
182*4882a593Smuzhiyun lpf = 0xa;
183*4882a593Smuzhiyun else if (b_w <= 16000)
184*4882a593Smuzhiyun lpf = 0x6;
185*4882a593Smuzhiyun else if (b_w <= 18000)
186*4882a593Smuzhiyun lpf = 0xe;
187*4882a593Smuzhiyun else if (b_w <= 20000)
188*4882a593Smuzhiyun lpf = 0x1;
189*4882a593Smuzhiyun else if (b_w <= 22000)
190*4882a593Smuzhiyun lpf = 0x9;
191*4882a593Smuzhiyun else if (b_w <= 24000)
192*4882a593Smuzhiyun lpf = 0x5;
193*4882a593Smuzhiyun else if (b_w <= 26000)
194*4882a593Smuzhiyun lpf = 0xd;
195*4882a593Smuzhiyun else if (b_w <= 28000)
196*4882a593Smuzhiyun lpf = 0x3;
197*4882a593Smuzhiyun else
198*4882a593Smuzhiyun lpf = 0xb;
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun deb_info("Osc=%x b_w=%x lpf=%x\n", local_osc, b_w, lpf);
201*4882a593Smuzhiyun deb_info("Data 0=[%4phN]\n", data);
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun if (fe->ops.i2c_gate_ctrl)
204*4882a593Smuzhiyun fe->ops.i2c_gate_ctrl(fe, 1);
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun len = sizeof(data);
207*4882a593Smuzhiyun ret |= ix2505v_write(state, data, len);
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun data[2] |= 0x4; /* set TM = 1 other bits same */
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun if (fe->ops.i2c_gate_ctrl)
212*4882a593Smuzhiyun fe->ops.i2c_gate_ctrl(fe, 1);
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun len = 1;
215*4882a593Smuzhiyun ret |= ix2505v_write(state, &data[2], len); /* write byte 4 only */
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun msleep(10);
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun data[2] |= ((lpf >> 2) & 0x3) << 3; /* lpf */
220*4882a593Smuzhiyun data[3] |= (lpf & 0x3) << 2;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun deb_info("Data 2=[%x%x]\n", data[2], data[3]);
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun if (fe->ops.i2c_gate_ctrl)
225*4882a593Smuzhiyun fe->ops.i2c_gate_ctrl(fe, 1);
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun len = 2;
228*4882a593Smuzhiyun ret |= ix2505v_write(state, &data[2], len); /* write byte 4 & 5 */
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun if (state->config->min_delay_ms)
231*4882a593Smuzhiyun msleep(state->config->min_delay_ms);
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun state->frequency = frequency;
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun return ret;
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun
ix2505v_get_frequency(struct dvb_frontend * fe,u32 * frequency)238*4882a593Smuzhiyun static int ix2505v_get_frequency(struct dvb_frontend *fe, u32 *frequency)
239*4882a593Smuzhiyun {
240*4882a593Smuzhiyun struct ix2505v_state *state = fe->tuner_priv;
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun *frequency = state->frequency;
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun return 0;
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun static const struct dvb_tuner_ops ix2505v_tuner_ops = {
248*4882a593Smuzhiyun .info = {
249*4882a593Smuzhiyun .name = "Sharp IX2505V (B0017)",
250*4882a593Smuzhiyun .frequency_min_hz = 950 * MHz,
251*4882a593Smuzhiyun .frequency_max_hz = 2175 * MHz
252*4882a593Smuzhiyun },
253*4882a593Smuzhiyun .release = ix2505v_release,
254*4882a593Smuzhiyun .set_params = ix2505v_set_params,
255*4882a593Smuzhiyun .get_frequency = ix2505v_get_frequency,
256*4882a593Smuzhiyun };
257*4882a593Smuzhiyun
ix2505v_attach(struct dvb_frontend * fe,const struct ix2505v_config * config,struct i2c_adapter * i2c)258*4882a593Smuzhiyun struct dvb_frontend *ix2505v_attach(struct dvb_frontend *fe,
259*4882a593Smuzhiyun const struct ix2505v_config *config,
260*4882a593Smuzhiyun struct i2c_adapter *i2c)
261*4882a593Smuzhiyun {
262*4882a593Smuzhiyun struct ix2505v_state *state = NULL;
263*4882a593Smuzhiyun int ret;
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun if (NULL == config) {
266*4882a593Smuzhiyun deb_i2c("%s: no config ", __func__);
267*4882a593Smuzhiyun goto error;
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun state = kzalloc(sizeof(struct ix2505v_state), GFP_KERNEL);
271*4882a593Smuzhiyun if (NULL == state)
272*4882a593Smuzhiyun return NULL;
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun state->config = config;
275*4882a593Smuzhiyun state->i2c = i2c;
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun if (state->config->tuner_write_only) {
278*4882a593Smuzhiyun if (fe->ops.i2c_gate_ctrl)
279*4882a593Smuzhiyun fe->ops.i2c_gate_ctrl(fe, 1);
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun ret = ix2505v_read_status_reg(state);
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun if (ret & 0x80) {
284*4882a593Smuzhiyun deb_i2c("%s: No IX2505V found\n", __func__);
285*4882a593Smuzhiyun goto error;
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun if (fe->ops.i2c_gate_ctrl)
289*4882a593Smuzhiyun fe->ops.i2c_gate_ctrl(fe, 0);
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun fe->tuner_priv = state;
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun memcpy(&fe->ops.tuner_ops, &ix2505v_tuner_ops,
295*4882a593Smuzhiyun sizeof(struct dvb_tuner_ops));
296*4882a593Smuzhiyun deb_i2c("%s: initialization (%s addr=0x%02x) ok\n",
297*4882a593Smuzhiyun __func__, fe->ops.tuner_ops.info.name, config->tuner_address);
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun return fe;
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun error:
302*4882a593Smuzhiyun kfree(state);
303*4882a593Smuzhiyun return NULL;
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun EXPORT_SYMBOL(ix2505v_attach);
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun module_param_named(debug, ix2505v_debug, int, 0644);
308*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
309*4882a593Smuzhiyun MODULE_DESCRIPTION("DVB IX2505V tuner driver");
310*4882a593Smuzhiyun MODULE_AUTHOR("Malcolm Priestley");
311*4882a593Smuzhiyun MODULE_LICENSE("GPL");
312