1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Frontend driver for the GENPIX 8pks/qpsk/DCII USB2.0 DVB-S module
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2006,2007 Alan Nisota (alannisota@gmail.com)
6*4882a593Smuzhiyun * Copyright (C) 2006,2007 Genpix Electronics (genpix@genpix-electronics.com)
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Thanks to GENPIX for the sample code used to implement this module.
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * This module is based off the vp7045 and vp702x modules
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include "gp8psk-fe.h"
16*4882a593Smuzhiyun #include <media/dvb_frontend.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun static int debug;
19*4882a593Smuzhiyun module_param(debug, int, 0644);
20*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define dprintk(fmt, arg...) do { \
23*4882a593Smuzhiyun if (debug) \
24*4882a593Smuzhiyun printk(KERN_DEBUG pr_fmt("%s: " fmt), \
25*4882a593Smuzhiyun __func__, ##arg); \
26*4882a593Smuzhiyun } while (0)
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun struct gp8psk_fe_state {
29*4882a593Smuzhiyun struct dvb_frontend fe;
30*4882a593Smuzhiyun void *priv;
31*4882a593Smuzhiyun const struct gp8psk_fe_ops *ops;
32*4882a593Smuzhiyun bool is_rev1;
33*4882a593Smuzhiyun u8 lock;
34*4882a593Smuzhiyun u16 snr;
35*4882a593Smuzhiyun unsigned long next_status_check;
36*4882a593Smuzhiyun unsigned long status_check_interval;
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun
gp8psk_tuned_to_DCII(struct dvb_frontend * fe)39*4882a593Smuzhiyun static int gp8psk_tuned_to_DCII(struct dvb_frontend *fe)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun struct gp8psk_fe_state *st = fe->demodulator_priv;
42*4882a593Smuzhiyun u8 status;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun st->ops->in(st->priv, GET_8PSK_CONFIG, 0, 0, &status, 1);
45*4882a593Smuzhiyun return status & bmDCtuned;
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun
gp8psk_set_tuner_mode(struct dvb_frontend * fe,int mode)48*4882a593Smuzhiyun static int gp8psk_set_tuner_mode(struct dvb_frontend *fe, int mode)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun struct gp8psk_fe_state *st = fe->demodulator_priv;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun return st->ops->out(st->priv, SET_8PSK_CONFIG, mode, 0, NULL, 0);
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
gp8psk_fe_update_status(struct gp8psk_fe_state * st)55*4882a593Smuzhiyun static int gp8psk_fe_update_status(struct gp8psk_fe_state *st)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun u8 buf[6];
58*4882a593Smuzhiyun if (time_after(jiffies,st->next_status_check)) {
59*4882a593Smuzhiyun st->ops->in(st->priv, GET_SIGNAL_LOCK, 0, 0, &st->lock, 1);
60*4882a593Smuzhiyun st->ops->in(st->priv, GET_SIGNAL_STRENGTH, 0, 0, buf, 6);
61*4882a593Smuzhiyun st->snr = (buf[1]) << 8 | buf[0];
62*4882a593Smuzhiyun st->next_status_check = jiffies + (st->status_check_interval*HZ)/1000;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun return 0;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
gp8psk_fe_read_status(struct dvb_frontend * fe,enum fe_status * status)67*4882a593Smuzhiyun static int gp8psk_fe_read_status(struct dvb_frontend *fe,
68*4882a593Smuzhiyun enum fe_status *status)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun struct gp8psk_fe_state *st = fe->demodulator_priv;
71*4882a593Smuzhiyun gp8psk_fe_update_status(st);
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun if (st->lock)
74*4882a593Smuzhiyun *status = FE_HAS_LOCK | FE_HAS_SYNC | FE_HAS_VITERBI | FE_HAS_SIGNAL | FE_HAS_CARRIER;
75*4882a593Smuzhiyun else
76*4882a593Smuzhiyun *status = 0;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun if (*status & FE_HAS_LOCK)
79*4882a593Smuzhiyun st->status_check_interval = 1000;
80*4882a593Smuzhiyun else
81*4882a593Smuzhiyun st->status_check_interval = 100;
82*4882a593Smuzhiyun return 0;
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun /* not supported by this Frontend */
gp8psk_fe_read_ber(struct dvb_frontend * fe,u32 * ber)86*4882a593Smuzhiyun static int gp8psk_fe_read_ber(struct dvb_frontend* fe, u32 *ber)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun (void) fe;
89*4882a593Smuzhiyun *ber = 0;
90*4882a593Smuzhiyun return 0;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun /* not supported by this Frontend */
gp8psk_fe_read_unc_blocks(struct dvb_frontend * fe,u32 * unc)94*4882a593Smuzhiyun static int gp8psk_fe_read_unc_blocks(struct dvb_frontend* fe, u32 *unc)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun (void) fe;
97*4882a593Smuzhiyun *unc = 0;
98*4882a593Smuzhiyun return 0;
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
gp8psk_fe_read_snr(struct dvb_frontend * fe,u16 * snr)101*4882a593Smuzhiyun static int gp8psk_fe_read_snr(struct dvb_frontend* fe, u16 *snr)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun struct gp8psk_fe_state *st = fe->demodulator_priv;
104*4882a593Smuzhiyun gp8psk_fe_update_status(st);
105*4882a593Smuzhiyun /* snr is reported in dBu*256 */
106*4882a593Smuzhiyun *snr = st->snr;
107*4882a593Smuzhiyun return 0;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
gp8psk_fe_read_signal_strength(struct dvb_frontend * fe,u16 * strength)110*4882a593Smuzhiyun static int gp8psk_fe_read_signal_strength(struct dvb_frontend* fe, u16 *strength)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun struct gp8psk_fe_state *st = fe->demodulator_priv;
113*4882a593Smuzhiyun gp8psk_fe_update_status(st);
114*4882a593Smuzhiyun /* snr is reported in dBu*256 */
115*4882a593Smuzhiyun /* snr / 38.4 ~= 100% strength */
116*4882a593Smuzhiyun /* snr * 17 returns 100% strength as 65535 */
117*4882a593Smuzhiyun if (st->snr > 0xf00)
118*4882a593Smuzhiyun *strength = 0xffff;
119*4882a593Smuzhiyun else
120*4882a593Smuzhiyun *strength = (st->snr << 4) + st->snr; /* snr*17 */
121*4882a593Smuzhiyun return 0;
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun
gp8psk_fe_get_tune_settings(struct dvb_frontend * fe,struct dvb_frontend_tune_settings * tune)124*4882a593Smuzhiyun static int gp8psk_fe_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun tune->min_delay_ms = 800;
127*4882a593Smuzhiyun return 0;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun
gp8psk_fe_set_frontend(struct dvb_frontend * fe)130*4882a593Smuzhiyun static int gp8psk_fe_set_frontend(struct dvb_frontend *fe)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun struct gp8psk_fe_state *st = fe->demodulator_priv;
133*4882a593Smuzhiyun struct dtv_frontend_properties *c = &fe->dtv_property_cache;
134*4882a593Smuzhiyun u8 cmd[10];
135*4882a593Smuzhiyun u32 freq = c->frequency * 1000;
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun dprintk("%s()\n", __func__);
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun cmd[4] = freq & 0xff;
140*4882a593Smuzhiyun cmd[5] = (freq >> 8) & 0xff;
141*4882a593Smuzhiyun cmd[6] = (freq >> 16) & 0xff;
142*4882a593Smuzhiyun cmd[7] = (freq >> 24) & 0xff;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun /* backwards compatibility: DVB-S + 8-PSK were used for Turbo-FEC */
145*4882a593Smuzhiyun if (c->delivery_system == SYS_DVBS && c->modulation == PSK_8)
146*4882a593Smuzhiyun c->delivery_system = SYS_TURBO;
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun switch (c->delivery_system) {
149*4882a593Smuzhiyun case SYS_DVBS:
150*4882a593Smuzhiyun if (c->modulation != QPSK) {
151*4882a593Smuzhiyun dprintk("%s: unsupported modulation selected (%d)\n",
152*4882a593Smuzhiyun __func__, c->modulation);
153*4882a593Smuzhiyun return -EOPNOTSUPP;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun c->fec_inner = FEC_AUTO;
156*4882a593Smuzhiyun break;
157*4882a593Smuzhiyun case SYS_DVBS2: /* kept for backwards compatibility */
158*4882a593Smuzhiyun dprintk("%s: DVB-S2 delivery system selected\n", __func__);
159*4882a593Smuzhiyun break;
160*4882a593Smuzhiyun case SYS_TURBO:
161*4882a593Smuzhiyun dprintk("%s: Turbo-FEC delivery system selected\n", __func__);
162*4882a593Smuzhiyun break;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun default:
165*4882a593Smuzhiyun dprintk("%s: unsupported delivery system selected (%d)\n",
166*4882a593Smuzhiyun __func__, c->delivery_system);
167*4882a593Smuzhiyun return -EOPNOTSUPP;
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun cmd[0] = c->symbol_rate & 0xff;
171*4882a593Smuzhiyun cmd[1] = (c->symbol_rate >> 8) & 0xff;
172*4882a593Smuzhiyun cmd[2] = (c->symbol_rate >> 16) & 0xff;
173*4882a593Smuzhiyun cmd[3] = (c->symbol_rate >> 24) & 0xff;
174*4882a593Smuzhiyun switch (c->modulation) {
175*4882a593Smuzhiyun case QPSK:
176*4882a593Smuzhiyun if (st->is_rev1)
177*4882a593Smuzhiyun if (gp8psk_tuned_to_DCII(fe))
178*4882a593Smuzhiyun st->ops->reload(st->priv);
179*4882a593Smuzhiyun switch (c->fec_inner) {
180*4882a593Smuzhiyun case FEC_1_2:
181*4882a593Smuzhiyun cmd[9] = 0; break;
182*4882a593Smuzhiyun case FEC_2_3:
183*4882a593Smuzhiyun cmd[9] = 1; break;
184*4882a593Smuzhiyun case FEC_3_4:
185*4882a593Smuzhiyun cmd[9] = 2; break;
186*4882a593Smuzhiyun case FEC_5_6:
187*4882a593Smuzhiyun cmd[9] = 3; break;
188*4882a593Smuzhiyun case FEC_7_8:
189*4882a593Smuzhiyun cmd[9] = 4; break;
190*4882a593Smuzhiyun case FEC_AUTO:
191*4882a593Smuzhiyun cmd[9] = 5; break;
192*4882a593Smuzhiyun default:
193*4882a593Smuzhiyun cmd[9] = 5; break;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun if (c->delivery_system == SYS_TURBO)
196*4882a593Smuzhiyun cmd[8] = ADV_MOD_TURBO_QPSK;
197*4882a593Smuzhiyun else
198*4882a593Smuzhiyun cmd[8] = ADV_MOD_DVB_QPSK;
199*4882a593Smuzhiyun break;
200*4882a593Smuzhiyun case PSK_8: /* PSK_8 is for compatibility with DN */
201*4882a593Smuzhiyun cmd[8] = ADV_MOD_TURBO_8PSK;
202*4882a593Smuzhiyun switch (c->fec_inner) {
203*4882a593Smuzhiyun case FEC_2_3:
204*4882a593Smuzhiyun cmd[9] = 0; break;
205*4882a593Smuzhiyun case FEC_3_4:
206*4882a593Smuzhiyun cmd[9] = 1; break;
207*4882a593Smuzhiyun case FEC_3_5:
208*4882a593Smuzhiyun cmd[9] = 2; break;
209*4882a593Smuzhiyun case FEC_5_6:
210*4882a593Smuzhiyun cmd[9] = 3; break;
211*4882a593Smuzhiyun case FEC_8_9:
212*4882a593Smuzhiyun cmd[9] = 4; break;
213*4882a593Smuzhiyun default:
214*4882a593Smuzhiyun cmd[9] = 0; break;
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun break;
217*4882a593Smuzhiyun case QAM_16: /* QAM_16 is for compatibility with DN */
218*4882a593Smuzhiyun cmd[8] = ADV_MOD_TURBO_16QAM;
219*4882a593Smuzhiyun cmd[9] = 0;
220*4882a593Smuzhiyun break;
221*4882a593Smuzhiyun default: /* Unknown modulation */
222*4882a593Smuzhiyun dprintk("%s: unsupported modulation selected (%d)\n",
223*4882a593Smuzhiyun __func__, c->modulation);
224*4882a593Smuzhiyun return -EOPNOTSUPP;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun if (st->is_rev1)
228*4882a593Smuzhiyun gp8psk_set_tuner_mode(fe, 0);
229*4882a593Smuzhiyun st->ops->out(st->priv, TUNE_8PSK, 0, 0, cmd, 10);
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun st->lock = 0;
232*4882a593Smuzhiyun st->next_status_check = jiffies;
233*4882a593Smuzhiyun st->status_check_interval = 200;
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun return 0;
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun
gp8psk_fe_send_diseqc_msg(struct dvb_frontend * fe,struct dvb_diseqc_master_cmd * m)238*4882a593Smuzhiyun static int gp8psk_fe_send_diseqc_msg (struct dvb_frontend* fe,
239*4882a593Smuzhiyun struct dvb_diseqc_master_cmd *m)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun struct gp8psk_fe_state *st = fe->demodulator_priv;
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun dprintk("%s\n", __func__);
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun if (st->ops->out(st->priv, SEND_DISEQC_COMMAND, m->msg[0], 0,
246*4882a593Smuzhiyun m->msg, m->msg_len)) {
247*4882a593Smuzhiyun return -EINVAL;
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun return 0;
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun
gp8psk_fe_send_diseqc_burst(struct dvb_frontend * fe,enum fe_sec_mini_cmd burst)252*4882a593Smuzhiyun static int gp8psk_fe_send_diseqc_burst(struct dvb_frontend *fe,
253*4882a593Smuzhiyun enum fe_sec_mini_cmd burst)
254*4882a593Smuzhiyun {
255*4882a593Smuzhiyun struct gp8psk_fe_state *st = fe->demodulator_priv;
256*4882a593Smuzhiyun u8 cmd;
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun dprintk("%s\n", __func__);
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun /* These commands are certainly wrong */
261*4882a593Smuzhiyun cmd = (burst == SEC_MINI_A) ? 0x00 : 0x01;
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun if (st->ops->out(st->priv, SEND_DISEQC_COMMAND, cmd, 0,
264*4882a593Smuzhiyun &cmd, 0)) {
265*4882a593Smuzhiyun return -EINVAL;
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun return 0;
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun
gp8psk_fe_set_tone(struct dvb_frontend * fe,enum fe_sec_tone_mode tone)270*4882a593Smuzhiyun static int gp8psk_fe_set_tone(struct dvb_frontend *fe,
271*4882a593Smuzhiyun enum fe_sec_tone_mode tone)
272*4882a593Smuzhiyun {
273*4882a593Smuzhiyun struct gp8psk_fe_state *st = fe->demodulator_priv;
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun if (st->ops->out(st->priv, SET_22KHZ_TONE,
276*4882a593Smuzhiyun (tone == SEC_TONE_ON), 0, NULL, 0)) {
277*4882a593Smuzhiyun return -EINVAL;
278*4882a593Smuzhiyun }
279*4882a593Smuzhiyun return 0;
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun
gp8psk_fe_set_voltage(struct dvb_frontend * fe,enum fe_sec_voltage voltage)282*4882a593Smuzhiyun static int gp8psk_fe_set_voltage(struct dvb_frontend *fe,
283*4882a593Smuzhiyun enum fe_sec_voltage voltage)
284*4882a593Smuzhiyun {
285*4882a593Smuzhiyun struct gp8psk_fe_state *st = fe->demodulator_priv;
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun if (st->ops->out(st->priv, SET_LNB_VOLTAGE,
288*4882a593Smuzhiyun voltage == SEC_VOLTAGE_18, 0, NULL, 0)) {
289*4882a593Smuzhiyun return -EINVAL;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun return 0;
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun
gp8psk_fe_enable_high_lnb_voltage(struct dvb_frontend * fe,long onoff)294*4882a593Smuzhiyun static int gp8psk_fe_enable_high_lnb_voltage(struct dvb_frontend* fe, long onoff)
295*4882a593Smuzhiyun {
296*4882a593Smuzhiyun struct gp8psk_fe_state *st = fe->demodulator_priv;
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun return st->ops->out(st->priv, USE_EXTRA_VOLT, onoff, 0, NULL, 0);
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun
gp8psk_fe_send_legacy_dish_cmd(struct dvb_frontend * fe,unsigned long sw_cmd)301*4882a593Smuzhiyun static int gp8psk_fe_send_legacy_dish_cmd (struct dvb_frontend* fe, unsigned long sw_cmd)
302*4882a593Smuzhiyun {
303*4882a593Smuzhiyun struct gp8psk_fe_state *st = fe->demodulator_priv;
304*4882a593Smuzhiyun u8 cmd = sw_cmd & 0x7f;
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun if (st->ops->out(st->priv, SET_DN_SWITCH, cmd, 0, NULL, 0))
307*4882a593Smuzhiyun return -EINVAL;
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun if (st->ops->out(st->priv, SET_LNB_VOLTAGE, !!(sw_cmd & 0x80),
310*4882a593Smuzhiyun 0, NULL, 0))
311*4882a593Smuzhiyun return -EINVAL;
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun return 0;
314*4882a593Smuzhiyun }
315*4882a593Smuzhiyun
gp8psk_fe_release(struct dvb_frontend * fe)316*4882a593Smuzhiyun static void gp8psk_fe_release(struct dvb_frontend* fe)
317*4882a593Smuzhiyun {
318*4882a593Smuzhiyun struct gp8psk_fe_state *st = fe->demodulator_priv;
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun kfree(st);
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun static const struct dvb_frontend_ops gp8psk_fe_ops;
324*4882a593Smuzhiyun
gp8psk_fe_attach(const struct gp8psk_fe_ops * ops,void * priv,bool is_rev1)325*4882a593Smuzhiyun struct dvb_frontend *gp8psk_fe_attach(const struct gp8psk_fe_ops *ops,
326*4882a593Smuzhiyun void *priv, bool is_rev1)
327*4882a593Smuzhiyun {
328*4882a593Smuzhiyun struct gp8psk_fe_state *st;
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun if (!ops || !ops->in || !ops->out || !ops->reload) {
331*4882a593Smuzhiyun pr_err("Error! gp8psk-fe ops not defined.\n");
332*4882a593Smuzhiyun return NULL;
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun st = kzalloc(sizeof(struct gp8psk_fe_state), GFP_KERNEL);
336*4882a593Smuzhiyun if (!st)
337*4882a593Smuzhiyun return NULL;
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun memcpy(&st->fe.ops, &gp8psk_fe_ops, sizeof(struct dvb_frontend_ops));
340*4882a593Smuzhiyun st->fe.demodulator_priv = st;
341*4882a593Smuzhiyun st->ops = ops;
342*4882a593Smuzhiyun st->priv = priv;
343*4882a593Smuzhiyun st->is_rev1 = is_rev1;
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun pr_info("Frontend %sattached\n", is_rev1 ? "revision 1 " : "");
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun return &st->fe;
348*4882a593Smuzhiyun }
349*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(gp8psk_fe_attach);
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun static const struct dvb_frontend_ops gp8psk_fe_ops = {
352*4882a593Smuzhiyun .delsys = { SYS_DVBS },
353*4882a593Smuzhiyun .info = {
354*4882a593Smuzhiyun .name = "Genpix DVB-S",
355*4882a593Smuzhiyun .frequency_min_hz = 800 * MHz,
356*4882a593Smuzhiyun .frequency_max_hz = 2250 * MHz,
357*4882a593Smuzhiyun .frequency_stepsize_hz = 100 * kHz,
358*4882a593Smuzhiyun .symbol_rate_min = 1000000,
359*4882a593Smuzhiyun .symbol_rate_max = 45000000,
360*4882a593Smuzhiyun .symbol_rate_tolerance = 500, /* ppm */
361*4882a593Smuzhiyun .caps = FE_CAN_INVERSION_AUTO |
362*4882a593Smuzhiyun FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
363*4882a593Smuzhiyun FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
364*4882a593Smuzhiyun /*
365*4882a593Smuzhiyun * FE_CAN_QAM_16 is for compatibility
366*4882a593Smuzhiyun * (Myth incorrectly detects Turbo-QPSK as plain QAM-16)
367*4882a593Smuzhiyun */
368*4882a593Smuzhiyun FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_TURBO_FEC
369*4882a593Smuzhiyun },
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun .release = gp8psk_fe_release,
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun .init = NULL,
374*4882a593Smuzhiyun .sleep = NULL,
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun .set_frontend = gp8psk_fe_set_frontend,
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun .get_tune_settings = gp8psk_fe_get_tune_settings,
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun .read_status = gp8psk_fe_read_status,
381*4882a593Smuzhiyun .read_ber = gp8psk_fe_read_ber,
382*4882a593Smuzhiyun .read_signal_strength = gp8psk_fe_read_signal_strength,
383*4882a593Smuzhiyun .read_snr = gp8psk_fe_read_snr,
384*4882a593Smuzhiyun .read_ucblocks = gp8psk_fe_read_unc_blocks,
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun .diseqc_send_master_cmd = gp8psk_fe_send_diseqc_msg,
387*4882a593Smuzhiyun .diseqc_send_burst = gp8psk_fe_send_diseqc_burst,
388*4882a593Smuzhiyun .set_tone = gp8psk_fe_set_tone,
389*4882a593Smuzhiyun .set_voltage = gp8psk_fe_set_voltage,
390*4882a593Smuzhiyun .dishnetwork_send_legacy_command = gp8psk_fe_send_legacy_dish_cmd,
391*4882a593Smuzhiyun .enable_high_lnb_voltage = gp8psk_fe_enable_high_lnb_voltage
392*4882a593Smuzhiyun };
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun MODULE_AUTHOR("Alan Nisota <alannisota@gamil.com>");
395*4882a593Smuzhiyun MODULE_DESCRIPTION("Frontend Driver for Genpix DVB-S");
396*4882a593Smuzhiyun MODULE_VERSION("1.1");
397*4882a593Smuzhiyun MODULE_LICENSE("GPL");
398