xref: /OK3568_Linux_fs/kernel/drivers/media/dvb-frontends/cxd2880/cxd2880_tnrdmd_mon.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * cxd2880_tnrdmd_mon.c
4*4882a593Smuzhiyun  * Sony CXD2880 DVB-T2/T tuner + demodulator driver
5*4882a593Smuzhiyun  * common monitor functions
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Copyright (C) 2016, 2017, 2018 Sony Semiconductor Solutions Corporation
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include "cxd2880_common.h"
11*4882a593Smuzhiyun #include "cxd2880_tnrdmd_mon.h"
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun static const u8 rf_lvl_seq[2] = {
14*4882a593Smuzhiyun 	0x80, 0x00,
15*4882a593Smuzhiyun };
16*4882a593Smuzhiyun 
cxd2880_tnrdmd_mon_rf_lvl(struct cxd2880_tnrdmd * tnr_dmd,int * rf_lvl_db)17*4882a593Smuzhiyun int cxd2880_tnrdmd_mon_rf_lvl(struct cxd2880_tnrdmd *tnr_dmd,
18*4882a593Smuzhiyun 			      int *rf_lvl_db)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun 	u8 rdata[2];
21*4882a593Smuzhiyun 	int ret;
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun 	if (!tnr_dmd || !rf_lvl_db)
24*4882a593Smuzhiyun 		return -EINVAL;
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun 	if (tnr_dmd->state != CXD2880_TNRDMD_STATE_ACTIVE)
27*4882a593Smuzhiyun 		return -EINVAL;
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun 	ret = tnr_dmd->io->write_reg(tnr_dmd->io,
30*4882a593Smuzhiyun 				     CXD2880_IO_TGT_DMD,
31*4882a593Smuzhiyun 				     0x00, 0x00);
32*4882a593Smuzhiyun 	if (ret)
33*4882a593Smuzhiyun 		return ret;
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun 	ret = tnr_dmd->io->write_reg(tnr_dmd->io,
36*4882a593Smuzhiyun 				     CXD2880_IO_TGT_DMD,
37*4882a593Smuzhiyun 				     0x10, 0x01);
38*4882a593Smuzhiyun 	if (ret)
39*4882a593Smuzhiyun 		return ret;
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun 	ret = tnr_dmd->io->write_reg(tnr_dmd->io,
42*4882a593Smuzhiyun 				     CXD2880_IO_TGT_SYS,
43*4882a593Smuzhiyun 				     0x00, 0x10);
44*4882a593Smuzhiyun 	if (ret)
45*4882a593Smuzhiyun 		return ret;
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun 	ret = tnr_dmd->io->write_regs(tnr_dmd->io,
48*4882a593Smuzhiyun 				      CXD2880_IO_TGT_SYS,
49*4882a593Smuzhiyun 				      0x5b, rf_lvl_seq, 2);
50*4882a593Smuzhiyun 	if (ret)
51*4882a593Smuzhiyun 		return ret;
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	usleep_range(2000, 3000);
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	ret = tnr_dmd->io->write_reg(tnr_dmd->io,
56*4882a593Smuzhiyun 				     CXD2880_IO_TGT_SYS,
57*4882a593Smuzhiyun 				     0x00, 0x1a);
58*4882a593Smuzhiyun 	if (ret)
59*4882a593Smuzhiyun 		return ret;
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	ret = tnr_dmd->io->read_regs(tnr_dmd->io,
62*4882a593Smuzhiyun 				     CXD2880_IO_TGT_SYS,
63*4882a593Smuzhiyun 				     0x15, rdata, 2);
64*4882a593Smuzhiyun 	if (ret)
65*4882a593Smuzhiyun 		return ret;
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	if (rdata[0] || rdata[1])
68*4882a593Smuzhiyun 		return -EINVAL;
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	ret = tnr_dmd->io->read_regs(tnr_dmd->io,
71*4882a593Smuzhiyun 				     CXD2880_IO_TGT_SYS,
72*4882a593Smuzhiyun 				     0x11, rdata, 2);
73*4882a593Smuzhiyun 	if (ret)
74*4882a593Smuzhiyun 		return ret;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	*rf_lvl_db =
77*4882a593Smuzhiyun 	    cxd2880_convert2s_complement((rdata[0] << 3) |
78*4882a593Smuzhiyun 					 ((rdata[1] & 0xe0) >> 5), 11);
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	*rf_lvl_db *= 125;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	ret = tnr_dmd->io->write_reg(tnr_dmd->io,
83*4882a593Smuzhiyun 				     CXD2880_IO_TGT_DMD,
84*4882a593Smuzhiyun 				     0x00, 0x00);
85*4882a593Smuzhiyun 	if (ret)
86*4882a593Smuzhiyun 		return ret;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	ret = tnr_dmd->io->write_reg(tnr_dmd->io,
89*4882a593Smuzhiyun 				     CXD2880_IO_TGT_DMD,
90*4882a593Smuzhiyun 				     0x10, 0x00);
91*4882a593Smuzhiyun 	if (ret)
92*4882a593Smuzhiyun 		return ret;
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	if (tnr_dmd->rf_lvl_cmpstn)
95*4882a593Smuzhiyun 		ret = tnr_dmd->rf_lvl_cmpstn(tnr_dmd, rf_lvl_db);
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	return ret;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun 
cxd2880_tnrdmd_mon_rf_lvl_sub(struct cxd2880_tnrdmd * tnr_dmd,int * rf_lvl_db)100*4882a593Smuzhiyun int cxd2880_tnrdmd_mon_rf_lvl_sub(struct cxd2880_tnrdmd *tnr_dmd,
101*4882a593Smuzhiyun 				  int *rf_lvl_db)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun 	if (!tnr_dmd || !rf_lvl_db)
104*4882a593Smuzhiyun 		return -EINVAL;
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	if (tnr_dmd->diver_mode != CXD2880_TNRDMD_DIVERMODE_MAIN)
107*4882a593Smuzhiyun 		return -EINVAL;
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	return cxd2880_tnrdmd_mon_rf_lvl(tnr_dmd->diver_sub, rf_lvl_db);
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun 
cxd2880_tnrdmd_mon_internal_cpu_status(struct cxd2880_tnrdmd * tnr_dmd,u16 * status)112*4882a593Smuzhiyun int cxd2880_tnrdmd_mon_internal_cpu_status(struct cxd2880_tnrdmd
113*4882a593Smuzhiyun 					   *tnr_dmd, u16 *status)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun 	u8 data[2] = { 0 };
116*4882a593Smuzhiyun 	int ret;
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	if (!tnr_dmd || !status)
119*4882a593Smuzhiyun 		return -EINVAL;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	ret = tnr_dmd->io->write_reg(tnr_dmd->io,
122*4882a593Smuzhiyun 				     CXD2880_IO_TGT_SYS,
123*4882a593Smuzhiyun 				     0x00, 0x1a);
124*4882a593Smuzhiyun 	if (ret)
125*4882a593Smuzhiyun 		return ret;
126*4882a593Smuzhiyun 	ret = tnr_dmd->io->read_regs(tnr_dmd->io,
127*4882a593Smuzhiyun 				     CXD2880_IO_TGT_SYS,
128*4882a593Smuzhiyun 				     0x15, data, 2);
129*4882a593Smuzhiyun 	if (ret)
130*4882a593Smuzhiyun 		return ret;
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	*status = (data[0] << 8) | data[1];
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	return 0;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun 
cxd2880_tnrdmd_mon_internal_cpu_status_sub(struct cxd2880_tnrdmd * tnr_dmd,u16 * status)137*4882a593Smuzhiyun int cxd2880_tnrdmd_mon_internal_cpu_status_sub(struct
138*4882a593Smuzhiyun 					       cxd2880_tnrdmd
139*4882a593Smuzhiyun 					       *tnr_dmd,
140*4882a593Smuzhiyun 					       u16 *status)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun 	if (!tnr_dmd || !status)
143*4882a593Smuzhiyun 		return -EINVAL;
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	if (tnr_dmd->diver_mode != CXD2880_TNRDMD_DIVERMODE_MAIN)
146*4882a593Smuzhiyun 		return -EINVAL;
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	return cxd2880_tnrdmd_mon_internal_cpu_status(tnr_dmd->diver_sub,
149*4882a593Smuzhiyun 						      status);
150*4882a593Smuzhiyun }
151