1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * cxd2880_tnrdmd_dvbt2.h 4*4882a593Smuzhiyun * Sony CXD2880 DVB-T2/T tuner + demodulator driver 5*4882a593Smuzhiyun * control interface for DVB-T2 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright (C) 2016, 2017, 2018 Sony Semiconductor Solutions Corporation 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef CXD2880_TNRDMD_DVBT2_H 11*4882a593Smuzhiyun #define CXD2880_TNRDMD_DVBT2_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include "cxd2880_common.h" 14*4882a593Smuzhiyun #include "cxd2880_tnrdmd.h" 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun enum cxd2880_tnrdmd_dvbt2_tune_info { 17*4882a593Smuzhiyun CXD2880_TNRDMD_DVBT2_TUNE_INFO_OK, 18*4882a593Smuzhiyun CXD2880_TNRDMD_DVBT2_TUNE_INFO_INVALID_PLP_ID 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun struct cxd2880_dvbt2_tune_param { 22*4882a593Smuzhiyun u32 center_freq_khz; 23*4882a593Smuzhiyun enum cxd2880_dtv_bandwidth bandwidth; 24*4882a593Smuzhiyun u16 data_plp_id; 25*4882a593Smuzhiyun enum cxd2880_dvbt2_profile profile; 26*4882a593Smuzhiyun enum cxd2880_tnrdmd_dvbt2_tune_info tune_info; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #define CXD2880_DVBT2_TUNE_PARAM_PLPID_AUTO 0xffff 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun int cxd2880_tnrdmd_dvbt2_tune1(struct cxd2880_tnrdmd *tnr_dmd, 32*4882a593Smuzhiyun struct cxd2880_dvbt2_tune_param 33*4882a593Smuzhiyun *tune_param); 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun int cxd2880_tnrdmd_dvbt2_tune2(struct cxd2880_tnrdmd *tnr_dmd, 36*4882a593Smuzhiyun struct cxd2880_dvbt2_tune_param 37*4882a593Smuzhiyun *tune_param); 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun int cxd2880_tnrdmd_dvbt2_sleep_setting(struct cxd2880_tnrdmd 40*4882a593Smuzhiyun *tnr_dmd); 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun int cxd2880_tnrdmd_dvbt2_check_demod_lock(struct cxd2880_tnrdmd 43*4882a593Smuzhiyun *tnr_dmd, 44*4882a593Smuzhiyun enum 45*4882a593Smuzhiyun cxd2880_tnrdmd_lock_result 46*4882a593Smuzhiyun *lock); 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun int cxd2880_tnrdmd_dvbt2_check_ts_lock(struct cxd2880_tnrdmd 49*4882a593Smuzhiyun *tnr_dmd, 50*4882a593Smuzhiyun enum 51*4882a593Smuzhiyun cxd2880_tnrdmd_lock_result 52*4882a593Smuzhiyun *lock); 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun int cxd2880_tnrdmd_dvbt2_set_plp_cfg(struct cxd2880_tnrdmd 55*4882a593Smuzhiyun *tnr_dmd, u8 auto_plp, 56*4882a593Smuzhiyun u8 plp_id); 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun int cxd2880_tnrdmd_dvbt2_diver_fef_setting(struct cxd2880_tnrdmd 59*4882a593Smuzhiyun *tnr_dmd); 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun int cxd2880_tnrdmd_dvbt2_check_l1post_valid(struct cxd2880_tnrdmd 62*4882a593Smuzhiyun *tnr_dmd, 63*4882a593Smuzhiyun u8 *l1_post_valid); 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun #endif 66