1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * bsbe1.h - ALPS BSBE1 tuner support
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * the project's page is at https://linuxtv.org
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #ifndef BSBE1_H
9*4882a593Smuzhiyun #define BSBE1_H
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun static u8 alps_bsbe1_inittab[] = {
12*4882a593Smuzhiyun 0x01, 0x15, /* XTAL = 4MHz, VCO = 352 MHz */
13*4882a593Smuzhiyun 0x02, 0x30, /* MCLK = 88 MHz */
14*4882a593Smuzhiyun 0x03, 0x00, /* ACR output 0 */
15*4882a593Smuzhiyun 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
16*4882a593Smuzhiyun 0x05, 0x05, /* I2CT = 0, SCLT = 1, SDAT = 1 */
17*4882a593Smuzhiyun 0x06, 0x00, /* DAC output 0 */
18*4882a593Smuzhiyun 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
19*4882a593Smuzhiyun 0x09, 0x00, /* FIFO */
20*4882a593Smuzhiyun 0x0c, 0x51, /* OP1/OP0 normal, val = 1 (LNB power on) */
21*4882a593Smuzhiyun 0x0d, 0x82, /* DC offset compensation = on, beta_agc1 = 2 */
22*4882a593Smuzhiyun 0x0f, 0x92, /* AGC1R */
23*4882a593Smuzhiyun 0x10, 0x34, /* AGC2O */
24*4882a593Smuzhiyun 0x11, 0x84, /* TLSR */
25*4882a593Smuzhiyun 0x12, 0xb9, /* CFD */
26*4882a593Smuzhiyun 0x15, 0xc9, /* lock detector threshold */
27*4882a593Smuzhiyun 0x28, 0x00, /* out imp: normal, type: parallel, FEC mode: QPSK */
28*4882a593Smuzhiyun 0x33, 0xfc, /* RS control */
29*4882a593Smuzhiyun 0x34, 0x93, /* count viterbi bit errors per 2E18 bytes */
30*4882a593Smuzhiyun 0xff, 0xff
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun
alps_bsbe1_set_symbol_rate(struct dvb_frontend * fe,u32 srate,u32 ratio)34*4882a593Smuzhiyun static int alps_bsbe1_set_symbol_rate(struct dvb_frontend* fe, u32 srate, u32 ratio)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun u8 aclk = 0;
37*4882a593Smuzhiyun u8 bclk = 0;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun if (srate < 1500000) { aclk = 0xb7; bclk = 0x47; }
40*4882a593Smuzhiyun else if (srate < 3000000) { aclk = 0xb7; bclk = 0x4b; }
41*4882a593Smuzhiyun else if (srate < 7000000) { aclk = 0xb7; bclk = 0x4f; }
42*4882a593Smuzhiyun else if (srate < 14000000) { aclk = 0xb7; bclk = 0x53; }
43*4882a593Smuzhiyun else if (srate < 30000000) { aclk = 0xb6; bclk = 0x53; }
44*4882a593Smuzhiyun else if (srate < 45000000) { aclk = 0xb4; bclk = 0x51; }
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun stv0299_writereg(fe, 0x13, aclk);
47*4882a593Smuzhiyun stv0299_writereg(fe, 0x14, bclk);
48*4882a593Smuzhiyun stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
49*4882a593Smuzhiyun stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
50*4882a593Smuzhiyun stv0299_writereg(fe, 0x21, (ratio ) & 0xf0);
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun return 0;
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
alps_bsbe1_tuner_set_params(struct dvb_frontend * fe)55*4882a593Smuzhiyun static int alps_bsbe1_tuner_set_params(struct dvb_frontend *fe)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun struct dtv_frontend_properties *p = &fe->dtv_property_cache;
58*4882a593Smuzhiyun int ret;
59*4882a593Smuzhiyun u8 data[4];
60*4882a593Smuzhiyun u32 div;
61*4882a593Smuzhiyun struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
62*4882a593Smuzhiyun struct i2c_adapter *i2c = fe->tuner_priv;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun if ((p->frequency < 950000) || (p->frequency > 2150000))
65*4882a593Smuzhiyun return -EINVAL;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun div = p->frequency / 1000;
68*4882a593Smuzhiyun data[0] = (div >> 8) & 0x7f;
69*4882a593Smuzhiyun data[1] = div & 0xff;
70*4882a593Smuzhiyun data[2] = 0x80 | ((div & 0x18000) >> 10) | 0x1;
71*4882a593Smuzhiyun data[3] = 0xe0;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun if (fe->ops.i2c_gate_ctrl)
74*4882a593Smuzhiyun fe->ops.i2c_gate_ctrl(fe, 1);
75*4882a593Smuzhiyun ret = i2c_transfer(i2c, &msg, 1);
76*4882a593Smuzhiyun return (ret != 1) ? -EIO : 0;
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun static struct stv0299_config alps_bsbe1_config = {
80*4882a593Smuzhiyun .demod_address = 0x68,
81*4882a593Smuzhiyun .inittab = alps_bsbe1_inittab,
82*4882a593Smuzhiyun .mclk = 88000000UL,
83*4882a593Smuzhiyun .invert = 1,
84*4882a593Smuzhiyun .skip_reinit = 0,
85*4882a593Smuzhiyun .min_delay_ms = 100,
86*4882a593Smuzhiyun .set_symbol_rate = alps_bsbe1_set_symbol_rate,
87*4882a593Smuzhiyun };
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun #endif
90