1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun Auvitek AU8522 QAM/8VSB demodulator driver
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun Copyright (C) 2008 Steven Toth <stoth@linuxtv.org>
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/string.h>
14*4882a593Smuzhiyun #include <linux/delay.h>
15*4882a593Smuzhiyun #include <media/dvb_frontend.h>
16*4882a593Smuzhiyun #include "au8522.h"
17*4882a593Smuzhiyun #include "au8522_priv.h"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun static int debug;
20*4882a593Smuzhiyun static int zv_mode = 1; /* default to on */
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define dprintk(arg...)\
23*4882a593Smuzhiyun do { if (debug)\
24*4882a593Smuzhiyun printk(arg);\
25*4882a593Smuzhiyun } while (0)
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun struct mse2snr_tab {
28*4882a593Smuzhiyun u16 val;
29*4882a593Smuzhiyun u16 data;
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun /* VSB SNR lookup table */
33*4882a593Smuzhiyun static struct mse2snr_tab vsb_mse2snr_tab[] = {
34*4882a593Smuzhiyun { 0, 270 },
35*4882a593Smuzhiyun { 2, 250 },
36*4882a593Smuzhiyun { 3, 240 },
37*4882a593Smuzhiyun { 5, 230 },
38*4882a593Smuzhiyun { 7, 220 },
39*4882a593Smuzhiyun { 9, 210 },
40*4882a593Smuzhiyun { 12, 200 },
41*4882a593Smuzhiyun { 13, 195 },
42*4882a593Smuzhiyun { 15, 190 },
43*4882a593Smuzhiyun { 17, 185 },
44*4882a593Smuzhiyun { 19, 180 },
45*4882a593Smuzhiyun { 21, 175 },
46*4882a593Smuzhiyun { 24, 170 },
47*4882a593Smuzhiyun { 27, 165 },
48*4882a593Smuzhiyun { 31, 160 },
49*4882a593Smuzhiyun { 32, 158 },
50*4882a593Smuzhiyun { 33, 156 },
51*4882a593Smuzhiyun { 36, 152 },
52*4882a593Smuzhiyun { 37, 150 },
53*4882a593Smuzhiyun { 39, 148 },
54*4882a593Smuzhiyun { 40, 146 },
55*4882a593Smuzhiyun { 41, 144 },
56*4882a593Smuzhiyun { 43, 142 },
57*4882a593Smuzhiyun { 44, 140 },
58*4882a593Smuzhiyun { 48, 135 },
59*4882a593Smuzhiyun { 50, 130 },
60*4882a593Smuzhiyun { 43, 142 },
61*4882a593Smuzhiyun { 53, 125 },
62*4882a593Smuzhiyun { 56, 120 },
63*4882a593Smuzhiyun { 256, 115 },
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun /* QAM64 SNR lookup table */
67*4882a593Smuzhiyun static struct mse2snr_tab qam64_mse2snr_tab[] = {
68*4882a593Smuzhiyun { 15, 0 },
69*4882a593Smuzhiyun { 16, 290 },
70*4882a593Smuzhiyun { 17, 288 },
71*4882a593Smuzhiyun { 18, 286 },
72*4882a593Smuzhiyun { 19, 284 },
73*4882a593Smuzhiyun { 20, 282 },
74*4882a593Smuzhiyun { 21, 281 },
75*4882a593Smuzhiyun { 22, 279 },
76*4882a593Smuzhiyun { 23, 277 },
77*4882a593Smuzhiyun { 24, 275 },
78*4882a593Smuzhiyun { 25, 273 },
79*4882a593Smuzhiyun { 26, 271 },
80*4882a593Smuzhiyun { 27, 269 },
81*4882a593Smuzhiyun { 28, 268 },
82*4882a593Smuzhiyun { 29, 266 },
83*4882a593Smuzhiyun { 30, 264 },
84*4882a593Smuzhiyun { 31, 262 },
85*4882a593Smuzhiyun { 32, 260 },
86*4882a593Smuzhiyun { 33, 259 },
87*4882a593Smuzhiyun { 34, 258 },
88*4882a593Smuzhiyun { 35, 256 },
89*4882a593Smuzhiyun { 36, 255 },
90*4882a593Smuzhiyun { 37, 254 },
91*4882a593Smuzhiyun { 38, 252 },
92*4882a593Smuzhiyun { 39, 251 },
93*4882a593Smuzhiyun { 40, 250 },
94*4882a593Smuzhiyun { 41, 249 },
95*4882a593Smuzhiyun { 42, 248 },
96*4882a593Smuzhiyun { 43, 246 },
97*4882a593Smuzhiyun { 44, 245 },
98*4882a593Smuzhiyun { 45, 244 },
99*4882a593Smuzhiyun { 46, 242 },
100*4882a593Smuzhiyun { 47, 241 },
101*4882a593Smuzhiyun { 48, 240 },
102*4882a593Smuzhiyun { 50, 239 },
103*4882a593Smuzhiyun { 51, 238 },
104*4882a593Smuzhiyun { 53, 237 },
105*4882a593Smuzhiyun { 54, 236 },
106*4882a593Smuzhiyun { 56, 235 },
107*4882a593Smuzhiyun { 57, 234 },
108*4882a593Smuzhiyun { 59, 233 },
109*4882a593Smuzhiyun { 60, 232 },
110*4882a593Smuzhiyun { 62, 231 },
111*4882a593Smuzhiyun { 63, 230 },
112*4882a593Smuzhiyun { 65, 229 },
113*4882a593Smuzhiyun { 67, 228 },
114*4882a593Smuzhiyun { 68, 227 },
115*4882a593Smuzhiyun { 70, 226 },
116*4882a593Smuzhiyun { 71, 225 },
117*4882a593Smuzhiyun { 73, 224 },
118*4882a593Smuzhiyun { 74, 223 },
119*4882a593Smuzhiyun { 76, 222 },
120*4882a593Smuzhiyun { 78, 221 },
121*4882a593Smuzhiyun { 80, 220 },
122*4882a593Smuzhiyun { 82, 219 },
123*4882a593Smuzhiyun { 85, 218 },
124*4882a593Smuzhiyun { 88, 217 },
125*4882a593Smuzhiyun { 90, 216 },
126*4882a593Smuzhiyun { 92, 215 },
127*4882a593Smuzhiyun { 93, 214 },
128*4882a593Smuzhiyun { 94, 212 },
129*4882a593Smuzhiyun { 95, 211 },
130*4882a593Smuzhiyun { 97, 210 },
131*4882a593Smuzhiyun { 99, 209 },
132*4882a593Smuzhiyun { 101, 208 },
133*4882a593Smuzhiyun { 102, 207 },
134*4882a593Smuzhiyun { 104, 206 },
135*4882a593Smuzhiyun { 107, 205 },
136*4882a593Smuzhiyun { 111, 204 },
137*4882a593Smuzhiyun { 114, 203 },
138*4882a593Smuzhiyun { 118, 202 },
139*4882a593Smuzhiyun { 122, 201 },
140*4882a593Smuzhiyun { 125, 200 },
141*4882a593Smuzhiyun { 128, 199 },
142*4882a593Smuzhiyun { 130, 198 },
143*4882a593Smuzhiyun { 132, 197 },
144*4882a593Smuzhiyun { 256, 190 },
145*4882a593Smuzhiyun };
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun /* QAM256 SNR lookup table */
148*4882a593Smuzhiyun static struct mse2snr_tab qam256_mse2snr_tab[] = {
149*4882a593Smuzhiyun { 15, 0 },
150*4882a593Smuzhiyun { 16, 400 },
151*4882a593Smuzhiyun { 17, 398 },
152*4882a593Smuzhiyun { 18, 396 },
153*4882a593Smuzhiyun { 19, 394 },
154*4882a593Smuzhiyun { 20, 392 },
155*4882a593Smuzhiyun { 21, 390 },
156*4882a593Smuzhiyun { 22, 388 },
157*4882a593Smuzhiyun { 23, 386 },
158*4882a593Smuzhiyun { 24, 384 },
159*4882a593Smuzhiyun { 25, 382 },
160*4882a593Smuzhiyun { 26, 380 },
161*4882a593Smuzhiyun { 27, 379 },
162*4882a593Smuzhiyun { 28, 378 },
163*4882a593Smuzhiyun { 29, 377 },
164*4882a593Smuzhiyun { 30, 376 },
165*4882a593Smuzhiyun { 31, 375 },
166*4882a593Smuzhiyun { 32, 374 },
167*4882a593Smuzhiyun { 33, 373 },
168*4882a593Smuzhiyun { 34, 372 },
169*4882a593Smuzhiyun { 35, 371 },
170*4882a593Smuzhiyun { 36, 370 },
171*4882a593Smuzhiyun { 37, 362 },
172*4882a593Smuzhiyun { 38, 354 },
173*4882a593Smuzhiyun { 39, 346 },
174*4882a593Smuzhiyun { 40, 338 },
175*4882a593Smuzhiyun { 41, 330 },
176*4882a593Smuzhiyun { 42, 328 },
177*4882a593Smuzhiyun { 43, 326 },
178*4882a593Smuzhiyun { 44, 324 },
179*4882a593Smuzhiyun { 45, 322 },
180*4882a593Smuzhiyun { 46, 320 },
181*4882a593Smuzhiyun { 47, 319 },
182*4882a593Smuzhiyun { 48, 318 },
183*4882a593Smuzhiyun { 49, 317 },
184*4882a593Smuzhiyun { 50, 316 },
185*4882a593Smuzhiyun { 51, 315 },
186*4882a593Smuzhiyun { 52, 314 },
187*4882a593Smuzhiyun { 53, 313 },
188*4882a593Smuzhiyun { 54, 312 },
189*4882a593Smuzhiyun { 55, 311 },
190*4882a593Smuzhiyun { 56, 310 },
191*4882a593Smuzhiyun { 57, 308 },
192*4882a593Smuzhiyun { 58, 306 },
193*4882a593Smuzhiyun { 59, 304 },
194*4882a593Smuzhiyun { 60, 302 },
195*4882a593Smuzhiyun { 61, 300 },
196*4882a593Smuzhiyun { 62, 298 },
197*4882a593Smuzhiyun { 65, 295 },
198*4882a593Smuzhiyun { 68, 294 },
199*4882a593Smuzhiyun { 70, 293 },
200*4882a593Smuzhiyun { 73, 292 },
201*4882a593Smuzhiyun { 76, 291 },
202*4882a593Smuzhiyun { 78, 290 },
203*4882a593Smuzhiyun { 79, 289 },
204*4882a593Smuzhiyun { 81, 288 },
205*4882a593Smuzhiyun { 82, 287 },
206*4882a593Smuzhiyun { 83, 286 },
207*4882a593Smuzhiyun { 84, 285 },
208*4882a593Smuzhiyun { 85, 284 },
209*4882a593Smuzhiyun { 86, 283 },
210*4882a593Smuzhiyun { 88, 282 },
211*4882a593Smuzhiyun { 89, 281 },
212*4882a593Smuzhiyun { 256, 280 },
213*4882a593Smuzhiyun };
214*4882a593Smuzhiyun
au8522_mse2snr_lookup(struct mse2snr_tab * tab,int sz,int mse,u16 * snr)215*4882a593Smuzhiyun static int au8522_mse2snr_lookup(struct mse2snr_tab *tab, int sz, int mse,
216*4882a593Smuzhiyun u16 *snr)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun int i, ret = -EINVAL;
219*4882a593Smuzhiyun dprintk("%s()\n", __func__);
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun for (i = 0; i < sz; i++) {
222*4882a593Smuzhiyun if (mse < tab[i].val) {
223*4882a593Smuzhiyun *snr = tab[i].data;
224*4882a593Smuzhiyun ret = 0;
225*4882a593Smuzhiyun break;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun dprintk("%s() snr=%d\n", __func__, *snr);
229*4882a593Smuzhiyun return ret;
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun
au8522_set_if(struct dvb_frontend * fe,enum au8522_if_freq if_freq)232*4882a593Smuzhiyun static int au8522_set_if(struct dvb_frontend *fe, enum au8522_if_freq if_freq)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun struct au8522_state *state = fe->demodulator_priv;
235*4882a593Smuzhiyun u8 r0b5, r0b6, r0b7;
236*4882a593Smuzhiyun char *ifmhz;
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun switch (if_freq) {
239*4882a593Smuzhiyun case AU8522_IF_3_25MHZ:
240*4882a593Smuzhiyun ifmhz = "3.25";
241*4882a593Smuzhiyun r0b5 = 0x00;
242*4882a593Smuzhiyun r0b6 = 0x3d;
243*4882a593Smuzhiyun r0b7 = 0xa0;
244*4882a593Smuzhiyun break;
245*4882a593Smuzhiyun case AU8522_IF_4MHZ:
246*4882a593Smuzhiyun ifmhz = "4.00";
247*4882a593Smuzhiyun r0b5 = 0x00;
248*4882a593Smuzhiyun r0b6 = 0x4b;
249*4882a593Smuzhiyun r0b7 = 0xd9;
250*4882a593Smuzhiyun break;
251*4882a593Smuzhiyun case AU8522_IF_6MHZ:
252*4882a593Smuzhiyun ifmhz = "6.00";
253*4882a593Smuzhiyun r0b5 = 0xfb;
254*4882a593Smuzhiyun r0b6 = 0x8e;
255*4882a593Smuzhiyun r0b7 = 0x39;
256*4882a593Smuzhiyun break;
257*4882a593Smuzhiyun default:
258*4882a593Smuzhiyun dprintk("%s() IF Frequency not supported\n", __func__);
259*4882a593Smuzhiyun return -EINVAL;
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun dprintk("%s() %s MHz\n", __func__, ifmhz);
262*4882a593Smuzhiyun au8522_writereg(state, 0x00b5, r0b5);
263*4882a593Smuzhiyun au8522_writereg(state, 0x00b6, r0b6);
264*4882a593Smuzhiyun au8522_writereg(state, 0x00b7, r0b7);
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun return 0;
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun /* VSB Modulation table */
270*4882a593Smuzhiyun static struct {
271*4882a593Smuzhiyun u16 reg;
272*4882a593Smuzhiyun u16 data;
273*4882a593Smuzhiyun } VSB_mod_tab[] = {
274*4882a593Smuzhiyun { 0x0090, 0x84 },
275*4882a593Smuzhiyun { 0x2005, 0x00 },
276*4882a593Smuzhiyun { 0x0091, 0x80 },
277*4882a593Smuzhiyun { 0x00a3, 0x0c },
278*4882a593Smuzhiyun { 0x00a4, 0xe8 },
279*4882a593Smuzhiyun { 0x0081, 0xc4 },
280*4882a593Smuzhiyun { 0x00a5, 0x40 },
281*4882a593Smuzhiyun { 0x00a7, 0x40 },
282*4882a593Smuzhiyun { 0x00a6, 0x67 },
283*4882a593Smuzhiyun { 0x0262, 0x20 },
284*4882a593Smuzhiyun { 0x021c, 0x30 },
285*4882a593Smuzhiyun { 0x00d8, 0x1a },
286*4882a593Smuzhiyun { 0x0227, 0xa0 },
287*4882a593Smuzhiyun { 0x0121, 0xff },
288*4882a593Smuzhiyun { 0x00a8, 0xf0 },
289*4882a593Smuzhiyun { 0x00a9, 0x05 },
290*4882a593Smuzhiyun { 0x00aa, 0x77 },
291*4882a593Smuzhiyun { 0x00ab, 0xf0 },
292*4882a593Smuzhiyun { 0x00ac, 0x05 },
293*4882a593Smuzhiyun { 0x00ad, 0x77 },
294*4882a593Smuzhiyun { 0x00ae, 0x41 },
295*4882a593Smuzhiyun { 0x00af, 0x66 },
296*4882a593Smuzhiyun { 0x021b, 0xcc },
297*4882a593Smuzhiyun { 0x021d, 0x80 },
298*4882a593Smuzhiyun { 0x00a4, 0xe8 },
299*4882a593Smuzhiyun { 0x0231, 0x13 },
300*4882a593Smuzhiyun };
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun /* QAM64 Modulation table */
303*4882a593Smuzhiyun static struct {
304*4882a593Smuzhiyun u16 reg;
305*4882a593Smuzhiyun u16 data;
306*4882a593Smuzhiyun } QAM64_mod_tab[] = {
307*4882a593Smuzhiyun { 0x00a3, 0x09 },
308*4882a593Smuzhiyun { 0x00a4, 0x00 },
309*4882a593Smuzhiyun { 0x0081, 0xc4 },
310*4882a593Smuzhiyun { 0x00a5, 0x40 },
311*4882a593Smuzhiyun { 0x00aa, 0x77 },
312*4882a593Smuzhiyun { 0x00ad, 0x77 },
313*4882a593Smuzhiyun { 0x00a6, 0x67 },
314*4882a593Smuzhiyun { 0x0262, 0x20 },
315*4882a593Smuzhiyun { 0x021c, 0x30 },
316*4882a593Smuzhiyun { 0x00b8, 0x3e },
317*4882a593Smuzhiyun { 0x00b9, 0xf0 },
318*4882a593Smuzhiyun { 0x00ba, 0x01 },
319*4882a593Smuzhiyun { 0x00bb, 0x18 },
320*4882a593Smuzhiyun { 0x00bc, 0x50 },
321*4882a593Smuzhiyun { 0x00bd, 0x00 },
322*4882a593Smuzhiyun { 0x00be, 0xea },
323*4882a593Smuzhiyun { 0x00bf, 0xef },
324*4882a593Smuzhiyun { 0x00c0, 0xfc },
325*4882a593Smuzhiyun { 0x00c1, 0xbd },
326*4882a593Smuzhiyun { 0x00c2, 0x1f },
327*4882a593Smuzhiyun { 0x00c3, 0xfc },
328*4882a593Smuzhiyun { 0x00c4, 0xdd },
329*4882a593Smuzhiyun { 0x00c5, 0xaf },
330*4882a593Smuzhiyun { 0x00c6, 0x00 },
331*4882a593Smuzhiyun { 0x00c7, 0x38 },
332*4882a593Smuzhiyun { 0x00c8, 0x30 },
333*4882a593Smuzhiyun { 0x00c9, 0x05 },
334*4882a593Smuzhiyun { 0x00ca, 0x4a },
335*4882a593Smuzhiyun { 0x00cb, 0xd0 },
336*4882a593Smuzhiyun { 0x00cc, 0x01 },
337*4882a593Smuzhiyun { 0x00cd, 0xd9 },
338*4882a593Smuzhiyun { 0x00ce, 0x6f },
339*4882a593Smuzhiyun { 0x00cf, 0xf9 },
340*4882a593Smuzhiyun { 0x00d0, 0x70 },
341*4882a593Smuzhiyun { 0x00d1, 0xdf },
342*4882a593Smuzhiyun { 0x00d2, 0xf7 },
343*4882a593Smuzhiyun { 0x00d3, 0xc2 },
344*4882a593Smuzhiyun { 0x00d4, 0xdf },
345*4882a593Smuzhiyun { 0x00d5, 0x02 },
346*4882a593Smuzhiyun { 0x00d6, 0x9a },
347*4882a593Smuzhiyun { 0x00d7, 0xd0 },
348*4882a593Smuzhiyun { 0x0250, 0x0d },
349*4882a593Smuzhiyun { 0x0251, 0xcd },
350*4882a593Smuzhiyun { 0x0252, 0xe0 },
351*4882a593Smuzhiyun { 0x0253, 0x05 },
352*4882a593Smuzhiyun { 0x0254, 0xa7 },
353*4882a593Smuzhiyun { 0x0255, 0xff },
354*4882a593Smuzhiyun { 0x0256, 0xed },
355*4882a593Smuzhiyun { 0x0257, 0x5b },
356*4882a593Smuzhiyun { 0x0258, 0xae },
357*4882a593Smuzhiyun { 0x0259, 0xe6 },
358*4882a593Smuzhiyun { 0x025a, 0x3d },
359*4882a593Smuzhiyun { 0x025b, 0x0f },
360*4882a593Smuzhiyun { 0x025c, 0x0d },
361*4882a593Smuzhiyun { 0x025d, 0xea },
362*4882a593Smuzhiyun { 0x025e, 0xf2 },
363*4882a593Smuzhiyun { 0x025f, 0x51 },
364*4882a593Smuzhiyun { 0x0260, 0xf5 },
365*4882a593Smuzhiyun { 0x0261, 0x06 },
366*4882a593Smuzhiyun { 0x021a, 0x00 },
367*4882a593Smuzhiyun { 0x0546, 0x40 },
368*4882a593Smuzhiyun { 0x0210, 0xc7 },
369*4882a593Smuzhiyun { 0x0211, 0xaa },
370*4882a593Smuzhiyun { 0x0212, 0xab },
371*4882a593Smuzhiyun { 0x0213, 0x02 },
372*4882a593Smuzhiyun { 0x0502, 0x00 },
373*4882a593Smuzhiyun { 0x0121, 0x04 },
374*4882a593Smuzhiyun { 0x0122, 0x04 },
375*4882a593Smuzhiyun { 0x052e, 0x10 },
376*4882a593Smuzhiyun { 0x00a4, 0xca },
377*4882a593Smuzhiyun { 0x00a7, 0x40 },
378*4882a593Smuzhiyun { 0x0526, 0x01 },
379*4882a593Smuzhiyun };
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun /* QAM256 Modulation table */
382*4882a593Smuzhiyun static struct {
383*4882a593Smuzhiyun u16 reg;
384*4882a593Smuzhiyun u16 data;
385*4882a593Smuzhiyun } QAM256_mod_tab[] = {
386*4882a593Smuzhiyun { 0x00a3, 0x09 },
387*4882a593Smuzhiyun { 0x00a4, 0x00 },
388*4882a593Smuzhiyun { 0x0081, 0xc4 },
389*4882a593Smuzhiyun { 0x00a5, 0x40 },
390*4882a593Smuzhiyun { 0x00aa, 0x77 },
391*4882a593Smuzhiyun { 0x00ad, 0x77 },
392*4882a593Smuzhiyun { 0x00a6, 0x67 },
393*4882a593Smuzhiyun { 0x0262, 0x20 },
394*4882a593Smuzhiyun { 0x021c, 0x30 },
395*4882a593Smuzhiyun { 0x00b8, 0x3e },
396*4882a593Smuzhiyun { 0x00b9, 0xf0 },
397*4882a593Smuzhiyun { 0x00ba, 0x01 },
398*4882a593Smuzhiyun { 0x00bb, 0x18 },
399*4882a593Smuzhiyun { 0x00bc, 0x50 },
400*4882a593Smuzhiyun { 0x00bd, 0x00 },
401*4882a593Smuzhiyun { 0x00be, 0xea },
402*4882a593Smuzhiyun { 0x00bf, 0xef },
403*4882a593Smuzhiyun { 0x00c0, 0xfc },
404*4882a593Smuzhiyun { 0x00c1, 0xbd },
405*4882a593Smuzhiyun { 0x00c2, 0x1f },
406*4882a593Smuzhiyun { 0x00c3, 0xfc },
407*4882a593Smuzhiyun { 0x00c4, 0xdd },
408*4882a593Smuzhiyun { 0x00c5, 0xaf },
409*4882a593Smuzhiyun { 0x00c6, 0x00 },
410*4882a593Smuzhiyun { 0x00c7, 0x38 },
411*4882a593Smuzhiyun { 0x00c8, 0x30 },
412*4882a593Smuzhiyun { 0x00c9, 0x05 },
413*4882a593Smuzhiyun { 0x00ca, 0x4a },
414*4882a593Smuzhiyun { 0x00cb, 0xd0 },
415*4882a593Smuzhiyun { 0x00cc, 0x01 },
416*4882a593Smuzhiyun { 0x00cd, 0xd9 },
417*4882a593Smuzhiyun { 0x00ce, 0x6f },
418*4882a593Smuzhiyun { 0x00cf, 0xf9 },
419*4882a593Smuzhiyun { 0x00d0, 0x70 },
420*4882a593Smuzhiyun { 0x00d1, 0xdf },
421*4882a593Smuzhiyun { 0x00d2, 0xf7 },
422*4882a593Smuzhiyun { 0x00d3, 0xc2 },
423*4882a593Smuzhiyun { 0x00d4, 0xdf },
424*4882a593Smuzhiyun { 0x00d5, 0x02 },
425*4882a593Smuzhiyun { 0x00d6, 0x9a },
426*4882a593Smuzhiyun { 0x00d7, 0xd0 },
427*4882a593Smuzhiyun { 0x0250, 0x0d },
428*4882a593Smuzhiyun { 0x0251, 0xcd },
429*4882a593Smuzhiyun { 0x0252, 0xe0 },
430*4882a593Smuzhiyun { 0x0253, 0x05 },
431*4882a593Smuzhiyun { 0x0254, 0xa7 },
432*4882a593Smuzhiyun { 0x0255, 0xff },
433*4882a593Smuzhiyun { 0x0256, 0xed },
434*4882a593Smuzhiyun { 0x0257, 0x5b },
435*4882a593Smuzhiyun { 0x0258, 0xae },
436*4882a593Smuzhiyun { 0x0259, 0xe6 },
437*4882a593Smuzhiyun { 0x025a, 0x3d },
438*4882a593Smuzhiyun { 0x025b, 0x0f },
439*4882a593Smuzhiyun { 0x025c, 0x0d },
440*4882a593Smuzhiyun { 0x025d, 0xea },
441*4882a593Smuzhiyun { 0x025e, 0xf2 },
442*4882a593Smuzhiyun { 0x025f, 0x51 },
443*4882a593Smuzhiyun { 0x0260, 0xf5 },
444*4882a593Smuzhiyun { 0x0261, 0x06 },
445*4882a593Smuzhiyun { 0x021a, 0x00 },
446*4882a593Smuzhiyun { 0x0546, 0x40 },
447*4882a593Smuzhiyun { 0x0210, 0x26 },
448*4882a593Smuzhiyun { 0x0211, 0xf6 },
449*4882a593Smuzhiyun { 0x0212, 0x84 },
450*4882a593Smuzhiyun { 0x0213, 0x02 },
451*4882a593Smuzhiyun { 0x0502, 0x01 },
452*4882a593Smuzhiyun { 0x0121, 0x04 },
453*4882a593Smuzhiyun { 0x0122, 0x04 },
454*4882a593Smuzhiyun { 0x052e, 0x10 },
455*4882a593Smuzhiyun { 0x00a4, 0xca },
456*4882a593Smuzhiyun { 0x00a7, 0x40 },
457*4882a593Smuzhiyun { 0x0526, 0x01 },
458*4882a593Smuzhiyun };
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun static struct {
461*4882a593Smuzhiyun u16 reg;
462*4882a593Smuzhiyun u16 data;
463*4882a593Smuzhiyun } QAM256_mod_tab_zv_mode[] = {
464*4882a593Smuzhiyun { 0x80a3, 0x09 },
465*4882a593Smuzhiyun { 0x80a4, 0x00 },
466*4882a593Smuzhiyun { 0x8081, 0xc4 },
467*4882a593Smuzhiyun { 0x80a5, 0x40 },
468*4882a593Smuzhiyun { 0x80b5, 0xfb },
469*4882a593Smuzhiyun { 0x80b6, 0x8e },
470*4882a593Smuzhiyun { 0x80b7, 0x39 },
471*4882a593Smuzhiyun { 0x80aa, 0x77 },
472*4882a593Smuzhiyun { 0x80ad, 0x77 },
473*4882a593Smuzhiyun { 0x80a6, 0x67 },
474*4882a593Smuzhiyun { 0x8262, 0x20 },
475*4882a593Smuzhiyun { 0x821c, 0x30 },
476*4882a593Smuzhiyun { 0x80b8, 0x3e },
477*4882a593Smuzhiyun { 0x80b9, 0xf0 },
478*4882a593Smuzhiyun { 0x80ba, 0x01 },
479*4882a593Smuzhiyun { 0x80bb, 0x18 },
480*4882a593Smuzhiyun { 0x80bc, 0x50 },
481*4882a593Smuzhiyun { 0x80bd, 0x00 },
482*4882a593Smuzhiyun { 0x80be, 0xea },
483*4882a593Smuzhiyun { 0x80bf, 0xef },
484*4882a593Smuzhiyun { 0x80c0, 0xfc },
485*4882a593Smuzhiyun { 0x80c1, 0xbd },
486*4882a593Smuzhiyun { 0x80c2, 0x1f },
487*4882a593Smuzhiyun { 0x80c3, 0xfc },
488*4882a593Smuzhiyun { 0x80c4, 0xdd },
489*4882a593Smuzhiyun { 0x80c5, 0xaf },
490*4882a593Smuzhiyun { 0x80c6, 0x00 },
491*4882a593Smuzhiyun { 0x80c7, 0x38 },
492*4882a593Smuzhiyun { 0x80c8, 0x30 },
493*4882a593Smuzhiyun { 0x80c9, 0x05 },
494*4882a593Smuzhiyun { 0x80ca, 0x4a },
495*4882a593Smuzhiyun { 0x80cb, 0xd0 },
496*4882a593Smuzhiyun { 0x80cc, 0x01 },
497*4882a593Smuzhiyun { 0x80cd, 0xd9 },
498*4882a593Smuzhiyun { 0x80ce, 0x6f },
499*4882a593Smuzhiyun { 0x80cf, 0xf9 },
500*4882a593Smuzhiyun { 0x80d0, 0x70 },
501*4882a593Smuzhiyun { 0x80d1, 0xdf },
502*4882a593Smuzhiyun { 0x80d2, 0xf7 },
503*4882a593Smuzhiyun { 0x80d3, 0xc2 },
504*4882a593Smuzhiyun { 0x80d4, 0xdf },
505*4882a593Smuzhiyun { 0x80d5, 0x02 },
506*4882a593Smuzhiyun { 0x80d6, 0x9a },
507*4882a593Smuzhiyun { 0x80d7, 0xd0 },
508*4882a593Smuzhiyun { 0x8250, 0x0d },
509*4882a593Smuzhiyun { 0x8251, 0xcd },
510*4882a593Smuzhiyun { 0x8252, 0xe0 },
511*4882a593Smuzhiyun { 0x8253, 0x05 },
512*4882a593Smuzhiyun { 0x8254, 0xa7 },
513*4882a593Smuzhiyun { 0x8255, 0xff },
514*4882a593Smuzhiyun { 0x8256, 0xed },
515*4882a593Smuzhiyun { 0x8257, 0x5b },
516*4882a593Smuzhiyun { 0x8258, 0xae },
517*4882a593Smuzhiyun { 0x8259, 0xe6 },
518*4882a593Smuzhiyun { 0x825a, 0x3d },
519*4882a593Smuzhiyun { 0x825b, 0x0f },
520*4882a593Smuzhiyun { 0x825c, 0x0d },
521*4882a593Smuzhiyun { 0x825d, 0xea },
522*4882a593Smuzhiyun { 0x825e, 0xf2 },
523*4882a593Smuzhiyun { 0x825f, 0x51 },
524*4882a593Smuzhiyun { 0x8260, 0xf5 },
525*4882a593Smuzhiyun { 0x8261, 0x06 },
526*4882a593Smuzhiyun { 0x821a, 0x01 },
527*4882a593Smuzhiyun { 0x8546, 0x40 },
528*4882a593Smuzhiyun { 0x8210, 0x26 },
529*4882a593Smuzhiyun { 0x8211, 0xf6 },
530*4882a593Smuzhiyun { 0x8212, 0x84 },
531*4882a593Smuzhiyun { 0x8213, 0x02 },
532*4882a593Smuzhiyun { 0x8502, 0x01 },
533*4882a593Smuzhiyun { 0x8121, 0x04 },
534*4882a593Smuzhiyun { 0x8122, 0x04 },
535*4882a593Smuzhiyun { 0x852e, 0x10 },
536*4882a593Smuzhiyun { 0x80a4, 0xca },
537*4882a593Smuzhiyun { 0x80a7, 0x40 },
538*4882a593Smuzhiyun { 0x8526, 0x01 },
539*4882a593Smuzhiyun };
540*4882a593Smuzhiyun
au8522_enable_modulation(struct dvb_frontend * fe,enum fe_modulation m)541*4882a593Smuzhiyun static int au8522_enable_modulation(struct dvb_frontend *fe,
542*4882a593Smuzhiyun enum fe_modulation m)
543*4882a593Smuzhiyun {
544*4882a593Smuzhiyun struct au8522_state *state = fe->demodulator_priv;
545*4882a593Smuzhiyun int i;
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun dprintk("%s(0x%08x)\n", __func__, m);
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun switch (m) {
550*4882a593Smuzhiyun case VSB_8:
551*4882a593Smuzhiyun dprintk("%s() VSB_8\n", __func__);
552*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(VSB_mod_tab); i++)
553*4882a593Smuzhiyun au8522_writereg(state,
554*4882a593Smuzhiyun VSB_mod_tab[i].reg,
555*4882a593Smuzhiyun VSB_mod_tab[i].data);
556*4882a593Smuzhiyun au8522_set_if(fe, state->config.vsb_if);
557*4882a593Smuzhiyun break;
558*4882a593Smuzhiyun case QAM_64:
559*4882a593Smuzhiyun dprintk("%s() QAM 64\n", __func__);
560*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(QAM64_mod_tab); i++)
561*4882a593Smuzhiyun au8522_writereg(state,
562*4882a593Smuzhiyun QAM64_mod_tab[i].reg,
563*4882a593Smuzhiyun QAM64_mod_tab[i].data);
564*4882a593Smuzhiyun au8522_set_if(fe, state->config.qam_if);
565*4882a593Smuzhiyun break;
566*4882a593Smuzhiyun case QAM_256:
567*4882a593Smuzhiyun if (zv_mode) {
568*4882a593Smuzhiyun dprintk("%s() QAM 256 (zv_mode)\n", __func__);
569*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(QAM256_mod_tab_zv_mode); i++)
570*4882a593Smuzhiyun au8522_writereg(state,
571*4882a593Smuzhiyun QAM256_mod_tab_zv_mode[i].reg,
572*4882a593Smuzhiyun QAM256_mod_tab_zv_mode[i].data);
573*4882a593Smuzhiyun au8522_set_if(fe, state->config.qam_if);
574*4882a593Smuzhiyun msleep(100);
575*4882a593Smuzhiyun au8522_writereg(state, 0x821a, 0x00);
576*4882a593Smuzhiyun } else {
577*4882a593Smuzhiyun dprintk("%s() QAM 256\n", __func__);
578*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(QAM256_mod_tab); i++)
579*4882a593Smuzhiyun au8522_writereg(state,
580*4882a593Smuzhiyun QAM256_mod_tab[i].reg,
581*4882a593Smuzhiyun QAM256_mod_tab[i].data);
582*4882a593Smuzhiyun au8522_set_if(fe, state->config.qam_if);
583*4882a593Smuzhiyun }
584*4882a593Smuzhiyun break;
585*4882a593Smuzhiyun default:
586*4882a593Smuzhiyun dprintk("%s() Invalid modulation\n", __func__);
587*4882a593Smuzhiyun return -EINVAL;
588*4882a593Smuzhiyun }
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun state->current_modulation = m;
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun return 0;
593*4882a593Smuzhiyun }
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun /* Talk to the demod, set the FEC, GUARD, QAM settings etc */
au8522_set_frontend(struct dvb_frontend * fe)596*4882a593Smuzhiyun static int au8522_set_frontend(struct dvb_frontend *fe)
597*4882a593Smuzhiyun {
598*4882a593Smuzhiyun struct dtv_frontend_properties *c = &fe->dtv_property_cache;
599*4882a593Smuzhiyun struct au8522_state *state = fe->demodulator_priv;
600*4882a593Smuzhiyun int ret = -EINVAL;
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun dprintk("%s(frequency=%d)\n", __func__, c->frequency);
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun if ((state->current_frequency == c->frequency) &&
605*4882a593Smuzhiyun (state->current_modulation == c->modulation))
606*4882a593Smuzhiyun return 0;
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun if (fe->ops.tuner_ops.set_params) {
609*4882a593Smuzhiyun if (fe->ops.i2c_gate_ctrl)
610*4882a593Smuzhiyun fe->ops.i2c_gate_ctrl(fe, 1);
611*4882a593Smuzhiyun ret = fe->ops.tuner_ops.set_params(fe);
612*4882a593Smuzhiyun if (fe->ops.i2c_gate_ctrl)
613*4882a593Smuzhiyun fe->ops.i2c_gate_ctrl(fe, 0);
614*4882a593Smuzhiyun }
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun if (ret < 0)
617*4882a593Smuzhiyun return ret;
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun /* Allow the tuner to settle */
620*4882a593Smuzhiyun if (zv_mode) {
621*4882a593Smuzhiyun dprintk("%s() increase tuner settling time for zv_mode\n",
622*4882a593Smuzhiyun __func__);
623*4882a593Smuzhiyun msleep(250);
624*4882a593Smuzhiyun } else
625*4882a593Smuzhiyun msleep(100);
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun au8522_enable_modulation(fe, c->modulation);
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun state->current_frequency = c->frequency;
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun return 0;
632*4882a593Smuzhiyun }
633*4882a593Smuzhiyun
au8522_read_status(struct dvb_frontend * fe,enum fe_status * status)634*4882a593Smuzhiyun static int au8522_read_status(struct dvb_frontend *fe, enum fe_status *status)
635*4882a593Smuzhiyun {
636*4882a593Smuzhiyun struct au8522_state *state = fe->demodulator_priv;
637*4882a593Smuzhiyun u8 reg;
638*4882a593Smuzhiyun u32 tuner_status = 0;
639*4882a593Smuzhiyun
640*4882a593Smuzhiyun *status = 0;
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun if (state->current_modulation == VSB_8) {
643*4882a593Smuzhiyun dprintk("%s() Checking VSB_8\n", __func__);
644*4882a593Smuzhiyun reg = au8522_readreg(state, 0x0088);
645*4882a593Smuzhiyun if ((reg & 0x03) == 0x03)
646*4882a593Smuzhiyun *status |= FE_HAS_LOCK | FE_HAS_SYNC | FE_HAS_VITERBI;
647*4882a593Smuzhiyun } else {
648*4882a593Smuzhiyun dprintk("%s() Checking QAM\n", __func__);
649*4882a593Smuzhiyun reg = au8522_readreg(state, 0x0541);
650*4882a593Smuzhiyun if (reg & 0x80)
651*4882a593Smuzhiyun *status |= FE_HAS_VITERBI;
652*4882a593Smuzhiyun if (reg & 0x20)
653*4882a593Smuzhiyun *status |= FE_HAS_LOCK | FE_HAS_SYNC;
654*4882a593Smuzhiyun }
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun switch (state->config.status_mode) {
657*4882a593Smuzhiyun case AU8522_DEMODLOCKING:
658*4882a593Smuzhiyun dprintk("%s() DEMODLOCKING\n", __func__);
659*4882a593Smuzhiyun if (*status & FE_HAS_VITERBI)
660*4882a593Smuzhiyun *status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;
661*4882a593Smuzhiyun break;
662*4882a593Smuzhiyun case AU8522_TUNERLOCKING:
663*4882a593Smuzhiyun /* Get the tuner status */
664*4882a593Smuzhiyun dprintk("%s() TUNERLOCKING\n", __func__);
665*4882a593Smuzhiyun if (fe->ops.tuner_ops.get_status) {
666*4882a593Smuzhiyun if (fe->ops.i2c_gate_ctrl)
667*4882a593Smuzhiyun fe->ops.i2c_gate_ctrl(fe, 1);
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun fe->ops.tuner_ops.get_status(fe, &tuner_status);
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun if (fe->ops.i2c_gate_ctrl)
672*4882a593Smuzhiyun fe->ops.i2c_gate_ctrl(fe, 0);
673*4882a593Smuzhiyun }
674*4882a593Smuzhiyun if (tuner_status)
675*4882a593Smuzhiyun *status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;
676*4882a593Smuzhiyun break;
677*4882a593Smuzhiyun }
678*4882a593Smuzhiyun state->fe_status = *status;
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun if (*status & FE_HAS_LOCK)
681*4882a593Smuzhiyun /* turn on LED, if it isn't on already */
682*4882a593Smuzhiyun au8522_led_ctrl(state, -1);
683*4882a593Smuzhiyun else
684*4882a593Smuzhiyun /* turn off LED */
685*4882a593Smuzhiyun au8522_led_ctrl(state, 0);
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun dprintk("%s() status 0x%08x\n", __func__, *status);
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun return 0;
690*4882a593Smuzhiyun }
691*4882a593Smuzhiyun
au8522_led_status(struct au8522_state * state,const u16 * snr)692*4882a593Smuzhiyun static int au8522_led_status(struct au8522_state *state, const u16 *snr)
693*4882a593Smuzhiyun {
694*4882a593Smuzhiyun struct au8522_led_config *led_config = state->config.led_cfg;
695*4882a593Smuzhiyun int led;
696*4882a593Smuzhiyun u16 strong;
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun /* bail out if we can't control an LED */
699*4882a593Smuzhiyun if (!led_config)
700*4882a593Smuzhiyun return 0;
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun if (0 == (state->fe_status & FE_HAS_LOCK))
703*4882a593Smuzhiyun return au8522_led_ctrl(state, 0);
704*4882a593Smuzhiyun else if (state->current_modulation == QAM_256)
705*4882a593Smuzhiyun strong = led_config->qam256_strong;
706*4882a593Smuzhiyun else if (state->current_modulation == QAM_64)
707*4882a593Smuzhiyun strong = led_config->qam64_strong;
708*4882a593Smuzhiyun else /* (state->current_modulation == VSB_8) */
709*4882a593Smuzhiyun strong = led_config->vsb8_strong;
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun if (*snr >= strong)
712*4882a593Smuzhiyun led = 2;
713*4882a593Smuzhiyun else
714*4882a593Smuzhiyun led = 1;
715*4882a593Smuzhiyun
716*4882a593Smuzhiyun if ((state->led_state) &&
717*4882a593Smuzhiyun (((strong < *snr) ? (*snr - strong) : (strong - *snr)) <= 10))
718*4882a593Smuzhiyun /* snr didn't change enough to bother
719*4882a593Smuzhiyun * changing the color of the led */
720*4882a593Smuzhiyun return 0;
721*4882a593Smuzhiyun
722*4882a593Smuzhiyun return au8522_led_ctrl(state, led);
723*4882a593Smuzhiyun }
724*4882a593Smuzhiyun
au8522_read_snr(struct dvb_frontend * fe,u16 * snr)725*4882a593Smuzhiyun static int au8522_read_snr(struct dvb_frontend *fe, u16 *snr)
726*4882a593Smuzhiyun {
727*4882a593Smuzhiyun struct au8522_state *state = fe->demodulator_priv;
728*4882a593Smuzhiyun int ret = -EINVAL;
729*4882a593Smuzhiyun
730*4882a593Smuzhiyun dprintk("%s()\n", __func__);
731*4882a593Smuzhiyun
732*4882a593Smuzhiyun if (state->current_modulation == QAM_256)
733*4882a593Smuzhiyun ret = au8522_mse2snr_lookup(qam256_mse2snr_tab,
734*4882a593Smuzhiyun ARRAY_SIZE(qam256_mse2snr_tab),
735*4882a593Smuzhiyun au8522_readreg(state, 0x0522),
736*4882a593Smuzhiyun snr);
737*4882a593Smuzhiyun else if (state->current_modulation == QAM_64)
738*4882a593Smuzhiyun ret = au8522_mse2snr_lookup(qam64_mse2snr_tab,
739*4882a593Smuzhiyun ARRAY_SIZE(qam64_mse2snr_tab),
740*4882a593Smuzhiyun au8522_readreg(state, 0x0522),
741*4882a593Smuzhiyun snr);
742*4882a593Smuzhiyun else /* VSB_8 */
743*4882a593Smuzhiyun ret = au8522_mse2snr_lookup(vsb_mse2snr_tab,
744*4882a593Smuzhiyun ARRAY_SIZE(vsb_mse2snr_tab),
745*4882a593Smuzhiyun au8522_readreg(state, 0x0311),
746*4882a593Smuzhiyun snr);
747*4882a593Smuzhiyun
748*4882a593Smuzhiyun if (state->config.led_cfg)
749*4882a593Smuzhiyun au8522_led_status(state, snr);
750*4882a593Smuzhiyun
751*4882a593Smuzhiyun return ret;
752*4882a593Smuzhiyun }
753*4882a593Smuzhiyun
au8522_read_signal_strength(struct dvb_frontend * fe,u16 * signal_strength)754*4882a593Smuzhiyun static int au8522_read_signal_strength(struct dvb_frontend *fe,
755*4882a593Smuzhiyun u16 *signal_strength)
756*4882a593Smuzhiyun {
757*4882a593Smuzhiyun /* borrowed from lgdt330x.c
758*4882a593Smuzhiyun *
759*4882a593Smuzhiyun * Calculate strength from SNR up to 35dB
760*4882a593Smuzhiyun * Even though the SNR can go higher than 35dB,
761*4882a593Smuzhiyun * there is some comfort factor in having a range of
762*4882a593Smuzhiyun * strong signals that can show at 100%
763*4882a593Smuzhiyun */
764*4882a593Smuzhiyun u16 snr;
765*4882a593Smuzhiyun u32 tmp;
766*4882a593Smuzhiyun int ret = au8522_read_snr(fe, &snr);
767*4882a593Smuzhiyun
768*4882a593Smuzhiyun *signal_strength = 0;
769*4882a593Smuzhiyun
770*4882a593Smuzhiyun if (0 == ret) {
771*4882a593Smuzhiyun /* The following calculation method was chosen
772*4882a593Smuzhiyun * purely for the sake of code re-use from the
773*4882a593Smuzhiyun * other demod drivers that use this method */
774*4882a593Smuzhiyun
775*4882a593Smuzhiyun /* Convert from SNR in dB * 10 to 8.24 fixed-point */
776*4882a593Smuzhiyun tmp = (snr * ((1 << 24) / 10));
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun /* Convert from 8.24 fixed-point to
779*4882a593Smuzhiyun * scale the range 0 - 35*2^24 into 0 - 65535*/
780*4882a593Smuzhiyun if (tmp >= 8960 * 0x10000)
781*4882a593Smuzhiyun *signal_strength = 0xffff;
782*4882a593Smuzhiyun else
783*4882a593Smuzhiyun *signal_strength = tmp / 8960;
784*4882a593Smuzhiyun }
785*4882a593Smuzhiyun
786*4882a593Smuzhiyun return ret;
787*4882a593Smuzhiyun }
788*4882a593Smuzhiyun
au8522_read_ucblocks(struct dvb_frontend * fe,u32 * ucblocks)789*4882a593Smuzhiyun static int au8522_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
790*4882a593Smuzhiyun {
791*4882a593Smuzhiyun struct au8522_state *state = fe->demodulator_priv;
792*4882a593Smuzhiyun
793*4882a593Smuzhiyun if (state->current_modulation == VSB_8)
794*4882a593Smuzhiyun *ucblocks = au8522_readreg(state, 0x0087);
795*4882a593Smuzhiyun else
796*4882a593Smuzhiyun *ucblocks = au8522_readreg(state, 0x0543);
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun return 0;
799*4882a593Smuzhiyun }
800*4882a593Smuzhiyun
au8522_read_ber(struct dvb_frontend * fe,u32 * ber)801*4882a593Smuzhiyun static int au8522_read_ber(struct dvb_frontend *fe, u32 *ber)
802*4882a593Smuzhiyun {
803*4882a593Smuzhiyun return au8522_read_ucblocks(fe, ber);
804*4882a593Smuzhiyun }
805*4882a593Smuzhiyun
au8522_get_frontend(struct dvb_frontend * fe,struct dtv_frontend_properties * c)806*4882a593Smuzhiyun static int au8522_get_frontend(struct dvb_frontend *fe,
807*4882a593Smuzhiyun struct dtv_frontend_properties *c)
808*4882a593Smuzhiyun {
809*4882a593Smuzhiyun struct au8522_state *state = fe->demodulator_priv;
810*4882a593Smuzhiyun
811*4882a593Smuzhiyun c->frequency = state->current_frequency;
812*4882a593Smuzhiyun c->modulation = state->current_modulation;
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun return 0;
815*4882a593Smuzhiyun }
816*4882a593Smuzhiyun
au8522_get_tune_settings(struct dvb_frontend * fe,struct dvb_frontend_tune_settings * tune)817*4882a593Smuzhiyun static int au8522_get_tune_settings(struct dvb_frontend *fe,
818*4882a593Smuzhiyun struct dvb_frontend_tune_settings *tune)
819*4882a593Smuzhiyun {
820*4882a593Smuzhiyun tune->min_delay_ms = 1000;
821*4882a593Smuzhiyun return 0;
822*4882a593Smuzhiyun }
823*4882a593Smuzhiyun
824*4882a593Smuzhiyun static const struct dvb_frontend_ops au8522_ops;
825*4882a593Smuzhiyun
826*4882a593Smuzhiyun
au8522_release(struct dvb_frontend * fe)827*4882a593Smuzhiyun static void au8522_release(struct dvb_frontend *fe)
828*4882a593Smuzhiyun {
829*4882a593Smuzhiyun struct au8522_state *state = fe->demodulator_priv;
830*4882a593Smuzhiyun au8522_release_state(state);
831*4882a593Smuzhiyun }
832*4882a593Smuzhiyun
au8522_attach(const struct au8522_config * config,struct i2c_adapter * i2c)833*4882a593Smuzhiyun struct dvb_frontend *au8522_attach(const struct au8522_config *config,
834*4882a593Smuzhiyun struct i2c_adapter *i2c)
835*4882a593Smuzhiyun {
836*4882a593Smuzhiyun struct au8522_state *state = NULL;
837*4882a593Smuzhiyun int instance;
838*4882a593Smuzhiyun
839*4882a593Smuzhiyun /* allocate memory for the internal state */
840*4882a593Smuzhiyun instance = au8522_get_state(&state, i2c, config->demod_address);
841*4882a593Smuzhiyun switch (instance) {
842*4882a593Smuzhiyun case 0:
843*4882a593Smuzhiyun dprintk("%s state allocation failed\n", __func__);
844*4882a593Smuzhiyun break;
845*4882a593Smuzhiyun case 1:
846*4882a593Smuzhiyun /* new demod instance */
847*4882a593Smuzhiyun dprintk("%s using new instance\n", __func__);
848*4882a593Smuzhiyun break;
849*4882a593Smuzhiyun default:
850*4882a593Smuzhiyun /* existing demod instance */
851*4882a593Smuzhiyun dprintk("%s using existing instance\n", __func__);
852*4882a593Smuzhiyun break;
853*4882a593Smuzhiyun }
854*4882a593Smuzhiyun
855*4882a593Smuzhiyun /* setup the state */
856*4882a593Smuzhiyun state->config = *config;
857*4882a593Smuzhiyun state->i2c = i2c;
858*4882a593Smuzhiyun state->operational_mode = AU8522_DIGITAL_MODE;
859*4882a593Smuzhiyun
860*4882a593Smuzhiyun /* create dvb_frontend */
861*4882a593Smuzhiyun memcpy(&state->frontend.ops, &au8522_ops,
862*4882a593Smuzhiyun sizeof(struct dvb_frontend_ops));
863*4882a593Smuzhiyun state->frontend.demodulator_priv = state;
864*4882a593Smuzhiyun
865*4882a593Smuzhiyun state->frontend.ops.analog_ops.i2c_gate_ctrl = au8522_analog_i2c_gate_ctrl;
866*4882a593Smuzhiyun
867*4882a593Smuzhiyun if (au8522_init(&state->frontend) != 0) {
868*4882a593Smuzhiyun printk(KERN_ERR "%s: Failed to initialize correctly\n",
869*4882a593Smuzhiyun __func__);
870*4882a593Smuzhiyun goto error;
871*4882a593Smuzhiyun }
872*4882a593Smuzhiyun
873*4882a593Smuzhiyun /* Note: Leaving the I2C gate open here. */
874*4882a593Smuzhiyun au8522_i2c_gate_ctrl(&state->frontend, 1);
875*4882a593Smuzhiyun
876*4882a593Smuzhiyun return &state->frontend;
877*4882a593Smuzhiyun
878*4882a593Smuzhiyun error:
879*4882a593Smuzhiyun au8522_release_state(state);
880*4882a593Smuzhiyun return NULL;
881*4882a593Smuzhiyun }
882*4882a593Smuzhiyun EXPORT_SYMBOL(au8522_attach);
883*4882a593Smuzhiyun
884*4882a593Smuzhiyun static const struct dvb_frontend_ops au8522_ops = {
885*4882a593Smuzhiyun .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
886*4882a593Smuzhiyun .info = {
887*4882a593Smuzhiyun .name = "Auvitek AU8522 QAM/8VSB Frontend",
888*4882a593Smuzhiyun .frequency_min_hz = 54 * MHz,
889*4882a593Smuzhiyun .frequency_max_hz = 858 * MHz,
890*4882a593Smuzhiyun .frequency_stepsize_hz = 62500,
891*4882a593Smuzhiyun .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
892*4882a593Smuzhiyun },
893*4882a593Smuzhiyun
894*4882a593Smuzhiyun .init = au8522_init,
895*4882a593Smuzhiyun .sleep = au8522_sleep,
896*4882a593Smuzhiyun .i2c_gate_ctrl = au8522_i2c_gate_ctrl,
897*4882a593Smuzhiyun .set_frontend = au8522_set_frontend,
898*4882a593Smuzhiyun .get_frontend = au8522_get_frontend,
899*4882a593Smuzhiyun .get_tune_settings = au8522_get_tune_settings,
900*4882a593Smuzhiyun .read_status = au8522_read_status,
901*4882a593Smuzhiyun .read_ber = au8522_read_ber,
902*4882a593Smuzhiyun .read_signal_strength = au8522_read_signal_strength,
903*4882a593Smuzhiyun .read_snr = au8522_read_snr,
904*4882a593Smuzhiyun .read_ucblocks = au8522_read_ucblocks,
905*4882a593Smuzhiyun .release = au8522_release,
906*4882a593Smuzhiyun };
907*4882a593Smuzhiyun
908*4882a593Smuzhiyun module_param(debug, int, 0644);
909*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "Enable verbose debug messages");
910*4882a593Smuzhiyun
911*4882a593Smuzhiyun module_param(zv_mode, int, 0644);
912*4882a593Smuzhiyun MODULE_PARM_DESC(zv_mode, "Turn on/off ZeeVee modulator compatibility mode (default:on).\n"
913*4882a593Smuzhiyun "\t\ton - modified AU8522 QAM256 initialization.\n"
914*4882a593Smuzhiyun "\t\tProvides faster lock when using ZeeVee modulator based sources");
915*4882a593Smuzhiyun
916*4882a593Smuzhiyun MODULE_DESCRIPTION("Auvitek AU8522 QAM-B/ATSC Demodulator driver");
917*4882a593Smuzhiyun MODULE_AUTHOR("Steven Toth");
918*4882a593Smuzhiyun MODULE_LICENSE("GPL");
919