1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Linux driver for digital TV devices equipped with B2C2 FlexcopII(b)/III 4*4882a593Smuzhiyun * flexcop-reg.h - register abstraction for FlexCopII, FlexCopIIb and FlexCopIII 5*4882a593Smuzhiyun * see flexcop.c for copyright information 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun #ifndef __FLEXCOP_REG_H__ 8*4882a593Smuzhiyun #define __FLEXCOP_REG_H__ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun typedef enum { 11*4882a593Smuzhiyun FLEXCOP_UNK = 0, 12*4882a593Smuzhiyun FLEXCOP_II, 13*4882a593Smuzhiyun FLEXCOP_IIB, 14*4882a593Smuzhiyun FLEXCOP_III, 15*4882a593Smuzhiyun } flexcop_revision_t; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun typedef enum { 18*4882a593Smuzhiyun FC_UNK = 0, 19*4882a593Smuzhiyun FC_CABLE, 20*4882a593Smuzhiyun FC_AIR_DVBT, 21*4882a593Smuzhiyun FC_AIR_ATSC1, 22*4882a593Smuzhiyun FC_AIR_ATSC2, 23*4882a593Smuzhiyun FC_AIR_ATSC3, 24*4882a593Smuzhiyun FC_SKY_REV23, 25*4882a593Smuzhiyun FC_SKY_REV26, 26*4882a593Smuzhiyun FC_SKY_REV27, 27*4882a593Smuzhiyun FC_SKY_REV28, 28*4882a593Smuzhiyun FC_SKYS2_REV33, 29*4882a593Smuzhiyun } flexcop_device_type_t; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun typedef enum { 32*4882a593Smuzhiyun FC_USB = 0, 33*4882a593Smuzhiyun FC_PCI, 34*4882a593Smuzhiyun } flexcop_bus_t; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun /* FlexCop IBI Registers */ 37*4882a593Smuzhiyun #if defined(__LITTLE_ENDIAN) 38*4882a593Smuzhiyun #include "flexcop_ibi_value_le.h" 39*4882a593Smuzhiyun #else 40*4882a593Smuzhiyun #if defined(__BIG_ENDIAN) 41*4882a593Smuzhiyun #include "flexcop_ibi_value_be.h" 42*4882a593Smuzhiyun #else 43*4882a593Smuzhiyun #error no endian defined 44*4882a593Smuzhiyun #endif 45*4882a593Smuzhiyun #endif 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #define fc_data_Tag_ID_DVB 0x3e 48*4882a593Smuzhiyun #define fc_data_Tag_ID_ATSC 0x3f 49*4882a593Smuzhiyun #define fc_data_Tag_ID_IDSB 0x8b 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun #define fc_key_code_default 0x1 52*4882a593Smuzhiyun #define fc_key_code_even 0x2 53*4882a593Smuzhiyun #define fc_key_code_odd 0x3 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun extern flexcop_ibi_value ibi_zero; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun typedef enum { 58*4882a593Smuzhiyun FC_I2C_PORT_DEMOD = 1, 59*4882a593Smuzhiyun FC_I2C_PORT_EEPROM = 2, 60*4882a593Smuzhiyun FC_I2C_PORT_TUNER = 3, 61*4882a593Smuzhiyun } flexcop_i2c_port_t; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun typedef enum { 64*4882a593Smuzhiyun FC_WRITE = 0, 65*4882a593Smuzhiyun FC_READ = 1, 66*4882a593Smuzhiyun } flexcop_access_op_t; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun typedef enum { 69*4882a593Smuzhiyun FC_SRAM_DEST_NET = 1, 70*4882a593Smuzhiyun FC_SRAM_DEST_CAI = 2, 71*4882a593Smuzhiyun FC_SRAM_DEST_CAO = 4, 72*4882a593Smuzhiyun FC_SRAM_DEST_MEDIA = 8 73*4882a593Smuzhiyun } flexcop_sram_dest_t; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun typedef enum { 76*4882a593Smuzhiyun FC_SRAM_DEST_TARGET_WAN_USB = 0, 77*4882a593Smuzhiyun FC_SRAM_DEST_TARGET_DMA1 = 1, 78*4882a593Smuzhiyun FC_SRAM_DEST_TARGET_DMA2 = 2, 79*4882a593Smuzhiyun FC_SRAM_DEST_TARGET_FC3_CA = 3 80*4882a593Smuzhiyun } flexcop_sram_dest_target_t; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun typedef enum { 83*4882a593Smuzhiyun FC_SRAM_2_32KB = 0, /* 64KB */ 84*4882a593Smuzhiyun FC_SRAM_1_32KB = 1, /* 32KB - default fow FCII */ 85*4882a593Smuzhiyun FC_SRAM_1_128KB = 2, /* 128KB */ 86*4882a593Smuzhiyun FC_SRAM_1_48KB = 3, /* 48KB - default for FCIII */ 87*4882a593Smuzhiyun } flexcop_sram_type_t; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun typedef enum { 90*4882a593Smuzhiyun FC_WAN_SPEED_4MBITS = 0, 91*4882a593Smuzhiyun FC_WAN_SPEED_8MBITS = 1, 92*4882a593Smuzhiyun FC_WAN_SPEED_12MBITS = 2, 93*4882a593Smuzhiyun FC_WAN_SPEED_16MBITS = 3, 94*4882a593Smuzhiyun } flexcop_wan_speed_t; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun typedef enum { 97*4882a593Smuzhiyun FC_DMA_1 = 1, 98*4882a593Smuzhiyun FC_DMA_2 = 2, 99*4882a593Smuzhiyun } flexcop_dma_index_t; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun typedef enum { 102*4882a593Smuzhiyun FC_DMA_SUBADDR_0 = 1, 103*4882a593Smuzhiyun FC_DMA_SUBADDR_1 = 2, 104*4882a593Smuzhiyun } flexcop_dma_addr_index_t; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun /* names of the particular registers */ 107*4882a593Smuzhiyun typedef enum { 108*4882a593Smuzhiyun dma1_000 = 0x000, 109*4882a593Smuzhiyun dma1_004 = 0x004, 110*4882a593Smuzhiyun dma1_008 = 0x008, 111*4882a593Smuzhiyun dma1_00c = 0x00c, 112*4882a593Smuzhiyun dma2_010 = 0x010, 113*4882a593Smuzhiyun dma2_014 = 0x014, 114*4882a593Smuzhiyun dma2_018 = 0x018, 115*4882a593Smuzhiyun dma2_01c = 0x01c, 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun tw_sm_c_100 = 0x100, 118*4882a593Smuzhiyun tw_sm_c_104 = 0x104, 119*4882a593Smuzhiyun tw_sm_c_108 = 0x108, 120*4882a593Smuzhiyun tw_sm_c_10c = 0x10c, 121*4882a593Smuzhiyun tw_sm_c_110 = 0x110, 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun lnb_switch_freq_200 = 0x200, 124*4882a593Smuzhiyun misc_204 = 0x204, 125*4882a593Smuzhiyun ctrl_208 = 0x208, 126*4882a593Smuzhiyun irq_20c = 0x20c, 127*4882a593Smuzhiyun sw_reset_210 = 0x210, 128*4882a593Smuzhiyun misc_214 = 0x214, 129*4882a593Smuzhiyun mbox_v8_to_host_218 = 0x218, 130*4882a593Smuzhiyun mbox_host_to_v8_21c = 0x21c, 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun pid_filter_300 = 0x300, 133*4882a593Smuzhiyun pid_filter_304 = 0x304, 134*4882a593Smuzhiyun pid_filter_308 = 0x308, 135*4882a593Smuzhiyun pid_filter_30c = 0x30c, 136*4882a593Smuzhiyun index_reg_310 = 0x310, 137*4882a593Smuzhiyun pid_n_reg_314 = 0x314, 138*4882a593Smuzhiyun mac_low_reg_318 = 0x318, 139*4882a593Smuzhiyun mac_high_reg_31c = 0x31c, 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun data_tag_400 = 0x400, 142*4882a593Smuzhiyun card_id_408 = 0x408, 143*4882a593Smuzhiyun card_id_40c = 0x40c, 144*4882a593Smuzhiyun mac_address_418 = 0x418, 145*4882a593Smuzhiyun mac_address_41c = 0x41c, 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun ci_600 = 0x600, 148*4882a593Smuzhiyun pi_604 = 0x604, 149*4882a593Smuzhiyun pi_608 = 0x608, 150*4882a593Smuzhiyun dvb_reg_60c = 0x60c, 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun sram_ctrl_reg_700 = 0x700, 153*4882a593Smuzhiyun net_buf_reg_704 = 0x704, 154*4882a593Smuzhiyun cai_buf_reg_708 = 0x708, 155*4882a593Smuzhiyun cao_buf_reg_70c = 0x70c, 156*4882a593Smuzhiyun media_buf_reg_710 = 0x710, 157*4882a593Smuzhiyun sram_dest_reg_714 = 0x714, 158*4882a593Smuzhiyun net_buf_reg_718 = 0x718, 159*4882a593Smuzhiyun wan_ctrl_reg_71c = 0x71c, 160*4882a593Smuzhiyun } flexcop_ibi_register; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun #define flexcop_set_ibi_value(reg,attr,val) { \ 163*4882a593Smuzhiyun flexcop_ibi_value v = fc->read_ibi_reg(fc,reg); \ 164*4882a593Smuzhiyun v.reg.attr = val; \ 165*4882a593Smuzhiyun fc->write_ibi_reg(fc,reg,v); \ 166*4882a593Smuzhiyun } 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun #endif 169