1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2017, Linaro Ltd
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/kernel.h>
7*4882a593Smuzhiyun #include <linux/module.h>
8*4882a593Smuzhiyun #include <linux/io.h>
9*4882a593Smuzhiyun #include <linux/slab.h>
10*4882a593Smuzhiyun #include <linux/of.h>
11*4882a593Smuzhiyun #include <linux/of_platform.h>
12*4882a593Smuzhiyun #include <linux/platform_device.h>
13*4882a593Smuzhiyun #include <linux/regmap.h>
14*4882a593Smuzhiyun #include <linux/mailbox_controller.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #define QCOM_APCS_IPC_BITS 32
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun struct qcom_apcs_ipc {
19*4882a593Smuzhiyun struct mbox_controller mbox;
20*4882a593Smuzhiyun struct mbox_chan mbox_chans[QCOM_APCS_IPC_BITS];
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun struct regmap *regmap;
23*4882a593Smuzhiyun unsigned long offset;
24*4882a593Smuzhiyun struct platform_device *clk;
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun struct qcom_apcs_ipc_data {
28*4882a593Smuzhiyun int offset;
29*4882a593Smuzhiyun char *clk_name;
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun static const struct qcom_apcs_ipc_data ipq6018_apcs_data = {
33*4882a593Smuzhiyun .offset = 8, .clk_name = "qcom,apss-ipq6018-clk"
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun static const struct qcom_apcs_ipc_data ipq8074_apcs_data = {
37*4882a593Smuzhiyun .offset = 8, .clk_name = NULL
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun static const struct qcom_apcs_ipc_data msm8916_apcs_data = {
41*4882a593Smuzhiyun .offset = 8, .clk_name = "qcom-apcs-msm8916-clk"
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun static const struct qcom_apcs_ipc_data msm8994_apcs_data = {
45*4882a593Smuzhiyun .offset = 8, .clk_name = NULL
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun static const struct qcom_apcs_ipc_data msm8996_apcs_data = {
49*4882a593Smuzhiyun .offset = 16, .clk_name = NULL
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun static const struct qcom_apcs_ipc_data msm8998_apcs_data = {
53*4882a593Smuzhiyun .offset = 8, .clk_name = NULL
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun static const struct qcom_apcs_ipc_data sdm660_apcs_data = {
57*4882a593Smuzhiyun .offset = 8, .clk_name = NULL
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun static const struct qcom_apcs_ipc_data apps_shared_apcs_data = {
61*4882a593Smuzhiyun .offset = 12, .clk_name = NULL
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun static const struct regmap_config apcs_regmap_config = {
65*4882a593Smuzhiyun .reg_bits = 32,
66*4882a593Smuzhiyun .reg_stride = 4,
67*4882a593Smuzhiyun .val_bits = 32,
68*4882a593Smuzhiyun .max_register = 0xFFC,
69*4882a593Smuzhiyun .fast_io = true,
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun
qcom_apcs_ipc_send_data(struct mbox_chan * chan,void * data)72*4882a593Smuzhiyun static int qcom_apcs_ipc_send_data(struct mbox_chan *chan, void *data)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun struct qcom_apcs_ipc *apcs = container_of(chan->mbox,
75*4882a593Smuzhiyun struct qcom_apcs_ipc, mbox);
76*4882a593Smuzhiyun unsigned long idx = (unsigned long)chan->con_priv;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun return regmap_write(apcs->regmap, apcs->offset, BIT(idx));
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun static const struct mbox_chan_ops qcom_apcs_ipc_ops = {
82*4882a593Smuzhiyun .send_data = qcom_apcs_ipc_send_data,
83*4882a593Smuzhiyun };
84*4882a593Smuzhiyun
qcom_apcs_ipc_probe(struct platform_device * pdev)85*4882a593Smuzhiyun static int qcom_apcs_ipc_probe(struct platform_device *pdev)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun struct qcom_apcs_ipc *apcs;
88*4882a593Smuzhiyun const struct qcom_apcs_ipc_data *apcs_data;
89*4882a593Smuzhiyun struct regmap *regmap;
90*4882a593Smuzhiyun struct resource *res;
91*4882a593Smuzhiyun void __iomem *base;
92*4882a593Smuzhiyun unsigned long i;
93*4882a593Smuzhiyun int ret;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun apcs = devm_kzalloc(&pdev->dev, sizeof(*apcs), GFP_KERNEL);
96*4882a593Smuzhiyun if (!apcs)
97*4882a593Smuzhiyun return -ENOMEM;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
100*4882a593Smuzhiyun base = devm_ioremap_resource(&pdev->dev, res);
101*4882a593Smuzhiyun if (IS_ERR(base))
102*4882a593Smuzhiyun return PTR_ERR(base);
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun regmap = devm_regmap_init_mmio(&pdev->dev, base, &apcs_regmap_config);
105*4882a593Smuzhiyun if (IS_ERR(regmap))
106*4882a593Smuzhiyun return PTR_ERR(regmap);
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun apcs_data = of_device_get_match_data(&pdev->dev);
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun apcs->regmap = regmap;
111*4882a593Smuzhiyun apcs->offset = apcs_data->offset;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun /* Initialize channel identifiers */
114*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(apcs->mbox_chans); i++)
115*4882a593Smuzhiyun apcs->mbox_chans[i].con_priv = (void *)i;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun apcs->mbox.dev = &pdev->dev;
118*4882a593Smuzhiyun apcs->mbox.ops = &qcom_apcs_ipc_ops;
119*4882a593Smuzhiyun apcs->mbox.chans = apcs->mbox_chans;
120*4882a593Smuzhiyun apcs->mbox.num_chans = ARRAY_SIZE(apcs->mbox_chans);
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun ret = devm_mbox_controller_register(&pdev->dev, &apcs->mbox);
123*4882a593Smuzhiyun if (ret) {
124*4882a593Smuzhiyun dev_err(&pdev->dev, "failed to register APCS IPC controller\n");
125*4882a593Smuzhiyun return ret;
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun if (apcs_data->clk_name) {
129*4882a593Smuzhiyun apcs->clk = platform_device_register_data(&pdev->dev,
130*4882a593Smuzhiyun apcs_data->clk_name,
131*4882a593Smuzhiyun PLATFORM_DEVID_AUTO,
132*4882a593Smuzhiyun NULL, 0);
133*4882a593Smuzhiyun if (IS_ERR(apcs->clk))
134*4882a593Smuzhiyun dev_err(&pdev->dev, "failed to register APCS clk\n");
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun platform_set_drvdata(pdev, apcs);
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun return 0;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
qcom_apcs_ipc_remove(struct platform_device * pdev)142*4882a593Smuzhiyun static int qcom_apcs_ipc_remove(struct platform_device *pdev)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun struct qcom_apcs_ipc *apcs = platform_get_drvdata(pdev);
145*4882a593Smuzhiyun struct platform_device *clk = apcs->clk;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun platform_device_unregister(clk);
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun return 0;
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun /* .data is the offset of the ipc register within the global block */
153*4882a593Smuzhiyun static const struct of_device_id qcom_apcs_ipc_of_match[] = {
154*4882a593Smuzhiyun { .compatible = "qcom,ipq6018-apcs-apps-global", .data = &ipq6018_apcs_data },
155*4882a593Smuzhiyun { .compatible = "qcom,ipq8074-apcs-apps-global", .data = &ipq8074_apcs_data },
156*4882a593Smuzhiyun { .compatible = "qcom,msm8916-apcs-kpss-global", .data = &msm8916_apcs_data },
157*4882a593Smuzhiyun { .compatible = "qcom,msm8994-apcs-kpss-global", .data = &msm8994_apcs_data },
158*4882a593Smuzhiyun { .compatible = "qcom,msm8996-apcs-hmss-global", .data = &msm8996_apcs_data },
159*4882a593Smuzhiyun { .compatible = "qcom,msm8998-apcs-hmss-global", .data = &msm8998_apcs_data },
160*4882a593Smuzhiyun { .compatible = "qcom,qcs404-apcs-apps-global", .data = &msm8916_apcs_data },
161*4882a593Smuzhiyun { .compatible = "qcom,sc7180-apss-shared", .data = &apps_shared_apcs_data },
162*4882a593Smuzhiyun { .compatible = "qcom,sdm660-apcs-hmss-global", .data = &sdm660_apcs_data },
163*4882a593Smuzhiyun { .compatible = "qcom,sdm845-apss-shared", .data = &apps_shared_apcs_data },
164*4882a593Smuzhiyun { .compatible = "qcom,sm8150-apss-shared", .data = &apps_shared_apcs_data },
165*4882a593Smuzhiyun {}
166*4882a593Smuzhiyun };
167*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, qcom_apcs_ipc_of_match);
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun static struct platform_driver qcom_apcs_ipc_driver = {
170*4882a593Smuzhiyun .probe = qcom_apcs_ipc_probe,
171*4882a593Smuzhiyun .remove = qcom_apcs_ipc_remove,
172*4882a593Smuzhiyun .driver = {
173*4882a593Smuzhiyun .name = "qcom_apcs_ipc",
174*4882a593Smuzhiyun .of_match_table = qcom_apcs_ipc_of_match,
175*4882a593Smuzhiyun },
176*4882a593Smuzhiyun };
177*4882a593Smuzhiyun
qcom_apcs_ipc_init(void)178*4882a593Smuzhiyun static int __init qcom_apcs_ipc_init(void)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun return platform_driver_register(&qcom_apcs_ipc_driver);
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun postcore_initcall(qcom_apcs_ipc_init);
183*4882a593Smuzhiyun
qcom_apcs_ipc_exit(void)184*4882a593Smuzhiyun static void __exit qcom_apcs_ipc_exit(void)
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun platform_driver_unregister(&qcom_apcs_ipc_driver);
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun module_exit(qcom_apcs_ipc_exit);
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
191*4882a593Smuzhiyun MODULE_DESCRIPTION("Qualcomm APCS IPC driver");
192