xref: /OK3568_Linux_fs/kernel/drivers/mailbox/mailbox-sti.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * STi Mailbox
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2015 ST Microelectronics
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Author: Lee Jones <lee.jones@linaro.org> for ST Microelectronics
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * Based on the original driver written by;
10*4882a593Smuzhiyun  *   Alexandre Torgue, Olivier Lebreton and Loic Pallardy
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <linux/err.h>
14*4882a593Smuzhiyun #include <linux/interrupt.h>
15*4882a593Smuzhiyun #include <linux/io.h>
16*4882a593Smuzhiyun #include <linux/kernel.h>
17*4882a593Smuzhiyun #include <linux/mailbox_controller.h>
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/of.h>
20*4882a593Smuzhiyun #include <linux/of_device.h>
21*4882a593Smuzhiyun #include <linux/platform_device.h>
22*4882a593Smuzhiyun #include <linux/slab.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #include "mailbox.h"
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define STI_MBOX_INST_MAX	4      /* RAM saving: Max supported instances */
27*4882a593Smuzhiyun #define STI_MBOX_CHAN_MAX	20     /* RAM saving: Max supported channels  */
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #define STI_IRQ_VAL_OFFSET	0x04   /* Read interrupt status	              */
30*4882a593Smuzhiyun #define STI_IRQ_SET_OFFSET	0x24   /* Generate a Tx channel interrupt     */
31*4882a593Smuzhiyun #define STI_IRQ_CLR_OFFSET	0x44   /* Clear pending Rx interrupts	      */
32*4882a593Smuzhiyun #define STI_ENA_VAL_OFFSET	0x64   /* Read enable status		      */
33*4882a593Smuzhiyun #define STI_ENA_SET_OFFSET	0x84   /* Enable a channel		      */
34*4882a593Smuzhiyun #define STI_ENA_CLR_OFFSET	0xa4   /* Disable a channel		      */
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #define MBOX_BASE(mdev, inst)   ((mdev)->base + ((inst) * 4))
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /**
39*4882a593Smuzhiyun  * STi Mailbox device data
40*4882a593Smuzhiyun  *
41*4882a593Smuzhiyun  * An IP Mailbox is currently composed of 4 instances
42*4882a593Smuzhiyun  * Each instance is currently composed of 32 channels
43*4882a593Smuzhiyun  * This means that we have 128 channels per Mailbox
44*4882a593Smuzhiyun  * A channel an be used for TX or RX
45*4882a593Smuzhiyun  *
46*4882a593Smuzhiyun  * @dev:	Device to which it is attached
47*4882a593Smuzhiyun  * @mbox:	Representation of a communication channel controller
48*4882a593Smuzhiyun  * @base:	Base address of the register mapping region
49*4882a593Smuzhiyun  * @name:	Name of the mailbox
50*4882a593Smuzhiyun  * @enabled:	Local copy of enabled channels
51*4882a593Smuzhiyun  * @lock:	Mutex protecting enabled status
52*4882a593Smuzhiyun  */
53*4882a593Smuzhiyun struct sti_mbox_device {
54*4882a593Smuzhiyun 	struct device		*dev;
55*4882a593Smuzhiyun 	struct mbox_controller	*mbox;
56*4882a593Smuzhiyun 	void __iomem		*base;
57*4882a593Smuzhiyun 	const char		*name;
58*4882a593Smuzhiyun 	u32			enabled[STI_MBOX_INST_MAX];
59*4882a593Smuzhiyun 	spinlock_t		lock;
60*4882a593Smuzhiyun };
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun /**
63*4882a593Smuzhiyun  * STi Mailbox platform specific configuration
64*4882a593Smuzhiyun  *
65*4882a593Smuzhiyun  * @num_inst:	Maximum number of instances in one HW Mailbox
66*4882a593Smuzhiyun  * @num_chan:	Maximum number of channel per instance
67*4882a593Smuzhiyun  */
68*4882a593Smuzhiyun struct sti_mbox_pdata {
69*4882a593Smuzhiyun 	unsigned int		num_inst;
70*4882a593Smuzhiyun 	unsigned int		num_chan;
71*4882a593Smuzhiyun };
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun /**
74*4882a593Smuzhiyun  * STi Mailbox allocated channel information
75*4882a593Smuzhiyun  *
76*4882a593Smuzhiyun  * @mdev:	Pointer to parent Mailbox device
77*4882a593Smuzhiyun  * @instance:	Instance number channel resides in
78*4882a593Smuzhiyun  * @channel:	Channel number pertaining to this container
79*4882a593Smuzhiyun  */
80*4882a593Smuzhiyun struct sti_channel {
81*4882a593Smuzhiyun 	struct sti_mbox_device	*mdev;
82*4882a593Smuzhiyun 	unsigned int		instance;
83*4882a593Smuzhiyun 	unsigned int		channel;
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun 
sti_mbox_channel_is_enabled(struct mbox_chan * chan)86*4882a593Smuzhiyun static inline bool sti_mbox_channel_is_enabled(struct mbox_chan *chan)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun 	struct sti_channel *chan_info = chan->con_priv;
89*4882a593Smuzhiyun 	struct sti_mbox_device *mdev = chan_info->mdev;
90*4882a593Smuzhiyun 	unsigned int instance = chan_info->instance;
91*4882a593Smuzhiyun 	unsigned int channel = chan_info->channel;
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	return mdev->enabled[instance] & BIT(channel);
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun static inline
sti_mbox_to_channel(struct mbox_controller * mbox,unsigned int instance,unsigned int channel)97*4882a593Smuzhiyun struct mbox_chan *sti_mbox_to_channel(struct mbox_controller *mbox,
98*4882a593Smuzhiyun 				      unsigned int instance,
99*4882a593Smuzhiyun 				      unsigned int channel)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun 	struct sti_channel *chan_info;
102*4882a593Smuzhiyun 	int i;
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	for (i = 0; i < mbox->num_chans; i++) {
105*4882a593Smuzhiyun 		chan_info = mbox->chans[i].con_priv;
106*4882a593Smuzhiyun 		if (chan_info &&
107*4882a593Smuzhiyun 		    chan_info->instance == instance &&
108*4882a593Smuzhiyun 		    chan_info->channel == channel)
109*4882a593Smuzhiyun 			return &mbox->chans[i];
110*4882a593Smuzhiyun 	}
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	dev_err(mbox->dev,
113*4882a593Smuzhiyun 		"Channel not registered: instance: %d channel: %d\n",
114*4882a593Smuzhiyun 		instance, channel);
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	return NULL;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun 
sti_mbox_enable_channel(struct mbox_chan * chan)119*4882a593Smuzhiyun static void sti_mbox_enable_channel(struct mbox_chan *chan)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun 	struct sti_channel *chan_info = chan->con_priv;
122*4882a593Smuzhiyun 	struct sti_mbox_device *mdev = chan_info->mdev;
123*4882a593Smuzhiyun 	unsigned int instance = chan_info->instance;
124*4882a593Smuzhiyun 	unsigned int channel = chan_info->channel;
125*4882a593Smuzhiyun 	unsigned long flags;
126*4882a593Smuzhiyun 	void __iomem *base = MBOX_BASE(mdev, instance);
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	spin_lock_irqsave(&mdev->lock, flags);
129*4882a593Smuzhiyun 	mdev->enabled[instance] |= BIT(channel);
130*4882a593Smuzhiyun 	writel_relaxed(BIT(channel), base + STI_ENA_SET_OFFSET);
131*4882a593Smuzhiyun 	spin_unlock_irqrestore(&mdev->lock, flags);
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun 
sti_mbox_disable_channel(struct mbox_chan * chan)134*4882a593Smuzhiyun static void sti_mbox_disable_channel(struct mbox_chan *chan)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun 	struct sti_channel *chan_info = chan->con_priv;
137*4882a593Smuzhiyun 	struct sti_mbox_device *mdev = chan_info->mdev;
138*4882a593Smuzhiyun 	unsigned int instance = chan_info->instance;
139*4882a593Smuzhiyun 	unsigned int channel = chan_info->channel;
140*4882a593Smuzhiyun 	unsigned long flags;
141*4882a593Smuzhiyun 	void __iomem *base = MBOX_BASE(mdev, instance);
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	spin_lock_irqsave(&mdev->lock, flags);
144*4882a593Smuzhiyun 	mdev->enabled[instance] &= ~BIT(channel);
145*4882a593Smuzhiyun 	writel_relaxed(BIT(channel), base + STI_ENA_CLR_OFFSET);
146*4882a593Smuzhiyun 	spin_unlock_irqrestore(&mdev->lock, flags);
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun 
sti_mbox_clear_irq(struct mbox_chan * chan)149*4882a593Smuzhiyun static void sti_mbox_clear_irq(struct mbox_chan *chan)
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun 	struct sti_channel *chan_info = chan->con_priv;
152*4882a593Smuzhiyun 	struct sti_mbox_device *mdev = chan_info->mdev;
153*4882a593Smuzhiyun 	unsigned int instance = chan_info->instance;
154*4882a593Smuzhiyun 	unsigned int channel = chan_info->channel;
155*4882a593Smuzhiyun 	void __iomem *base = MBOX_BASE(mdev, instance);
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	writel_relaxed(BIT(channel), base + STI_IRQ_CLR_OFFSET);
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun 
sti_mbox_irq_to_channel(struct sti_mbox_device * mdev,unsigned int instance)160*4882a593Smuzhiyun static struct mbox_chan *sti_mbox_irq_to_channel(struct sti_mbox_device *mdev,
161*4882a593Smuzhiyun 						 unsigned int instance)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun 	struct mbox_controller *mbox = mdev->mbox;
164*4882a593Smuzhiyun 	struct mbox_chan *chan = NULL;
165*4882a593Smuzhiyun 	unsigned int channel;
166*4882a593Smuzhiyun 	unsigned long bits;
167*4882a593Smuzhiyun 	void __iomem *base = MBOX_BASE(mdev, instance);
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	bits = readl_relaxed(base + STI_IRQ_VAL_OFFSET);
170*4882a593Smuzhiyun 	if (!bits)
171*4882a593Smuzhiyun 		/* No IRQs fired in specified instance */
172*4882a593Smuzhiyun 		return NULL;
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	/* An IRQ has fired, find the associated channel */
175*4882a593Smuzhiyun 	for (channel = 0; bits; channel++) {
176*4882a593Smuzhiyun 		if (!test_and_clear_bit(channel, &bits))
177*4882a593Smuzhiyun 			continue;
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun 		chan = sti_mbox_to_channel(mbox, instance, channel);
180*4882a593Smuzhiyun 		if (chan) {
181*4882a593Smuzhiyun 			dev_dbg(mbox->dev,
182*4882a593Smuzhiyun 				"IRQ fired on instance: %d channel: %d\n",
183*4882a593Smuzhiyun 				instance, channel);
184*4882a593Smuzhiyun 			break;
185*4882a593Smuzhiyun 		}
186*4882a593Smuzhiyun 	}
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	return chan;
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun 
sti_mbox_thread_handler(int irq,void * data)191*4882a593Smuzhiyun static irqreturn_t sti_mbox_thread_handler(int irq, void *data)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun 	struct sti_mbox_device *mdev = data;
194*4882a593Smuzhiyun 	struct sti_mbox_pdata *pdata = dev_get_platdata(mdev->dev);
195*4882a593Smuzhiyun 	struct mbox_chan *chan;
196*4882a593Smuzhiyun 	unsigned int instance;
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	for (instance = 0; instance < pdata->num_inst; instance++) {
199*4882a593Smuzhiyun keep_looking:
200*4882a593Smuzhiyun 		chan = sti_mbox_irq_to_channel(mdev, instance);
201*4882a593Smuzhiyun 		if (!chan)
202*4882a593Smuzhiyun 			continue;
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 		mbox_chan_received_data(chan, NULL);
205*4882a593Smuzhiyun 		sti_mbox_clear_irq(chan);
206*4882a593Smuzhiyun 		sti_mbox_enable_channel(chan);
207*4882a593Smuzhiyun 		goto keep_looking;
208*4882a593Smuzhiyun 	}
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	return IRQ_HANDLED;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun 
sti_mbox_irq_handler(int irq,void * data)213*4882a593Smuzhiyun static irqreturn_t sti_mbox_irq_handler(int irq, void *data)
214*4882a593Smuzhiyun {
215*4882a593Smuzhiyun 	struct sti_mbox_device *mdev = data;
216*4882a593Smuzhiyun 	struct sti_mbox_pdata *pdata = dev_get_platdata(mdev->dev);
217*4882a593Smuzhiyun 	struct sti_channel *chan_info;
218*4882a593Smuzhiyun 	struct mbox_chan *chan;
219*4882a593Smuzhiyun 	unsigned int instance;
220*4882a593Smuzhiyun 	int ret = IRQ_NONE;
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	for (instance = 0; instance < pdata->num_inst; instance++) {
223*4882a593Smuzhiyun 		chan = sti_mbox_irq_to_channel(mdev, instance);
224*4882a593Smuzhiyun 		if (!chan)
225*4882a593Smuzhiyun 			continue;
226*4882a593Smuzhiyun 		chan_info = chan->con_priv;
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 		if (!sti_mbox_channel_is_enabled(chan)) {
229*4882a593Smuzhiyun 			dev_warn(mdev->dev,
230*4882a593Smuzhiyun 				 "Unexpected IRQ: %s\n"
231*4882a593Smuzhiyun 				 "  instance: %d: channel: %d [enabled: %x]\n",
232*4882a593Smuzhiyun 				 mdev->name, chan_info->instance,
233*4882a593Smuzhiyun 				 chan_info->channel, mdev->enabled[instance]);
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun 			/* Only handle IRQ if no other valid IRQs were found */
236*4882a593Smuzhiyun 			if (ret == IRQ_NONE)
237*4882a593Smuzhiyun 				ret = IRQ_HANDLED;
238*4882a593Smuzhiyun 			continue;
239*4882a593Smuzhiyun 		}
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 		sti_mbox_disable_channel(chan);
242*4882a593Smuzhiyun 		ret = IRQ_WAKE_THREAD;
243*4882a593Smuzhiyun 	}
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	if (ret == IRQ_NONE)
246*4882a593Smuzhiyun 		dev_err(mdev->dev, "Spurious IRQ - was a channel requested?\n");
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	return ret;
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun 
sti_mbox_tx_is_ready(struct mbox_chan * chan)251*4882a593Smuzhiyun static bool sti_mbox_tx_is_ready(struct mbox_chan *chan)
252*4882a593Smuzhiyun {
253*4882a593Smuzhiyun 	struct sti_channel *chan_info = chan->con_priv;
254*4882a593Smuzhiyun 	struct sti_mbox_device *mdev = chan_info->mdev;
255*4882a593Smuzhiyun 	unsigned int instance = chan_info->instance;
256*4882a593Smuzhiyun 	unsigned int channel = chan_info->channel;
257*4882a593Smuzhiyun 	void __iomem *base = MBOX_BASE(mdev, instance);
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	if (!(readl_relaxed(base + STI_ENA_VAL_OFFSET) & BIT(channel))) {
260*4882a593Smuzhiyun 		dev_dbg(mdev->dev, "Mbox: %s: inst: %d, chan: %d disabled\n",
261*4882a593Smuzhiyun 			mdev->name, instance, channel);
262*4882a593Smuzhiyun 		return false;
263*4882a593Smuzhiyun 	}
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	if (readl_relaxed(base + STI_IRQ_VAL_OFFSET) & BIT(channel)) {
266*4882a593Smuzhiyun 		dev_dbg(mdev->dev, "Mbox: %s: inst: %d, chan: %d not ready\n",
267*4882a593Smuzhiyun 			mdev->name, instance, channel);
268*4882a593Smuzhiyun 		return false;
269*4882a593Smuzhiyun 	}
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	return true;
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun 
sti_mbox_send_data(struct mbox_chan * chan,void * data)274*4882a593Smuzhiyun static int sti_mbox_send_data(struct mbox_chan *chan, void *data)
275*4882a593Smuzhiyun {
276*4882a593Smuzhiyun 	struct sti_channel *chan_info = chan->con_priv;
277*4882a593Smuzhiyun 	struct sti_mbox_device *mdev = chan_info->mdev;
278*4882a593Smuzhiyun 	unsigned int instance = chan_info->instance;
279*4882a593Smuzhiyun 	unsigned int channel = chan_info->channel;
280*4882a593Smuzhiyun 	void __iomem *base = MBOX_BASE(mdev, instance);
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	/* Send event to co-processor */
283*4882a593Smuzhiyun 	writel_relaxed(BIT(channel), base + STI_IRQ_SET_OFFSET);
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	dev_dbg(mdev->dev,
286*4882a593Smuzhiyun 		"Sent via Mailbox %s: instance: %d channel: %d\n",
287*4882a593Smuzhiyun 		mdev->name, instance, channel);
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 	return 0;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun 
sti_mbox_startup_chan(struct mbox_chan * chan)292*4882a593Smuzhiyun static int sti_mbox_startup_chan(struct mbox_chan *chan)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun 	sti_mbox_clear_irq(chan);
295*4882a593Smuzhiyun 	sti_mbox_enable_channel(chan);
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	return 0;
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun 
sti_mbox_shutdown_chan(struct mbox_chan * chan)300*4882a593Smuzhiyun static void sti_mbox_shutdown_chan(struct mbox_chan *chan)
301*4882a593Smuzhiyun {
302*4882a593Smuzhiyun 	struct sti_channel *chan_info = chan->con_priv;
303*4882a593Smuzhiyun 	struct mbox_controller *mbox = chan_info->mdev->mbox;
304*4882a593Smuzhiyun 	int i;
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	for (i = 0; i < mbox->num_chans; i++)
307*4882a593Smuzhiyun 		if (chan == &mbox->chans[i])
308*4882a593Smuzhiyun 			break;
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	if (mbox->num_chans == i) {
311*4882a593Smuzhiyun 		dev_warn(mbox->dev, "Request to free non-existent channel\n");
312*4882a593Smuzhiyun 		return;
313*4882a593Smuzhiyun 	}
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	/* Reset channel */
316*4882a593Smuzhiyun 	sti_mbox_disable_channel(chan);
317*4882a593Smuzhiyun 	sti_mbox_clear_irq(chan);
318*4882a593Smuzhiyun 	chan->con_priv = NULL;
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun 
sti_mbox_xlate(struct mbox_controller * mbox,const struct of_phandle_args * spec)321*4882a593Smuzhiyun static struct mbox_chan *sti_mbox_xlate(struct mbox_controller *mbox,
322*4882a593Smuzhiyun 					const struct of_phandle_args *spec)
323*4882a593Smuzhiyun {
324*4882a593Smuzhiyun 	struct sti_mbox_device *mdev = dev_get_drvdata(mbox->dev);
325*4882a593Smuzhiyun 	struct sti_mbox_pdata *pdata = dev_get_platdata(mdev->dev);
326*4882a593Smuzhiyun 	struct sti_channel *chan_info;
327*4882a593Smuzhiyun 	struct mbox_chan *chan = NULL;
328*4882a593Smuzhiyun 	unsigned int instance  = spec->args[0];
329*4882a593Smuzhiyun 	unsigned int channel   = spec->args[1];
330*4882a593Smuzhiyun 	int i;
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 	/* Bounds checking */
333*4882a593Smuzhiyun 	if (instance >= pdata->num_inst || channel  >= pdata->num_chan) {
334*4882a593Smuzhiyun 		dev_err(mbox->dev,
335*4882a593Smuzhiyun 			"Invalid channel requested instance: %d channel: %d\n",
336*4882a593Smuzhiyun 			instance, channel);
337*4882a593Smuzhiyun 		return ERR_PTR(-EINVAL);
338*4882a593Smuzhiyun 	}
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun 	for (i = 0; i < mbox->num_chans; i++) {
341*4882a593Smuzhiyun 		chan_info = mbox->chans[i].con_priv;
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 		/* Is requested channel free? */
344*4882a593Smuzhiyun 		if (chan_info &&
345*4882a593Smuzhiyun 		    mbox->dev == chan_info->mdev->dev &&
346*4882a593Smuzhiyun 		    instance == chan_info->instance &&
347*4882a593Smuzhiyun 		    channel == chan_info->channel) {
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 			dev_err(mbox->dev, "Channel in use\n");
350*4882a593Smuzhiyun 			return ERR_PTR(-EBUSY);
351*4882a593Smuzhiyun 		}
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 		/*
354*4882a593Smuzhiyun 		 * Find the first free slot, then continue checking
355*4882a593Smuzhiyun 		 * to see if requested channel is in use
356*4882a593Smuzhiyun 		 */
357*4882a593Smuzhiyun 		if (!chan && !chan_info)
358*4882a593Smuzhiyun 			chan = &mbox->chans[i];
359*4882a593Smuzhiyun 	}
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	if (!chan) {
362*4882a593Smuzhiyun 		dev_err(mbox->dev, "No free channels left\n");
363*4882a593Smuzhiyun 		return ERR_PTR(-EBUSY);
364*4882a593Smuzhiyun 	}
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	chan_info = devm_kzalloc(mbox->dev, sizeof(*chan_info), GFP_KERNEL);
367*4882a593Smuzhiyun 	if (!chan_info)
368*4882a593Smuzhiyun 		return ERR_PTR(-ENOMEM);
369*4882a593Smuzhiyun 
370*4882a593Smuzhiyun 	chan_info->mdev		= mdev;
371*4882a593Smuzhiyun 	chan_info->instance	= instance;
372*4882a593Smuzhiyun 	chan_info->channel	= channel;
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun 	chan->con_priv = chan_info;
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun 	dev_info(mbox->dev,
377*4882a593Smuzhiyun 		 "Mbox: %s: Created channel: instance: %d channel: %d\n",
378*4882a593Smuzhiyun 		 mdev->name, instance, channel);
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	return chan;
381*4882a593Smuzhiyun }
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun static const struct mbox_chan_ops sti_mbox_ops = {
384*4882a593Smuzhiyun 	.startup	= sti_mbox_startup_chan,
385*4882a593Smuzhiyun 	.shutdown	= sti_mbox_shutdown_chan,
386*4882a593Smuzhiyun 	.send_data	= sti_mbox_send_data,
387*4882a593Smuzhiyun 	.last_tx_done	= sti_mbox_tx_is_ready,
388*4882a593Smuzhiyun };
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun static const struct sti_mbox_pdata mbox_stih407_pdata = {
391*4882a593Smuzhiyun 	.num_inst	= 4,
392*4882a593Smuzhiyun 	.num_chan	= 32,
393*4882a593Smuzhiyun };
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun static const struct of_device_id sti_mailbox_match[] = {
396*4882a593Smuzhiyun 	{
397*4882a593Smuzhiyun 		.compatible = "st,stih407-mailbox",
398*4882a593Smuzhiyun 		.data = (void *)&mbox_stih407_pdata
399*4882a593Smuzhiyun 	},
400*4882a593Smuzhiyun 	{ }
401*4882a593Smuzhiyun };
402*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, sti_mailbox_match);
403*4882a593Smuzhiyun 
sti_mbox_probe(struct platform_device * pdev)404*4882a593Smuzhiyun static int sti_mbox_probe(struct platform_device *pdev)
405*4882a593Smuzhiyun {
406*4882a593Smuzhiyun 	const struct of_device_id *match;
407*4882a593Smuzhiyun 	struct mbox_controller *mbox;
408*4882a593Smuzhiyun 	struct sti_mbox_device *mdev;
409*4882a593Smuzhiyun 	struct device_node *np = pdev->dev.of_node;
410*4882a593Smuzhiyun 	struct mbox_chan *chans;
411*4882a593Smuzhiyun 	struct resource *res;
412*4882a593Smuzhiyun 	int irq;
413*4882a593Smuzhiyun 	int ret;
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun 	match = of_match_device(sti_mailbox_match, &pdev->dev);
416*4882a593Smuzhiyun 	if (!match) {
417*4882a593Smuzhiyun 		dev_err(&pdev->dev, "No configuration found\n");
418*4882a593Smuzhiyun 		return -ENODEV;
419*4882a593Smuzhiyun 	}
420*4882a593Smuzhiyun 	pdev->dev.platform_data = (struct sti_mbox_pdata *) match->data;
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun 	mdev = devm_kzalloc(&pdev->dev, sizeof(*mdev), GFP_KERNEL);
423*4882a593Smuzhiyun 	if (!mdev)
424*4882a593Smuzhiyun 		return -ENOMEM;
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun 	platform_set_drvdata(pdev, mdev);
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
429*4882a593Smuzhiyun 	mdev->base = devm_ioremap_resource(&pdev->dev, res);
430*4882a593Smuzhiyun 	if (IS_ERR(mdev->base))
431*4882a593Smuzhiyun 		return PTR_ERR(mdev->base);
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun 	ret = of_property_read_string(np, "mbox-name", &mdev->name);
434*4882a593Smuzhiyun 	if (ret)
435*4882a593Smuzhiyun 		mdev->name = np->full_name;
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun 	mbox = devm_kzalloc(&pdev->dev, sizeof(*mbox), GFP_KERNEL);
438*4882a593Smuzhiyun 	if (!mbox)
439*4882a593Smuzhiyun 		return -ENOMEM;
440*4882a593Smuzhiyun 
441*4882a593Smuzhiyun 	chans = devm_kcalloc(&pdev->dev,
442*4882a593Smuzhiyun 			     STI_MBOX_CHAN_MAX, sizeof(*chans), GFP_KERNEL);
443*4882a593Smuzhiyun 	if (!chans)
444*4882a593Smuzhiyun 		return -ENOMEM;
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun 	mdev->dev		= &pdev->dev;
447*4882a593Smuzhiyun 	mdev->mbox		= mbox;
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 	spin_lock_init(&mdev->lock);
450*4882a593Smuzhiyun 
451*4882a593Smuzhiyun 	/* STi Mailbox does not have a Tx-Done or Tx-Ready IRQ */
452*4882a593Smuzhiyun 	mbox->txdone_irq	= false;
453*4882a593Smuzhiyun 	mbox->txdone_poll	= true;
454*4882a593Smuzhiyun 	mbox->txpoll_period	= 100;
455*4882a593Smuzhiyun 	mbox->ops		= &sti_mbox_ops;
456*4882a593Smuzhiyun 	mbox->dev		= mdev->dev;
457*4882a593Smuzhiyun 	mbox->of_xlate		= sti_mbox_xlate;
458*4882a593Smuzhiyun 	mbox->chans		= chans;
459*4882a593Smuzhiyun 	mbox->num_chans		= STI_MBOX_CHAN_MAX;
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 	ret = devm_mbox_controller_register(&pdev->dev, mbox);
462*4882a593Smuzhiyun 	if (ret)
463*4882a593Smuzhiyun 		return ret;
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun 	/* It's okay for Tx Mailboxes to not supply IRQs */
466*4882a593Smuzhiyun 	irq = platform_get_irq(pdev, 0);
467*4882a593Smuzhiyun 	if (irq < 0) {
468*4882a593Smuzhiyun 		dev_info(&pdev->dev,
469*4882a593Smuzhiyun 			 "%s: Registered Tx only Mailbox\n", mdev->name);
470*4882a593Smuzhiyun 		return 0;
471*4882a593Smuzhiyun 	}
472*4882a593Smuzhiyun 
473*4882a593Smuzhiyun 	ret = devm_request_threaded_irq(&pdev->dev, irq,
474*4882a593Smuzhiyun 					sti_mbox_irq_handler,
475*4882a593Smuzhiyun 					sti_mbox_thread_handler,
476*4882a593Smuzhiyun 					IRQF_ONESHOT, mdev->name, mdev);
477*4882a593Smuzhiyun 	if (ret) {
478*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Can't claim IRQ %d\n", irq);
479*4882a593Smuzhiyun 		return -EINVAL;
480*4882a593Smuzhiyun 	}
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun 	dev_info(&pdev->dev, "%s: Registered Tx/Rx Mailbox\n", mdev->name);
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun 	return 0;
485*4882a593Smuzhiyun }
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun static struct platform_driver sti_mbox_driver = {
488*4882a593Smuzhiyun 	.probe = sti_mbox_probe,
489*4882a593Smuzhiyun 	.driver = {
490*4882a593Smuzhiyun 		.name = "sti-mailbox",
491*4882a593Smuzhiyun 		.of_match_table = sti_mailbox_match,
492*4882a593Smuzhiyun 	},
493*4882a593Smuzhiyun };
494*4882a593Smuzhiyun module_platform_driver(sti_mbox_driver);
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun MODULE_LICENSE("GPL");
497*4882a593Smuzhiyun MODULE_DESCRIPTION("STMicroelectronics Mailbox Controller");
498*4882a593Smuzhiyun MODULE_AUTHOR("Lee Jones <lee.jones@linaro.org");
499*4882a593Smuzhiyun MODULE_ALIAS("platform:mailbox-sti");
500