xref: /OK3568_Linux_fs/kernel/drivers/mailbox/mailbox-altera.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright Altera Corporation (C) 2013-2014. All rights reserved
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #include <linux/device.h>
7*4882a593Smuzhiyun #include <linux/interrupt.h>
8*4882a593Smuzhiyun #include <linux/io.h>
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/mailbox_controller.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/of.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #define DRIVER_NAME	"altera-mailbox"
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #define MAILBOX_CMD_REG			0x00
18*4882a593Smuzhiyun #define MAILBOX_PTR_REG			0x04
19*4882a593Smuzhiyun #define MAILBOX_STS_REG			0x08
20*4882a593Smuzhiyun #define MAILBOX_INTMASK_REG		0x0C
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #define INT_PENDING_MSK			0x1
23*4882a593Smuzhiyun #define INT_SPACE_MSK			0x2
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #define STS_PENDING_MSK			0x1
26*4882a593Smuzhiyun #define STS_FULL_MSK			0x2
27*4882a593Smuzhiyun #define STS_FULL_OFT			0x1
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #define MBOX_PENDING(status)	(((status) & STS_PENDING_MSK))
30*4882a593Smuzhiyun #define MBOX_FULL(status)	(((status) & STS_FULL_MSK) >> STS_FULL_OFT)
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun enum altera_mbox_msg {
33*4882a593Smuzhiyun 	MBOX_CMD = 0,
34*4882a593Smuzhiyun 	MBOX_PTR,
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #define MBOX_POLLING_MS		5	/* polling interval 5ms */
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun struct altera_mbox {
40*4882a593Smuzhiyun 	bool is_sender;		/* 1-sender, 0-receiver */
41*4882a593Smuzhiyun 	bool intr_mode;
42*4882a593Smuzhiyun 	int irq;
43*4882a593Smuzhiyun 	void __iomem *mbox_base;
44*4882a593Smuzhiyun 	struct device *dev;
45*4882a593Smuzhiyun 	struct mbox_controller controller;
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun 	/* If the controller supports only RX polling mode */
48*4882a593Smuzhiyun 	struct timer_list rxpoll_timer;
49*4882a593Smuzhiyun 	struct mbox_chan *chan;
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun 
mbox_chan_to_altera_mbox(struct mbox_chan * chan)52*4882a593Smuzhiyun static struct altera_mbox *mbox_chan_to_altera_mbox(struct mbox_chan *chan)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun 	if (!chan || !chan->con_priv)
55*4882a593Smuzhiyun 		return NULL;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	return (struct altera_mbox *)chan->con_priv;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun 
altera_mbox_full(struct altera_mbox * mbox)60*4882a593Smuzhiyun static inline int altera_mbox_full(struct altera_mbox *mbox)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun 	u32 status;
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	status = readl_relaxed(mbox->mbox_base + MAILBOX_STS_REG);
65*4882a593Smuzhiyun 	return MBOX_FULL(status);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun 
altera_mbox_pending(struct altera_mbox * mbox)68*4882a593Smuzhiyun static inline int altera_mbox_pending(struct altera_mbox *mbox)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun 	u32 status;
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	status = readl_relaxed(mbox->mbox_base + MAILBOX_STS_REG);
73*4882a593Smuzhiyun 	return MBOX_PENDING(status);
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun 
altera_mbox_rx_intmask(struct altera_mbox * mbox,bool enable)76*4882a593Smuzhiyun static void altera_mbox_rx_intmask(struct altera_mbox *mbox, bool enable)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun 	u32 mask;
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	mask = readl_relaxed(mbox->mbox_base + MAILBOX_INTMASK_REG);
81*4882a593Smuzhiyun 	if (enable)
82*4882a593Smuzhiyun 		mask |= INT_PENDING_MSK;
83*4882a593Smuzhiyun 	else
84*4882a593Smuzhiyun 		mask &= ~INT_PENDING_MSK;
85*4882a593Smuzhiyun 	writel_relaxed(mask, mbox->mbox_base + MAILBOX_INTMASK_REG);
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun 
altera_mbox_tx_intmask(struct altera_mbox * mbox,bool enable)88*4882a593Smuzhiyun static void altera_mbox_tx_intmask(struct altera_mbox *mbox, bool enable)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun 	u32 mask;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	mask = readl_relaxed(mbox->mbox_base + MAILBOX_INTMASK_REG);
93*4882a593Smuzhiyun 	if (enable)
94*4882a593Smuzhiyun 		mask |= INT_SPACE_MSK;
95*4882a593Smuzhiyun 	else
96*4882a593Smuzhiyun 		mask &= ~INT_SPACE_MSK;
97*4882a593Smuzhiyun 	writel_relaxed(mask, mbox->mbox_base + MAILBOX_INTMASK_REG);
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun 
altera_mbox_is_sender(struct altera_mbox * mbox)100*4882a593Smuzhiyun static bool altera_mbox_is_sender(struct altera_mbox *mbox)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun 	u32 reg;
103*4882a593Smuzhiyun 	/* Write a magic number to PTR register and read back this register.
104*4882a593Smuzhiyun 	 * This register is read-write if it is a sender.
105*4882a593Smuzhiyun 	 */
106*4882a593Smuzhiyun 	#define MBOX_MAGIC	0xA5A5AA55
107*4882a593Smuzhiyun 	writel_relaxed(MBOX_MAGIC, mbox->mbox_base + MAILBOX_PTR_REG);
108*4882a593Smuzhiyun 	reg = readl_relaxed(mbox->mbox_base + MAILBOX_PTR_REG);
109*4882a593Smuzhiyun 	if (reg == MBOX_MAGIC) {
110*4882a593Smuzhiyun 		/* Clear to 0 */
111*4882a593Smuzhiyun 		writel_relaxed(0, mbox->mbox_base + MAILBOX_PTR_REG);
112*4882a593Smuzhiyun 		return true;
113*4882a593Smuzhiyun 	}
114*4882a593Smuzhiyun 	return false;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun 
altera_mbox_rx_data(struct mbox_chan * chan)117*4882a593Smuzhiyun static void altera_mbox_rx_data(struct mbox_chan *chan)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun 	struct altera_mbox *mbox = mbox_chan_to_altera_mbox(chan);
120*4882a593Smuzhiyun 	u32 data[2];
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	if (altera_mbox_pending(mbox)) {
123*4882a593Smuzhiyun 		data[MBOX_PTR] =
124*4882a593Smuzhiyun 			readl_relaxed(mbox->mbox_base + MAILBOX_PTR_REG);
125*4882a593Smuzhiyun 		data[MBOX_CMD] =
126*4882a593Smuzhiyun 			readl_relaxed(mbox->mbox_base + MAILBOX_CMD_REG);
127*4882a593Smuzhiyun 		mbox_chan_received_data(chan, (void *)data);
128*4882a593Smuzhiyun 	}
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun 
altera_mbox_poll_rx(struct timer_list * t)131*4882a593Smuzhiyun static void altera_mbox_poll_rx(struct timer_list *t)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun 	struct altera_mbox *mbox = from_timer(mbox, t, rxpoll_timer);
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	altera_mbox_rx_data(mbox->chan);
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	mod_timer(&mbox->rxpoll_timer,
138*4882a593Smuzhiyun 		  jiffies + msecs_to_jiffies(MBOX_POLLING_MS));
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun 
altera_mbox_tx_interrupt(int irq,void * p)141*4882a593Smuzhiyun static irqreturn_t altera_mbox_tx_interrupt(int irq, void *p)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun 	struct mbox_chan *chan = (struct mbox_chan *)p;
144*4882a593Smuzhiyun 	struct altera_mbox *mbox = mbox_chan_to_altera_mbox(chan);
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	altera_mbox_tx_intmask(mbox, false);
147*4882a593Smuzhiyun 	mbox_chan_txdone(chan, 0);
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	return IRQ_HANDLED;
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun 
altera_mbox_rx_interrupt(int irq,void * p)152*4882a593Smuzhiyun static irqreturn_t altera_mbox_rx_interrupt(int irq, void *p)
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun 	struct mbox_chan *chan = (struct mbox_chan *)p;
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	altera_mbox_rx_data(chan);
157*4882a593Smuzhiyun 	return IRQ_HANDLED;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun 
altera_mbox_startup_sender(struct mbox_chan * chan)160*4882a593Smuzhiyun static int altera_mbox_startup_sender(struct mbox_chan *chan)
161*4882a593Smuzhiyun {
162*4882a593Smuzhiyun 	int ret;
163*4882a593Smuzhiyun 	struct altera_mbox *mbox = mbox_chan_to_altera_mbox(chan);
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	if (mbox->intr_mode) {
166*4882a593Smuzhiyun 		ret = request_irq(mbox->irq, altera_mbox_tx_interrupt, 0,
167*4882a593Smuzhiyun 				  DRIVER_NAME, chan);
168*4882a593Smuzhiyun 		if (unlikely(ret)) {
169*4882a593Smuzhiyun 			dev_err(mbox->dev,
170*4882a593Smuzhiyun 				"failed to register mailbox interrupt:%d\n",
171*4882a593Smuzhiyun 				ret);
172*4882a593Smuzhiyun 			return ret;
173*4882a593Smuzhiyun 		}
174*4882a593Smuzhiyun 	}
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	return 0;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun 
altera_mbox_startup_receiver(struct mbox_chan * chan)179*4882a593Smuzhiyun static int altera_mbox_startup_receiver(struct mbox_chan *chan)
180*4882a593Smuzhiyun {
181*4882a593Smuzhiyun 	int ret;
182*4882a593Smuzhiyun 	struct altera_mbox *mbox = mbox_chan_to_altera_mbox(chan);
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	if (mbox->intr_mode) {
185*4882a593Smuzhiyun 		ret = request_irq(mbox->irq, altera_mbox_rx_interrupt, 0,
186*4882a593Smuzhiyun 				  DRIVER_NAME, chan);
187*4882a593Smuzhiyun 		if (unlikely(ret)) {
188*4882a593Smuzhiyun 			mbox->intr_mode = false;
189*4882a593Smuzhiyun 			goto polling; /* use polling if failed */
190*4882a593Smuzhiyun 		}
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 		altera_mbox_rx_intmask(mbox, true);
193*4882a593Smuzhiyun 		return 0;
194*4882a593Smuzhiyun 	}
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun polling:
197*4882a593Smuzhiyun 	/* Setup polling timer */
198*4882a593Smuzhiyun 	mbox->chan = chan;
199*4882a593Smuzhiyun 	timer_setup(&mbox->rxpoll_timer, altera_mbox_poll_rx, 0);
200*4882a593Smuzhiyun 	mod_timer(&mbox->rxpoll_timer,
201*4882a593Smuzhiyun 		  jiffies + msecs_to_jiffies(MBOX_POLLING_MS));
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	return 0;
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun 
altera_mbox_send_data(struct mbox_chan * chan,void * data)206*4882a593Smuzhiyun static int altera_mbox_send_data(struct mbox_chan *chan, void *data)
207*4882a593Smuzhiyun {
208*4882a593Smuzhiyun 	struct altera_mbox *mbox = mbox_chan_to_altera_mbox(chan);
209*4882a593Smuzhiyun 	u32 *udata = (u32 *)data;
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	if (!mbox || !data)
212*4882a593Smuzhiyun 		return -EINVAL;
213*4882a593Smuzhiyun 	if (!mbox->is_sender) {
214*4882a593Smuzhiyun 		dev_warn(mbox->dev,
215*4882a593Smuzhiyun 			 "failed to send. This is receiver mailbox.\n");
216*4882a593Smuzhiyun 		return -EINVAL;
217*4882a593Smuzhiyun 	}
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	if (altera_mbox_full(mbox))
220*4882a593Smuzhiyun 		return -EBUSY;
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	/* Enable interrupt before send */
223*4882a593Smuzhiyun 	if (mbox->intr_mode)
224*4882a593Smuzhiyun 		altera_mbox_tx_intmask(mbox, true);
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 	/* Pointer register must write before command register */
227*4882a593Smuzhiyun 	writel_relaxed(udata[MBOX_PTR], mbox->mbox_base + MAILBOX_PTR_REG);
228*4882a593Smuzhiyun 	writel_relaxed(udata[MBOX_CMD], mbox->mbox_base + MAILBOX_CMD_REG);
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	return 0;
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun 
altera_mbox_last_tx_done(struct mbox_chan * chan)233*4882a593Smuzhiyun static bool altera_mbox_last_tx_done(struct mbox_chan *chan)
234*4882a593Smuzhiyun {
235*4882a593Smuzhiyun 	struct altera_mbox *mbox = mbox_chan_to_altera_mbox(chan);
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	/* Return false if mailbox is full */
238*4882a593Smuzhiyun 	return altera_mbox_full(mbox) ? false : true;
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun 
altera_mbox_peek_data(struct mbox_chan * chan)241*4882a593Smuzhiyun static bool altera_mbox_peek_data(struct mbox_chan *chan)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun 	struct altera_mbox *mbox = mbox_chan_to_altera_mbox(chan);
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	return altera_mbox_pending(mbox) ? true : false;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun 
altera_mbox_startup(struct mbox_chan * chan)248*4882a593Smuzhiyun static int altera_mbox_startup(struct mbox_chan *chan)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun 	struct altera_mbox *mbox = mbox_chan_to_altera_mbox(chan);
251*4882a593Smuzhiyun 	int ret = 0;
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	if (!mbox)
254*4882a593Smuzhiyun 		return -EINVAL;
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 	if (mbox->is_sender)
257*4882a593Smuzhiyun 		ret = altera_mbox_startup_sender(chan);
258*4882a593Smuzhiyun 	else
259*4882a593Smuzhiyun 		ret = altera_mbox_startup_receiver(chan);
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	return ret;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun 
altera_mbox_shutdown(struct mbox_chan * chan)264*4882a593Smuzhiyun static void altera_mbox_shutdown(struct mbox_chan *chan)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun 	struct altera_mbox *mbox = mbox_chan_to_altera_mbox(chan);
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun 	if (mbox->intr_mode) {
269*4882a593Smuzhiyun 		/* Unmask all interrupt masks */
270*4882a593Smuzhiyun 		writel_relaxed(~0, mbox->mbox_base + MAILBOX_INTMASK_REG);
271*4882a593Smuzhiyun 		free_irq(mbox->irq, chan);
272*4882a593Smuzhiyun 	} else if (!mbox->is_sender) {
273*4882a593Smuzhiyun 		del_timer_sync(&mbox->rxpoll_timer);
274*4882a593Smuzhiyun 	}
275*4882a593Smuzhiyun }
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun static const struct mbox_chan_ops altera_mbox_ops = {
278*4882a593Smuzhiyun 	.send_data = altera_mbox_send_data,
279*4882a593Smuzhiyun 	.startup = altera_mbox_startup,
280*4882a593Smuzhiyun 	.shutdown = altera_mbox_shutdown,
281*4882a593Smuzhiyun 	.last_tx_done = altera_mbox_last_tx_done,
282*4882a593Smuzhiyun 	.peek_data = altera_mbox_peek_data,
283*4882a593Smuzhiyun };
284*4882a593Smuzhiyun 
altera_mbox_probe(struct platform_device * pdev)285*4882a593Smuzhiyun static int altera_mbox_probe(struct platform_device *pdev)
286*4882a593Smuzhiyun {
287*4882a593Smuzhiyun 	struct altera_mbox *mbox;
288*4882a593Smuzhiyun 	struct resource	*regs;
289*4882a593Smuzhiyun 	struct mbox_chan *chans;
290*4882a593Smuzhiyun 	int ret;
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	mbox = devm_kzalloc(&pdev->dev, sizeof(*mbox),
293*4882a593Smuzhiyun 			    GFP_KERNEL);
294*4882a593Smuzhiyun 	if (!mbox)
295*4882a593Smuzhiyun 		return -ENOMEM;
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	/* Allocated one channel */
298*4882a593Smuzhiyun 	chans = devm_kzalloc(&pdev->dev, sizeof(*chans), GFP_KERNEL);
299*4882a593Smuzhiyun 	if (!chans)
300*4882a593Smuzhiyun 		return -ENOMEM;
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun 	mbox->mbox_base = devm_ioremap_resource(&pdev->dev, regs);
305*4882a593Smuzhiyun 	if (IS_ERR(mbox->mbox_base))
306*4882a593Smuzhiyun 		return PTR_ERR(mbox->mbox_base);
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun 	/* Check is it a sender or receiver? */
309*4882a593Smuzhiyun 	mbox->is_sender = altera_mbox_is_sender(mbox);
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	mbox->irq = platform_get_irq(pdev, 0);
312*4882a593Smuzhiyun 	if (mbox->irq >= 0)
313*4882a593Smuzhiyun 		mbox->intr_mode = true;
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	mbox->dev = &pdev->dev;
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	/* Hardware supports only one channel. */
318*4882a593Smuzhiyun 	chans[0].con_priv = mbox;
319*4882a593Smuzhiyun 	mbox->controller.dev = mbox->dev;
320*4882a593Smuzhiyun 	mbox->controller.num_chans = 1;
321*4882a593Smuzhiyun 	mbox->controller.chans = chans;
322*4882a593Smuzhiyun 	mbox->controller.ops = &altera_mbox_ops;
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun 	if (mbox->is_sender) {
325*4882a593Smuzhiyun 		if (mbox->intr_mode) {
326*4882a593Smuzhiyun 			mbox->controller.txdone_irq = true;
327*4882a593Smuzhiyun 		} else {
328*4882a593Smuzhiyun 			mbox->controller.txdone_poll = true;
329*4882a593Smuzhiyun 			mbox->controller.txpoll_period = MBOX_POLLING_MS;
330*4882a593Smuzhiyun 		}
331*4882a593Smuzhiyun 	}
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	ret = devm_mbox_controller_register(&pdev->dev, &mbox->controller);
334*4882a593Smuzhiyun 	if (ret) {
335*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Register mailbox failed\n");
336*4882a593Smuzhiyun 		goto err;
337*4882a593Smuzhiyun 	}
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun 	platform_set_drvdata(pdev, mbox);
340*4882a593Smuzhiyun err:
341*4882a593Smuzhiyun 	return ret;
342*4882a593Smuzhiyun }
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun static const struct of_device_id altera_mbox_match[] = {
345*4882a593Smuzhiyun 	{ .compatible = "altr,mailbox-1.0" },
346*4882a593Smuzhiyun 	{ /* Sentinel */ }
347*4882a593Smuzhiyun };
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, altera_mbox_match);
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun static struct platform_driver altera_mbox_driver = {
352*4882a593Smuzhiyun 	.probe	= altera_mbox_probe,
353*4882a593Smuzhiyun 	.driver	= {
354*4882a593Smuzhiyun 		.name	= DRIVER_NAME,
355*4882a593Smuzhiyun 		.of_match_table	= altera_mbox_match,
356*4882a593Smuzhiyun 	},
357*4882a593Smuzhiyun };
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun module_platform_driver(altera_mbox_driver);
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
362*4882a593Smuzhiyun MODULE_DESCRIPTION("Altera mailbox specific functions");
363*4882a593Smuzhiyun MODULE_AUTHOR("Ley Foon Tan <lftan@altera.com>");
364*4882a593Smuzhiyun MODULE_ALIAS("platform:altera-mailbox");
365