xref: /OK3568_Linux_fs/kernel/drivers/macintosh/via-pmu.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Device driver for the PMU in Apple PowerBooks and PowerMacs.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * The VIA (versatile interface adapter) interfaces to the PMU,
6*4882a593Smuzhiyun  * a 6805 microprocessor core whose primary function is to control
7*4882a593Smuzhiyun  * battery charging and system power on the PowerBook 3400 and 2400.
8*4882a593Smuzhiyun  * The PMU also controls the ADB (Apple Desktop Bus) which connects
9*4882a593Smuzhiyun  * to the keyboard and mouse, as well as the non-volatile RAM
10*4882a593Smuzhiyun  * and the RTC (real time clock) chip.
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
13*4882a593Smuzhiyun  * Copyright (C) 2001-2002 Benjamin Herrenschmidt
14*4882a593Smuzhiyun  * Copyright (C) 2006-2007 Johannes Berg
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  * THIS DRIVER IS BECOMING A TOTAL MESS !
17*4882a593Smuzhiyun  *  - Cleanup atomically disabling reply to PMU events after
18*4882a593Smuzhiyun  *    a sleep or a freq. switch
19*4882a593Smuzhiyun  *
20*4882a593Smuzhiyun  */
21*4882a593Smuzhiyun #include <stdarg.h>
22*4882a593Smuzhiyun #include <linux/mutex.h>
23*4882a593Smuzhiyun #include <linux/types.h>
24*4882a593Smuzhiyun #include <linux/errno.h>
25*4882a593Smuzhiyun #include <linux/kernel.h>
26*4882a593Smuzhiyun #include <linux/delay.h>
27*4882a593Smuzhiyun #include <linux/sched/signal.h>
28*4882a593Smuzhiyun #include <linux/miscdevice.h>
29*4882a593Smuzhiyun #include <linux/blkdev.h>
30*4882a593Smuzhiyun #include <linux/pci.h>
31*4882a593Smuzhiyun #include <linux/slab.h>
32*4882a593Smuzhiyun #include <linux/poll.h>
33*4882a593Smuzhiyun #include <linux/adb.h>
34*4882a593Smuzhiyun #include <linux/pmu.h>
35*4882a593Smuzhiyun #include <linux/cuda.h>
36*4882a593Smuzhiyun #include <linux/module.h>
37*4882a593Smuzhiyun #include <linux/spinlock.h>
38*4882a593Smuzhiyun #include <linux/pm.h>
39*4882a593Smuzhiyun #include <linux/proc_fs.h>
40*4882a593Smuzhiyun #include <linux/seq_file.h>
41*4882a593Smuzhiyun #include <linux/init.h>
42*4882a593Smuzhiyun #include <linux/interrupt.h>
43*4882a593Smuzhiyun #include <linux/device.h>
44*4882a593Smuzhiyun #include <linux/syscore_ops.h>
45*4882a593Smuzhiyun #include <linux/freezer.h>
46*4882a593Smuzhiyun #include <linux/syscalls.h>
47*4882a593Smuzhiyun #include <linux/suspend.h>
48*4882a593Smuzhiyun #include <linux/cpu.h>
49*4882a593Smuzhiyun #include <linux/compat.h>
50*4882a593Smuzhiyun #include <linux/of_address.h>
51*4882a593Smuzhiyun #include <linux/of_irq.h>
52*4882a593Smuzhiyun #include <linux/uaccess.h>
53*4882a593Smuzhiyun #include <linux/pgtable.h>
54*4882a593Smuzhiyun #include <asm/machdep.h>
55*4882a593Smuzhiyun #include <asm/io.h>
56*4882a593Smuzhiyun #include <asm/sections.h>
57*4882a593Smuzhiyun #include <asm/irq.h>
58*4882a593Smuzhiyun #ifdef CONFIG_PPC_PMAC
59*4882a593Smuzhiyun #include <asm/pmac_feature.h>
60*4882a593Smuzhiyun #include <asm/pmac_pfunc.h>
61*4882a593Smuzhiyun #include <asm/pmac_low_i2c.h>
62*4882a593Smuzhiyun #include <asm/prom.h>
63*4882a593Smuzhiyun #include <asm/mmu_context.h>
64*4882a593Smuzhiyun #include <asm/cputable.h>
65*4882a593Smuzhiyun #include <asm/time.h>
66*4882a593Smuzhiyun #include <asm/backlight.h>
67*4882a593Smuzhiyun #else
68*4882a593Smuzhiyun #include <asm/macintosh.h>
69*4882a593Smuzhiyun #include <asm/macints.h>
70*4882a593Smuzhiyun #include <asm/mac_via.h>
71*4882a593Smuzhiyun #endif
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun #include "via-pmu-event.h"
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun /* Some compile options */
76*4882a593Smuzhiyun #undef DEBUG_SLEEP
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun /* How many iterations between battery polls */
79*4882a593Smuzhiyun #define BATTERY_POLLING_COUNT	2
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun static DEFINE_MUTEX(pmu_info_proc_mutex);
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun /* VIA registers - spaced 0x200 bytes apart */
84*4882a593Smuzhiyun #define RS		0x200		/* skip between registers */
85*4882a593Smuzhiyun #define B		0		/* B-side data */
86*4882a593Smuzhiyun #define A		RS		/* A-side data */
87*4882a593Smuzhiyun #define DIRB		(2*RS)		/* B-side direction (1=output) */
88*4882a593Smuzhiyun #define DIRA		(3*RS)		/* A-side direction (1=output) */
89*4882a593Smuzhiyun #define T1CL		(4*RS)		/* Timer 1 ctr/latch (low 8 bits) */
90*4882a593Smuzhiyun #define T1CH		(5*RS)		/* Timer 1 counter (high 8 bits) */
91*4882a593Smuzhiyun #define T1LL		(6*RS)		/* Timer 1 latch (low 8 bits) */
92*4882a593Smuzhiyun #define T1LH		(7*RS)		/* Timer 1 latch (high 8 bits) */
93*4882a593Smuzhiyun #define T2CL		(8*RS)		/* Timer 2 ctr/latch (low 8 bits) */
94*4882a593Smuzhiyun #define T2CH		(9*RS)		/* Timer 2 counter (high 8 bits) */
95*4882a593Smuzhiyun #define SR		(10*RS)		/* Shift register */
96*4882a593Smuzhiyun #define ACR		(11*RS)		/* Auxiliary control register */
97*4882a593Smuzhiyun #define PCR		(12*RS)		/* Peripheral control register */
98*4882a593Smuzhiyun #define IFR		(13*RS)		/* Interrupt flag register */
99*4882a593Smuzhiyun #define IER		(14*RS)		/* Interrupt enable register */
100*4882a593Smuzhiyun #define ANH		(15*RS)		/* A-side data, no handshake */
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun /* Bits in B data register: both active low */
103*4882a593Smuzhiyun #ifdef CONFIG_PPC_PMAC
104*4882a593Smuzhiyun #define TACK		0x08		/* Transfer acknowledge (input) */
105*4882a593Smuzhiyun #define TREQ		0x10		/* Transfer request (output) */
106*4882a593Smuzhiyun #else
107*4882a593Smuzhiyun #define TACK		0x02
108*4882a593Smuzhiyun #define TREQ		0x04
109*4882a593Smuzhiyun #endif
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun /* Bits in ACR */
112*4882a593Smuzhiyun #define SR_CTRL		0x1c		/* Shift register control bits */
113*4882a593Smuzhiyun #define SR_EXT		0x0c		/* Shift on external clock */
114*4882a593Smuzhiyun #define SR_OUT		0x10		/* Shift out if 1 */
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun /* Bits in IFR and IER */
117*4882a593Smuzhiyun #define IER_SET		0x80		/* set bits in IER */
118*4882a593Smuzhiyun #define IER_CLR		0		/* clear bits in IER */
119*4882a593Smuzhiyun #define SR_INT		0x04		/* Shift register full/empty */
120*4882a593Smuzhiyun #define CB2_INT		0x08
121*4882a593Smuzhiyun #define CB1_INT		0x10		/* transition on CB1 input */
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun static volatile enum pmu_state {
124*4882a593Smuzhiyun 	uninitialized = 0,
125*4882a593Smuzhiyun 	idle,
126*4882a593Smuzhiyun 	sending,
127*4882a593Smuzhiyun 	intack,
128*4882a593Smuzhiyun 	reading,
129*4882a593Smuzhiyun 	reading_intr,
130*4882a593Smuzhiyun 	locked,
131*4882a593Smuzhiyun } pmu_state;
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun static volatile enum int_data_state {
134*4882a593Smuzhiyun 	int_data_empty,
135*4882a593Smuzhiyun 	int_data_fill,
136*4882a593Smuzhiyun 	int_data_ready,
137*4882a593Smuzhiyun 	int_data_flush
138*4882a593Smuzhiyun } int_data_state[2] = { int_data_empty, int_data_empty };
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun static struct adb_request *current_req;
141*4882a593Smuzhiyun static struct adb_request *last_req;
142*4882a593Smuzhiyun static struct adb_request *req_awaiting_reply;
143*4882a593Smuzhiyun static unsigned char interrupt_data[2][32];
144*4882a593Smuzhiyun static int interrupt_data_len[2];
145*4882a593Smuzhiyun static int int_data_last;
146*4882a593Smuzhiyun static unsigned char *reply_ptr;
147*4882a593Smuzhiyun static int data_index;
148*4882a593Smuzhiyun static int data_len;
149*4882a593Smuzhiyun static volatile int adb_int_pending;
150*4882a593Smuzhiyun static volatile int disable_poll;
151*4882a593Smuzhiyun static int pmu_kind = PMU_UNKNOWN;
152*4882a593Smuzhiyun static int pmu_fully_inited;
153*4882a593Smuzhiyun static int pmu_has_adb;
154*4882a593Smuzhiyun #ifdef CONFIG_PPC_PMAC
155*4882a593Smuzhiyun static volatile unsigned char __iomem *via1;
156*4882a593Smuzhiyun static volatile unsigned char __iomem *via2;
157*4882a593Smuzhiyun static struct device_node *vias;
158*4882a593Smuzhiyun static struct device_node *gpio_node;
159*4882a593Smuzhiyun #endif
160*4882a593Smuzhiyun static unsigned char __iomem *gpio_reg;
161*4882a593Smuzhiyun static int gpio_irq = 0;
162*4882a593Smuzhiyun static int gpio_irq_enabled = -1;
163*4882a593Smuzhiyun static volatile int pmu_suspended;
164*4882a593Smuzhiyun static spinlock_t pmu_lock;
165*4882a593Smuzhiyun static u8 pmu_intr_mask;
166*4882a593Smuzhiyun static int pmu_version;
167*4882a593Smuzhiyun static int drop_interrupts;
168*4882a593Smuzhiyun #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
169*4882a593Smuzhiyun static int option_lid_wakeup = 1;
170*4882a593Smuzhiyun #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
171*4882a593Smuzhiyun static unsigned long async_req_locks;
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun #define NUM_IRQ_STATS 13
174*4882a593Smuzhiyun static unsigned int pmu_irq_stats[NUM_IRQ_STATS];
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun static struct proc_dir_entry *proc_pmu_root;
177*4882a593Smuzhiyun static struct proc_dir_entry *proc_pmu_info;
178*4882a593Smuzhiyun static struct proc_dir_entry *proc_pmu_irqstats;
179*4882a593Smuzhiyun static struct proc_dir_entry *proc_pmu_options;
180*4882a593Smuzhiyun static int option_server_mode;
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun int pmu_battery_count;
183*4882a593Smuzhiyun int pmu_cur_battery;
184*4882a593Smuzhiyun unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
185*4882a593Smuzhiyun struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
186*4882a593Smuzhiyun static int query_batt_timer = BATTERY_POLLING_COUNT;
187*4882a593Smuzhiyun static struct adb_request batt_req;
188*4882a593Smuzhiyun static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun int __fake_sleep;
191*4882a593Smuzhiyun int asleep;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun #ifdef CONFIG_ADB
194*4882a593Smuzhiyun static int adb_dev_map;
195*4882a593Smuzhiyun static int pmu_adb_flags;
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun static int pmu_probe(void);
198*4882a593Smuzhiyun static int pmu_init(void);
199*4882a593Smuzhiyun static int pmu_send_request(struct adb_request *req, int sync);
200*4882a593Smuzhiyun static int pmu_adb_autopoll(int devs);
201*4882a593Smuzhiyun static int pmu_adb_reset_bus(void);
202*4882a593Smuzhiyun #endif /* CONFIG_ADB */
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun static int init_pmu(void);
205*4882a593Smuzhiyun static void pmu_start(void);
206*4882a593Smuzhiyun static irqreturn_t via_pmu_interrupt(int irq, void *arg);
207*4882a593Smuzhiyun static irqreturn_t gpio1_interrupt(int irq, void *arg);
208*4882a593Smuzhiyun static int pmu_info_proc_show(struct seq_file *m, void *v);
209*4882a593Smuzhiyun static int pmu_irqstats_proc_show(struct seq_file *m, void *v);
210*4882a593Smuzhiyun static int pmu_battery_proc_show(struct seq_file *m, void *v);
211*4882a593Smuzhiyun static void pmu_pass_intr(unsigned char *data, int len);
212*4882a593Smuzhiyun static const struct proc_ops pmu_options_proc_ops;
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun #ifdef CONFIG_ADB
215*4882a593Smuzhiyun const struct adb_driver via_pmu_driver = {
216*4882a593Smuzhiyun 	.name         = "PMU",
217*4882a593Smuzhiyun 	.probe        = pmu_probe,
218*4882a593Smuzhiyun 	.init         = pmu_init,
219*4882a593Smuzhiyun 	.send_request = pmu_send_request,
220*4882a593Smuzhiyun 	.autopoll     = pmu_adb_autopoll,
221*4882a593Smuzhiyun 	.poll         = pmu_poll_adb,
222*4882a593Smuzhiyun 	.reset_bus    = pmu_adb_reset_bus,
223*4882a593Smuzhiyun };
224*4882a593Smuzhiyun #endif /* CONFIG_ADB */
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun extern void low_sleep_handler(void);
227*4882a593Smuzhiyun extern void enable_kernel_altivec(void);
228*4882a593Smuzhiyun extern void enable_kernel_fp(void);
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun #ifdef DEBUG_SLEEP
231*4882a593Smuzhiyun int pmu_polled_request(struct adb_request *req);
232*4882a593Smuzhiyun void pmu_blink(int n);
233*4882a593Smuzhiyun #endif
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun /*
236*4882a593Smuzhiyun  * This table indicates for each PMU opcode:
237*4882a593Smuzhiyun  * - the number of data bytes to be sent with the command, or -1
238*4882a593Smuzhiyun  *   if a length byte should be sent,
239*4882a593Smuzhiyun  * - the number of response bytes which the PMU will return, or
240*4882a593Smuzhiyun  *   -1 if it will send a length byte.
241*4882a593Smuzhiyun  */
242*4882a593Smuzhiyun static const s8 pmu_data_len[256][2] = {
243*4882a593Smuzhiyun /*	   0	   1	   2	   3	   4	   5	   6	   7  */
244*4882a593Smuzhiyun /*00*/	{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
245*4882a593Smuzhiyun /*08*/	{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
246*4882a593Smuzhiyun /*10*/	{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
247*4882a593Smuzhiyun /*18*/	{ 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
248*4882a593Smuzhiyun /*20*/	{-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
249*4882a593Smuzhiyun /*28*/	{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
250*4882a593Smuzhiyun /*30*/	{ 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
251*4882a593Smuzhiyun /*38*/	{ 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
252*4882a593Smuzhiyun /*40*/	{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
253*4882a593Smuzhiyun /*48*/	{ 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
254*4882a593Smuzhiyun /*50*/	{ 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
255*4882a593Smuzhiyun /*58*/	{ 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
256*4882a593Smuzhiyun /*60*/	{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
257*4882a593Smuzhiyun /*68*/	{ 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
258*4882a593Smuzhiyun /*70*/	{ 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
259*4882a593Smuzhiyun /*78*/	{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
260*4882a593Smuzhiyun /*80*/	{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
261*4882a593Smuzhiyun /*88*/	{ 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
262*4882a593Smuzhiyun /*90*/	{ 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
263*4882a593Smuzhiyun /*98*/	{ 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
264*4882a593Smuzhiyun /*a0*/	{ 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
265*4882a593Smuzhiyun /*a8*/	{ 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
266*4882a593Smuzhiyun /*b0*/	{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
267*4882a593Smuzhiyun /*b8*/	{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
268*4882a593Smuzhiyun /*c0*/	{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
269*4882a593Smuzhiyun /*c8*/	{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
270*4882a593Smuzhiyun /*d0*/	{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
271*4882a593Smuzhiyun /*d8*/	{ 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
272*4882a593Smuzhiyun /*e0*/	{-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
273*4882a593Smuzhiyun /*e8*/	{ 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
274*4882a593Smuzhiyun /*f0*/	{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
275*4882a593Smuzhiyun /*f8*/	{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
276*4882a593Smuzhiyun };
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun static char *pbook_type[] = {
279*4882a593Smuzhiyun 	"Unknown PowerBook",
280*4882a593Smuzhiyun 	"PowerBook 2400/3400/3500(G3)",
281*4882a593Smuzhiyun 	"PowerBook G3 Series",
282*4882a593Smuzhiyun 	"1999 PowerBook G3",
283*4882a593Smuzhiyun 	"Core99"
284*4882a593Smuzhiyun };
285*4882a593Smuzhiyun 
find_via_pmu(void)286*4882a593Smuzhiyun int __init find_via_pmu(void)
287*4882a593Smuzhiyun {
288*4882a593Smuzhiyun #ifdef CONFIG_PPC_PMAC
289*4882a593Smuzhiyun 	u64 taddr;
290*4882a593Smuzhiyun 	const u32 *reg;
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	if (pmu_state != uninitialized)
293*4882a593Smuzhiyun 		return 1;
294*4882a593Smuzhiyun 	vias = of_find_node_by_name(NULL, "via-pmu");
295*4882a593Smuzhiyun 	if (vias == NULL)
296*4882a593Smuzhiyun 		return 0;
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	reg = of_get_property(vias, "reg", NULL);
299*4882a593Smuzhiyun 	if (reg == NULL) {
300*4882a593Smuzhiyun 		printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
301*4882a593Smuzhiyun 		goto fail;
302*4882a593Smuzhiyun 	}
303*4882a593Smuzhiyun 	taddr = of_translate_address(vias, reg);
304*4882a593Smuzhiyun 	if (taddr == OF_BAD_ADDR) {
305*4882a593Smuzhiyun 		printk(KERN_ERR "via-pmu: Can't translate address !\n");
306*4882a593Smuzhiyun 		goto fail;
307*4882a593Smuzhiyun 	}
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	spin_lock_init(&pmu_lock);
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	pmu_has_adb = 1;
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	pmu_intr_mask =	PMU_INT_PCEJECT |
314*4882a593Smuzhiyun 			PMU_INT_SNDBRT |
315*4882a593Smuzhiyun 			PMU_INT_ADB |
316*4882a593Smuzhiyun 			PMU_INT_TICK;
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 	if (of_node_name_eq(vias->parent, "ohare") ||
319*4882a593Smuzhiyun 	    of_device_is_compatible(vias->parent, "ohare"))
320*4882a593Smuzhiyun 		pmu_kind = PMU_OHARE_BASED;
321*4882a593Smuzhiyun 	else if (of_device_is_compatible(vias->parent, "paddington"))
322*4882a593Smuzhiyun 		pmu_kind = PMU_PADDINGTON_BASED;
323*4882a593Smuzhiyun 	else if (of_device_is_compatible(vias->parent, "heathrow"))
324*4882a593Smuzhiyun 		pmu_kind = PMU_HEATHROW_BASED;
325*4882a593Smuzhiyun 	else if (of_device_is_compatible(vias->parent, "Keylargo")
326*4882a593Smuzhiyun 		 || of_device_is_compatible(vias->parent, "K2-Keylargo")) {
327*4882a593Smuzhiyun 		struct device_node *gpiop;
328*4882a593Smuzhiyun 		struct device_node *adbp;
329*4882a593Smuzhiyun 		u64 gaddr = OF_BAD_ADDR;
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 		pmu_kind = PMU_KEYLARGO_BASED;
332*4882a593Smuzhiyun 		adbp = of_find_node_by_type(NULL, "adb");
333*4882a593Smuzhiyun 		pmu_has_adb = (adbp != NULL);
334*4882a593Smuzhiyun 		of_node_put(adbp);
335*4882a593Smuzhiyun 		pmu_intr_mask =	PMU_INT_PCEJECT |
336*4882a593Smuzhiyun 				PMU_INT_SNDBRT |
337*4882a593Smuzhiyun 				PMU_INT_ADB |
338*4882a593Smuzhiyun 				PMU_INT_TICK |
339*4882a593Smuzhiyun 				PMU_INT_ENVIRONMENT;
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 		gpiop = of_find_node_by_name(NULL, "gpio");
342*4882a593Smuzhiyun 		if (gpiop) {
343*4882a593Smuzhiyun 			reg = of_get_property(gpiop, "reg", NULL);
344*4882a593Smuzhiyun 			if (reg)
345*4882a593Smuzhiyun 				gaddr = of_translate_address(gpiop, reg);
346*4882a593Smuzhiyun 			if (gaddr != OF_BAD_ADDR)
347*4882a593Smuzhiyun 				gpio_reg = ioremap(gaddr, 0x10);
348*4882a593Smuzhiyun 			of_node_put(gpiop);
349*4882a593Smuzhiyun 		}
350*4882a593Smuzhiyun 		if (gpio_reg == NULL) {
351*4882a593Smuzhiyun 			printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
352*4882a593Smuzhiyun 			goto fail;
353*4882a593Smuzhiyun 		}
354*4882a593Smuzhiyun 	} else
355*4882a593Smuzhiyun 		pmu_kind = PMU_UNKNOWN;
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun 	via1 = via2 = ioremap(taddr, 0x2000);
358*4882a593Smuzhiyun 	if (via1 == NULL) {
359*4882a593Smuzhiyun 		printk(KERN_ERR "via-pmu: Can't map address !\n");
360*4882a593Smuzhiyun 		goto fail_via_remap;
361*4882a593Smuzhiyun 	}
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	out_8(&via1[IER], IER_CLR | 0x7f);	/* disable all intrs */
364*4882a593Smuzhiyun 	out_8(&via1[IFR], 0x7f);			/* clear IFR */
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	pmu_state = idle;
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	if (!init_pmu())
369*4882a593Smuzhiyun 		goto fail_init;
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun 	sys_ctrler = SYS_CTRLER_PMU;
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 	return 1;
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun  fail_init:
376*4882a593Smuzhiyun 	iounmap(via1);
377*4882a593Smuzhiyun 	via1 = via2 = NULL;
378*4882a593Smuzhiyun  fail_via_remap:
379*4882a593Smuzhiyun 	iounmap(gpio_reg);
380*4882a593Smuzhiyun 	gpio_reg = NULL;
381*4882a593Smuzhiyun  fail:
382*4882a593Smuzhiyun 	of_node_put(vias);
383*4882a593Smuzhiyun 	vias = NULL;
384*4882a593Smuzhiyun 	pmu_state = uninitialized;
385*4882a593Smuzhiyun 	return 0;
386*4882a593Smuzhiyun #else
387*4882a593Smuzhiyun 	if (macintosh_config->adb_type != MAC_ADB_PB2)
388*4882a593Smuzhiyun 		return 0;
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 	pmu_kind = PMU_UNKNOWN;
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun 	spin_lock_init(&pmu_lock);
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun 	pmu_has_adb = 1;
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun 	pmu_intr_mask =	PMU_INT_PCEJECT |
397*4882a593Smuzhiyun 			PMU_INT_SNDBRT |
398*4882a593Smuzhiyun 			PMU_INT_ADB |
399*4882a593Smuzhiyun 			PMU_INT_TICK;
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun 	pmu_state = idle;
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun 	if (!init_pmu()) {
404*4882a593Smuzhiyun 		pmu_state = uninitialized;
405*4882a593Smuzhiyun 		return 0;
406*4882a593Smuzhiyun 	}
407*4882a593Smuzhiyun 
408*4882a593Smuzhiyun 	return 1;
409*4882a593Smuzhiyun #endif /* !CONFIG_PPC_PMAC */
410*4882a593Smuzhiyun }
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun #ifdef CONFIG_ADB
pmu_probe(void)413*4882a593Smuzhiyun static int pmu_probe(void)
414*4882a593Smuzhiyun {
415*4882a593Smuzhiyun 	return pmu_state == uninitialized ? -ENODEV : 0;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun 
pmu_init(void)418*4882a593Smuzhiyun static int pmu_init(void)
419*4882a593Smuzhiyun {
420*4882a593Smuzhiyun 	return pmu_state == uninitialized ? -ENODEV : 0;
421*4882a593Smuzhiyun }
422*4882a593Smuzhiyun #endif /* CONFIG_ADB */
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun /*
425*4882a593Smuzhiyun  * We can't wait until pmu_init gets called, that happens too late.
426*4882a593Smuzhiyun  * It happens after IDE and SCSI initialization, which can take a few
427*4882a593Smuzhiyun  * seconds, and by that time the PMU could have given up on us and
428*4882a593Smuzhiyun  * turned us off.
429*4882a593Smuzhiyun  * Thus this is called with arch_initcall rather than device_initcall.
430*4882a593Smuzhiyun  */
via_pmu_start(void)431*4882a593Smuzhiyun static int __init via_pmu_start(void)
432*4882a593Smuzhiyun {
433*4882a593Smuzhiyun 	unsigned int __maybe_unused irq;
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun 	if (pmu_state == uninitialized)
436*4882a593Smuzhiyun 		return -ENODEV;
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	batt_req.complete = 1;
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun #ifdef CONFIG_PPC_PMAC
441*4882a593Smuzhiyun 	irq = irq_of_parse_and_map(vias, 0);
442*4882a593Smuzhiyun 	if (!irq) {
443*4882a593Smuzhiyun 		printk(KERN_ERR "via-pmu: can't map interrupt\n");
444*4882a593Smuzhiyun 		return -ENODEV;
445*4882a593Smuzhiyun 	}
446*4882a593Smuzhiyun 	/* We set IRQF_NO_SUSPEND because we don't want the interrupt
447*4882a593Smuzhiyun 	 * to be disabled between the 2 passes of driver suspend, we
448*4882a593Smuzhiyun 	 * control our own disabling for that one
449*4882a593Smuzhiyun 	 */
450*4882a593Smuzhiyun 	if (request_irq(irq, via_pmu_interrupt, IRQF_NO_SUSPEND,
451*4882a593Smuzhiyun 			"VIA-PMU", (void *)0)) {
452*4882a593Smuzhiyun 		printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
453*4882a593Smuzhiyun 		return -ENODEV;
454*4882a593Smuzhiyun 	}
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun 	if (pmu_kind == PMU_KEYLARGO_BASED) {
457*4882a593Smuzhiyun 		gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
458*4882a593Smuzhiyun 		if (gpio_node == NULL)
459*4882a593Smuzhiyun 			gpio_node = of_find_node_by_name(NULL,
460*4882a593Smuzhiyun 							 "pmu-interrupt");
461*4882a593Smuzhiyun 		if (gpio_node)
462*4882a593Smuzhiyun 			gpio_irq = irq_of_parse_and_map(gpio_node, 0);
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 		if (gpio_irq) {
465*4882a593Smuzhiyun 			if (request_irq(gpio_irq, gpio1_interrupt,
466*4882a593Smuzhiyun 					IRQF_NO_SUSPEND, "GPIO1 ADB",
467*4882a593Smuzhiyun 					(void *)0))
468*4882a593Smuzhiyun 				printk(KERN_ERR "pmu: can't get irq %d"
469*4882a593Smuzhiyun 				       " (GPIO1)\n", gpio_irq);
470*4882a593Smuzhiyun 			else
471*4882a593Smuzhiyun 				gpio_irq_enabled = 1;
472*4882a593Smuzhiyun 		}
473*4882a593Smuzhiyun 	}
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun 	/* Enable interrupts */
476*4882a593Smuzhiyun 	out_8(&via1[IER], IER_SET | SR_INT | CB1_INT);
477*4882a593Smuzhiyun #else
478*4882a593Smuzhiyun 	if (request_irq(IRQ_MAC_ADB_SR, via_pmu_interrupt, IRQF_NO_SUSPEND,
479*4882a593Smuzhiyun 			"VIA-PMU-SR", NULL)) {
480*4882a593Smuzhiyun 		pr_err("%s: couldn't get SR irq\n", __func__);
481*4882a593Smuzhiyun 		return -ENODEV;
482*4882a593Smuzhiyun 	}
483*4882a593Smuzhiyun 	if (request_irq(IRQ_MAC_ADB_CL, via_pmu_interrupt, IRQF_NO_SUSPEND,
484*4882a593Smuzhiyun 			"VIA-PMU-CL", NULL)) {
485*4882a593Smuzhiyun 		pr_err("%s: couldn't get CL irq\n", __func__);
486*4882a593Smuzhiyun 		free_irq(IRQ_MAC_ADB_SR, NULL);
487*4882a593Smuzhiyun 		return -ENODEV;
488*4882a593Smuzhiyun 	}
489*4882a593Smuzhiyun #endif /* !CONFIG_PPC_PMAC */
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun 	pmu_fully_inited = 1;
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun 	/* Make sure PMU settle down before continuing. This is _very_ important
494*4882a593Smuzhiyun 	 * since the IDE probe may shut interrupts down for quite a bit of time. If
495*4882a593Smuzhiyun 	 * a PMU communication is pending while this happens, the PMU may timeout
496*4882a593Smuzhiyun 	 * Not that on Core99 machines, the PMU keeps sending us environement
497*4882a593Smuzhiyun 	 * messages, we should find a way to either fix IDE or make it call
498*4882a593Smuzhiyun 	 * pmu_suspend() before masking interrupts. This can also happens while
499*4882a593Smuzhiyun 	 * scolling with some fbdevs.
500*4882a593Smuzhiyun 	 */
501*4882a593Smuzhiyun 	do {
502*4882a593Smuzhiyun 		pmu_poll();
503*4882a593Smuzhiyun 	} while (pmu_state != idle);
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun 	return 0;
506*4882a593Smuzhiyun }
507*4882a593Smuzhiyun 
508*4882a593Smuzhiyun arch_initcall(via_pmu_start);
509*4882a593Smuzhiyun 
510*4882a593Smuzhiyun /*
511*4882a593Smuzhiyun  * This has to be done after pci_init, which is a subsys_initcall.
512*4882a593Smuzhiyun  */
via_pmu_dev_init(void)513*4882a593Smuzhiyun static int __init via_pmu_dev_init(void)
514*4882a593Smuzhiyun {
515*4882a593Smuzhiyun 	if (pmu_state == uninitialized)
516*4882a593Smuzhiyun 		return -ENODEV;
517*4882a593Smuzhiyun 
518*4882a593Smuzhiyun #ifdef CONFIG_PMAC_BACKLIGHT
519*4882a593Smuzhiyun 	/* Initialize backlight */
520*4882a593Smuzhiyun 	pmu_backlight_init();
521*4882a593Smuzhiyun #endif
522*4882a593Smuzhiyun 
523*4882a593Smuzhiyun #ifdef CONFIG_PPC32
524*4882a593Smuzhiyun   	if (of_machine_is_compatible("AAPL,3400/2400") ||
525*4882a593Smuzhiyun   		of_machine_is_compatible("AAPL,3500")) {
526*4882a593Smuzhiyun 		int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
527*4882a593Smuzhiyun 			NULL, PMAC_MB_INFO_MODEL, 0);
528*4882a593Smuzhiyun 		pmu_battery_count = 1;
529*4882a593Smuzhiyun 		if (mb == PMAC_TYPE_COMET)
530*4882a593Smuzhiyun 			pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
531*4882a593Smuzhiyun 		else
532*4882a593Smuzhiyun 			pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
533*4882a593Smuzhiyun 	} else if (of_machine_is_compatible("AAPL,PowerBook1998") ||
534*4882a593Smuzhiyun 		of_machine_is_compatible("PowerBook1,1")) {
535*4882a593Smuzhiyun 		pmu_battery_count = 2;
536*4882a593Smuzhiyun 		pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
537*4882a593Smuzhiyun 		pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
538*4882a593Smuzhiyun 	} else {
539*4882a593Smuzhiyun 		struct device_node* prim =
540*4882a593Smuzhiyun 			of_find_node_by_name(NULL, "power-mgt");
541*4882a593Smuzhiyun 		const u32 *prim_info = NULL;
542*4882a593Smuzhiyun 		if (prim)
543*4882a593Smuzhiyun 			prim_info = of_get_property(prim, "prim-info", NULL);
544*4882a593Smuzhiyun 		if (prim_info) {
545*4882a593Smuzhiyun 			/* Other stuffs here yet unknown */
546*4882a593Smuzhiyun 			pmu_battery_count = (prim_info[6] >> 16) & 0xff;
547*4882a593Smuzhiyun 			pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
548*4882a593Smuzhiyun 			if (pmu_battery_count > 1)
549*4882a593Smuzhiyun 				pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
550*4882a593Smuzhiyun 		}
551*4882a593Smuzhiyun 		of_node_put(prim);
552*4882a593Smuzhiyun 	}
553*4882a593Smuzhiyun #endif /* CONFIG_PPC32 */
554*4882a593Smuzhiyun 
555*4882a593Smuzhiyun 	/* Create /proc/pmu */
556*4882a593Smuzhiyun 	proc_pmu_root = proc_mkdir("pmu", NULL);
557*4882a593Smuzhiyun 	if (proc_pmu_root) {
558*4882a593Smuzhiyun 		long i;
559*4882a593Smuzhiyun 
560*4882a593Smuzhiyun 		for (i=0; i<pmu_battery_count; i++) {
561*4882a593Smuzhiyun 			char title[16];
562*4882a593Smuzhiyun 			sprintf(title, "battery_%ld", i);
563*4882a593Smuzhiyun 			proc_pmu_batt[i] = proc_create_single_data(title, 0,
564*4882a593Smuzhiyun 					proc_pmu_root, pmu_battery_proc_show,
565*4882a593Smuzhiyun 					(void *)i);
566*4882a593Smuzhiyun 		}
567*4882a593Smuzhiyun 
568*4882a593Smuzhiyun 		proc_pmu_info = proc_create_single("info", 0, proc_pmu_root,
569*4882a593Smuzhiyun 				pmu_info_proc_show);
570*4882a593Smuzhiyun 		proc_pmu_irqstats = proc_create_single("interrupts", 0,
571*4882a593Smuzhiyun 				proc_pmu_root, pmu_irqstats_proc_show);
572*4882a593Smuzhiyun 		proc_pmu_options = proc_create("options", 0600, proc_pmu_root,
573*4882a593Smuzhiyun 						&pmu_options_proc_ops);
574*4882a593Smuzhiyun 	}
575*4882a593Smuzhiyun 	return 0;
576*4882a593Smuzhiyun }
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun device_initcall(via_pmu_dev_init);
579*4882a593Smuzhiyun 
580*4882a593Smuzhiyun static int
init_pmu(void)581*4882a593Smuzhiyun init_pmu(void)
582*4882a593Smuzhiyun {
583*4882a593Smuzhiyun 	int timeout;
584*4882a593Smuzhiyun 	struct adb_request req;
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun 	/* Negate TREQ. Set TACK to input and TREQ to output. */
587*4882a593Smuzhiyun 	out_8(&via2[B], in_8(&via2[B]) | TREQ);
588*4882a593Smuzhiyun 	out_8(&via2[DIRB], (in_8(&via2[DIRB]) | TREQ) & ~TACK);
589*4882a593Smuzhiyun 
590*4882a593Smuzhiyun 	pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
591*4882a593Smuzhiyun 	timeout =  100000;
592*4882a593Smuzhiyun 	while (!req.complete) {
593*4882a593Smuzhiyun 		if (--timeout < 0) {
594*4882a593Smuzhiyun 			printk(KERN_ERR "init_pmu: no response from PMU\n");
595*4882a593Smuzhiyun 			return 0;
596*4882a593Smuzhiyun 		}
597*4882a593Smuzhiyun 		udelay(10);
598*4882a593Smuzhiyun 		pmu_poll();
599*4882a593Smuzhiyun 	}
600*4882a593Smuzhiyun 
601*4882a593Smuzhiyun 	/* ack all pending interrupts */
602*4882a593Smuzhiyun 	timeout = 100000;
603*4882a593Smuzhiyun 	interrupt_data[0][0] = 1;
604*4882a593Smuzhiyun 	while (interrupt_data[0][0] || pmu_state != idle) {
605*4882a593Smuzhiyun 		if (--timeout < 0) {
606*4882a593Smuzhiyun 			printk(KERN_ERR "init_pmu: timed out acking intrs\n");
607*4882a593Smuzhiyun 			return 0;
608*4882a593Smuzhiyun 		}
609*4882a593Smuzhiyun 		if (pmu_state == idle)
610*4882a593Smuzhiyun 			adb_int_pending = 1;
611*4882a593Smuzhiyun 		via_pmu_interrupt(0, NULL);
612*4882a593Smuzhiyun 		udelay(10);
613*4882a593Smuzhiyun 	}
614*4882a593Smuzhiyun 
615*4882a593Smuzhiyun 	/* Tell PMU we are ready.  */
616*4882a593Smuzhiyun 	if (pmu_kind == PMU_KEYLARGO_BASED) {
617*4882a593Smuzhiyun 		pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
618*4882a593Smuzhiyun 		while (!req.complete)
619*4882a593Smuzhiyun 			pmu_poll();
620*4882a593Smuzhiyun 	}
621*4882a593Smuzhiyun 
622*4882a593Smuzhiyun 	/* Read PMU version */
623*4882a593Smuzhiyun 	pmu_request(&req, NULL, 1, PMU_GET_VERSION);
624*4882a593Smuzhiyun 	pmu_wait_complete(&req);
625*4882a593Smuzhiyun 	if (req.reply_len > 0)
626*4882a593Smuzhiyun 		pmu_version = req.reply[0];
627*4882a593Smuzhiyun 
628*4882a593Smuzhiyun 	/* Read server mode setting */
629*4882a593Smuzhiyun 	if (pmu_kind == PMU_KEYLARGO_BASED) {
630*4882a593Smuzhiyun 		pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
631*4882a593Smuzhiyun 			    PMU_PWR_GET_POWERUP_EVENTS);
632*4882a593Smuzhiyun 		pmu_wait_complete(&req);
633*4882a593Smuzhiyun 		if (req.reply_len == 2) {
634*4882a593Smuzhiyun 			if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
635*4882a593Smuzhiyun 				option_server_mode = 1;
636*4882a593Smuzhiyun 			printk(KERN_INFO "via-pmu: Server Mode is %s\n",
637*4882a593Smuzhiyun 			       option_server_mode ? "enabled" : "disabled");
638*4882a593Smuzhiyun 		}
639*4882a593Smuzhiyun 	}
640*4882a593Smuzhiyun 
641*4882a593Smuzhiyun 	printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
642*4882a593Smuzhiyun 	       PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
643*4882a593Smuzhiyun 
644*4882a593Smuzhiyun 	return 1;
645*4882a593Smuzhiyun }
646*4882a593Smuzhiyun 
647*4882a593Smuzhiyun int
pmu_get_model(void)648*4882a593Smuzhiyun pmu_get_model(void)
649*4882a593Smuzhiyun {
650*4882a593Smuzhiyun 	return pmu_kind;
651*4882a593Smuzhiyun }
652*4882a593Smuzhiyun 
pmu_set_server_mode(int server_mode)653*4882a593Smuzhiyun static void pmu_set_server_mode(int server_mode)
654*4882a593Smuzhiyun {
655*4882a593Smuzhiyun 	struct adb_request req;
656*4882a593Smuzhiyun 
657*4882a593Smuzhiyun 	if (pmu_kind != PMU_KEYLARGO_BASED)
658*4882a593Smuzhiyun 		return;
659*4882a593Smuzhiyun 
660*4882a593Smuzhiyun 	option_server_mode = server_mode;
661*4882a593Smuzhiyun 	pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
662*4882a593Smuzhiyun 	pmu_wait_complete(&req);
663*4882a593Smuzhiyun 	if (req.reply_len < 2)
664*4882a593Smuzhiyun 		return;
665*4882a593Smuzhiyun 	if (server_mode)
666*4882a593Smuzhiyun 		pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
667*4882a593Smuzhiyun 			    PMU_PWR_SET_POWERUP_EVENTS,
668*4882a593Smuzhiyun 			    req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
669*4882a593Smuzhiyun 	else
670*4882a593Smuzhiyun 		pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
671*4882a593Smuzhiyun 			    PMU_PWR_CLR_POWERUP_EVENTS,
672*4882a593Smuzhiyun 			    req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
673*4882a593Smuzhiyun 	pmu_wait_complete(&req);
674*4882a593Smuzhiyun }
675*4882a593Smuzhiyun 
676*4882a593Smuzhiyun /* This new version of the code for 2400/3400/3500 powerbooks
677*4882a593Smuzhiyun  * is inspired from the implementation in gkrellm-pmu
678*4882a593Smuzhiyun  */
679*4882a593Smuzhiyun static void
done_battery_state_ohare(struct adb_request * req)680*4882a593Smuzhiyun done_battery_state_ohare(struct adb_request* req)
681*4882a593Smuzhiyun {
682*4882a593Smuzhiyun #ifdef CONFIG_PPC_PMAC
683*4882a593Smuzhiyun 	/* format:
684*4882a593Smuzhiyun 	 *  [0]    :  flags
685*4882a593Smuzhiyun 	 *    0x01 :  AC indicator
686*4882a593Smuzhiyun 	 *    0x02 :  charging
687*4882a593Smuzhiyun 	 *    0x04 :  battery exist
688*4882a593Smuzhiyun 	 *    0x08 :
689*4882a593Smuzhiyun 	 *    0x10 :
690*4882a593Smuzhiyun 	 *    0x20 :  full charged
691*4882a593Smuzhiyun 	 *    0x40 :  pcharge reset
692*4882a593Smuzhiyun 	 *    0x80 :  battery exist
693*4882a593Smuzhiyun 	 *
694*4882a593Smuzhiyun 	 *  [1][2] :  battery voltage
695*4882a593Smuzhiyun 	 *  [3]    :  CPU temperature
696*4882a593Smuzhiyun 	 *  [4]    :  battery temperature
697*4882a593Smuzhiyun 	 *  [5]    :  current
698*4882a593Smuzhiyun 	 *  [6][7] :  pcharge
699*4882a593Smuzhiyun 	 *              --tkoba
700*4882a593Smuzhiyun 	 */
701*4882a593Smuzhiyun 	unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
702*4882a593Smuzhiyun 	long pcharge, charge, vb, vmax, lmax;
703*4882a593Smuzhiyun 	long vmax_charging, vmax_charged;
704*4882a593Smuzhiyun 	long amperage, voltage, time, max;
705*4882a593Smuzhiyun 	int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
706*4882a593Smuzhiyun 			NULL, PMAC_MB_INFO_MODEL, 0);
707*4882a593Smuzhiyun 
708*4882a593Smuzhiyun 	if (req->reply[0] & 0x01)
709*4882a593Smuzhiyun 		pmu_power_flags |= PMU_PWR_AC_PRESENT;
710*4882a593Smuzhiyun 	else
711*4882a593Smuzhiyun 		pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
712*4882a593Smuzhiyun 
713*4882a593Smuzhiyun 	if (mb == PMAC_TYPE_COMET) {
714*4882a593Smuzhiyun 		vmax_charged = 189;
715*4882a593Smuzhiyun 		vmax_charging = 213;
716*4882a593Smuzhiyun 		lmax = 6500;
717*4882a593Smuzhiyun 	} else {
718*4882a593Smuzhiyun 		vmax_charged = 330;
719*4882a593Smuzhiyun 		vmax_charging = 330;
720*4882a593Smuzhiyun 		lmax = 6500;
721*4882a593Smuzhiyun 	}
722*4882a593Smuzhiyun 	vmax = vmax_charged;
723*4882a593Smuzhiyun 
724*4882a593Smuzhiyun 	/* If battery installed */
725*4882a593Smuzhiyun 	if (req->reply[0] & 0x04) {
726*4882a593Smuzhiyun 		bat_flags |= PMU_BATT_PRESENT;
727*4882a593Smuzhiyun 		if (req->reply[0] & 0x02)
728*4882a593Smuzhiyun 			bat_flags |= PMU_BATT_CHARGING;
729*4882a593Smuzhiyun 		vb = (req->reply[1] << 8) | req->reply[2];
730*4882a593Smuzhiyun 		voltage = (vb * 265 + 72665) / 10;
731*4882a593Smuzhiyun 		amperage = req->reply[5];
732*4882a593Smuzhiyun 		if ((req->reply[0] & 0x01) == 0) {
733*4882a593Smuzhiyun 			if (amperage > 200)
734*4882a593Smuzhiyun 				vb += ((amperage - 200) * 15)/100;
735*4882a593Smuzhiyun 		} else if (req->reply[0] & 0x02) {
736*4882a593Smuzhiyun 			vb = (vb * 97) / 100;
737*4882a593Smuzhiyun 			vmax = vmax_charging;
738*4882a593Smuzhiyun 		}
739*4882a593Smuzhiyun 		charge = (100 * vb) / vmax;
740*4882a593Smuzhiyun 		if (req->reply[0] & 0x40) {
741*4882a593Smuzhiyun 			pcharge = (req->reply[6] << 8) + req->reply[7];
742*4882a593Smuzhiyun 			if (pcharge > lmax)
743*4882a593Smuzhiyun 				pcharge = lmax;
744*4882a593Smuzhiyun 			pcharge *= 100;
745*4882a593Smuzhiyun 			pcharge = 100 - pcharge / lmax;
746*4882a593Smuzhiyun 			if (pcharge < charge)
747*4882a593Smuzhiyun 				charge = pcharge;
748*4882a593Smuzhiyun 		}
749*4882a593Smuzhiyun 		if (amperage > 0)
750*4882a593Smuzhiyun 			time = (charge * 16440) / amperage;
751*4882a593Smuzhiyun 		else
752*4882a593Smuzhiyun 			time = 0;
753*4882a593Smuzhiyun 		max = 100;
754*4882a593Smuzhiyun 		amperage = -amperage;
755*4882a593Smuzhiyun 	} else
756*4882a593Smuzhiyun 		charge = max = amperage = voltage = time = 0;
757*4882a593Smuzhiyun 
758*4882a593Smuzhiyun 	pmu_batteries[pmu_cur_battery].flags = bat_flags;
759*4882a593Smuzhiyun 	pmu_batteries[pmu_cur_battery].charge = charge;
760*4882a593Smuzhiyun 	pmu_batteries[pmu_cur_battery].max_charge = max;
761*4882a593Smuzhiyun 	pmu_batteries[pmu_cur_battery].amperage = amperage;
762*4882a593Smuzhiyun 	pmu_batteries[pmu_cur_battery].voltage = voltage;
763*4882a593Smuzhiyun 	pmu_batteries[pmu_cur_battery].time_remaining = time;
764*4882a593Smuzhiyun #endif /* CONFIG_PPC_PMAC */
765*4882a593Smuzhiyun 
766*4882a593Smuzhiyun 	clear_bit(0, &async_req_locks);
767*4882a593Smuzhiyun }
768*4882a593Smuzhiyun 
769*4882a593Smuzhiyun static void
done_battery_state_smart(struct adb_request * req)770*4882a593Smuzhiyun done_battery_state_smart(struct adb_request* req)
771*4882a593Smuzhiyun {
772*4882a593Smuzhiyun 	/* format:
773*4882a593Smuzhiyun 	 *  [0] : format of this structure (known: 3,4,5)
774*4882a593Smuzhiyun 	 *  [1] : flags
775*4882a593Smuzhiyun 	 *
776*4882a593Smuzhiyun 	 *  format 3 & 4:
777*4882a593Smuzhiyun 	 *
778*4882a593Smuzhiyun 	 *  [2] : charge
779*4882a593Smuzhiyun 	 *  [3] : max charge
780*4882a593Smuzhiyun 	 *  [4] : current
781*4882a593Smuzhiyun 	 *  [5] : voltage
782*4882a593Smuzhiyun 	 *
783*4882a593Smuzhiyun 	 *  format 5:
784*4882a593Smuzhiyun 	 *
785*4882a593Smuzhiyun 	 *  [2][3] : charge
786*4882a593Smuzhiyun 	 *  [4][5] : max charge
787*4882a593Smuzhiyun 	 *  [6][7] : current
788*4882a593Smuzhiyun 	 *  [8][9] : voltage
789*4882a593Smuzhiyun 	 */
790*4882a593Smuzhiyun 
791*4882a593Smuzhiyun 	unsigned int bat_flags = PMU_BATT_TYPE_SMART;
792*4882a593Smuzhiyun 	int amperage;
793*4882a593Smuzhiyun 	unsigned int capa, max, voltage;
794*4882a593Smuzhiyun 
795*4882a593Smuzhiyun 	if (req->reply[1] & 0x01)
796*4882a593Smuzhiyun 		pmu_power_flags |= PMU_PWR_AC_PRESENT;
797*4882a593Smuzhiyun 	else
798*4882a593Smuzhiyun 		pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
799*4882a593Smuzhiyun 
800*4882a593Smuzhiyun 
801*4882a593Smuzhiyun 	capa = max = amperage = voltage = 0;
802*4882a593Smuzhiyun 
803*4882a593Smuzhiyun 	if (req->reply[1] & 0x04) {
804*4882a593Smuzhiyun 		bat_flags |= PMU_BATT_PRESENT;
805*4882a593Smuzhiyun 		switch(req->reply[0]) {
806*4882a593Smuzhiyun 			case 3:
807*4882a593Smuzhiyun 			case 4: capa = req->reply[2];
808*4882a593Smuzhiyun 				max = req->reply[3];
809*4882a593Smuzhiyun 				amperage = *((signed char *)&req->reply[4]);
810*4882a593Smuzhiyun 				voltage = req->reply[5];
811*4882a593Smuzhiyun 				break;
812*4882a593Smuzhiyun 			case 5: capa = (req->reply[2] << 8) | req->reply[3];
813*4882a593Smuzhiyun 				max = (req->reply[4] << 8) | req->reply[5];
814*4882a593Smuzhiyun 				amperage = *((signed short *)&req->reply[6]);
815*4882a593Smuzhiyun 				voltage = (req->reply[8] << 8) | req->reply[9];
816*4882a593Smuzhiyun 				break;
817*4882a593Smuzhiyun 			default:
818*4882a593Smuzhiyun 				pr_warn("pmu.c: unrecognized battery info, "
819*4882a593Smuzhiyun 					"len: %d, %4ph\n", req->reply_len,
820*4882a593Smuzhiyun 							   req->reply);
821*4882a593Smuzhiyun 				break;
822*4882a593Smuzhiyun 		}
823*4882a593Smuzhiyun 	}
824*4882a593Smuzhiyun 
825*4882a593Smuzhiyun 	if ((req->reply[1] & 0x01) && (amperage > 0))
826*4882a593Smuzhiyun 		bat_flags |= PMU_BATT_CHARGING;
827*4882a593Smuzhiyun 
828*4882a593Smuzhiyun 	pmu_batteries[pmu_cur_battery].flags = bat_flags;
829*4882a593Smuzhiyun 	pmu_batteries[pmu_cur_battery].charge = capa;
830*4882a593Smuzhiyun 	pmu_batteries[pmu_cur_battery].max_charge = max;
831*4882a593Smuzhiyun 	pmu_batteries[pmu_cur_battery].amperage = amperage;
832*4882a593Smuzhiyun 	pmu_batteries[pmu_cur_battery].voltage = voltage;
833*4882a593Smuzhiyun 	if (amperage) {
834*4882a593Smuzhiyun 		if ((req->reply[1] & 0x01) && (amperage > 0))
835*4882a593Smuzhiyun 			pmu_batteries[pmu_cur_battery].time_remaining
836*4882a593Smuzhiyun 				= ((max-capa) * 3600) / amperage;
837*4882a593Smuzhiyun 		else
838*4882a593Smuzhiyun 			pmu_batteries[pmu_cur_battery].time_remaining
839*4882a593Smuzhiyun 				= (capa * 3600) / (-amperage);
840*4882a593Smuzhiyun 	} else
841*4882a593Smuzhiyun 		pmu_batteries[pmu_cur_battery].time_remaining = 0;
842*4882a593Smuzhiyun 
843*4882a593Smuzhiyun 	pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
844*4882a593Smuzhiyun 
845*4882a593Smuzhiyun 	clear_bit(0, &async_req_locks);
846*4882a593Smuzhiyun }
847*4882a593Smuzhiyun 
848*4882a593Smuzhiyun static void
query_battery_state(void)849*4882a593Smuzhiyun query_battery_state(void)
850*4882a593Smuzhiyun {
851*4882a593Smuzhiyun 	if (test_and_set_bit(0, &async_req_locks))
852*4882a593Smuzhiyun 		return;
853*4882a593Smuzhiyun 	if (pmu_kind == PMU_OHARE_BASED)
854*4882a593Smuzhiyun 		pmu_request(&batt_req, done_battery_state_ohare,
855*4882a593Smuzhiyun 			1, PMU_BATTERY_STATE);
856*4882a593Smuzhiyun 	else
857*4882a593Smuzhiyun 		pmu_request(&batt_req, done_battery_state_smart,
858*4882a593Smuzhiyun 			2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
859*4882a593Smuzhiyun }
860*4882a593Smuzhiyun 
pmu_info_proc_show(struct seq_file * m,void * v)861*4882a593Smuzhiyun static int pmu_info_proc_show(struct seq_file *m, void *v)
862*4882a593Smuzhiyun {
863*4882a593Smuzhiyun 	seq_printf(m, "PMU driver version     : %d\n", PMU_DRIVER_VERSION);
864*4882a593Smuzhiyun 	seq_printf(m, "PMU firmware version   : %02x\n", pmu_version);
865*4882a593Smuzhiyun 	seq_printf(m, "AC Power               : %d\n",
866*4882a593Smuzhiyun 		((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
867*4882a593Smuzhiyun 	seq_printf(m, "Battery count          : %d\n", pmu_battery_count);
868*4882a593Smuzhiyun 
869*4882a593Smuzhiyun 	return 0;
870*4882a593Smuzhiyun }
871*4882a593Smuzhiyun 
pmu_irqstats_proc_show(struct seq_file * m,void * v)872*4882a593Smuzhiyun static int pmu_irqstats_proc_show(struct seq_file *m, void *v)
873*4882a593Smuzhiyun {
874*4882a593Smuzhiyun 	int i;
875*4882a593Smuzhiyun 	static const char *irq_names[NUM_IRQ_STATS] = {
876*4882a593Smuzhiyun 		"Unknown interrupt (type 0)",
877*4882a593Smuzhiyun 		"Unknown interrupt (type 1)",
878*4882a593Smuzhiyun 		"PC-Card eject button",
879*4882a593Smuzhiyun 		"Sound/Brightness button",
880*4882a593Smuzhiyun 		"ADB message",
881*4882a593Smuzhiyun 		"Battery state change",
882*4882a593Smuzhiyun 		"Environment interrupt",
883*4882a593Smuzhiyun 		"Tick timer",
884*4882a593Smuzhiyun 		"Ghost interrupt (zero len)",
885*4882a593Smuzhiyun 		"Empty interrupt (empty mask)",
886*4882a593Smuzhiyun 		"Max irqs in a row",
887*4882a593Smuzhiyun 		"Total CB1 triggered events",
888*4882a593Smuzhiyun 		"Total GPIO1 triggered events",
889*4882a593Smuzhiyun         };
890*4882a593Smuzhiyun 
891*4882a593Smuzhiyun 	for (i = 0; i < NUM_IRQ_STATS; i++) {
892*4882a593Smuzhiyun 		seq_printf(m, " %2u: %10u (%s)\n",
893*4882a593Smuzhiyun 			     i, pmu_irq_stats[i], irq_names[i]);
894*4882a593Smuzhiyun 	}
895*4882a593Smuzhiyun 	return 0;
896*4882a593Smuzhiyun }
897*4882a593Smuzhiyun 
pmu_battery_proc_show(struct seq_file * m,void * v)898*4882a593Smuzhiyun static int pmu_battery_proc_show(struct seq_file *m, void *v)
899*4882a593Smuzhiyun {
900*4882a593Smuzhiyun 	long batnum = (long)m->private;
901*4882a593Smuzhiyun 
902*4882a593Smuzhiyun 	seq_putc(m, '\n');
903*4882a593Smuzhiyun 	seq_printf(m, "flags      : %08x\n", pmu_batteries[batnum].flags);
904*4882a593Smuzhiyun 	seq_printf(m, "charge     : %d\n", pmu_batteries[batnum].charge);
905*4882a593Smuzhiyun 	seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge);
906*4882a593Smuzhiyun 	seq_printf(m, "current    : %d\n", pmu_batteries[batnum].amperage);
907*4882a593Smuzhiyun 	seq_printf(m, "voltage    : %d\n", pmu_batteries[batnum].voltage);
908*4882a593Smuzhiyun 	seq_printf(m, "time rem.  : %d\n", pmu_batteries[batnum].time_remaining);
909*4882a593Smuzhiyun 	return 0;
910*4882a593Smuzhiyun }
911*4882a593Smuzhiyun 
pmu_options_proc_show(struct seq_file * m,void * v)912*4882a593Smuzhiyun static int pmu_options_proc_show(struct seq_file *m, void *v)
913*4882a593Smuzhiyun {
914*4882a593Smuzhiyun #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
915*4882a593Smuzhiyun 	if (pmu_kind == PMU_KEYLARGO_BASED &&
916*4882a593Smuzhiyun 	    pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
917*4882a593Smuzhiyun 		seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup);
918*4882a593Smuzhiyun #endif
919*4882a593Smuzhiyun 	if (pmu_kind == PMU_KEYLARGO_BASED)
920*4882a593Smuzhiyun 		seq_printf(m, "server_mode=%d\n", option_server_mode);
921*4882a593Smuzhiyun 
922*4882a593Smuzhiyun 	return 0;
923*4882a593Smuzhiyun }
924*4882a593Smuzhiyun 
pmu_options_proc_open(struct inode * inode,struct file * file)925*4882a593Smuzhiyun static int pmu_options_proc_open(struct inode *inode, struct file *file)
926*4882a593Smuzhiyun {
927*4882a593Smuzhiyun 	return single_open(file, pmu_options_proc_show, NULL);
928*4882a593Smuzhiyun }
929*4882a593Smuzhiyun 
pmu_options_proc_write(struct file * file,const char __user * buffer,size_t count,loff_t * pos)930*4882a593Smuzhiyun static ssize_t pmu_options_proc_write(struct file *file,
931*4882a593Smuzhiyun 		const char __user *buffer, size_t count, loff_t *pos)
932*4882a593Smuzhiyun {
933*4882a593Smuzhiyun 	char tmp[33];
934*4882a593Smuzhiyun 	char *label, *val;
935*4882a593Smuzhiyun 	size_t fcount = count;
936*4882a593Smuzhiyun 
937*4882a593Smuzhiyun 	if (!count)
938*4882a593Smuzhiyun 		return -EINVAL;
939*4882a593Smuzhiyun 	if (count > 32)
940*4882a593Smuzhiyun 		count = 32;
941*4882a593Smuzhiyun 	if (copy_from_user(tmp, buffer, count))
942*4882a593Smuzhiyun 		return -EFAULT;
943*4882a593Smuzhiyun 	tmp[count] = 0;
944*4882a593Smuzhiyun 
945*4882a593Smuzhiyun 	label = tmp;
946*4882a593Smuzhiyun 	while(*label == ' ')
947*4882a593Smuzhiyun 		label++;
948*4882a593Smuzhiyun 	val = label;
949*4882a593Smuzhiyun 	while(*val && (*val != '=')) {
950*4882a593Smuzhiyun 		if (*val == ' ')
951*4882a593Smuzhiyun 			*val = 0;
952*4882a593Smuzhiyun 		val++;
953*4882a593Smuzhiyun 	}
954*4882a593Smuzhiyun 	if ((*val) == 0)
955*4882a593Smuzhiyun 		return -EINVAL;
956*4882a593Smuzhiyun 	*(val++) = 0;
957*4882a593Smuzhiyun 	while(*val == ' ')
958*4882a593Smuzhiyun 		val++;
959*4882a593Smuzhiyun #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
960*4882a593Smuzhiyun 	if (pmu_kind == PMU_KEYLARGO_BASED &&
961*4882a593Smuzhiyun 	    pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
962*4882a593Smuzhiyun 		if (!strcmp(label, "lid_wakeup"))
963*4882a593Smuzhiyun 			option_lid_wakeup = ((*val) == '1');
964*4882a593Smuzhiyun #endif
965*4882a593Smuzhiyun 	if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
966*4882a593Smuzhiyun 		int new_value;
967*4882a593Smuzhiyun 		new_value = ((*val) == '1');
968*4882a593Smuzhiyun 		if (new_value != option_server_mode)
969*4882a593Smuzhiyun 			pmu_set_server_mode(new_value);
970*4882a593Smuzhiyun 	}
971*4882a593Smuzhiyun 	return fcount;
972*4882a593Smuzhiyun }
973*4882a593Smuzhiyun 
974*4882a593Smuzhiyun static const struct proc_ops pmu_options_proc_ops = {
975*4882a593Smuzhiyun 	.proc_open	= pmu_options_proc_open,
976*4882a593Smuzhiyun 	.proc_read	= seq_read,
977*4882a593Smuzhiyun 	.proc_lseek	= seq_lseek,
978*4882a593Smuzhiyun 	.proc_release	= single_release,
979*4882a593Smuzhiyun 	.proc_write	= pmu_options_proc_write,
980*4882a593Smuzhiyun };
981*4882a593Smuzhiyun 
982*4882a593Smuzhiyun #ifdef CONFIG_ADB
983*4882a593Smuzhiyun /* Send an ADB command */
pmu_send_request(struct adb_request * req,int sync)984*4882a593Smuzhiyun static int pmu_send_request(struct adb_request *req, int sync)
985*4882a593Smuzhiyun {
986*4882a593Smuzhiyun 	int i, ret;
987*4882a593Smuzhiyun 
988*4882a593Smuzhiyun 	if (pmu_state == uninitialized || !pmu_fully_inited) {
989*4882a593Smuzhiyun 		req->complete = 1;
990*4882a593Smuzhiyun 		return -ENXIO;
991*4882a593Smuzhiyun 	}
992*4882a593Smuzhiyun 
993*4882a593Smuzhiyun 	ret = -EINVAL;
994*4882a593Smuzhiyun 
995*4882a593Smuzhiyun 	switch (req->data[0]) {
996*4882a593Smuzhiyun 	case PMU_PACKET:
997*4882a593Smuzhiyun 		for (i = 0; i < req->nbytes - 1; ++i)
998*4882a593Smuzhiyun 			req->data[i] = req->data[i+1];
999*4882a593Smuzhiyun 		--req->nbytes;
1000*4882a593Smuzhiyun 		if (pmu_data_len[req->data[0]][1] != 0) {
1001*4882a593Smuzhiyun 			req->reply[0] = ADB_RET_OK;
1002*4882a593Smuzhiyun 			req->reply_len = 1;
1003*4882a593Smuzhiyun 		} else
1004*4882a593Smuzhiyun 			req->reply_len = 0;
1005*4882a593Smuzhiyun 		ret = pmu_queue_request(req);
1006*4882a593Smuzhiyun 		break;
1007*4882a593Smuzhiyun 	case CUDA_PACKET:
1008*4882a593Smuzhiyun 		switch (req->data[1]) {
1009*4882a593Smuzhiyun 		case CUDA_GET_TIME:
1010*4882a593Smuzhiyun 			if (req->nbytes != 2)
1011*4882a593Smuzhiyun 				break;
1012*4882a593Smuzhiyun 			req->data[0] = PMU_READ_RTC;
1013*4882a593Smuzhiyun 			req->nbytes = 1;
1014*4882a593Smuzhiyun 			req->reply_len = 3;
1015*4882a593Smuzhiyun 			req->reply[0] = CUDA_PACKET;
1016*4882a593Smuzhiyun 			req->reply[1] = 0;
1017*4882a593Smuzhiyun 			req->reply[2] = CUDA_GET_TIME;
1018*4882a593Smuzhiyun 			ret = pmu_queue_request(req);
1019*4882a593Smuzhiyun 			break;
1020*4882a593Smuzhiyun 		case CUDA_SET_TIME:
1021*4882a593Smuzhiyun 			if (req->nbytes != 6)
1022*4882a593Smuzhiyun 				break;
1023*4882a593Smuzhiyun 			req->data[0] = PMU_SET_RTC;
1024*4882a593Smuzhiyun 			req->nbytes = 5;
1025*4882a593Smuzhiyun 			for (i = 1; i <= 4; ++i)
1026*4882a593Smuzhiyun 				req->data[i] = req->data[i+1];
1027*4882a593Smuzhiyun 			req->reply_len = 3;
1028*4882a593Smuzhiyun 			req->reply[0] = CUDA_PACKET;
1029*4882a593Smuzhiyun 			req->reply[1] = 0;
1030*4882a593Smuzhiyun 			req->reply[2] = CUDA_SET_TIME;
1031*4882a593Smuzhiyun 			ret = pmu_queue_request(req);
1032*4882a593Smuzhiyun 			break;
1033*4882a593Smuzhiyun 		}
1034*4882a593Smuzhiyun 		break;
1035*4882a593Smuzhiyun 	case ADB_PACKET:
1036*4882a593Smuzhiyun 	    	if (!pmu_has_adb)
1037*4882a593Smuzhiyun     			return -ENXIO;
1038*4882a593Smuzhiyun 		for (i = req->nbytes - 1; i > 1; --i)
1039*4882a593Smuzhiyun 			req->data[i+2] = req->data[i];
1040*4882a593Smuzhiyun 		req->data[3] = req->nbytes - 2;
1041*4882a593Smuzhiyun 		req->data[2] = pmu_adb_flags;
1042*4882a593Smuzhiyun 		/*req->data[1] = req->data[1];*/
1043*4882a593Smuzhiyun 		req->data[0] = PMU_ADB_CMD;
1044*4882a593Smuzhiyun 		req->nbytes += 2;
1045*4882a593Smuzhiyun 		req->reply_expected = 1;
1046*4882a593Smuzhiyun 		req->reply_len = 0;
1047*4882a593Smuzhiyun 		ret = pmu_queue_request(req);
1048*4882a593Smuzhiyun 		break;
1049*4882a593Smuzhiyun 	}
1050*4882a593Smuzhiyun 	if (ret) {
1051*4882a593Smuzhiyun 		req->complete = 1;
1052*4882a593Smuzhiyun 		return ret;
1053*4882a593Smuzhiyun 	}
1054*4882a593Smuzhiyun 
1055*4882a593Smuzhiyun 	if (sync)
1056*4882a593Smuzhiyun 		while (!req->complete)
1057*4882a593Smuzhiyun 			pmu_poll();
1058*4882a593Smuzhiyun 
1059*4882a593Smuzhiyun 	return 0;
1060*4882a593Smuzhiyun }
1061*4882a593Smuzhiyun 
1062*4882a593Smuzhiyun /* Enable/disable autopolling */
__pmu_adb_autopoll(int devs)1063*4882a593Smuzhiyun static int __pmu_adb_autopoll(int devs)
1064*4882a593Smuzhiyun {
1065*4882a593Smuzhiyun 	struct adb_request req;
1066*4882a593Smuzhiyun 
1067*4882a593Smuzhiyun 	if (devs) {
1068*4882a593Smuzhiyun 		pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
1069*4882a593Smuzhiyun 			    adb_dev_map >> 8, adb_dev_map);
1070*4882a593Smuzhiyun 		pmu_adb_flags = 2;
1071*4882a593Smuzhiyun 	} else {
1072*4882a593Smuzhiyun 		pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
1073*4882a593Smuzhiyun 		pmu_adb_flags = 0;
1074*4882a593Smuzhiyun 	}
1075*4882a593Smuzhiyun 	while (!req.complete)
1076*4882a593Smuzhiyun 		pmu_poll();
1077*4882a593Smuzhiyun 	return 0;
1078*4882a593Smuzhiyun }
1079*4882a593Smuzhiyun 
pmu_adb_autopoll(int devs)1080*4882a593Smuzhiyun static int pmu_adb_autopoll(int devs)
1081*4882a593Smuzhiyun {
1082*4882a593Smuzhiyun 	if (pmu_state == uninitialized || !pmu_fully_inited || !pmu_has_adb)
1083*4882a593Smuzhiyun 		return -ENXIO;
1084*4882a593Smuzhiyun 
1085*4882a593Smuzhiyun 	adb_dev_map = devs;
1086*4882a593Smuzhiyun 	return __pmu_adb_autopoll(devs);
1087*4882a593Smuzhiyun }
1088*4882a593Smuzhiyun 
1089*4882a593Smuzhiyun /* Reset the ADB bus */
pmu_adb_reset_bus(void)1090*4882a593Smuzhiyun static int pmu_adb_reset_bus(void)
1091*4882a593Smuzhiyun {
1092*4882a593Smuzhiyun 	struct adb_request req;
1093*4882a593Smuzhiyun 	int save_autopoll = adb_dev_map;
1094*4882a593Smuzhiyun 
1095*4882a593Smuzhiyun 	if (pmu_state == uninitialized || !pmu_fully_inited || !pmu_has_adb)
1096*4882a593Smuzhiyun 		return -ENXIO;
1097*4882a593Smuzhiyun 
1098*4882a593Smuzhiyun 	/* anyone got a better idea?? */
1099*4882a593Smuzhiyun 	__pmu_adb_autopoll(0);
1100*4882a593Smuzhiyun 
1101*4882a593Smuzhiyun 	req.nbytes = 4;
1102*4882a593Smuzhiyun 	req.done = NULL;
1103*4882a593Smuzhiyun 	req.data[0] = PMU_ADB_CMD;
1104*4882a593Smuzhiyun 	req.data[1] = ADB_BUSRESET;
1105*4882a593Smuzhiyun 	req.data[2] = 0;
1106*4882a593Smuzhiyun 	req.data[3] = 0;
1107*4882a593Smuzhiyun 	req.data[4] = 0;
1108*4882a593Smuzhiyun 	req.reply_len = 0;
1109*4882a593Smuzhiyun 	req.reply_expected = 1;
1110*4882a593Smuzhiyun 	if (pmu_queue_request(&req) != 0) {
1111*4882a593Smuzhiyun 		printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
1112*4882a593Smuzhiyun 		return -EIO;
1113*4882a593Smuzhiyun 	}
1114*4882a593Smuzhiyun 	pmu_wait_complete(&req);
1115*4882a593Smuzhiyun 
1116*4882a593Smuzhiyun 	if (save_autopoll != 0)
1117*4882a593Smuzhiyun 		__pmu_adb_autopoll(save_autopoll);
1118*4882a593Smuzhiyun 
1119*4882a593Smuzhiyun 	return 0;
1120*4882a593Smuzhiyun }
1121*4882a593Smuzhiyun #endif /* CONFIG_ADB */
1122*4882a593Smuzhiyun 
1123*4882a593Smuzhiyun /* Construct and send a pmu request */
1124*4882a593Smuzhiyun int
pmu_request(struct adb_request * req,void (* done)(struct adb_request *),int nbytes,...)1125*4882a593Smuzhiyun pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
1126*4882a593Smuzhiyun 	    int nbytes, ...)
1127*4882a593Smuzhiyun {
1128*4882a593Smuzhiyun 	va_list list;
1129*4882a593Smuzhiyun 	int i;
1130*4882a593Smuzhiyun 
1131*4882a593Smuzhiyun 	if (pmu_state == uninitialized)
1132*4882a593Smuzhiyun 		return -ENXIO;
1133*4882a593Smuzhiyun 
1134*4882a593Smuzhiyun 	if (nbytes < 0 || nbytes > 32) {
1135*4882a593Smuzhiyun 		printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
1136*4882a593Smuzhiyun 		req->complete = 1;
1137*4882a593Smuzhiyun 		return -EINVAL;
1138*4882a593Smuzhiyun 	}
1139*4882a593Smuzhiyun 	req->nbytes = nbytes;
1140*4882a593Smuzhiyun 	req->done = done;
1141*4882a593Smuzhiyun 	va_start(list, nbytes);
1142*4882a593Smuzhiyun 	for (i = 0; i < nbytes; ++i)
1143*4882a593Smuzhiyun 		req->data[i] = va_arg(list, int);
1144*4882a593Smuzhiyun 	va_end(list);
1145*4882a593Smuzhiyun 	req->reply_len = 0;
1146*4882a593Smuzhiyun 	req->reply_expected = 0;
1147*4882a593Smuzhiyun 	return pmu_queue_request(req);
1148*4882a593Smuzhiyun }
1149*4882a593Smuzhiyun 
1150*4882a593Smuzhiyun int
pmu_queue_request(struct adb_request * req)1151*4882a593Smuzhiyun pmu_queue_request(struct adb_request *req)
1152*4882a593Smuzhiyun {
1153*4882a593Smuzhiyun 	unsigned long flags;
1154*4882a593Smuzhiyun 	int nsend;
1155*4882a593Smuzhiyun 
1156*4882a593Smuzhiyun 	if (pmu_state == uninitialized) {
1157*4882a593Smuzhiyun 		req->complete = 1;
1158*4882a593Smuzhiyun 		return -ENXIO;
1159*4882a593Smuzhiyun 	}
1160*4882a593Smuzhiyun 	if (req->nbytes <= 0) {
1161*4882a593Smuzhiyun 		req->complete = 1;
1162*4882a593Smuzhiyun 		return 0;
1163*4882a593Smuzhiyun 	}
1164*4882a593Smuzhiyun 	nsend = pmu_data_len[req->data[0]][0];
1165*4882a593Smuzhiyun 	if (nsend >= 0 && req->nbytes != nsend + 1) {
1166*4882a593Smuzhiyun 		req->complete = 1;
1167*4882a593Smuzhiyun 		return -EINVAL;
1168*4882a593Smuzhiyun 	}
1169*4882a593Smuzhiyun 
1170*4882a593Smuzhiyun 	req->next = NULL;
1171*4882a593Smuzhiyun 	req->sent = 0;
1172*4882a593Smuzhiyun 	req->complete = 0;
1173*4882a593Smuzhiyun 
1174*4882a593Smuzhiyun 	spin_lock_irqsave(&pmu_lock, flags);
1175*4882a593Smuzhiyun 	if (current_req) {
1176*4882a593Smuzhiyun 		last_req->next = req;
1177*4882a593Smuzhiyun 		last_req = req;
1178*4882a593Smuzhiyun 	} else {
1179*4882a593Smuzhiyun 		current_req = req;
1180*4882a593Smuzhiyun 		last_req = req;
1181*4882a593Smuzhiyun 		if (pmu_state == idle)
1182*4882a593Smuzhiyun 			pmu_start();
1183*4882a593Smuzhiyun 	}
1184*4882a593Smuzhiyun 	spin_unlock_irqrestore(&pmu_lock, flags);
1185*4882a593Smuzhiyun 
1186*4882a593Smuzhiyun 	return 0;
1187*4882a593Smuzhiyun }
1188*4882a593Smuzhiyun 
1189*4882a593Smuzhiyun static inline void
wait_for_ack(void)1190*4882a593Smuzhiyun wait_for_ack(void)
1191*4882a593Smuzhiyun {
1192*4882a593Smuzhiyun 	/* Sightly increased the delay, I had one occurrence of the message
1193*4882a593Smuzhiyun 	 * reported
1194*4882a593Smuzhiyun 	 */
1195*4882a593Smuzhiyun 	int timeout = 4000;
1196*4882a593Smuzhiyun 	while ((in_8(&via2[B]) & TACK) == 0) {
1197*4882a593Smuzhiyun 		if (--timeout < 0) {
1198*4882a593Smuzhiyun 			printk(KERN_ERR "PMU not responding (!ack)\n");
1199*4882a593Smuzhiyun 			return;
1200*4882a593Smuzhiyun 		}
1201*4882a593Smuzhiyun 		udelay(10);
1202*4882a593Smuzhiyun 	}
1203*4882a593Smuzhiyun }
1204*4882a593Smuzhiyun 
1205*4882a593Smuzhiyun /* New PMU seems to be very sensitive to those timings, so we make sure
1206*4882a593Smuzhiyun  * PCI is flushed immediately */
1207*4882a593Smuzhiyun static inline void
send_byte(int x)1208*4882a593Smuzhiyun send_byte(int x)
1209*4882a593Smuzhiyun {
1210*4882a593Smuzhiyun 	out_8(&via1[ACR], in_8(&via1[ACR]) | SR_OUT | SR_EXT);
1211*4882a593Smuzhiyun 	out_8(&via1[SR], x);
1212*4882a593Smuzhiyun 	out_8(&via2[B], in_8(&via2[B]) & ~TREQ);	/* assert TREQ */
1213*4882a593Smuzhiyun 	(void)in_8(&via2[B]);
1214*4882a593Smuzhiyun }
1215*4882a593Smuzhiyun 
1216*4882a593Smuzhiyun static inline void
recv_byte(void)1217*4882a593Smuzhiyun recv_byte(void)
1218*4882a593Smuzhiyun {
1219*4882a593Smuzhiyun 	out_8(&via1[ACR], (in_8(&via1[ACR]) & ~SR_OUT) | SR_EXT);
1220*4882a593Smuzhiyun 	in_8(&via1[SR]);		/* resets SR */
1221*4882a593Smuzhiyun 	out_8(&via2[B], in_8(&via2[B]) & ~TREQ);
1222*4882a593Smuzhiyun 	(void)in_8(&via2[B]);
1223*4882a593Smuzhiyun }
1224*4882a593Smuzhiyun 
1225*4882a593Smuzhiyun static inline void
pmu_done(struct adb_request * req)1226*4882a593Smuzhiyun pmu_done(struct adb_request *req)
1227*4882a593Smuzhiyun {
1228*4882a593Smuzhiyun 	void (*done)(struct adb_request *) = req->done;
1229*4882a593Smuzhiyun 	mb();
1230*4882a593Smuzhiyun 	req->complete = 1;
1231*4882a593Smuzhiyun     	/* Here, we assume that if the request has a done member, the
1232*4882a593Smuzhiyun     	 * struct request will survive to setting req->complete to 1
1233*4882a593Smuzhiyun     	 */
1234*4882a593Smuzhiyun 	if (done)
1235*4882a593Smuzhiyun 		(*done)(req);
1236*4882a593Smuzhiyun }
1237*4882a593Smuzhiyun 
1238*4882a593Smuzhiyun static void
pmu_start(void)1239*4882a593Smuzhiyun pmu_start(void)
1240*4882a593Smuzhiyun {
1241*4882a593Smuzhiyun 	struct adb_request *req;
1242*4882a593Smuzhiyun 
1243*4882a593Smuzhiyun 	/* assert pmu_state == idle */
1244*4882a593Smuzhiyun 	/* get the packet to send */
1245*4882a593Smuzhiyun 	req = current_req;
1246*4882a593Smuzhiyun 	if (!req || pmu_state != idle
1247*4882a593Smuzhiyun 	    || (/*req->reply_expected && */req_awaiting_reply))
1248*4882a593Smuzhiyun 		return;
1249*4882a593Smuzhiyun 
1250*4882a593Smuzhiyun 	pmu_state = sending;
1251*4882a593Smuzhiyun 	data_index = 1;
1252*4882a593Smuzhiyun 	data_len = pmu_data_len[req->data[0]][0];
1253*4882a593Smuzhiyun 
1254*4882a593Smuzhiyun 	/* Sounds safer to make sure ACK is high before writing. This helped
1255*4882a593Smuzhiyun 	 * kill a problem with ADB and some iBooks
1256*4882a593Smuzhiyun 	 */
1257*4882a593Smuzhiyun 	wait_for_ack();
1258*4882a593Smuzhiyun 	/* set the shift register to shift out and send a byte */
1259*4882a593Smuzhiyun 	send_byte(req->data[0]);
1260*4882a593Smuzhiyun }
1261*4882a593Smuzhiyun 
1262*4882a593Smuzhiyun void
pmu_poll(void)1263*4882a593Smuzhiyun pmu_poll(void)
1264*4882a593Smuzhiyun {
1265*4882a593Smuzhiyun 	if (pmu_state == uninitialized)
1266*4882a593Smuzhiyun 		return;
1267*4882a593Smuzhiyun 	if (disable_poll)
1268*4882a593Smuzhiyun 		return;
1269*4882a593Smuzhiyun 	via_pmu_interrupt(0, NULL);
1270*4882a593Smuzhiyun }
1271*4882a593Smuzhiyun 
1272*4882a593Smuzhiyun void
pmu_poll_adb(void)1273*4882a593Smuzhiyun pmu_poll_adb(void)
1274*4882a593Smuzhiyun {
1275*4882a593Smuzhiyun 	if (pmu_state == uninitialized)
1276*4882a593Smuzhiyun 		return;
1277*4882a593Smuzhiyun 	if (disable_poll)
1278*4882a593Smuzhiyun 		return;
1279*4882a593Smuzhiyun 	/* Kicks ADB read when PMU is suspended */
1280*4882a593Smuzhiyun 	adb_int_pending = 1;
1281*4882a593Smuzhiyun 	do {
1282*4882a593Smuzhiyun 		via_pmu_interrupt(0, NULL);
1283*4882a593Smuzhiyun 	} while (pmu_suspended && (adb_int_pending || pmu_state != idle
1284*4882a593Smuzhiyun 		|| req_awaiting_reply));
1285*4882a593Smuzhiyun }
1286*4882a593Smuzhiyun 
1287*4882a593Smuzhiyun void
pmu_wait_complete(struct adb_request * req)1288*4882a593Smuzhiyun pmu_wait_complete(struct adb_request *req)
1289*4882a593Smuzhiyun {
1290*4882a593Smuzhiyun 	if (pmu_state == uninitialized)
1291*4882a593Smuzhiyun 		return;
1292*4882a593Smuzhiyun 	while((pmu_state != idle && pmu_state != locked) || !req->complete)
1293*4882a593Smuzhiyun 		via_pmu_interrupt(0, NULL);
1294*4882a593Smuzhiyun }
1295*4882a593Smuzhiyun 
1296*4882a593Smuzhiyun /* This function loops until the PMU is idle and prevents it from
1297*4882a593Smuzhiyun  * anwsering to ADB interrupts. pmu_request can still be called.
1298*4882a593Smuzhiyun  * This is done to avoid spurrious shutdowns when we know we'll have
1299*4882a593Smuzhiyun  * interrupts switched off for a long time
1300*4882a593Smuzhiyun  */
1301*4882a593Smuzhiyun void
pmu_suspend(void)1302*4882a593Smuzhiyun pmu_suspend(void)
1303*4882a593Smuzhiyun {
1304*4882a593Smuzhiyun 	unsigned long flags;
1305*4882a593Smuzhiyun 
1306*4882a593Smuzhiyun 	if (pmu_state == uninitialized)
1307*4882a593Smuzhiyun 		return;
1308*4882a593Smuzhiyun 
1309*4882a593Smuzhiyun 	spin_lock_irqsave(&pmu_lock, flags);
1310*4882a593Smuzhiyun 	pmu_suspended++;
1311*4882a593Smuzhiyun 	if (pmu_suspended > 1) {
1312*4882a593Smuzhiyun 		spin_unlock_irqrestore(&pmu_lock, flags);
1313*4882a593Smuzhiyun 		return;
1314*4882a593Smuzhiyun 	}
1315*4882a593Smuzhiyun 
1316*4882a593Smuzhiyun 	do {
1317*4882a593Smuzhiyun 		spin_unlock_irqrestore(&pmu_lock, flags);
1318*4882a593Smuzhiyun 		if (req_awaiting_reply)
1319*4882a593Smuzhiyun 			adb_int_pending = 1;
1320*4882a593Smuzhiyun 		via_pmu_interrupt(0, NULL);
1321*4882a593Smuzhiyun 		spin_lock_irqsave(&pmu_lock, flags);
1322*4882a593Smuzhiyun 		if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
1323*4882a593Smuzhiyun 			if (gpio_irq >= 0)
1324*4882a593Smuzhiyun 				disable_irq_nosync(gpio_irq);
1325*4882a593Smuzhiyun 			out_8(&via1[IER], CB1_INT | IER_CLR);
1326*4882a593Smuzhiyun 			spin_unlock_irqrestore(&pmu_lock, flags);
1327*4882a593Smuzhiyun 			break;
1328*4882a593Smuzhiyun 		}
1329*4882a593Smuzhiyun 	} while (1);
1330*4882a593Smuzhiyun }
1331*4882a593Smuzhiyun 
1332*4882a593Smuzhiyun void
pmu_resume(void)1333*4882a593Smuzhiyun pmu_resume(void)
1334*4882a593Smuzhiyun {
1335*4882a593Smuzhiyun 	unsigned long flags;
1336*4882a593Smuzhiyun 
1337*4882a593Smuzhiyun 	if (pmu_state == uninitialized || pmu_suspended < 1)
1338*4882a593Smuzhiyun 		return;
1339*4882a593Smuzhiyun 
1340*4882a593Smuzhiyun 	spin_lock_irqsave(&pmu_lock, flags);
1341*4882a593Smuzhiyun 	pmu_suspended--;
1342*4882a593Smuzhiyun 	if (pmu_suspended > 0) {
1343*4882a593Smuzhiyun 		spin_unlock_irqrestore(&pmu_lock, flags);
1344*4882a593Smuzhiyun 		return;
1345*4882a593Smuzhiyun 	}
1346*4882a593Smuzhiyun 	adb_int_pending = 1;
1347*4882a593Smuzhiyun 	if (gpio_irq >= 0)
1348*4882a593Smuzhiyun 		enable_irq(gpio_irq);
1349*4882a593Smuzhiyun 	out_8(&via1[IER], CB1_INT | IER_SET);
1350*4882a593Smuzhiyun 	spin_unlock_irqrestore(&pmu_lock, flags);
1351*4882a593Smuzhiyun 	pmu_poll();
1352*4882a593Smuzhiyun }
1353*4882a593Smuzhiyun 
1354*4882a593Smuzhiyun /* Interrupt data could be the result data from an ADB cmd */
1355*4882a593Smuzhiyun static void
pmu_handle_data(unsigned char * data,int len)1356*4882a593Smuzhiyun pmu_handle_data(unsigned char *data, int len)
1357*4882a593Smuzhiyun {
1358*4882a593Smuzhiyun 	unsigned char ints;
1359*4882a593Smuzhiyun 	int idx;
1360*4882a593Smuzhiyun 	int i = 0;
1361*4882a593Smuzhiyun 
1362*4882a593Smuzhiyun 	asleep = 0;
1363*4882a593Smuzhiyun 	if (drop_interrupts || len < 1) {
1364*4882a593Smuzhiyun 		adb_int_pending = 0;
1365*4882a593Smuzhiyun 		pmu_irq_stats[8]++;
1366*4882a593Smuzhiyun 		return;
1367*4882a593Smuzhiyun 	}
1368*4882a593Smuzhiyun 
1369*4882a593Smuzhiyun 	/* Get PMU interrupt mask */
1370*4882a593Smuzhiyun 	ints = data[0];
1371*4882a593Smuzhiyun 
1372*4882a593Smuzhiyun 	/* Record zero interrupts for stats */
1373*4882a593Smuzhiyun 	if (ints == 0)
1374*4882a593Smuzhiyun 		pmu_irq_stats[9]++;
1375*4882a593Smuzhiyun 
1376*4882a593Smuzhiyun 	/* Hack to deal with ADB autopoll flag */
1377*4882a593Smuzhiyun 	if (ints & PMU_INT_ADB)
1378*4882a593Smuzhiyun 		ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
1379*4882a593Smuzhiyun 
1380*4882a593Smuzhiyun next:
1381*4882a593Smuzhiyun 	if (ints == 0) {
1382*4882a593Smuzhiyun 		if (i > pmu_irq_stats[10])
1383*4882a593Smuzhiyun 			pmu_irq_stats[10] = i;
1384*4882a593Smuzhiyun 		return;
1385*4882a593Smuzhiyun 	}
1386*4882a593Smuzhiyun 	i++;
1387*4882a593Smuzhiyun 
1388*4882a593Smuzhiyun 	idx = ffs(ints) - 1;
1389*4882a593Smuzhiyun 	ints &= ~BIT(idx);
1390*4882a593Smuzhiyun 
1391*4882a593Smuzhiyun 	pmu_irq_stats[idx]++;
1392*4882a593Smuzhiyun 
1393*4882a593Smuzhiyun 	/* Note: for some reason, we get an interrupt with len=1,
1394*4882a593Smuzhiyun 	 * data[0]==0 after each normal ADB interrupt, at least
1395*4882a593Smuzhiyun 	 * on the Pismo. Still investigating...  --BenH
1396*4882a593Smuzhiyun 	 */
1397*4882a593Smuzhiyun 	switch (BIT(idx)) {
1398*4882a593Smuzhiyun 	case PMU_INT_ADB:
1399*4882a593Smuzhiyun 		if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
1400*4882a593Smuzhiyun 			struct adb_request *req = req_awaiting_reply;
1401*4882a593Smuzhiyun 			if (!req) {
1402*4882a593Smuzhiyun 				printk(KERN_ERR "PMU: extra ADB reply\n");
1403*4882a593Smuzhiyun 				return;
1404*4882a593Smuzhiyun 			}
1405*4882a593Smuzhiyun 			req_awaiting_reply = NULL;
1406*4882a593Smuzhiyun 			if (len <= 2)
1407*4882a593Smuzhiyun 				req->reply_len = 0;
1408*4882a593Smuzhiyun 			else {
1409*4882a593Smuzhiyun 				memcpy(req->reply, data + 1, len - 1);
1410*4882a593Smuzhiyun 				req->reply_len = len - 1;
1411*4882a593Smuzhiyun 			}
1412*4882a593Smuzhiyun 			pmu_done(req);
1413*4882a593Smuzhiyun 		} else {
1414*4882a593Smuzhiyun #ifdef CONFIG_XMON
1415*4882a593Smuzhiyun 			if (len == 4 && data[1] == 0x2c) {
1416*4882a593Smuzhiyun 				extern int xmon_wants_key, xmon_adb_keycode;
1417*4882a593Smuzhiyun 				if (xmon_wants_key) {
1418*4882a593Smuzhiyun 					xmon_adb_keycode = data[2];
1419*4882a593Smuzhiyun 					return;
1420*4882a593Smuzhiyun 				}
1421*4882a593Smuzhiyun 			}
1422*4882a593Smuzhiyun #endif /* CONFIG_XMON */
1423*4882a593Smuzhiyun #ifdef CONFIG_ADB
1424*4882a593Smuzhiyun 			/*
1425*4882a593Smuzhiyun 			 * XXX On the [23]400 the PMU gives us an up
1426*4882a593Smuzhiyun 			 * event for keycodes 0x74 or 0x75 when the PC
1427*4882a593Smuzhiyun 			 * card eject buttons are released, so we
1428*4882a593Smuzhiyun 			 * ignore those events.
1429*4882a593Smuzhiyun 			 */
1430*4882a593Smuzhiyun 			if (!(pmu_kind == PMU_OHARE_BASED && len == 4
1431*4882a593Smuzhiyun 			      && data[1] == 0x2c && data[3] == 0xff
1432*4882a593Smuzhiyun 			      && (data[2] & ~1) == 0xf4))
1433*4882a593Smuzhiyun 				adb_input(data+1, len-1, 1);
1434*4882a593Smuzhiyun #endif /* CONFIG_ADB */
1435*4882a593Smuzhiyun 		}
1436*4882a593Smuzhiyun 		break;
1437*4882a593Smuzhiyun 
1438*4882a593Smuzhiyun 	/* Sound/brightness button pressed */
1439*4882a593Smuzhiyun 	case PMU_INT_SNDBRT:
1440*4882a593Smuzhiyun #ifdef CONFIG_PMAC_BACKLIGHT
1441*4882a593Smuzhiyun 		if (len == 3)
1442*4882a593Smuzhiyun 			pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4);
1443*4882a593Smuzhiyun #endif
1444*4882a593Smuzhiyun 		break;
1445*4882a593Smuzhiyun 
1446*4882a593Smuzhiyun 	/* Tick interrupt */
1447*4882a593Smuzhiyun 	case PMU_INT_TICK:
1448*4882a593Smuzhiyun 		/* Environment or tick interrupt, query batteries */
1449*4882a593Smuzhiyun 		if (pmu_battery_count) {
1450*4882a593Smuzhiyun 			if ((--query_batt_timer) == 0) {
1451*4882a593Smuzhiyun 				query_battery_state();
1452*4882a593Smuzhiyun 				query_batt_timer = BATTERY_POLLING_COUNT;
1453*4882a593Smuzhiyun 			}
1454*4882a593Smuzhiyun 		}
1455*4882a593Smuzhiyun 		break;
1456*4882a593Smuzhiyun 
1457*4882a593Smuzhiyun 	case PMU_INT_ENVIRONMENT:
1458*4882a593Smuzhiyun 		if (pmu_battery_count)
1459*4882a593Smuzhiyun 			query_battery_state();
1460*4882a593Smuzhiyun 		pmu_pass_intr(data, len);
1461*4882a593Smuzhiyun 		/* len == 6 is probably a bad check. But how do I
1462*4882a593Smuzhiyun 		 * know what PMU versions send what events here? */
1463*4882a593Smuzhiyun 		if (IS_ENABLED(CONFIG_ADB_PMU_EVENT) && len == 6) {
1464*4882a593Smuzhiyun 			via_pmu_event(PMU_EVT_POWER, !!(data[1]&8));
1465*4882a593Smuzhiyun 			via_pmu_event(PMU_EVT_LID, data[1]&1);
1466*4882a593Smuzhiyun 		}
1467*4882a593Smuzhiyun 		break;
1468*4882a593Smuzhiyun 
1469*4882a593Smuzhiyun 	default:
1470*4882a593Smuzhiyun 	       pmu_pass_intr(data, len);
1471*4882a593Smuzhiyun 	}
1472*4882a593Smuzhiyun 	goto next;
1473*4882a593Smuzhiyun }
1474*4882a593Smuzhiyun 
1475*4882a593Smuzhiyun static struct adb_request*
pmu_sr_intr(void)1476*4882a593Smuzhiyun pmu_sr_intr(void)
1477*4882a593Smuzhiyun {
1478*4882a593Smuzhiyun 	struct adb_request *req;
1479*4882a593Smuzhiyun 	int bite = 0;
1480*4882a593Smuzhiyun 
1481*4882a593Smuzhiyun 	if (in_8(&via2[B]) & TREQ) {
1482*4882a593Smuzhiyun 		printk(KERN_ERR "PMU: spurious SR intr (%x)\n", in_8(&via2[B]));
1483*4882a593Smuzhiyun 		return NULL;
1484*4882a593Smuzhiyun 	}
1485*4882a593Smuzhiyun 	/* The ack may not yet be low when we get the interrupt */
1486*4882a593Smuzhiyun 	while ((in_8(&via2[B]) & TACK) != 0)
1487*4882a593Smuzhiyun 			;
1488*4882a593Smuzhiyun 
1489*4882a593Smuzhiyun 	/* if reading grab the byte, and reset the interrupt */
1490*4882a593Smuzhiyun 	if (pmu_state == reading || pmu_state == reading_intr)
1491*4882a593Smuzhiyun 		bite = in_8(&via1[SR]);
1492*4882a593Smuzhiyun 
1493*4882a593Smuzhiyun 	/* reset TREQ and wait for TACK to go high */
1494*4882a593Smuzhiyun 	out_8(&via2[B], in_8(&via2[B]) | TREQ);
1495*4882a593Smuzhiyun 	wait_for_ack();
1496*4882a593Smuzhiyun 
1497*4882a593Smuzhiyun 	switch (pmu_state) {
1498*4882a593Smuzhiyun 	case sending:
1499*4882a593Smuzhiyun 		req = current_req;
1500*4882a593Smuzhiyun 		if (data_len < 0) {
1501*4882a593Smuzhiyun 			data_len = req->nbytes - 1;
1502*4882a593Smuzhiyun 			send_byte(data_len);
1503*4882a593Smuzhiyun 			break;
1504*4882a593Smuzhiyun 		}
1505*4882a593Smuzhiyun 		if (data_index <= data_len) {
1506*4882a593Smuzhiyun 			send_byte(req->data[data_index++]);
1507*4882a593Smuzhiyun 			break;
1508*4882a593Smuzhiyun 		}
1509*4882a593Smuzhiyun 		req->sent = 1;
1510*4882a593Smuzhiyun 		data_len = pmu_data_len[req->data[0]][1];
1511*4882a593Smuzhiyun 		if (data_len == 0) {
1512*4882a593Smuzhiyun 			pmu_state = idle;
1513*4882a593Smuzhiyun 			current_req = req->next;
1514*4882a593Smuzhiyun 			if (req->reply_expected)
1515*4882a593Smuzhiyun 				req_awaiting_reply = req;
1516*4882a593Smuzhiyun 			else
1517*4882a593Smuzhiyun 				return req;
1518*4882a593Smuzhiyun 		} else {
1519*4882a593Smuzhiyun 			pmu_state = reading;
1520*4882a593Smuzhiyun 			data_index = 0;
1521*4882a593Smuzhiyun 			reply_ptr = req->reply + req->reply_len;
1522*4882a593Smuzhiyun 			recv_byte();
1523*4882a593Smuzhiyun 		}
1524*4882a593Smuzhiyun 		break;
1525*4882a593Smuzhiyun 
1526*4882a593Smuzhiyun 	case intack:
1527*4882a593Smuzhiyun 		data_index = 0;
1528*4882a593Smuzhiyun 		data_len = -1;
1529*4882a593Smuzhiyun 		pmu_state = reading_intr;
1530*4882a593Smuzhiyun 		reply_ptr = interrupt_data[int_data_last];
1531*4882a593Smuzhiyun 		recv_byte();
1532*4882a593Smuzhiyun 		if (gpio_irq >= 0 && !gpio_irq_enabled) {
1533*4882a593Smuzhiyun 			enable_irq(gpio_irq);
1534*4882a593Smuzhiyun 			gpio_irq_enabled = 1;
1535*4882a593Smuzhiyun 		}
1536*4882a593Smuzhiyun 		break;
1537*4882a593Smuzhiyun 
1538*4882a593Smuzhiyun 	case reading:
1539*4882a593Smuzhiyun 	case reading_intr:
1540*4882a593Smuzhiyun 		if (data_len == -1) {
1541*4882a593Smuzhiyun 			data_len = bite;
1542*4882a593Smuzhiyun 			if (bite > 32)
1543*4882a593Smuzhiyun 				printk(KERN_ERR "PMU: bad reply len %d\n", bite);
1544*4882a593Smuzhiyun 		} else if (data_index < 32) {
1545*4882a593Smuzhiyun 			reply_ptr[data_index++] = bite;
1546*4882a593Smuzhiyun 		}
1547*4882a593Smuzhiyun 		if (data_index < data_len) {
1548*4882a593Smuzhiyun 			recv_byte();
1549*4882a593Smuzhiyun 			break;
1550*4882a593Smuzhiyun 		}
1551*4882a593Smuzhiyun 
1552*4882a593Smuzhiyun 		if (pmu_state == reading_intr) {
1553*4882a593Smuzhiyun 			pmu_state = idle;
1554*4882a593Smuzhiyun 			int_data_state[int_data_last] = int_data_ready;
1555*4882a593Smuzhiyun 			interrupt_data_len[int_data_last] = data_len;
1556*4882a593Smuzhiyun 		} else {
1557*4882a593Smuzhiyun 			req = current_req;
1558*4882a593Smuzhiyun 			/*
1559*4882a593Smuzhiyun 			 * For PMU sleep and freq change requests, we lock the
1560*4882a593Smuzhiyun 			 * PMU until it's explicitly unlocked. This avoids any
1561*4882a593Smuzhiyun 			 * spurrious event polling getting in
1562*4882a593Smuzhiyun 			 */
1563*4882a593Smuzhiyun 			current_req = req->next;
1564*4882a593Smuzhiyun 			req->reply_len += data_index;
1565*4882a593Smuzhiyun 			if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
1566*4882a593Smuzhiyun 				pmu_state = locked;
1567*4882a593Smuzhiyun 			else
1568*4882a593Smuzhiyun 				pmu_state = idle;
1569*4882a593Smuzhiyun 			return req;
1570*4882a593Smuzhiyun 		}
1571*4882a593Smuzhiyun 		break;
1572*4882a593Smuzhiyun 
1573*4882a593Smuzhiyun 	default:
1574*4882a593Smuzhiyun 		printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
1575*4882a593Smuzhiyun 		       pmu_state);
1576*4882a593Smuzhiyun 	}
1577*4882a593Smuzhiyun 	return NULL;
1578*4882a593Smuzhiyun }
1579*4882a593Smuzhiyun 
1580*4882a593Smuzhiyun static irqreturn_t
via_pmu_interrupt(int irq,void * arg)1581*4882a593Smuzhiyun via_pmu_interrupt(int irq, void *arg)
1582*4882a593Smuzhiyun {
1583*4882a593Smuzhiyun 	unsigned long flags;
1584*4882a593Smuzhiyun 	int intr;
1585*4882a593Smuzhiyun 	int nloop = 0;
1586*4882a593Smuzhiyun 	int int_data = -1;
1587*4882a593Smuzhiyun 	struct adb_request *req = NULL;
1588*4882a593Smuzhiyun 	int handled = 0;
1589*4882a593Smuzhiyun 
1590*4882a593Smuzhiyun 	/* This is a bit brutal, we can probably do better */
1591*4882a593Smuzhiyun 	spin_lock_irqsave(&pmu_lock, flags);
1592*4882a593Smuzhiyun 	++disable_poll;
1593*4882a593Smuzhiyun 
1594*4882a593Smuzhiyun 	for (;;) {
1595*4882a593Smuzhiyun 		/* On 68k Macs, VIA interrupts are dispatched individually.
1596*4882a593Smuzhiyun 		 * Unless we are polling, the relevant IRQ flag has already
1597*4882a593Smuzhiyun 		 * been cleared.
1598*4882a593Smuzhiyun 		 */
1599*4882a593Smuzhiyun 		intr = 0;
1600*4882a593Smuzhiyun 		if (IS_ENABLED(CONFIG_PPC_PMAC) || !irq) {
1601*4882a593Smuzhiyun 			intr = in_8(&via1[IFR]) & (SR_INT | CB1_INT);
1602*4882a593Smuzhiyun 			out_8(&via1[IFR], intr);
1603*4882a593Smuzhiyun 		}
1604*4882a593Smuzhiyun #ifndef CONFIG_PPC_PMAC
1605*4882a593Smuzhiyun 		switch (irq) {
1606*4882a593Smuzhiyun 		case IRQ_MAC_ADB_CL:
1607*4882a593Smuzhiyun 			intr = CB1_INT;
1608*4882a593Smuzhiyun 			break;
1609*4882a593Smuzhiyun 		case IRQ_MAC_ADB_SR:
1610*4882a593Smuzhiyun 			intr = SR_INT;
1611*4882a593Smuzhiyun 			break;
1612*4882a593Smuzhiyun 		}
1613*4882a593Smuzhiyun #endif
1614*4882a593Smuzhiyun 		if (intr == 0)
1615*4882a593Smuzhiyun 			break;
1616*4882a593Smuzhiyun 		handled = 1;
1617*4882a593Smuzhiyun 		if (++nloop > 1000) {
1618*4882a593Smuzhiyun 			printk(KERN_DEBUG "PMU: stuck in intr loop, "
1619*4882a593Smuzhiyun 			       "intr=%x, ier=%x pmu_state=%d\n",
1620*4882a593Smuzhiyun 			       intr, in_8(&via1[IER]), pmu_state);
1621*4882a593Smuzhiyun 			break;
1622*4882a593Smuzhiyun 		}
1623*4882a593Smuzhiyun 		if (intr & CB1_INT) {
1624*4882a593Smuzhiyun 			adb_int_pending = 1;
1625*4882a593Smuzhiyun 			pmu_irq_stats[11]++;
1626*4882a593Smuzhiyun 		}
1627*4882a593Smuzhiyun 		if (intr & SR_INT) {
1628*4882a593Smuzhiyun 			req = pmu_sr_intr();
1629*4882a593Smuzhiyun 			if (req)
1630*4882a593Smuzhiyun 				break;
1631*4882a593Smuzhiyun 		}
1632*4882a593Smuzhiyun #ifndef CONFIG_PPC_PMAC
1633*4882a593Smuzhiyun 		break;
1634*4882a593Smuzhiyun #endif
1635*4882a593Smuzhiyun 	}
1636*4882a593Smuzhiyun 
1637*4882a593Smuzhiyun recheck:
1638*4882a593Smuzhiyun 	if (pmu_state == idle) {
1639*4882a593Smuzhiyun 		if (adb_int_pending) {
1640*4882a593Smuzhiyun 			if (int_data_state[0] == int_data_empty)
1641*4882a593Smuzhiyun 				int_data_last = 0;
1642*4882a593Smuzhiyun 			else if (int_data_state[1] == int_data_empty)
1643*4882a593Smuzhiyun 				int_data_last = 1;
1644*4882a593Smuzhiyun 			else
1645*4882a593Smuzhiyun 				goto no_free_slot;
1646*4882a593Smuzhiyun 			pmu_state = intack;
1647*4882a593Smuzhiyun 			int_data_state[int_data_last] = int_data_fill;
1648*4882a593Smuzhiyun 			/* Sounds safer to make sure ACK is high before writing.
1649*4882a593Smuzhiyun 			 * This helped kill a problem with ADB and some iBooks
1650*4882a593Smuzhiyun 			 */
1651*4882a593Smuzhiyun 			wait_for_ack();
1652*4882a593Smuzhiyun 			send_byte(PMU_INT_ACK);
1653*4882a593Smuzhiyun 			adb_int_pending = 0;
1654*4882a593Smuzhiyun 		} else if (current_req)
1655*4882a593Smuzhiyun 			pmu_start();
1656*4882a593Smuzhiyun 	}
1657*4882a593Smuzhiyun no_free_slot:
1658*4882a593Smuzhiyun 	/* Mark the oldest buffer for flushing */
1659*4882a593Smuzhiyun 	if (int_data_state[!int_data_last] == int_data_ready) {
1660*4882a593Smuzhiyun 		int_data_state[!int_data_last] = int_data_flush;
1661*4882a593Smuzhiyun 		int_data = !int_data_last;
1662*4882a593Smuzhiyun 	} else if (int_data_state[int_data_last] == int_data_ready) {
1663*4882a593Smuzhiyun 		int_data_state[int_data_last] = int_data_flush;
1664*4882a593Smuzhiyun 		int_data = int_data_last;
1665*4882a593Smuzhiyun 	}
1666*4882a593Smuzhiyun 	--disable_poll;
1667*4882a593Smuzhiyun 	spin_unlock_irqrestore(&pmu_lock, flags);
1668*4882a593Smuzhiyun 
1669*4882a593Smuzhiyun 	/* Deal with completed PMU requests outside of the lock */
1670*4882a593Smuzhiyun 	if (req) {
1671*4882a593Smuzhiyun 		pmu_done(req);
1672*4882a593Smuzhiyun 		req = NULL;
1673*4882a593Smuzhiyun 	}
1674*4882a593Smuzhiyun 
1675*4882a593Smuzhiyun 	/* Deal with interrupt datas outside of the lock */
1676*4882a593Smuzhiyun 	if (int_data >= 0) {
1677*4882a593Smuzhiyun 		pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]);
1678*4882a593Smuzhiyun 		spin_lock_irqsave(&pmu_lock, flags);
1679*4882a593Smuzhiyun 		++disable_poll;
1680*4882a593Smuzhiyun 		int_data_state[int_data] = int_data_empty;
1681*4882a593Smuzhiyun 		int_data = -1;
1682*4882a593Smuzhiyun 		goto recheck;
1683*4882a593Smuzhiyun 	}
1684*4882a593Smuzhiyun 
1685*4882a593Smuzhiyun 	return IRQ_RETVAL(handled);
1686*4882a593Smuzhiyun }
1687*4882a593Smuzhiyun 
1688*4882a593Smuzhiyun void
pmu_unlock(void)1689*4882a593Smuzhiyun pmu_unlock(void)
1690*4882a593Smuzhiyun {
1691*4882a593Smuzhiyun 	unsigned long flags;
1692*4882a593Smuzhiyun 
1693*4882a593Smuzhiyun 	spin_lock_irqsave(&pmu_lock, flags);
1694*4882a593Smuzhiyun 	if (pmu_state == locked)
1695*4882a593Smuzhiyun 		pmu_state = idle;
1696*4882a593Smuzhiyun 	adb_int_pending = 1;
1697*4882a593Smuzhiyun 	spin_unlock_irqrestore(&pmu_lock, flags);
1698*4882a593Smuzhiyun }
1699*4882a593Smuzhiyun 
1700*4882a593Smuzhiyun 
1701*4882a593Smuzhiyun static __maybe_unused irqreturn_t
gpio1_interrupt(int irq,void * arg)1702*4882a593Smuzhiyun gpio1_interrupt(int irq, void *arg)
1703*4882a593Smuzhiyun {
1704*4882a593Smuzhiyun 	unsigned long flags;
1705*4882a593Smuzhiyun 
1706*4882a593Smuzhiyun 	if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
1707*4882a593Smuzhiyun 		spin_lock_irqsave(&pmu_lock, flags);
1708*4882a593Smuzhiyun 		if (gpio_irq_enabled > 0) {
1709*4882a593Smuzhiyun 			disable_irq_nosync(gpio_irq);
1710*4882a593Smuzhiyun 			gpio_irq_enabled = 0;
1711*4882a593Smuzhiyun 		}
1712*4882a593Smuzhiyun 		pmu_irq_stats[12]++;
1713*4882a593Smuzhiyun 		adb_int_pending = 1;
1714*4882a593Smuzhiyun 		spin_unlock_irqrestore(&pmu_lock, flags);
1715*4882a593Smuzhiyun 		via_pmu_interrupt(0, NULL);
1716*4882a593Smuzhiyun 		return IRQ_HANDLED;
1717*4882a593Smuzhiyun 	}
1718*4882a593Smuzhiyun 	return IRQ_NONE;
1719*4882a593Smuzhiyun }
1720*4882a593Smuzhiyun 
1721*4882a593Smuzhiyun void
pmu_enable_irled(int on)1722*4882a593Smuzhiyun pmu_enable_irled(int on)
1723*4882a593Smuzhiyun {
1724*4882a593Smuzhiyun 	struct adb_request req;
1725*4882a593Smuzhiyun 
1726*4882a593Smuzhiyun 	if (pmu_state == uninitialized)
1727*4882a593Smuzhiyun 		return ;
1728*4882a593Smuzhiyun 	if (pmu_kind == PMU_KEYLARGO_BASED)
1729*4882a593Smuzhiyun 		return ;
1730*4882a593Smuzhiyun 
1731*4882a593Smuzhiyun 	pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
1732*4882a593Smuzhiyun 	    (on ? PMU_POW_ON : PMU_POW_OFF));
1733*4882a593Smuzhiyun 	pmu_wait_complete(&req);
1734*4882a593Smuzhiyun }
1735*4882a593Smuzhiyun 
1736*4882a593Smuzhiyun /* Offset between Unix time (1970-based) and Mac time (1904-based) */
1737*4882a593Smuzhiyun #define RTC_OFFSET	2082844800
1738*4882a593Smuzhiyun 
pmu_get_time(void)1739*4882a593Smuzhiyun time64_t pmu_get_time(void)
1740*4882a593Smuzhiyun {
1741*4882a593Smuzhiyun 	struct adb_request req;
1742*4882a593Smuzhiyun 	u32 now;
1743*4882a593Smuzhiyun 
1744*4882a593Smuzhiyun 	if (pmu_request(&req, NULL, 1, PMU_READ_RTC) < 0)
1745*4882a593Smuzhiyun 		return 0;
1746*4882a593Smuzhiyun 	pmu_wait_complete(&req);
1747*4882a593Smuzhiyun 	if (req.reply_len != 4)
1748*4882a593Smuzhiyun 		pr_err("%s: got %d byte reply\n", __func__, req.reply_len);
1749*4882a593Smuzhiyun 	now = (req.reply[0] << 24) + (req.reply[1] << 16) +
1750*4882a593Smuzhiyun 	      (req.reply[2] << 8) + req.reply[3];
1751*4882a593Smuzhiyun 	return (time64_t)now - RTC_OFFSET;
1752*4882a593Smuzhiyun }
1753*4882a593Smuzhiyun 
pmu_set_rtc_time(struct rtc_time * tm)1754*4882a593Smuzhiyun int pmu_set_rtc_time(struct rtc_time *tm)
1755*4882a593Smuzhiyun {
1756*4882a593Smuzhiyun 	u32 now;
1757*4882a593Smuzhiyun 	struct adb_request req;
1758*4882a593Smuzhiyun 
1759*4882a593Smuzhiyun 	now = lower_32_bits(rtc_tm_to_time64(tm) + RTC_OFFSET);
1760*4882a593Smuzhiyun 	if (pmu_request(&req, NULL, 5, PMU_SET_RTC,
1761*4882a593Smuzhiyun 	                now >> 24, now >> 16, now >> 8, now) < 0)
1762*4882a593Smuzhiyun 		return -ENXIO;
1763*4882a593Smuzhiyun 	pmu_wait_complete(&req);
1764*4882a593Smuzhiyun 	if (req.reply_len != 0)
1765*4882a593Smuzhiyun 		pr_err("%s: got %d byte reply\n", __func__, req.reply_len);
1766*4882a593Smuzhiyun 	return 0;
1767*4882a593Smuzhiyun }
1768*4882a593Smuzhiyun 
1769*4882a593Smuzhiyun void
pmu_restart(void)1770*4882a593Smuzhiyun pmu_restart(void)
1771*4882a593Smuzhiyun {
1772*4882a593Smuzhiyun 	struct adb_request req;
1773*4882a593Smuzhiyun 
1774*4882a593Smuzhiyun 	if (pmu_state == uninitialized)
1775*4882a593Smuzhiyun 		return;
1776*4882a593Smuzhiyun 
1777*4882a593Smuzhiyun 	local_irq_disable();
1778*4882a593Smuzhiyun 
1779*4882a593Smuzhiyun 	drop_interrupts = 1;
1780*4882a593Smuzhiyun 
1781*4882a593Smuzhiyun 	if (pmu_kind != PMU_KEYLARGO_BASED) {
1782*4882a593Smuzhiyun 		pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1783*4882a593Smuzhiyun 						PMU_INT_TICK );
1784*4882a593Smuzhiyun 		while(!req.complete)
1785*4882a593Smuzhiyun 			pmu_poll();
1786*4882a593Smuzhiyun 	}
1787*4882a593Smuzhiyun 
1788*4882a593Smuzhiyun 	pmu_request(&req, NULL, 1, PMU_RESET);
1789*4882a593Smuzhiyun 	pmu_wait_complete(&req);
1790*4882a593Smuzhiyun 	for (;;)
1791*4882a593Smuzhiyun 		;
1792*4882a593Smuzhiyun }
1793*4882a593Smuzhiyun 
1794*4882a593Smuzhiyun void
pmu_shutdown(void)1795*4882a593Smuzhiyun pmu_shutdown(void)
1796*4882a593Smuzhiyun {
1797*4882a593Smuzhiyun 	struct adb_request req;
1798*4882a593Smuzhiyun 
1799*4882a593Smuzhiyun 	if (pmu_state == uninitialized)
1800*4882a593Smuzhiyun 		return;
1801*4882a593Smuzhiyun 
1802*4882a593Smuzhiyun 	local_irq_disable();
1803*4882a593Smuzhiyun 
1804*4882a593Smuzhiyun 	drop_interrupts = 1;
1805*4882a593Smuzhiyun 
1806*4882a593Smuzhiyun 	if (pmu_kind != PMU_KEYLARGO_BASED) {
1807*4882a593Smuzhiyun 		pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1808*4882a593Smuzhiyun 						PMU_INT_TICK );
1809*4882a593Smuzhiyun 		pmu_wait_complete(&req);
1810*4882a593Smuzhiyun 	} else {
1811*4882a593Smuzhiyun 		/* Disable server mode on shutdown or we'll just
1812*4882a593Smuzhiyun 		 * wake up again
1813*4882a593Smuzhiyun 		 */
1814*4882a593Smuzhiyun 		pmu_set_server_mode(0);
1815*4882a593Smuzhiyun 	}
1816*4882a593Smuzhiyun 
1817*4882a593Smuzhiyun 	pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
1818*4882a593Smuzhiyun 		    'M', 'A', 'T', 'T');
1819*4882a593Smuzhiyun 	pmu_wait_complete(&req);
1820*4882a593Smuzhiyun 	for (;;)
1821*4882a593Smuzhiyun 		;
1822*4882a593Smuzhiyun }
1823*4882a593Smuzhiyun 
1824*4882a593Smuzhiyun int
pmu_present(void)1825*4882a593Smuzhiyun pmu_present(void)
1826*4882a593Smuzhiyun {
1827*4882a593Smuzhiyun 	return pmu_state != uninitialized;
1828*4882a593Smuzhiyun }
1829*4882a593Smuzhiyun 
1830*4882a593Smuzhiyun #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1831*4882a593Smuzhiyun /*
1832*4882a593Smuzhiyun  * Put the powerbook to sleep.
1833*4882a593Smuzhiyun  */
1834*4882a593Smuzhiyun 
1835*4882a593Smuzhiyun static u32 save_via[8];
1836*4882a593Smuzhiyun 
1837*4882a593Smuzhiyun static void
save_via_state(void)1838*4882a593Smuzhiyun save_via_state(void)
1839*4882a593Smuzhiyun {
1840*4882a593Smuzhiyun 	save_via[0] = in_8(&via1[ANH]);
1841*4882a593Smuzhiyun 	save_via[1] = in_8(&via1[DIRA]);
1842*4882a593Smuzhiyun 	save_via[2] = in_8(&via1[B]);
1843*4882a593Smuzhiyun 	save_via[3] = in_8(&via1[DIRB]);
1844*4882a593Smuzhiyun 	save_via[4] = in_8(&via1[PCR]);
1845*4882a593Smuzhiyun 	save_via[5] = in_8(&via1[ACR]);
1846*4882a593Smuzhiyun 	save_via[6] = in_8(&via1[T1CL]);
1847*4882a593Smuzhiyun 	save_via[7] = in_8(&via1[T1CH]);
1848*4882a593Smuzhiyun }
1849*4882a593Smuzhiyun static void
restore_via_state(void)1850*4882a593Smuzhiyun restore_via_state(void)
1851*4882a593Smuzhiyun {
1852*4882a593Smuzhiyun 	out_8(&via1[ANH],  save_via[0]);
1853*4882a593Smuzhiyun 	out_8(&via1[DIRA], save_via[1]);
1854*4882a593Smuzhiyun 	out_8(&via1[B],    save_via[2]);
1855*4882a593Smuzhiyun 	out_8(&via1[DIRB], save_via[3]);
1856*4882a593Smuzhiyun 	out_8(&via1[PCR],  save_via[4]);
1857*4882a593Smuzhiyun 	out_8(&via1[ACR],  save_via[5]);
1858*4882a593Smuzhiyun 	out_8(&via1[T1CL], save_via[6]);
1859*4882a593Smuzhiyun 	out_8(&via1[T1CH], save_via[7]);
1860*4882a593Smuzhiyun 	out_8(&via1[IER], IER_CLR | 0x7f);	/* disable all intrs */
1861*4882a593Smuzhiyun 	out_8(&via1[IFR], 0x7f);			/* clear IFR */
1862*4882a593Smuzhiyun 	out_8(&via1[IER], IER_SET | SR_INT | CB1_INT);
1863*4882a593Smuzhiyun }
1864*4882a593Smuzhiyun 
1865*4882a593Smuzhiyun #define	GRACKLE_PM	(1<<7)
1866*4882a593Smuzhiyun #define GRACKLE_DOZE	(1<<5)
1867*4882a593Smuzhiyun #define	GRACKLE_NAP	(1<<4)
1868*4882a593Smuzhiyun #define	GRACKLE_SLEEP	(1<<3)
1869*4882a593Smuzhiyun 
powerbook_sleep_grackle(void)1870*4882a593Smuzhiyun static int powerbook_sleep_grackle(void)
1871*4882a593Smuzhiyun {
1872*4882a593Smuzhiyun 	unsigned long save_l2cr;
1873*4882a593Smuzhiyun 	unsigned short pmcr1;
1874*4882a593Smuzhiyun 	struct adb_request req;
1875*4882a593Smuzhiyun 	struct pci_dev *grackle;
1876*4882a593Smuzhiyun 
1877*4882a593Smuzhiyun 	grackle = pci_get_domain_bus_and_slot(0, 0, 0);
1878*4882a593Smuzhiyun 	if (!grackle)
1879*4882a593Smuzhiyun 		return -ENODEV;
1880*4882a593Smuzhiyun 
1881*4882a593Smuzhiyun 	/* Turn off various things. Darwin does some retry tests here... */
1882*4882a593Smuzhiyun 	pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
1883*4882a593Smuzhiyun 	pmu_wait_complete(&req);
1884*4882a593Smuzhiyun 	pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1885*4882a593Smuzhiyun 		PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1886*4882a593Smuzhiyun 	pmu_wait_complete(&req);
1887*4882a593Smuzhiyun 
1888*4882a593Smuzhiyun 	/* For 750, save backside cache setting and disable it */
1889*4882a593Smuzhiyun 	save_l2cr = _get_L2CR();	/* (returns -1 if not available) */
1890*4882a593Smuzhiyun 
1891*4882a593Smuzhiyun 	if (!__fake_sleep) {
1892*4882a593Smuzhiyun 		/* Ask the PMU to put us to sleep */
1893*4882a593Smuzhiyun 		pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1894*4882a593Smuzhiyun 		pmu_wait_complete(&req);
1895*4882a593Smuzhiyun 	}
1896*4882a593Smuzhiyun 
1897*4882a593Smuzhiyun 	/* The VIA is supposed not to be restored correctly*/
1898*4882a593Smuzhiyun 	save_via_state();
1899*4882a593Smuzhiyun 	/* We shut down some HW */
1900*4882a593Smuzhiyun 	pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
1901*4882a593Smuzhiyun 
1902*4882a593Smuzhiyun 	pci_read_config_word(grackle, 0x70, &pmcr1);
1903*4882a593Smuzhiyun 	/* Apparently, MacOS uses NAP mode for Grackle ??? */
1904*4882a593Smuzhiyun 	pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
1905*4882a593Smuzhiyun 	pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
1906*4882a593Smuzhiyun 	pci_write_config_word(grackle, 0x70, pmcr1);
1907*4882a593Smuzhiyun 
1908*4882a593Smuzhiyun 	/* Call low-level ASM sleep handler */
1909*4882a593Smuzhiyun 	if (__fake_sleep)
1910*4882a593Smuzhiyun 		mdelay(5000);
1911*4882a593Smuzhiyun 	else
1912*4882a593Smuzhiyun 		low_sleep_handler();
1913*4882a593Smuzhiyun 
1914*4882a593Smuzhiyun 	/* We're awake again, stop grackle PM */
1915*4882a593Smuzhiyun 	pci_read_config_word(grackle, 0x70, &pmcr1);
1916*4882a593Smuzhiyun 	pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
1917*4882a593Smuzhiyun 	pci_write_config_word(grackle, 0x70, pmcr1);
1918*4882a593Smuzhiyun 
1919*4882a593Smuzhiyun 	pci_dev_put(grackle);
1920*4882a593Smuzhiyun 
1921*4882a593Smuzhiyun 	/* Make sure the PMU is idle */
1922*4882a593Smuzhiyun 	pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
1923*4882a593Smuzhiyun 	restore_via_state();
1924*4882a593Smuzhiyun 
1925*4882a593Smuzhiyun 	/* Restore L2 cache */
1926*4882a593Smuzhiyun 	if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1927*4882a593Smuzhiyun  		_set_L2CR(save_l2cr);
1928*4882a593Smuzhiyun 
1929*4882a593Smuzhiyun 	/* Restore userland MMU context */
1930*4882a593Smuzhiyun 	switch_mmu_context(NULL, current->active_mm, NULL);
1931*4882a593Smuzhiyun 
1932*4882a593Smuzhiyun 	/* Power things up */
1933*4882a593Smuzhiyun 	pmu_unlock();
1934*4882a593Smuzhiyun 	pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1935*4882a593Smuzhiyun 	pmu_wait_complete(&req);
1936*4882a593Smuzhiyun 	pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
1937*4882a593Smuzhiyun 			PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
1938*4882a593Smuzhiyun 	pmu_wait_complete(&req);
1939*4882a593Smuzhiyun 	pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1940*4882a593Smuzhiyun 			PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1941*4882a593Smuzhiyun 	pmu_wait_complete(&req);
1942*4882a593Smuzhiyun 
1943*4882a593Smuzhiyun 	return 0;
1944*4882a593Smuzhiyun }
1945*4882a593Smuzhiyun 
1946*4882a593Smuzhiyun static int
powerbook_sleep_Core99(void)1947*4882a593Smuzhiyun powerbook_sleep_Core99(void)
1948*4882a593Smuzhiyun {
1949*4882a593Smuzhiyun 	unsigned long save_l2cr;
1950*4882a593Smuzhiyun 	unsigned long save_l3cr;
1951*4882a593Smuzhiyun 	struct adb_request req;
1952*4882a593Smuzhiyun 
1953*4882a593Smuzhiyun 	if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
1954*4882a593Smuzhiyun 		printk(KERN_ERR "Sleep mode not supported on this machine\n");
1955*4882a593Smuzhiyun 		return -ENOSYS;
1956*4882a593Smuzhiyun 	}
1957*4882a593Smuzhiyun 
1958*4882a593Smuzhiyun 	if (num_online_cpus() > 1 || cpu_is_offline(0))
1959*4882a593Smuzhiyun 		return -EAGAIN;
1960*4882a593Smuzhiyun 
1961*4882a593Smuzhiyun 	/* Stop environment and ADB interrupts */
1962*4882a593Smuzhiyun 	pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
1963*4882a593Smuzhiyun 	pmu_wait_complete(&req);
1964*4882a593Smuzhiyun 
1965*4882a593Smuzhiyun 	/* Tell PMU what events will wake us up */
1966*4882a593Smuzhiyun 	pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
1967*4882a593Smuzhiyun 		0xff, 0xff);
1968*4882a593Smuzhiyun 	pmu_wait_complete(&req);
1969*4882a593Smuzhiyun 	pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
1970*4882a593Smuzhiyun 		0, PMU_PWR_WAKEUP_KEY |
1971*4882a593Smuzhiyun 		(option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
1972*4882a593Smuzhiyun 	pmu_wait_complete(&req);
1973*4882a593Smuzhiyun 
1974*4882a593Smuzhiyun 	/* Save the state of the L2 and L3 caches */
1975*4882a593Smuzhiyun 	save_l3cr = _get_L3CR();	/* (returns -1 if not available) */
1976*4882a593Smuzhiyun 	save_l2cr = _get_L2CR();	/* (returns -1 if not available) */
1977*4882a593Smuzhiyun 
1978*4882a593Smuzhiyun 	if (!__fake_sleep) {
1979*4882a593Smuzhiyun 		/* Ask the PMU to put us to sleep */
1980*4882a593Smuzhiyun 		pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1981*4882a593Smuzhiyun 		pmu_wait_complete(&req);
1982*4882a593Smuzhiyun 	}
1983*4882a593Smuzhiyun 
1984*4882a593Smuzhiyun 	/* The VIA is supposed not to be restored correctly*/
1985*4882a593Smuzhiyun 	save_via_state();
1986*4882a593Smuzhiyun 
1987*4882a593Smuzhiyun 	/* Shut down various ASICs. There's a chance that we can no longer
1988*4882a593Smuzhiyun 	 * talk to the PMU after this, so I moved it to _after_ sending the
1989*4882a593Smuzhiyun 	 * sleep command to it. Still need to be checked.
1990*4882a593Smuzhiyun 	 */
1991*4882a593Smuzhiyun 	pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1992*4882a593Smuzhiyun 
1993*4882a593Smuzhiyun 	/* Call low-level ASM sleep handler */
1994*4882a593Smuzhiyun 	if (__fake_sleep)
1995*4882a593Smuzhiyun 		mdelay(5000);
1996*4882a593Smuzhiyun 	else
1997*4882a593Smuzhiyun 		low_sleep_handler();
1998*4882a593Smuzhiyun 
1999*4882a593Smuzhiyun 	/* Restore Apple core ASICs state */
2000*4882a593Smuzhiyun 	pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
2001*4882a593Smuzhiyun 
2002*4882a593Smuzhiyun 	/* Restore VIA */
2003*4882a593Smuzhiyun 	restore_via_state();
2004*4882a593Smuzhiyun 
2005*4882a593Smuzhiyun 	/* tweak LPJ before cpufreq is there */
2006*4882a593Smuzhiyun 	loops_per_jiffy *= 2;
2007*4882a593Smuzhiyun 
2008*4882a593Smuzhiyun 	/* Restore video */
2009*4882a593Smuzhiyun 	pmac_call_early_video_resume();
2010*4882a593Smuzhiyun 
2011*4882a593Smuzhiyun 	/* Restore L2 cache */
2012*4882a593Smuzhiyun 	if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
2013*4882a593Smuzhiyun  		_set_L2CR(save_l2cr);
2014*4882a593Smuzhiyun 	/* Restore L3 cache */
2015*4882a593Smuzhiyun 	if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
2016*4882a593Smuzhiyun  		_set_L3CR(save_l3cr);
2017*4882a593Smuzhiyun 
2018*4882a593Smuzhiyun 	/* Restore userland MMU context */
2019*4882a593Smuzhiyun 	switch_mmu_context(NULL, current->active_mm, NULL);
2020*4882a593Smuzhiyun 
2021*4882a593Smuzhiyun 	/* Tell PMU we are ready */
2022*4882a593Smuzhiyun 	pmu_unlock();
2023*4882a593Smuzhiyun 	pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
2024*4882a593Smuzhiyun 	pmu_wait_complete(&req);
2025*4882a593Smuzhiyun 	pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
2026*4882a593Smuzhiyun 	pmu_wait_complete(&req);
2027*4882a593Smuzhiyun 
2028*4882a593Smuzhiyun 	/* Restore LPJ, cpufreq will adjust the cpu frequency */
2029*4882a593Smuzhiyun 	loops_per_jiffy /= 2;
2030*4882a593Smuzhiyun 
2031*4882a593Smuzhiyun 	return 0;
2032*4882a593Smuzhiyun }
2033*4882a593Smuzhiyun 
2034*4882a593Smuzhiyun #define PB3400_MEM_CTRL		0xf8000000
2035*4882a593Smuzhiyun #define PB3400_MEM_CTRL_SLEEP	0x70
2036*4882a593Smuzhiyun 
2037*4882a593Smuzhiyun static void __iomem *pb3400_mem_ctrl;
2038*4882a593Smuzhiyun 
powerbook_sleep_init_3400(void)2039*4882a593Smuzhiyun static void powerbook_sleep_init_3400(void)
2040*4882a593Smuzhiyun {
2041*4882a593Smuzhiyun 	/* map in the memory controller registers */
2042*4882a593Smuzhiyun 	pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
2043*4882a593Smuzhiyun 	if (pb3400_mem_ctrl == NULL)
2044*4882a593Smuzhiyun 		printk(KERN_WARNING "ioremap failed: sleep won't be possible");
2045*4882a593Smuzhiyun }
2046*4882a593Smuzhiyun 
powerbook_sleep_3400(void)2047*4882a593Smuzhiyun static int powerbook_sleep_3400(void)
2048*4882a593Smuzhiyun {
2049*4882a593Smuzhiyun 	int i, x;
2050*4882a593Smuzhiyun 	unsigned int hid0;
2051*4882a593Smuzhiyun 	unsigned long msr;
2052*4882a593Smuzhiyun 	struct adb_request sleep_req;
2053*4882a593Smuzhiyun 	unsigned int __iomem *mem_ctrl_sleep;
2054*4882a593Smuzhiyun 
2055*4882a593Smuzhiyun 	if (pb3400_mem_ctrl == NULL)
2056*4882a593Smuzhiyun 		return -ENOMEM;
2057*4882a593Smuzhiyun 	mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
2058*4882a593Smuzhiyun 
2059*4882a593Smuzhiyun 	/* Set the memory controller to keep the memory refreshed
2060*4882a593Smuzhiyun 	   while we're asleep */
2061*4882a593Smuzhiyun 	for (i = 0x403f; i >= 0x4000; --i) {
2062*4882a593Smuzhiyun 		out_be32(mem_ctrl_sleep, i);
2063*4882a593Smuzhiyun 		do {
2064*4882a593Smuzhiyun 			x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
2065*4882a593Smuzhiyun 		} while (x == 0);
2066*4882a593Smuzhiyun 		if (x >= 0x100)
2067*4882a593Smuzhiyun 			break;
2068*4882a593Smuzhiyun 	}
2069*4882a593Smuzhiyun 
2070*4882a593Smuzhiyun 	/* Ask the PMU to put us to sleep */
2071*4882a593Smuzhiyun 	pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
2072*4882a593Smuzhiyun 	pmu_wait_complete(&sleep_req);
2073*4882a593Smuzhiyun 	pmu_unlock();
2074*4882a593Smuzhiyun 
2075*4882a593Smuzhiyun 	pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
2076*4882a593Smuzhiyun 
2077*4882a593Smuzhiyun 	asleep = 1;
2078*4882a593Smuzhiyun 
2079*4882a593Smuzhiyun 	/* Put the CPU into sleep mode */
2080*4882a593Smuzhiyun 	hid0 = mfspr(SPRN_HID0);
2081*4882a593Smuzhiyun 	hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
2082*4882a593Smuzhiyun 	mtspr(SPRN_HID0, hid0);
2083*4882a593Smuzhiyun 	local_irq_enable();
2084*4882a593Smuzhiyun 	msr = mfmsr() | MSR_POW;
2085*4882a593Smuzhiyun 	while (asleep) {
2086*4882a593Smuzhiyun 		mb();
2087*4882a593Smuzhiyun 		mtmsr(msr);
2088*4882a593Smuzhiyun 		isync();
2089*4882a593Smuzhiyun 	}
2090*4882a593Smuzhiyun 	local_irq_disable();
2091*4882a593Smuzhiyun 
2092*4882a593Smuzhiyun 	/* OK, we're awake again, start restoring things */
2093*4882a593Smuzhiyun 	out_be32(mem_ctrl_sleep, 0x3f);
2094*4882a593Smuzhiyun 	pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
2095*4882a593Smuzhiyun 
2096*4882a593Smuzhiyun 	return 0;
2097*4882a593Smuzhiyun }
2098*4882a593Smuzhiyun 
2099*4882a593Smuzhiyun #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
2100*4882a593Smuzhiyun 
2101*4882a593Smuzhiyun /*
2102*4882a593Smuzhiyun  * Support for /dev/pmu device
2103*4882a593Smuzhiyun  */
2104*4882a593Smuzhiyun #define RB_SIZE		0x10
2105*4882a593Smuzhiyun struct pmu_private {
2106*4882a593Smuzhiyun 	struct list_head list;
2107*4882a593Smuzhiyun 	int	rb_get;
2108*4882a593Smuzhiyun 	int	rb_put;
2109*4882a593Smuzhiyun 	struct rb_entry {
2110*4882a593Smuzhiyun 		unsigned short len;
2111*4882a593Smuzhiyun 		unsigned char data[16];
2112*4882a593Smuzhiyun 	}	rb_buf[RB_SIZE];
2113*4882a593Smuzhiyun 	wait_queue_head_t wait;
2114*4882a593Smuzhiyun 	spinlock_t lock;
2115*4882a593Smuzhiyun #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2116*4882a593Smuzhiyun 	int	backlight_locker;
2117*4882a593Smuzhiyun #endif
2118*4882a593Smuzhiyun };
2119*4882a593Smuzhiyun 
2120*4882a593Smuzhiyun static LIST_HEAD(all_pmu_pvt);
2121*4882a593Smuzhiyun static DEFINE_SPINLOCK(all_pvt_lock);
2122*4882a593Smuzhiyun 
2123*4882a593Smuzhiyun static void
pmu_pass_intr(unsigned char * data,int len)2124*4882a593Smuzhiyun pmu_pass_intr(unsigned char *data, int len)
2125*4882a593Smuzhiyun {
2126*4882a593Smuzhiyun 	struct pmu_private *pp;
2127*4882a593Smuzhiyun 	struct list_head *list;
2128*4882a593Smuzhiyun 	int i;
2129*4882a593Smuzhiyun 	unsigned long flags;
2130*4882a593Smuzhiyun 
2131*4882a593Smuzhiyun 	if (len > sizeof(pp->rb_buf[0].data))
2132*4882a593Smuzhiyun 		len = sizeof(pp->rb_buf[0].data);
2133*4882a593Smuzhiyun 	spin_lock_irqsave(&all_pvt_lock, flags);
2134*4882a593Smuzhiyun 	for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
2135*4882a593Smuzhiyun 		pp = list_entry(list, struct pmu_private, list);
2136*4882a593Smuzhiyun 		spin_lock(&pp->lock);
2137*4882a593Smuzhiyun 		i = pp->rb_put + 1;
2138*4882a593Smuzhiyun 		if (i >= RB_SIZE)
2139*4882a593Smuzhiyun 			i = 0;
2140*4882a593Smuzhiyun 		if (i != pp->rb_get) {
2141*4882a593Smuzhiyun 			struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
2142*4882a593Smuzhiyun 			rp->len = len;
2143*4882a593Smuzhiyun 			memcpy(rp->data, data, len);
2144*4882a593Smuzhiyun 			pp->rb_put = i;
2145*4882a593Smuzhiyun 			wake_up_interruptible(&pp->wait);
2146*4882a593Smuzhiyun 		}
2147*4882a593Smuzhiyun 		spin_unlock(&pp->lock);
2148*4882a593Smuzhiyun 	}
2149*4882a593Smuzhiyun 	spin_unlock_irqrestore(&all_pvt_lock, flags);
2150*4882a593Smuzhiyun }
2151*4882a593Smuzhiyun 
2152*4882a593Smuzhiyun static int
pmu_open(struct inode * inode,struct file * file)2153*4882a593Smuzhiyun pmu_open(struct inode *inode, struct file *file)
2154*4882a593Smuzhiyun {
2155*4882a593Smuzhiyun 	struct pmu_private *pp;
2156*4882a593Smuzhiyun 	unsigned long flags;
2157*4882a593Smuzhiyun 
2158*4882a593Smuzhiyun 	pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
2159*4882a593Smuzhiyun 	if (!pp)
2160*4882a593Smuzhiyun 		return -ENOMEM;
2161*4882a593Smuzhiyun 	pp->rb_get = pp->rb_put = 0;
2162*4882a593Smuzhiyun 	spin_lock_init(&pp->lock);
2163*4882a593Smuzhiyun 	init_waitqueue_head(&pp->wait);
2164*4882a593Smuzhiyun 	mutex_lock(&pmu_info_proc_mutex);
2165*4882a593Smuzhiyun 	spin_lock_irqsave(&all_pvt_lock, flags);
2166*4882a593Smuzhiyun #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2167*4882a593Smuzhiyun 	pp->backlight_locker = 0;
2168*4882a593Smuzhiyun #endif
2169*4882a593Smuzhiyun 	list_add(&pp->list, &all_pmu_pvt);
2170*4882a593Smuzhiyun 	spin_unlock_irqrestore(&all_pvt_lock, flags);
2171*4882a593Smuzhiyun 	file->private_data = pp;
2172*4882a593Smuzhiyun 	mutex_unlock(&pmu_info_proc_mutex);
2173*4882a593Smuzhiyun 	return 0;
2174*4882a593Smuzhiyun }
2175*4882a593Smuzhiyun 
2176*4882a593Smuzhiyun static ssize_t
pmu_read(struct file * file,char __user * buf,size_t count,loff_t * ppos)2177*4882a593Smuzhiyun pmu_read(struct file *file, char __user *buf,
2178*4882a593Smuzhiyun 			size_t count, loff_t *ppos)
2179*4882a593Smuzhiyun {
2180*4882a593Smuzhiyun 	struct pmu_private *pp = file->private_data;
2181*4882a593Smuzhiyun 	DECLARE_WAITQUEUE(wait, current);
2182*4882a593Smuzhiyun 	unsigned long flags;
2183*4882a593Smuzhiyun 	int ret = 0;
2184*4882a593Smuzhiyun 
2185*4882a593Smuzhiyun 	if (count < 1 || !pp)
2186*4882a593Smuzhiyun 		return -EINVAL;
2187*4882a593Smuzhiyun 
2188*4882a593Smuzhiyun 	spin_lock_irqsave(&pp->lock, flags);
2189*4882a593Smuzhiyun 	add_wait_queue(&pp->wait, &wait);
2190*4882a593Smuzhiyun 	set_current_state(TASK_INTERRUPTIBLE);
2191*4882a593Smuzhiyun 
2192*4882a593Smuzhiyun 	for (;;) {
2193*4882a593Smuzhiyun 		ret = -EAGAIN;
2194*4882a593Smuzhiyun 		if (pp->rb_get != pp->rb_put) {
2195*4882a593Smuzhiyun 			int i = pp->rb_get;
2196*4882a593Smuzhiyun 			struct rb_entry *rp = &pp->rb_buf[i];
2197*4882a593Smuzhiyun 			ret = rp->len;
2198*4882a593Smuzhiyun 			spin_unlock_irqrestore(&pp->lock, flags);
2199*4882a593Smuzhiyun 			if (ret > count)
2200*4882a593Smuzhiyun 				ret = count;
2201*4882a593Smuzhiyun 			if (ret > 0 && copy_to_user(buf, rp->data, ret))
2202*4882a593Smuzhiyun 				ret = -EFAULT;
2203*4882a593Smuzhiyun 			if (++i >= RB_SIZE)
2204*4882a593Smuzhiyun 				i = 0;
2205*4882a593Smuzhiyun 			spin_lock_irqsave(&pp->lock, flags);
2206*4882a593Smuzhiyun 			pp->rb_get = i;
2207*4882a593Smuzhiyun 		}
2208*4882a593Smuzhiyun 		if (ret >= 0)
2209*4882a593Smuzhiyun 			break;
2210*4882a593Smuzhiyun 		if (file->f_flags & O_NONBLOCK)
2211*4882a593Smuzhiyun 			break;
2212*4882a593Smuzhiyun 		ret = -ERESTARTSYS;
2213*4882a593Smuzhiyun 		if (signal_pending(current))
2214*4882a593Smuzhiyun 			break;
2215*4882a593Smuzhiyun 		spin_unlock_irqrestore(&pp->lock, flags);
2216*4882a593Smuzhiyun 		schedule();
2217*4882a593Smuzhiyun 		spin_lock_irqsave(&pp->lock, flags);
2218*4882a593Smuzhiyun 	}
2219*4882a593Smuzhiyun 	__set_current_state(TASK_RUNNING);
2220*4882a593Smuzhiyun 	remove_wait_queue(&pp->wait, &wait);
2221*4882a593Smuzhiyun 	spin_unlock_irqrestore(&pp->lock, flags);
2222*4882a593Smuzhiyun 
2223*4882a593Smuzhiyun 	return ret;
2224*4882a593Smuzhiyun }
2225*4882a593Smuzhiyun 
2226*4882a593Smuzhiyun static ssize_t
pmu_write(struct file * file,const char __user * buf,size_t count,loff_t * ppos)2227*4882a593Smuzhiyun pmu_write(struct file *file, const char __user *buf,
2228*4882a593Smuzhiyun 			 size_t count, loff_t *ppos)
2229*4882a593Smuzhiyun {
2230*4882a593Smuzhiyun 	return 0;
2231*4882a593Smuzhiyun }
2232*4882a593Smuzhiyun 
2233*4882a593Smuzhiyun static __poll_t
pmu_fpoll(struct file * filp,poll_table * wait)2234*4882a593Smuzhiyun pmu_fpoll(struct file *filp, poll_table *wait)
2235*4882a593Smuzhiyun {
2236*4882a593Smuzhiyun 	struct pmu_private *pp = filp->private_data;
2237*4882a593Smuzhiyun 	__poll_t mask = 0;
2238*4882a593Smuzhiyun 	unsigned long flags;
2239*4882a593Smuzhiyun 
2240*4882a593Smuzhiyun 	if (!pp)
2241*4882a593Smuzhiyun 		return 0;
2242*4882a593Smuzhiyun 	poll_wait(filp, &pp->wait, wait);
2243*4882a593Smuzhiyun 	spin_lock_irqsave(&pp->lock, flags);
2244*4882a593Smuzhiyun 	if (pp->rb_get != pp->rb_put)
2245*4882a593Smuzhiyun 		mask |= EPOLLIN;
2246*4882a593Smuzhiyun 	spin_unlock_irqrestore(&pp->lock, flags);
2247*4882a593Smuzhiyun 	return mask;
2248*4882a593Smuzhiyun }
2249*4882a593Smuzhiyun 
2250*4882a593Smuzhiyun static int
pmu_release(struct inode * inode,struct file * file)2251*4882a593Smuzhiyun pmu_release(struct inode *inode, struct file *file)
2252*4882a593Smuzhiyun {
2253*4882a593Smuzhiyun 	struct pmu_private *pp = file->private_data;
2254*4882a593Smuzhiyun 	unsigned long flags;
2255*4882a593Smuzhiyun 
2256*4882a593Smuzhiyun 	if (pp) {
2257*4882a593Smuzhiyun 		file->private_data = NULL;
2258*4882a593Smuzhiyun 		spin_lock_irqsave(&all_pvt_lock, flags);
2259*4882a593Smuzhiyun 		list_del(&pp->list);
2260*4882a593Smuzhiyun 		spin_unlock_irqrestore(&all_pvt_lock, flags);
2261*4882a593Smuzhiyun 
2262*4882a593Smuzhiyun #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2263*4882a593Smuzhiyun 		if (pp->backlight_locker)
2264*4882a593Smuzhiyun 			pmac_backlight_enable();
2265*4882a593Smuzhiyun #endif
2266*4882a593Smuzhiyun 
2267*4882a593Smuzhiyun 		kfree(pp);
2268*4882a593Smuzhiyun 	}
2269*4882a593Smuzhiyun 	return 0;
2270*4882a593Smuzhiyun }
2271*4882a593Smuzhiyun 
2272*4882a593Smuzhiyun #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
pmac_suspend_disable_irqs(void)2273*4882a593Smuzhiyun static void pmac_suspend_disable_irqs(void)
2274*4882a593Smuzhiyun {
2275*4882a593Smuzhiyun 	/* Call platform functions marked "on sleep" */
2276*4882a593Smuzhiyun 	pmac_pfunc_i2c_suspend();
2277*4882a593Smuzhiyun 	pmac_pfunc_base_suspend();
2278*4882a593Smuzhiyun }
2279*4882a593Smuzhiyun 
powerbook_sleep(suspend_state_t state)2280*4882a593Smuzhiyun static int powerbook_sleep(suspend_state_t state)
2281*4882a593Smuzhiyun {
2282*4882a593Smuzhiyun 	int error = 0;
2283*4882a593Smuzhiyun 
2284*4882a593Smuzhiyun 	/* Wait for completion of async requests */
2285*4882a593Smuzhiyun 	while (!batt_req.complete)
2286*4882a593Smuzhiyun 		pmu_poll();
2287*4882a593Smuzhiyun 
2288*4882a593Smuzhiyun 	/* Giveup the lazy FPU & vec so we don't have to back them
2289*4882a593Smuzhiyun 	 * up from the low level code
2290*4882a593Smuzhiyun 	 */
2291*4882a593Smuzhiyun 	enable_kernel_fp();
2292*4882a593Smuzhiyun 
2293*4882a593Smuzhiyun #ifdef CONFIG_ALTIVEC
2294*4882a593Smuzhiyun 	if (cpu_has_feature(CPU_FTR_ALTIVEC))
2295*4882a593Smuzhiyun 		enable_kernel_altivec();
2296*4882a593Smuzhiyun #endif /* CONFIG_ALTIVEC */
2297*4882a593Smuzhiyun 
2298*4882a593Smuzhiyun 	switch (pmu_kind) {
2299*4882a593Smuzhiyun 	case PMU_OHARE_BASED:
2300*4882a593Smuzhiyun 		error = powerbook_sleep_3400();
2301*4882a593Smuzhiyun 		break;
2302*4882a593Smuzhiyun 	case PMU_HEATHROW_BASED:
2303*4882a593Smuzhiyun 	case PMU_PADDINGTON_BASED:
2304*4882a593Smuzhiyun 		error = powerbook_sleep_grackle();
2305*4882a593Smuzhiyun 		break;
2306*4882a593Smuzhiyun 	case PMU_KEYLARGO_BASED:
2307*4882a593Smuzhiyun 		error = powerbook_sleep_Core99();
2308*4882a593Smuzhiyun 		break;
2309*4882a593Smuzhiyun 	default:
2310*4882a593Smuzhiyun 		return -ENOSYS;
2311*4882a593Smuzhiyun 	}
2312*4882a593Smuzhiyun 
2313*4882a593Smuzhiyun 	if (error)
2314*4882a593Smuzhiyun 		return error;
2315*4882a593Smuzhiyun 
2316*4882a593Smuzhiyun 	mdelay(100);
2317*4882a593Smuzhiyun 
2318*4882a593Smuzhiyun 	return 0;
2319*4882a593Smuzhiyun }
2320*4882a593Smuzhiyun 
pmac_suspend_enable_irqs(void)2321*4882a593Smuzhiyun static void pmac_suspend_enable_irqs(void)
2322*4882a593Smuzhiyun {
2323*4882a593Smuzhiyun 	/* Force a poll of ADB interrupts */
2324*4882a593Smuzhiyun 	adb_int_pending = 1;
2325*4882a593Smuzhiyun 	via_pmu_interrupt(0, NULL);
2326*4882a593Smuzhiyun 
2327*4882a593Smuzhiyun 	mdelay(10);
2328*4882a593Smuzhiyun 
2329*4882a593Smuzhiyun 	/* Call platform functions marked "on wake" */
2330*4882a593Smuzhiyun 	pmac_pfunc_base_resume();
2331*4882a593Smuzhiyun 	pmac_pfunc_i2c_resume();
2332*4882a593Smuzhiyun }
2333*4882a593Smuzhiyun 
pmu_sleep_valid(suspend_state_t state)2334*4882a593Smuzhiyun static int pmu_sleep_valid(suspend_state_t state)
2335*4882a593Smuzhiyun {
2336*4882a593Smuzhiyun 	return state == PM_SUSPEND_MEM
2337*4882a593Smuzhiyun 		&& (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
2338*4882a593Smuzhiyun }
2339*4882a593Smuzhiyun 
2340*4882a593Smuzhiyun static const struct platform_suspend_ops pmu_pm_ops = {
2341*4882a593Smuzhiyun 	.enter = powerbook_sleep,
2342*4882a593Smuzhiyun 	.valid = pmu_sleep_valid,
2343*4882a593Smuzhiyun };
2344*4882a593Smuzhiyun 
register_pmu_pm_ops(void)2345*4882a593Smuzhiyun static int register_pmu_pm_ops(void)
2346*4882a593Smuzhiyun {
2347*4882a593Smuzhiyun 	if (pmu_kind == PMU_OHARE_BASED)
2348*4882a593Smuzhiyun 		powerbook_sleep_init_3400();
2349*4882a593Smuzhiyun 	ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs;
2350*4882a593Smuzhiyun 	ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs;
2351*4882a593Smuzhiyun 	suspend_set_ops(&pmu_pm_ops);
2352*4882a593Smuzhiyun 
2353*4882a593Smuzhiyun 	return 0;
2354*4882a593Smuzhiyun }
2355*4882a593Smuzhiyun 
2356*4882a593Smuzhiyun device_initcall(register_pmu_pm_ops);
2357*4882a593Smuzhiyun #endif
2358*4882a593Smuzhiyun 
pmu_ioctl(struct file * filp,u_int cmd,u_long arg)2359*4882a593Smuzhiyun static int pmu_ioctl(struct file *filp,
2360*4882a593Smuzhiyun 		     u_int cmd, u_long arg)
2361*4882a593Smuzhiyun {
2362*4882a593Smuzhiyun 	__u32 __user *argp = (__u32 __user *)arg;
2363*4882a593Smuzhiyun 	int error = -EINVAL;
2364*4882a593Smuzhiyun 
2365*4882a593Smuzhiyun 	switch (cmd) {
2366*4882a593Smuzhiyun #ifdef CONFIG_PPC_PMAC
2367*4882a593Smuzhiyun 	case PMU_IOC_SLEEP:
2368*4882a593Smuzhiyun 		if (!capable(CAP_SYS_ADMIN))
2369*4882a593Smuzhiyun 			return -EACCES;
2370*4882a593Smuzhiyun 		return pm_suspend(PM_SUSPEND_MEM);
2371*4882a593Smuzhiyun 	case PMU_IOC_CAN_SLEEP:
2372*4882a593Smuzhiyun 		if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
2373*4882a593Smuzhiyun 			return put_user(0, argp);
2374*4882a593Smuzhiyun 		else
2375*4882a593Smuzhiyun 			return put_user(1, argp);
2376*4882a593Smuzhiyun #endif
2377*4882a593Smuzhiyun 
2378*4882a593Smuzhiyun #ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
2379*4882a593Smuzhiyun 	/* Compatibility ioctl's for backlight */
2380*4882a593Smuzhiyun 	case PMU_IOC_GET_BACKLIGHT:
2381*4882a593Smuzhiyun 	{
2382*4882a593Smuzhiyun 		int brightness;
2383*4882a593Smuzhiyun 
2384*4882a593Smuzhiyun 		brightness = pmac_backlight_get_legacy_brightness();
2385*4882a593Smuzhiyun 		if (brightness < 0)
2386*4882a593Smuzhiyun 			return brightness;
2387*4882a593Smuzhiyun 		else
2388*4882a593Smuzhiyun 			return put_user(brightness, argp);
2389*4882a593Smuzhiyun 
2390*4882a593Smuzhiyun 	}
2391*4882a593Smuzhiyun 	case PMU_IOC_SET_BACKLIGHT:
2392*4882a593Smuzhiyun 	{
2393*4882a593Smuzhiyun 		int brightness;
2394*4882a593Smuzhiyun 
2395*4882a593Smuzhiyun 		error = get_user(brightness, argp);
2396*4882a593Smuzhiyun 		if (error)
2397*4882a593Smuzhiyun 			return error;
2398*4882a593Smuzhiyun 
2399*4882a593Smuzhiyun 		return pmac_backlight_set_legacy_brightness(brightness);
2400*4882a593Smuzhiyun 	}
2401*4882a593Smuzhiyun #ifdef CONFIG_INPUT_ADBHID
2402*4882a593Smuzhiyun 	case PMU_IOC_GRAB_BACKLIGHT: {
2403*4882a593Smuzhiyun 		struct pmu_private *pp = filp->private_data;
2404*4882a593Smuzhiyun 
2405*4882a593Smuzhiyun 		if (pp->backlight_locker)
2406*4882a593Smuzhiyun 			return 0;
2407*4882a593Smuzhiyun 
2408*4882a593Smuzhiyun 		pp->backlight_locker = 1;
2409*4882a593Smuzhiyun 		pmac_backlight_disable();
2410*4882a593Smuzhiyun 
2411*4882a593Smuzhiyun 		return 0;
2412*4882a593Smuzhiyun 	}
2413*4882a593Smuzhiyun #endif /* CONFIG_INPUT_ADBHID */
2414*4882a593Smuzhiyun #endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */
2415*4882a593Smuzhiyun 
2416*4882a593Smuzhiyun 	case PMU_IOC_GET_MODEL:
2417*4882a593Smuzhiyun 	    	return put_user(pmu_kind, argp);
2418*4882a593Smuzhiyun 	case PMU_IOC_HAS_ADB:
2419*4882a593Smuzhiyun 		return put_user(pmu_has_adb, argp);
2420*4882a593Smuzhiyun 	}
2421*4882a593Smuzhiyun 	return error;
2422*4882a593Smuzhiyun }
2423*4882a593Smuzhiyun 
pmu_unlocked_ioctl(struct file * filp,u_int cmd,u_long arg)2424*4882a593Smuzhiyun static long pmu_unlocked_ioctl(struct file *filp,
2425*4882a593Smuzhiyun 			       u_int cmd, u_long arg)
2426*4882a593Smuzhiyun {
2427*4882a593Smuzhiyun 	int ret;
2428*4882a593Smuzhiyun 
2429*4882a593Smuzhiyun 	mutex_lock(&pmu_info_proc_mutex);
2430*4882a593Smuzhiyun 	ret = pmu_ioctl(filp, cmd, arg);
2431*4882a593Smuzhiyun 	mutex_unlock(&pmu_info_proc_mutex);
2432*4882a593Smuzhiyun 
2433*4882a593Smuzhiyun 	return ret;
2434*4882a593Smuzhiyun }
2435*4882a593Smuzhiyun 
2436*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
2437*4882a593Smuzhiyun #define PMU_IOC_GET_BACKLIGHT32	_IOR('B', 1, compat_size_t)
2438*4882a593Smuzhiyun #define PMU_IOC_SET_BACKLIGHT32	_IOW('B', 2, compat_size_t)
2439*4882a593Smuzhiyun #define PMU_IOC_GET_MODEL32	_IOR('B', 3, compat_size_t)
2440*4882a593Smuzhiyun #define PMU_IOC_HAS_ADB32	_IOR('B', 4, compat_size_t)
2441*4882a593Smuzhiyun #define PMU_IOC_CAN_SLEEP32	_IOR('B', 5, compat_size_t)
2442*4882a593Smuzhiyun #define PMU_IOC_GRAB_BACKLIGHT32 _IOR('B', 6, compat_size_t)
2443*4882a593Smuzhiyun 
compat_pmu_ioctl(struct file * filp,u_int cmd,u_long arg)2444*4882a593Smuzhiyun static long compat_pmu_ioctl (struct file *filp, u_int cmd, u_long arg)
2445*4882a593Smuzhiyun {
2446*4882a593Smuzhiyun 	switch (cmd) {
2447*4882a593Smuzhiyun 	case PMU_IOC_SLEEP:
2448*4882a593Smuzhiyun 		break;
2449*4882a593Smuzhiyun 	case PMU_IOC_GET_BACKLIGHT32:
2450*4882a593Smuzhiyun 		cmd = PMU_IOC_GET_BACKLIGHT;
2451*4882a593Smuzhiyun 		break;
2452*4882a593Smuzhiyun 	case PMU_IOC_SET_BACKLIGHT32:
2453*4882a593Smuzhiyun 		cmd = PMU_IOC_SET_BACKLIGHT;
2454*4882a593Smuzhiyun 		break;
2455*4882a593Smuzhiyun 	case PMU_IOC_GET_MODEL32:
2456*4882a593Smuzhiyun 		cmd = PMU_IOC_GET_MODEL;
2457*4882a593Smuzhiyun 		break;
2458*4882a593Smuzhiyun 	case PMU_IOC_HAS_ADB32:
2459*4882a593Smuzhiyun 		cmd = PMU_IOC_HAS_ADB;
2460*4882a593Smuzhiyun 		break;
2461*4882a593Smuzhiyun 	case PMU_IOC_CAN_SLEEP32:
2462*4882a593Smuzhiyun 		cmd = PMU_IOC_CAN_SLEEP;
2463*4882a593Smuzhiyun 		break;
2464*4882a593Smuzhiyun 	case PMU_IOC_GRAB_BACKLIGHT32:
2465*4882a593Smuzhiyun 		cmd = PMU_IOC_GRAB_BACKLIGHT;
2466*4882a593Smuzhiyun 		break;
2467*4882a593Smuzhiyun 	default:
2468*4882a593Smuzhiyun 		return -ENOIOCTLCMD;
2469*4882a593Smuzhiyun 	}
2470*4882a593Smuzhiyun 	return pmu_unlocked_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
2471*4882a593Smuzhiyun }
2472*4882a593Smuzhiyun #endif
2473*4882a593Smuzhiyun 
2474*4882a593Smuzhiyun static const struct file_operations pmu_device_fops = {
2475*4882a593Smuzhiyun 	.read		= pmu_read,
2476*4882a593Smuzhiyun 	.write		= pmu_write,
2477*4882a593Smuzhiyun 	.poll		= pmu_fpoll,
2478*4882a593Smuzhiyun 	.unlocked_ioctl	= pmu_unlocked_ioctl,
2479*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
2480*4882a593Smuzhiyun 	.compat_ioctl	= compat_pmu_ioctl,
2481*4882a593Smuzhiyun #endif
2482*4882a593Smuzhiyun 	.open		= pmu_open,
2483*4882a593Smuzhiyun 	.release	= pmu_release,
2484*4882a593Smuzhiyun 	.llseek		= noop_llseek,
2485*4882a593Smuzhiyun };
2486*4882a593Smuzhiyun 
2487*4882a593Smuzhiyun static struct miscdevice pmu_device = {
2488*4882a593Smuzhiyun 	PMU_MINOR, "pmu", &pmu_device_fops
2489*4882a593Smuzhiyun };
2490*4882a593Smuzhiyun 
pmu_device_init(void)2491*4882a593Smuzhiyun static int pmu_device_init(void)
2492*4882a593Smuzhiyun {
2493*4882a593Smuzhiyun 	if (pmu_state == uninitialized)
2494*4882a593Smuzhiyun 		return 0;
2495*4882a593Smuzhiyun 	if (misc_register(&pmu_device) < 0)
2496*4882a593Smuzhiyun 		printk(KERN_ERR "via-pmu: cannot register misc device.\n");
2497*4882a593Smuzhiyun 	return 0;
2498*4882a593Smuzhiyun }
2499*4882a593Smuzhiyun device_initcall(pmu_device_init);
2500*4882a593Smuzhiyun 
2501*4882a593Smuzhiyun 
2502*4882a593Smuzhiyun #ifdef DEBUG_SLEEP
2503*4882a593Smuzhiyun static inline void
polled_handshake(void)2504*4882a593Smuzhiyun polled_handshake(void)
2505*4882a593Smuzhiyun {
2506*4882a593Smuzhiyun 	via2[B] &= ~TREQ; eieio();
2507*4882a593Smuzhiyun 	while ((via2[B] & TACK) != 0)
2508*4882a593Smuzhiyun 		;
2509*4882a593Smuzhiyun 	via2[B] |= TREQ; eieio();
2510*4882a593Smuzhiyun 	while ((via2[B] & TACK) == 0)
2511*4882a593Smuzhiyun 		;
2512*4882a593Smuzhiyun }
2513*4882a593Smuzhiyun 
2514*4882a593Smuzhiyun static inline void
polled_send_byte(int x)2515*4882a593Smuzhiyun polled_send_byte(int x)
2516*4882a593Smuzhiyun {
2517*4882a593Smuzhiyun 	via1[ACR] |= SR_OUT | SR_EXT; eieio();
2518*4882a593Smuzhiyun 	via1[SR] = x; eieio();
2519*4882a593Smuzhiyun 	polled_handshake();
2520*4882a593Smuzhiyun }
2521*4882a593Smuzhiyun 
2522*4882a593Smuzhiyun static inline int
polled_recv_byte(void)2523*4882a593Smuzhiyun polled_recv_byte(void)
2524*4882a593Smuzhiyun {
2525*4882a593Smuzhiyun 	int x;
2526*4882a593Smuzhiyun 
2527*4882a593Smuzhiyun 	via1[ACR] = (via1[ACR] & ~SR_OUT) | SR_EXT; eieio();
2528*4882a593Smuzhiyun 	x = via1[SR]; eieio();
2529*4882a593Smuzhiyun 	polled_handshake();
2530*4882a593Smuzhiyun 	x = via1[SR]; eieio();
2531*4882a593Smuzhiyun 	return x;
2532*4882a593Smuzhiyun }
2533*4882a593Smuzhiyun 
2534*4882a593Smuzhiyun int
pmu_polled_request(struct adb_request * req)2535*4882a593Smuzhiyun pmu_polled_request(struct adb_request *req)
2536*4882a593Smuzhiyun {
2537*4882a593Smuzhiyun 	unsigned long flags;
2538*4882a593Smuzhiyun 	int i, l, c;
2539*4882a593Smuzhiyun 
2540*4882a593Smuzhiyun 	req->complete = 1;
2541*4882a593Smuzhiyun 	c = req->data[0];
2542*4882a593Smuzhiyun 	l = pmu_data_len[c][0];
2543*4882a593Smuzhiyun 	if (l >= 0 && req->nbytes != l + 1)
2544*4882a593Smuzhiyun 		return -EINVAL;
2545*4882a593Smuzhiyun 
2546*4882a593Smuzhiyun 	local_irq_save(flags);
2547*4882a593Smuzhiyun 	while (pmu_state != idle)
2548*4882a593Smuzhiyun 		pmu_poll();
2549*4882a593Smuzhiyun 
2550*4882a593Smuzhiyun 	while ((via2[B] & TACK) == 0)
2551*4882a593Smuzhiyun 		;
2552*4882a593Smuzhiyun 	polled_send_byte(c);
2553*4882a593Smuzhiyun 	if (l < 0) {
2554*4882a593Smuzhiyun 		l = req->nbytes - 1;
2555*4882a593Smuzhiyun 		polled_send_byte(l);
2556*4882a593Smuzhiyun 	}
2557*4882a593Smuzhiyun 	for (i = 1; i <= l; ++i)
2558*4882a593Smuzhiyun 		polled_send_byte(req->data[i]);
2559*4882a593Smuzhiyun 
2560*4882a593Smuzhiyun 	l = pmu_data_len[c][1];
2561*4882a593Smuzhiyun 	if (l < 0)
2562*4882a593Smuzhiyun 		l = polled_recv_byte();
2563*4882a593Smuzhiyun 	for (i = 0; i < l; ++i)
2564*4882a593Smuzhiyun 		req->reply[i + req->reply_len] = polled_recv_byte();
2565*4882a593Smuzhiyun 
2566*4882a593Smuzhiyun 	if (req->done)
2567*4882a593Smuzhiyun 		(*req->done)(req);
2568*4882a593Smuzhiyun 
2569*4882a593Smuzhiyun 	local_irq_restore(flags);
2570*4882a593Smuzhiyun 	return 0;
2571*4882a593Smuzhiyun }
2572*4882a593Smuzhiyun 
2573*4882a593Smuzhiyun /* N.B. This doesn't work on the 3400 */
pmu_blink(int n)2574*4882a593Smuzhiyun void pmu_blink(int n)
2575*4882a593Smuzhiyun {
2576*4882a593Smuzhiyun 	struct adb_request req;
2577*4882a593Smuzhiyun 
2578*4882a593Smuzhiyun 	memset(&req, 0, sizeof(req));
2579*4882a593Smuzhiyun 
2580*4882a593Smuzhiyun 	for (; n > 0; --n) {
2581*4882a593Smuzhiyun 		req.nbytes = 4;
2582*4882a593Smuzhiyun 		req.done = NULL;
2583*4882a593Smuzhiyun 		req.data[0] = 0xee;
2584*4882a593Smuzhiyun 		req.data[1] = 4;
2585*4882a593Smuzhiyun 		req.data[2] = 0;
2586*4882a593Smuzhiyun 		req.data[3] = 1;
2587*4882a593Smuzhiyun 		req.reply[0] = ADB_RET_OK;
2588*4882a593Smuzhiyun 		req.reply_len = 1;
2589*4882a593Smuzhiyun 		req.reply_expected = 0;
2590*4882a593Smuzhiyun 		pmu_polled_request(&req);
2591*4882a593Smuzhiyun 		mdelay(50);
2592*4882a593Smuzhiyun 		req.nbytes = 4;
2593*4882a593Smuzhiyun 		req.done = NULL;
2594*4882a593Smuzhiyun 		req.data[0] = 0xee;
2595*4882a593Smuzhiyun 		req.data[1] = 4;
2596*4882a593Smuzhiyun 		req.data[2] = 0;
2597*4882a593Smuzhiyun 		req.data[3] = 0;
2598*4882a593Smuzhiyun 		req.reply[0] = ADB_RET_OK;
2599*4882a593Smuzhiyun 		req.reply_len = 1;
2600*4882a593Smuzhiyun 		req.reply_expected = 0;
2601*4882a593Smuzhiyun 		pmu_polled_request(&req);
2602*4882a593Smuzhiyun 		mdelay(50);
2603*4882a593Smuzhiyun 	}
2604*4882a593Smuzhiyun 	mdelay(50);
2605*4882a593Smuzhiyun }
2606*4882a593Smuzhiyun #endif /* DEBUG_SLEEP */
2607*4882a593Smuzhiyun 
2608*4882a593Smuzhiyun #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
2609*4882a593Smuzhiyun int pmu_sys_suspended;
2610*4882a593Smuzhiyun 
pmu_syscore_suspend(void)2611*4882a593Smuzhiyun static int pmu_syscore_suspend(void)
2612*4882a593Smuzhiyun {
2613*4882a593Smuzhiyun 	/* Suspend PMU event interrupts */
2614*4882a593Smuzhiyun 	pmu_suspend();
2615*4882a593Smuzhiyun 	pmu_sys_suspended = 1;
2616*4882a593Smuzhiyun 
2617*4882a593Smuzhiyun #ifdef CONFIG_PMAC_BACKLIGHT
2618*4882a593Smuzhiyun 	/* Tell backlight code not to muck around with the chip anymore */
2619*4882a593Smuzhiyun 	pmu_backlight_set_sleep(1);
2620*4882a593Smuzhiyun #endif
2621*4882a593Smuzhiyun 
2622*4882a593Smuzhiyun 	return 0;
2623*4882a593Smuzhiyun }
2624*4882a593Smuzhiyun 
pmu_syscore_resume(void)2625*4882a593Smuzhiyun static void pmu_syscore_resume(void)
2626*4882a593Smuzhiyun {
2627*4882a593Smuzhiyun 	struct adb_request req;
2628*4882a593Smuzhiyun 
2629*4882a593Smuzhiyun 	if (!pmu_sys_suspended)
2630*4882a593Smuzhiyun 		return;
2631*4882a593Smuzhiyun 
2632*4882a593Smuzhiyun 	/* Tell PMU we are ready */
2633*4882a593Smuzhiyun 	pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
2634*4882a593Smuzhiyun 	pmu_wait_complete(&req);
2635*4882a593Smuzhiyun 
2636*4882a593Smuzhiyun #ifdef CONFIG_PMAC_BACKLIGHT
2637*4882a593Smuzhiyun 	/* Tell backlight code it can use the chip again */
2638*4882a593Smuzhiyun 	pmu_backlight_set_sleep(0);
2639*4882a593Smuzhiyun #endif
2640*4882a593Smuzhiyun 	/* Resume PMU event interrupts */
2641*4882a593Smuzhiyun 	pmu_resume();
2642*4882a593Smuzhiyun 	pmu_sys_suspended = 0;
2643*4882a593Smuzhiyun }
2644*4882a593Smuzhiyun 
2645*4882a593Smuzhiyun static struct syscore_ops pmu_syscore_ops = {
2646*4882a593Smuzhiyun 	.suspend = pmu_syscore_suspend,
2647*4882a593Smuzhiyun 	.resume = pmu_syscore_resume,
2648*4882a593Smuzhiyun };
2649*4882a593Smuzhiyun 
pmu_syscore_register(void)2650*4882a593Smuzhiyun static int pmu_syscore_register(void)
2651*4882a593Smuzhiyun {
2652*4882a593Smuzhiyun 	register_syscore_ops(&pmu_syscore_ops);
2653*4882a593Smuzhiyun 
2654*4882a593Smuzhiyun 	return 0;
2655*4882a593Smuzhiyun }
2656*4882a593Smuzhiyun subsys_initcall(pmu_syscore_register);
2657*4882a593Smuzhiyun #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
2658*4882a593Smuzhiyun 
2659*4882a593Smuzhiyun EXPORT_SYMBOL(pmu_request);
2660*4882a593Smuzhiyun EXPORT_SYMBOL(pmu_queue_request);
2661*4882a593Smuzhiyun EXPORT_SYMBOL(pmu_poll);
2662*4882a593Smuzhiyun EXPORT_SYMBOL(pmu_poll_adb);
2663*4882a593Smuzhiyun EXPORT_SYMBOL(pmu_wait_complete);
2664*4882a593Smuzhiyun EXPORT_SYMBOL(pmu_suspend);
2665*4882a593Smuzhiyun EXPORT_SYMBOL(pmu_resume);
2666*4882a593Smuzhiyun EXPORT_SYMBOL(pmu_unlock);
2667*4882a593Smuzhiyun #if defined(CONFIG_PPC32)
2668*4882a593Smuzhiyun EXPORT_SYMBOL(pmu_enable_irled);
2669*4882a593Smuzhiyun EXPORT_SYMBOL(pmu_battery_count);
2670*4882a593Smuzhiyun EXPORT_SYMBOL(pmu_batteries);
2671*4882a593Smuzhiyun EXPORT_SYMBOL(pmu_power_flags);
2672*4882a593Smuzhiyun #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
2673*4882a593Smuzhiyun 
2674