1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * PowerMac G5 SMU driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2004 J. Mayer <l_indien@magic.fr>
6*4882a593Smuzhiyun * Copyright 2005 Benjamin Herrenschmidt, IBM Corp.
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun /*
10*4882a593Smuzhiyun * TODO:
11*4882a593Smuzhiyun * - maybe add timeout to commands ?
12*4882a593Smuzhiyun * - blocking version of time functions
13*4882a593Smuzhiyun * - polling version of i2c commands (including timer that works with
14*4882a593Smuzhiyun * interrupts off)
15*4882a593Smuzhiyun * - maybe avoid some data copies with i2c by directly using the smu cmd
16*4882a593Smuzhiyun * buffer and a lower level internal interface
17*4882a593Smuzhiyun * - understand SMU -> CPU events and implement reception of them via
18*4882a593Smuzhiyun * the userland interface
19*4882a593Smuzhiyun */
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include <linux/types.h>
22*4882a593Smuzhiyun #include <linux/kernel.h>
23*4882a593Smuzhiyun #include <linux/device.h>
24*4882a593Smuzhiyun #include <linux/dmapool.h>
25*4882a593Smuzhiyun #include <linux/memblock.h>
26*4882a593Smuzhiyun #include <linux/vmalloc.h>
27*4882a593Smuzhiyun #include <linux/highmem.h>
28*4882a593Smuzhiyun #include <linux/jiffies.h>
29*4882a593Smuzhiyun #include <linux/interrupt.h>
30*4882a593Smuzhiyun #include <linux/rtc.h>
31*4882a593Smuzhiyun #include <linux/completion.h>
32*4882a593Smuzhiyun #include <linux/miscdevice.h>
33*4882a593Smuzhiyun #include <linux/delay.h>
34*4882a593Smuzhiyun #include <linux/poll.h>
35*4882a593Smuzhiyun #include <linux/mutex.h>
36*4882a593Smuzhiyun #include <linux/of_device.h>
37*4882a593Smuzhiyun #include <linux/of_irq.h>
38*4882a593Smuzhiyun #include <linux/of_platform.h>
39*4882a593Smuzhiyun #include <linux/slab.h>
40*4882a593Smuzhiyun #include <linux/sched/signal.h>
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun #include <asm/byteorder.h>
43*4882a593Smuzhiyun #include <asm/io.h>
44*4882a593Smuzhiyun #include <asm/prom.h>
45*4882a593Smuzhiyun #include <asm/machdep.h>
46*4882a593Smuzhiyun #include <asm/pmac_feature.h>
47*4882a593Smuzhiyun #include <asm/smu.h>
48*4882a593Smuzhiyun #include <asm/sections.h>
49*4882a593Smuzhiyun #include <linux/uaccess.h>
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #define VERSION "0.7"
52*4882a593Smuzhiyun #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp."
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #undef DEBUG_SMU
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun #ifdef DEBUG_SMU
57*4882a593Smuzhiyun #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
58*4882a593Smuzhiyun #else
59*4882a593Smuzhiyun #define DPRINTK(fmt, args...) do { } while (0)
60*4882a593Smuzhiyun #endif
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun /*
63*4882a593Smuzhiyun * This is the command buffer passed to the SMU hardware
64*4882a593Smuzhiyun */
65*4882a593Smuzhiyun #define SMU_MAX_DATA 254
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun struct smu_cmd_buf {
68*4882a593Smuzhiyun u8 cmd;
69*4882a593Smuzhiyun u8 length;
70*4882a593Smuzhiyun u8 data[SMU_MAX_DATA];
71*4882a593Smuzhiyun };
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun struct smu_device {
74*4882a593Smuzhiyun spinlock_t lock;
75*4882a593Smuzhiyun struct device_node *of_node;
76*4882a593Smuzhiyun struct platform_device *of_dev;
77*4882a593Smuzhiyun int doorbell; /* doorbell gpio */
78*4882a593Smuzhiyun u32 __iomem *db_buf; /* doorbell buffer */
79*4882a593Smuzhiyun struct device_node *db_node;
80*4882a593Smuzhiyun unsigned int db_irq;
81*4882a593Smuzhiyun int msg;
82*4882a593Smuzhiyun struct device_node *msg_node;
83*4882a593Smuzhiyun unsigned int msg_irq;
84*4882a593Smuzhiyun struct smu_cmd_buf *cmd_buf; /* command buffer virtual */
85*4882a593Smuzhiyun u32 cmd_buf_abs; /* command buffer absolute */
86*4882a593Smuzhiyun struct list_head cmd_list;
87*4882a593Smuzhiyun struct smu_cmd *cmd_cur; /* pending command */
88*4882a593Smuzhiyun int broken_nap;
89*4882a593Smuzhiyun struct list_head cmd_i2c_list;
90*4882a593Smuzhiyun struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */
91*4882a593Smuzhiyun struct timer_list i2c_timer;
92*4882a593Smuzhiyun };
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun /*
95*4882a593Smuzhiyun * I don't think there will ever be more than one SMU, so
96*4882a593Smuzhiyun * for now, just hard code that
97*4882a593Smuzhiyun */
98*4882a593Smuzhiyun static DEFINE_MUTEX(smu_mutex);
99*4882a593Smuzhiyun static struct smu_device *smu;
100*4882a593Smuzhiyun static DEFINE_MUTEX(smu_part_access);
101*4882a593Smuzhiyun static int smu_irq_inited;
102*4882a593Smuzhiyun static unsigned long smu_cmdbuf_abs;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun static void smu_i2c_retry(struct timer_list *t);
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun /*
107*4882a593Smuzhiyun * SMU driver low level stuff
108*4882a593Smuzhiyun */
109*4882a593Smuzhiyun
smu_start_cmd(void)110*4882a593Smuzhiyun static void smu_start_cmd(void)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun unsigned long faddr, fend;
113*4882a593Smuzhiyun struct smu_cmd *cmd;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun if (list_empty(&smu->cmd_list))
116*4882a593Smuzhiyun return;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun /* Fetch first command in queue */
119*4882a593Smuzhiyun cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link);
120*4882a593Smuzhiyun smu->cmd_cur = cmd;
121*4882a593Smuzhiyun list_del(&cmd->link);
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd,
124*4882a593Smuzhiyun cmd->data_len);
125*4882a593Smuzhiyun DPRINTK("SMU: data buffer: %8ph\n", cmd->data_buf);
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun /* Fill the SMU command buffer */
128*4882a593Smuzhiyun smu->cmd_buf->cmd = cmd->cmd;
129*4882a593Smuzhiyun smu->cmd_buf->length = cmd->data_len;
130*4882a593Smuzhiyun memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len);
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun /* Flush command and data to RAM */
133*4882a593Smuzhiyun faddr = (unsigned long)smu->cmd_buf;
134*4882a593Smuzhiyun fend = faddr + smu->cmd_buf->length + 2;
135*4882a593Smuzhiyun flush_dcache_range(faddr, fend);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun /* We also disable NAP mode for the duration of the command
139*4882a593Smuzhiyun * on U3 based machines.
140*4882a593Smuzhiyun * This is slightly racy as it can be written back to 1 by a sysctl
141*4882a593Smuzhiyun * but that never happens in practice. There seem to be an issue with
142*4882a593Smuzhiyun * U3 based machines such as the iMac G5 where napping for the
143*4882a593Smuzhiyun * whole duration of the command prevents the SMU from fetching it
144*4882a593Smuzhiyun * from memory. This might be related to the strange i2c based
145*4882a593Smuzhiyun * mechanism the SMU uses to access memory.
146*4882a593Smuzhiyun */
147*4882a593Smuzhiyun if (smu->broken_nap)
148*4882a593Smuzhiyun powersave_nap = 0;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun /* This isn't exactly a DMA mapping here, I suspect
151*4882a593Smuzhiyun * the SMU is actually communicating with us via i2c to the
152*4882a593Smuzhiyun * northbridge or the CPU to access RAM.
153*4882a593Smuzhiyun */
154*4882a593Smuzhiyun writel(smu->cmd_buf_abs, smu->db_buf);
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun /* Ring the SMU doorbell */
157*4882a593Smuzhiyun pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4);
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun
smu_db_intr(int irq,void * arg)161*4882a593Smuzhiyun static irqreturn_t smu_db_intr(int irq, void *arg)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun unsigned long flags;
164*4882a593Smuzhiyun struct smu_cmd *cmd;
165*4882a593Smuzhiyun void (*done)(struct smu_cmd *cmd, void *misc) = NULL;
166*4882a593Smuzhiyun void *misc = NULL;
167*4882a593Smuzhiyun u8 gpio;
168*4882a593Smuzhiyun int rc = 0;
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun /* SMU completed the command, well, we hope, let's make sure
171*4882a593Smuzhiyun * of it
172*4882a593Smuzhiyun */
173*4882a593Smuzhiyun spin_lock_irqsave(&smu->lock, flags);
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
176*4882a593Smuzhiyun if ((gpio & 7) != 7) {
177*4882a593Smuzhiyun spin_unlock_irqrestore(&smu->lock, flags);
178*4882a593Smuzhiyun return IRQ_HANDLED;
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun cmd = smu->cmd_cur;
182*4882a593Smuzhiyun smu->cmd_cur = NULL;
183*4882a593Smuzhiyun if (cmd == NULL)
184*4882a593Smuzhiyun goto bail;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun if (rc == 0) {
187*4882a593Smuzhiyun unsigned long faddr;
188*4882a593Smuzhiyun int reply_len;
189*4882a593Smuzhiyun u8 ack;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun /* CPU might have brought back the cache line, so we need
192*4882a593Smuzhiyun * to flush again before peeking at the SMU response. We
193*4882a593Smuzhiyun * flush the entire buffer for now as we haven't read the
194*4882a593Smuzhiyun * reply length (it's only 2 cache lines anyway)
195*4882a593Smuzhiyun */
196*4882a593Smuzhiyun faddr = (unsigned long)smu->cmd_buf;
197*4882a593Smuzhiyun flush_dcache_range(faddr, faddr + 256);
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun /* Now check ack */
200*4882a593Smuzhiyun ack = (~cmd->cmd) & 0xff;
201*4882a593Smuzhiyun if (ack != smu->cmd_buf->cmd) {
202*4882a593Smuzhiyun DPRINTK("SMU: incorrect ack, want %x got %x\n",
203*4882a593Smuzhiyun ack, smu->cmd_buf->cmd);
204*4882a593Smuzhiyun rc = -EIO;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun reply_len = rc == 0 ? smu->cmd_buf->length : 0;
207*4882a593Smuzhiyun DPRINTK("SMU: reply len: %d\n", reply_len);
208*4882a593Smuzhiyun if (reply_len > cmd->reply_len) {
209*4882a593Smuzhiyun printk(KERN_WARNING "SMU: reply buffer too small,"
210*4882a593Smuzhiyun "got %d bytes for a %d bytes buffer\n",
211*4882a593Smuzhiyun reply_len, cmd->reply_len);
212*4882a593Smuzhiyun reply_len = cmd->reply_len;
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun cmd->reply_len = reply_len;
215*4882a593Smuzhiyun if (cmd->reply_buf && reply_len)
216*4882a593Smuzhiyun memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len);
217*4882a593Smuzhiyun }
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun /* Now complete the command. Write status last in order as we lost
220*4882a593Smuzhiyun * ownership of the command structure as soon as it's no longer -1
221*4882a593Smuzhiyun */
222*4882a593Smuzhiyun done = cmd->done;
223*4882a593Smuzhiyun misc = cmd->misc;
224*4882a593Smuzhiyun mb();
225*4882a593Smuzhiyun cmd->status = rc;
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun /* Re-enable NAP mode */
228*4882a593Smuzhiyun if (smu->broken_nap)
229*4882a593Smuzhiyun powersave_nap = 1;
230*4882a593Smuzhiyun bail:
231*4882a593Smuzhiyun /* Start next command if any */
232*4882a593Smuzhiyun smu_start_cmd();
233*4882a593Smuzhiyun spin_unlock_irqrestore(&smu->lock, flags);
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun /* Call command completion handler if any */
236*4882a593Smuzhiyun if (done)
237*4882a593Smuzhiyun done(cmd, misc);
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun /* It's an edge interrupt, nothing to do */
240*4882a593Smuzhiyun return IRQ_HANDLED;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun
smu_msg_intr(int irq,void * arg)244*4882a593Smuzhiyun static irqreturn_t smu_msg_intr(int irq, void *arg)
245*4882a593Smuzhiyun {
246*4882a593Smuzhiyun /* I don't quite know what to do with this one, we seem to never
247*4882a593Smuzhiyun * receive it, so I suspect we have to arm it someway in the SMU
248*4882a593Smuzhiyun * to start getting events that way.
249*4882a593Smuzhiyun */
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun printk(KERN_INFO "SMU: message interrupt !\n");
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun /* It's an edge interrupt, nothing to do */
254*4882a593Smuzhiyun return IRQ_HANDLED;
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun /*
259*4882a593Smuzhiyun * Queued command management.
260*4882a593Smuzhiyun *
261*4882a593Smuzhiyun */
262*4882a593Smuzhiyun
smu_queue_cmd(struct smu_cmd * cmd)263*4882a593Smuzhiyun int smu_queue_cmd(struct smu_cmd *cmd)
264*4882a593Smuzhiyun {
265*4882a593Smuzhiyun unsigned long flags;
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun if (smu == NULL)
268*4882a593Smuzhiyun return -ENODEV;
269*4882a593Smuzhiyun if (cmd->data_len > SMU_MAX_DATA ||
270*4882a593Smuzhiyun cmd->reply_len > SMU_MAX_DATA)
271*4882a593Smuzhiyun return -EINVAL;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun cmd->status = 1;
274*4882a593Smuzhiyun spin_lock_irqsave(&smu->lock, flags);
275*4882a593Smuzhiyun list_add_tail(&cmd->link, &smu->cmd_list);
276*4882a593Smuzhiyun if (smu->cmd_cur == NULL)
277*4882a593Smuzhiyun smu_start_cmd();
278*4882a593Smuzhiyun spin_unlock_irqrestore(&smu->lock, flags);
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun /* Workaround for early calls when irq isn't available */
281*4882a593Smuzhiyun if (!smu_irq_inited || !smu->db_irq)
282*4882a593Smuzhiyun smu_spinwait_cmd(cmd);
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun return 0;
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun EXPORT_SYMBOL(smu_queue_cmd);
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun
smu_queue_simple(struct smu_simple_cmd * scmd,u8 command,unsigned int data_len,void (* done)(struct smu_cmd * cmd,void * misc),void * misc,...)289*4882a593Smuzhiyun int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
290*4882a593Smuzhiyun unsigned int data_len,
291*4882a593Smuzhiyun void (*done)(struct smu_cmd *cmd, void *misc),
292*4882a593Smuzhiyun void *misc, ...)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun struct smu_cmd *cmd = &scmd->cmd;
295*4882a593Smuzhiyun va_list list;
296*4882a593Smuzhiyun int i;
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun if (data_len > sizeof(scmd->buffer))
299*4882a593Smuzhiyun return -EINVAL;
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun memset(scmd, 0, sizeof(*scmd));
302*4882a593Smuzhiyun cmd->cmd = command;
303*4882a593Smuzhiyun cmd->data_len = data_len;
304*4882a593Smuzhiyun cmd->data_buf = scmd->buffer;
305*4882a593Smuzhiyun cmd->reply_len = sizeof(scmd->buffer);
306*4882a593Smuzhiyun cmd->reply_buf = scmd->buffer;
307*4882a593Smuzhiyun cmd->done = done;
308*4882a593Smuzhiyun cmd->misc = misc;
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun va_start(list, misc);
311*4882a593Smuzhiyun for (i = 0; i < data_len; ++i)
312*4882a593Smuzhiyun scmd->buffer[i] = (u8)va_arg(list, int);
313*4882a593Smuzhiyun va_end(list);
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun return smu_queue_cmd(cmd);
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun EXPORT_SYMBOL(smu_queue_simple);
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun
smu_poll(void)320*4882a593Smuzhiyun void smu_poll(void)
321*4882a593Smuzhiyun {
322*4882a593Smuzhiyun u8 gpio;
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun if (smu == NULL)
325*4882a593Smuzhiyun return;
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
328*4882a593Smuzhiyun if ((gpio & 7) == 7)
329*4882a593Smuzhiyun smu_db_intr(smu->db_irq, smu);
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun EXPORT_SYMBOL(smu_poll);
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun
smu_done_complete(struct smu_cmd * cmd,void * misc)334*4882a593Smuzhiyun void smu_done_complete(struct smu_cmd *cmd, void *misc)
335*4882a593Smuzhiyun {
336*4882a593Smuzhiyun struct completion *comp = misc;
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun complete(comp);
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun EXPORT_SYMBOL(smu_done_complete);
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun
smu_spinwait_cmd(struct smu_cmd * cmd)343*4882a593Smuzhiyun void smu_spinwait_cmd(struct smu_cmd *cmd)
344*4882a593Smuzhiyun {
345*4882a593Smuzhiyun while(cmd->status == 1)
346*4882a593Smuzhiyun smu_poll();
347*4882a593Smuzhiyun }
348*4882a593Smuzhiyun EXPORT_SYMBOL(smu_spinwait_cmd);
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun /* RTC low level commands */
bcd2hex(int n)352*4882a593Smuzhiyun static inline int bcd2hex (int n)
353*4882a593Smuzhiyun {
354*4882a593Smuzhiyun return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun
hex2bcd(int n)358*4882a593Smuzhiyun static inline int hex2bcd (int n)
359*4882a593Smuzhiyun {
360*4882a593Smuzhiyun return ((n / 10) << 4) + (n % 10);
361*4882a593Smuzhiyun }
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun
smu_fill_set_rtc_cmd(struct smu_cmd_buf * cmd_buf,struct rtc_time * time)364*4882a593Smuzhiyun static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf,
365*4882a593Smuzhiyun struct rtc_time *time)
366*4882a593Smuzhiyun {
367*4882a593Smuzhiyun cmd_buf->cmd = 0x8e;
368*4882a593Smuzhiyun cmd_buf->length = 8;
369*4882a593Smuzhiyun cmd_buf->data[0] = 0x80;
370*4882a593Smuzhiyun cmd_buf->data[1] = hex2bcd(time->tm_sec);
371*4882a593Smuzhiyun cmd_buf->data[2] = hex2bcd(time->tm_min);
372*4882a593Smuzhiyun cmd_buf->data[3] = hex2bcd(time->tm_hour);
373*4882a593Smuzhiyun cmd_buf->data[4] = time->tm_wday;
374*4882a593Smuzhiyun cmd_buf->data[5] = hex2bcd(time->tm_mday);
375*4882a593Smuzhiyun cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1;
376*4882a593Smuzhiyun cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun
smu_get_rtc_time(struct rtc_time * time,int spinwait)380*4882a593Smuzhiyun int smu_get_rtc_time(struct rtc_time *time, int spinwait)
381*4882a593Smuzhiyun {
382*4882a593Smuzhiyun struct smu_simple_cmd cmd;
383*4882a593Smuzhiyun int rc;
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun if (smu == NULL)
386*4882a593Smuzhiyun return -ENODEV;
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun memset(time, 0, sizeof(struct rtc_time));
389*4882a593Smuzhiyun rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL,
390*4882a593Smuzhiyun SMU_CMD_RTC_GET_DATETIME);
391*4882a593Smuzhiyun if (rc)
392*4882a593Smuzhiyun return rc;
393*4882a593Smuzhiyun smu_spinwait_simple(&cmd);
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun time->tm_sec = bcd2hex(cmd.buffer[0]);
396*4882a593Smuzhiyun time->tm_min = bcd2hex(cmd.buffer[1]);
397*4882a593Smuzhiyun time->tm_hour = bcd2hex(cmd.buffer[2]);
398*4882a593Smuzhiyun time->tm_wday = bcd2hex(cmd.buffer[3]);
399*4882a593Smuzhiyun time->tm_mday = bcd2hex(cmd.buffer[4]);
400*4882a593Smuzhiyun time->tm_mon = bcd2hex(cmd.buffer[5]) - 1;
401*4882a593Smuzhiyun time->tm_year = bcd2hex(cmd.buffer[6]) + 100;
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun return 0;
404*4882a593Smuzhiyun }
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun
smu_set_rtc_time(struct rtc_time * time,int spinwait)407*4882a593Smuzhiyun int smu_set_rtc_time(struct rtc_time *time, int spinwait)
408*4882a593Smuzhiyun {
409*4882a593Smuzhiyun struct smu_simple_cmd cmd;
410*4882a593Smuzhiyun int rc;
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun if (smu == NULL)
413*4882a593Smuzhiyun return -ENODEV;
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL,
416*4882a593Smuzhiyun SMU_CMD_RTC_SET_DATETIME,
417*4882a593Smuzhiyun hex2bcd(time->tm_sec),
418*4882a593Smuzhiyun hex2bcd(time->tm_min),
419*4882a593Smuzhiyun hex2bcd(time->tm_hour),
420*4882a593Smuzhiyun time->tm_wday,
421*4882a593Smuzhiyun hex2bcd(time->tm_mday),
422*4882a593Smuzhiyun hex2bcd(time->tm_mon) + 1,
423*4882a593Smuzhiyun hex2bcd(time->tm_year - 100));
424*4882a593Smuzhiyun if (rc)
425*4882a593Smuzhiyun return rc;
426*4882a593Smuzhiyun smu_spinwait_simple(&cmd);
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun return 0;
429*4882a593Smuzhiyun }
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun
smu_shutdown(void)432*4882a593Smuzhiyun void smu_shutdown(void)
433*4882a593Smuzhiyun {
434*4882a593Smuzhiyun struct smu_simple_cmd cmd;
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun if (smu == NULL)
437*4882a593Smuzhiyun return;
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL,
440*4882a593Smuzhiyun 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0))
441*4882a593Smuzhiyun return;
442*4882a593Smuzhiyun smu_spinwait_simple(&cmd);
443*4882a593Smuzhiyun for (;;)
444*4882a593Smuzhiyun ;
445*4882a593Smuzhiyun }
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun
smu_restart(void)448*4882a593Smuzhiyun void smu_restart(void)
449*4882a593Smuzhiyun {
450*4882a593Smuzhiyun struct smu_simple_cmd cmd;
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun if (smu == NULL)
453*4882a593Smuzhiyun return;
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL,
456*4882a593Smuzhiyun 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0))
457*4882a593Smuzhiyun return;
458*4882a593Smuzhiyun smu_spinwait_simple(&cmd);
459*4882a593Smuzhiyun for (;;)
460*4882a593Smuzhiyun ;
461*4882a593Smuzhiyun }
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun
smu_present(void)464*4882a593Smuzhiyun int smu_present(void)
465*4882a593Smuzhiyun {
466*4882a593Smuzhiyun return smu != NULL;
467*4882a593Smuzhiyun }
468*4882a593Smuzhiyun EXPORT_SYMBOL(smu_present);
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun
smu_init(void)471*4882a593Smuzhiyun int __init smu_init (void)
472*4882a593Smuzhiyun {
473*4882a593Smuzhiyun struct device_node *np;
474*4882a593Smuzhiyun const u32 *data;
475*4882a593Smuzhiyun int ret = 0;
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun np = of_find_node_by_type(NULL, "smu");
478*4882a593Smuzhiyun if (np == NULL)
479*4882a593Smuzhiyun return -ENODEV;
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR);
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun /*
484*4882a593Smuzhiyun * SMU based G5s need some memory below 2Gb. Thankfully this is
485*4882a593Smuzhiyun * called at a time where memblock is still available.
486*4882a593Smuzhiyun */
487*4882a593Smuzhiyun smu_cmdbuf_abs = memblock_phys_alloc_range(4096, 4096, 0, 0x80000000UL);
488*4882a593Smuzhiyun if (smu_cmdbuf_abs == 0) {
489*4882a593Smuzhiyun printk(KERN_ERR "SMU: Command buffer allocation failed !\n");
490*4882a593Smuzhiyun ret = -EINVAL;
491*4882a593Smuzhiyun goto fail_np;
492*4882a593Smuzhiyun }
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun smu = memblock_alloc(sizeof(struct smu_device), SMP_CACHE_BYTES);
495*4882a593Smuzhiyun if (!smu)
496*4882a593Smuzhiyun panic("%s: Failed to allocate %zu bytes\n", __func__,
497*4882a593Smuzhiyun sizeof(struct smu_device));
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun spin_lock_init(&smu->lock);
500*4882a593Smuzhiyun INIT_LIST_HEAD(&smu->cmd_list);
501*4882a593Smuzhiyun INIT_LIST_HEAD(&smu->cmd_i2c_list);
502*4882a593Smuzhiyun smu->of_node = np;
503*4882a593Smuzhiyun smu->db_irq = 0;
504*4882a593Smuzhiyun smu->msg_irq = 0;
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a
507*4882a593Smuzhiyun * 32 bits value safely
508*4882a593Smuzhiyun */
509*4882a593Smuzhiyun smu->cmd_buf_abs = (u32)smu_cmdbuf_abs;
510*4882a593Smuzhiyun smu->cmd_buf = __va(smu_cmdbuf_abs);
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun smu->db_node = of_find_node_by_name(NULL, "smu-doorbell");
513*4882a593Smuzhiyun if (smu->db_node == NULL) {
514*4882a593Smuzhiyun printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n");
515*4882a593Smuzhiyun ret = -ENXIO;
516*4882a593Smuzhiyun goto fail_bootmem;
517*4882a593Smuzhiyun }
518*4882a593Smuzhiyun data = of_get_property(smu->db_node, "reg", NULL);
519*4882a593Smuzhiyun if (data == NULL) {
520*4882a593Smuzhiyun printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n");
521*4882a593Smuzhiyun ret = -ENXIO;
522*4882a593Smuzhiyun goto fail_db_node;
523*4882a593Smuzhiyun }
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun /* Current setup has one doorbell GPIO that does both doorbell
526*4882a593Smuzhiyun * and ack. GPIOs are at 0x50, best would be to find that out
527*4882a593Smuzhiyun * in the device-tree though.
528*4882a593Smuzhiyun */
529*4882a593Smuzhiyun smu->doorbell = *data;
530*4882a593Smuzhiyun if (smu->doorbell < 0x50)
531*4882a593Smuzhiyun smu->doorbell += 0x50;
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun /* Now look for the smu-interrupt GPIO */
534*4882a593Smuzhiyun do {
535*4882a593Smuzhiyun smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt");
536*4882a593Smuzhiyun if (smu->msg_node == NULL)
537*4882a593Smuzhiyun break;
538*4882a593Smuzhiyun data = of_get_property(smu->msg_node, "reg", NULL);
539*4882a593Smuzhiyun if (data == NULL) {
540*4882a593Smuzhiyun of_node_put(smu->msg_node);
541*4882a593Smuzhiyun smu->msg_node = NULL;
542*4882a593Smuzhiyun break;
543*4882a593Smuzhiyun }
544*4882a593Smuzhiyun smu->msg = *data;
545*4882a593Smuzhiyun if (smu->msg < 0x50)
546*4882a593Smuzhiyun smu->msg += 0x50;
547*4882a593Smuzhiyun } while(0);
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun /* Doorbell buffer is currently hard-coded, I didn't find a proper
550*4882a593Smuzhiyun * device-tree entry giving the address. Best would probably to use
551*4882a593Smuzhiyun * an offset for K2 base though, but let's do it that way for now.
552*4882a593Smuzhiyun */
553*4882a593Smuzhiyun smu->db_buf = ioremap(0x8000860c, 0x1000);
554*4882a593Smuzhiyun if (smu->db_buf == NULL) {
555*4882a593Smuzhiyun printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n");
556*4882a593Smuzhiyun ret = -ENXIO;
557*4882a593Smuzhiyun goto fail_msg_node;
558*4882a593Smuzhiyun }
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun /* U3 has an issue with NAP mode when issuing SMU commands */
561*4882a593Smuzhiyun smu->broken_nap = pmac_get_uninorth_variant() < 4;
562*4882a593Smuzhiyun if (smu->broken_nap)
563*4882a593Smuzhiyun printk(KERN_INFO "SMU: using NAP mode workaround\n");
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun sys_ctrler = SYS_CTRLER_SMU;
566*4882a593Smuzhiyun return 0;
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun fail_msg_node:
569*4882a593Smuzhiyun of_node_put(smu->msg_node);
570*4882a593Smuzhiyun fail_db_node:
571*4882a593Smuzhiyun of_node_put(smu->db_node);
572*4882a593Smuzhiyun fail_bootmem:
573*4882a593Smuzhiyun memblock_free(__pa(smu), sizeof(struct smu_device));
574*4882a593Smuzhiyun smu = NULL;
575*4882a593Smuzhiyun fail_np:
576*4882a593Smuzhiyun of_node_put(np);
577*4882a593Smuzhiyun return ret;
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun
smu_late_init(void)581*4882a593Smuzhiyun static int smu_late_init(void)
582*4882a593Smuzhiyun {
583*4882a593Smuzhiyun if (!smu)
584*4882a593Smuzhiyun return 0;
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun timer_setup(&smu->i2c_timer, smu_i2c_retry, 0);
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun if (smu->db_node) {
589*4882a593Smuzhiyun smu->db_irq = irq_of_parse_and_map(smu->db_node, 0);
590*4882a593Smuzhiyun if (!smu->db_irq)
591*4882a593Smuzhiyun printk(KERN_ERR "smu: failed to map irq for node %pOF\n",
592*4882a593Smuzhiyun smu->db_node);
593*4882a593Smuzhiyun }
594*4882a593Smuzhiyun if (smu->msg_node) {
595*4882a593Smuzhiyun smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0);
596*4882a593Smuzhiyun if (!smu->msg_irq)
597*4882a593Smuzhiyun printk(KERN_ERR "smu: failed to map irq for node %pOF\n",
598*4882a593Smuzhiyun smu->msg_node);
599*4882a593Smuzhiyun }
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun /*
602*4882a593Smuzhiyun * Try to request the interrupts
603*4882a593Smuzhiyun */
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun if (smu->db_irq) {
606*4882a593Smuzhiyun if (request_irq(smu->db_irq, smu_db_intr,
607*4882a593Smuzhiyun IRQF_SHARED, "SMU doorbell", smu) < 0) {
608*4882a593Smuzhiyun printk(KERN_WARNING "SMU: can't "
609*4882a593Smuzhiyun "request interrupt %d\n",
610*4882a593Smuzhiyun smu->db_irq);
611*4882a593Smuzhiyun smu->db_irq = 0;
612*4882a593Smuzhiyun }
613*4882a593Smuzhiyun }
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun if (smu->msg_irq) {
616*4882a593Smuzhiyun if (request_irq(smu->msg_irq, smu_msg_intr,
617*4882a593Smuzhiyun IRQF_SHARED, "SMU message", smu) < 0) {
618*4882a593Smuzhiyun printk(KERN_WARNING "SMU: can't "
619*4882a593Smuzhiyun "request interrupt %d\n",
620*4882a593Smuzhiyun smu->msg_irq);
621*4882a593Smuzhiyun smu->msg_irq = 0;
622*4882a593Smuzhiyun }
623*4882a593Smuzhiyun }
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun smu_irq_inited = 1;
626*4882a593Smuzhiyun return 0;
627*4882a593Smuzhiyun }
628*4882a593Smuzhiyun /* This has to be before arch_initcall as the low i2c stuff relies on the
629*4882a593Smuzhiyun * above having been done before we reach arch_initcalls
630*4882a593Smuzhiyun */
631*4882a593Smuzhiyun core_initcall(smu_late_init);
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun /*
634*4882a593Smuzhiyun * sysfs visibility
635*4882a593Smuzhiyun */
636*4882a593Smuzhiyun
smu_expose_childs(struct work_struct * unused)637*4882a593Smuzhiyun static void smu_expose_childs(struct work_struct *unused)
638*4882a593Smuzhiyun {
639*4882a593Smuzhiyun struct device_node *np;
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun for_each_child_of_node(smu->of_node, np)
642*4882a593Smuzhiyun if (of_device_is_compatible(np, "smu-sensors"))
643*4882a593Smuzhiyun of_platform_device_create(np, "smu-sensors",
644*4882a593Smuzhiyun &smu->of_dev->dev);
645*4882a593Smuzhiyun }
646*4882a593Smuzhiyun
647*4882a593Smuzhiyun static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs);
648*4882a593Smuzhiyun
smu_platform_probe(struct platform_device * dev)649*4882a593Smuzhiyun static int smu_platform_probe(struct platform_device* dev)
650*4882a593Smuzhiyun {
651*4882a593Smuzhiyun if (!smu)
652*4882a593Smuzhiyun return -ENODEV;
653*4882a593Smuzhiyun smu->of_dev = dev;
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun /*
656*4882a593Smuzhiyun * Ok, we are matched, now expose all i2c busses. We have to defer
657*4882a593Smuzhiyun * that unfortunately or it would deadlock inside the device model
658*4882a593Smuzhiyun */
659*4882a593Smuzhiyun schedule_work(&smu_expose_childs_work);
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun return 0;
662*4882a593Smuzhiyun }
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun static const struct of_device_id smu_platform_match[] =
665*4882a593Smuzhiyun {
666*4882a593Smuzhiyun {
667*4882a593Smuzhiyun .type = "smu",
668*4882a593Smuzhiyun },
669*4882a593Smuzhiyun {},
670*4882a593Smuzhiyun };
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun static struct platform_driver smu_of_platform_driver =
673*4882a593Smuzhiyun {
674*4882a593Smuzhiyun .driver = {
675*4882a593Smuzhiyun .name = "smu",
676*4882a593Smuzhiyun .of_match_table = smu_platform_match,
677*4882a593Smuzhiyun },
678*4882a593Smuzhiyun .probe = smu_platform_probe,
679*4882a593Smuzhiyun };
680*4882a593Smuzhiyun
smu_init_sysfs(void)681*4882a593Smuzhiyun static int __init smu_init_sysfs(void)
682*4882a593Smuzhiyun {
683*4882a593Smuzhiyun /*
684*4882a593Smuzhiyun * For now, we don't power manage machines with an SMU chip,
685*4882a593Smuzhiyun * I'm a bit too far from figuring out how that works with those
686*4882a593Smuzhiyun * new chipsets, but that will come back and bite us
687*4882a593Smuzhiyun */
688*4882a593Smuzhiyun platform_driver_register(&smu_of_platform_driver);
689*4882a593Smuzhiyun return 0;
690*4882a593Smuzhiyun }
691*4882a593Smuzhiyun
692*4882a593Smuzhiyun device_initcall(smu_init_sysfs);
693*4882a593Smuzhiyun
smu_get_ofdev(void)694*4882a593Smuzhiyun struct platform_device *smu_get_ofdev(void)
695*4882a593Smuzhiyun {
696*4882a593Smuzhiyun if (!smu)
697*4882a593Smuzhiyun return NULL;
698*4882a593Smuzhiyun return smu->of_dev;
699*4882a593Smuzhiyun }
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(smu_get_ofdev);
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun /*
704*4882a593Smuzhiyun * i2c interface
705*4882a593Smuzhiyun */
706*4882a593Smuzhiyun
smu_i2c_complete_command(struct smu_i2c_cmd * cmd,int fail)707*4882a593Smuzhiyun static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail)
708*4882a593Smuzhiyun {
709*4882a593Smuzhiyun void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done;
710*4882a593Smuzhiyun void *misc = cmd->misc;
711*4882a593Smuzhiyun unsigned long flags;
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun /* Check for read case */
714*4882a593Smuzhiyun if (!fail && cmd->read) {
715*4882a593Smuzhiyun if (cmd->pdata[0] < 1)
716*4882a593Smuzhiyun fail = 1;
717*4882a593Smuzhiyun else
718*4882a593Smuzhiyun memcpy(cmd->info.data, &cmd->pdata[1],
719*4882a593Smuzhiyun cmd->info.datalen);
720*4882a593Smuzhiyun }
721*4882a593Smuzhiyun
722*4882a593Smuzhiyun DPRINTK("SMU: completing, success: %d\n", !fail);
723*4882a593Smuzhiyun
724*4882a593Smuzhiyun /* Update status and mark no pending i2c command with lock
725*4882a593Smuzhiyun * held so nobody comes in while we dequeue an eventual
726*4882a593Smuzhiyun * pending next i2c command
727*4882a593Smuzhiyun */
728*4882a593Smuzhiyun spin_lock_irqsave(&smu->lock, flags);
729*4882a593Smuzhiyun smu->cmd_i2c_cur = NULL;
730*4882a593Smuzhiyun wmb();
731*4882a593Smuzhiyun cmd->status = fail ? -EIO : 0;
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun /* Is there another i2c command waiting ? */
734*4882a593Smuzhiyun if (!list_empty(&smu->cmd_i2c_list)) {
735*4882a593Smuzhiyun struct smu_i2c_cmd *newcmd;
736*4882a593Smuzhiyun
737*4882a593Smuzhiyun /* Fetch it, new current, remove from list */
738*4882a593Smuzhiyun newcmd = list_entry(smu->cmd_i2c_list.next,
739*4882a593Smuzhiyun struct smu_i2c_cmd, link);
740*4882a593Smuzhiyun smu->cmd_i2c_cur = newcmd;
741*4882a593Smuzhiyun list_del(&cmd->link);
742*4882a593Smuzhiyun
743*4882a593Smuzhiyun /* Queue with low level smu */
744*4882a593Smuzhiyun list_add_tail(&cmd->scmd.link, &smu->cmd_list);
745*4882a593Smuzhiyun if (smu->cmd_cur == NULL)
746*4882a593Smuzhiyun smu_start_cmd();
747*4882a593Smuzhiyun }
748*4882a593Smuzhiyun spin_unlock_irqrestore(&smu->lock, flags);
749*4882a593Smuzhiyun
750*4882a593Smuzhiyun /* Call command completion handler if any */
751*4882a593Smuzhiyun if (done)
752*4882a593Smuzhiyun done(cmd, misc);
753*4882a593Smuzhiyun
754*4882a593Smuzhiyun }
755*4882a593Smuzhiyun
756*4882a593Smuzhiyun
smu_i2c_retry(struct timer_list * unused)757*4882a593Smuzhiyun static void smu_i2c_retry(struct timer_list *unused)
758*4882a593Smuzhiyun {
759*4882a593Smuzhiyun struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur;
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun DPRINTK("SMU: i2c failure, requeuing...\n");
762*4882a593Smuzhiyun
763*4882a593Smuzhiyun /* requeue command simply by resetting reply_len */
764*4882a593Smuzhiyun cmd->pdata[0] = 0xff;
765*4882a593Smuzhiyun cmd->scmd.reply_len = sizeof(cmd->pdata);
766*4882a593Smuzhiyun smu_queue_cmd(&cmd->scmd);
767*4882a593Smuzhiyun }
768*4882a593Smuzhiyun
769*4882a593Smuzhiyun
smu_i2c_low_completion(struct smu_cmd * scmd,void * misc)770*4882a593Smuzhiyun static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc)
771*4882a593Smuzhiyun {
772*4882a593Smuzhiyun struct smu_i2c_cmd *cmd = misc;
773*4882a593Smuzhiyun int fail = 0;
774*4882a593Smuzhiyun
775*4882a593Smuzhiyun DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n",
776*4882a593Smuzhiyun cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len);
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun /* Check for possible status */
779*4882a593Smuzhiyun if (scmd->status < 0)
780*4882a593Smuzhiyun fail = 1;
781*4882a593Smuzhiyun else if (cmd->read) {
782*4882a593Smuzhiyun if (cmd->stage == 0)
783*4882a593Smuzhiyun fail = cmd->pdata[0] != 0;
784*4882a593Smuzhiyun else
785*4882a593Smuzhiyun fail = cmd->pdata[0] >= 0x80;
786*4882a593Smuzhiyun } else {
787*4882a593Smuzhiyun fail = cmd->pdata[0] != 0;
788*4882a593Smuzhiyun }
789*4882a593Smuzhiyun
790*4882a593Smuzhiyun /* Handle failures by requeuing command, after 5ms interval
791*4882a593Smuzhiyun */
792*4882a593Smuzhiyun if (fail && --cmd->retries > 0) {
793*4882a593Smuzhiyun DPRINTK("SMU: i2c failure, starting timer...\n");
794*4882a593Smuzhiyun BUG_ON(cmd != smu->cmd_i2c_cur);
795*4882a593Smuzhiyun if (!smu_irq_inited) {
796*4882a593Smuzhiyun mdelay(5);
797*4882a593Smuzhiyun smu_i2c_retry(NULL);
798*4882a593Smuzhiyun return;
799*4882a593Smuzhiyun }
800*4882a593Smuzhiyun mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5));
801*4882a593Smuzhiyun return;
802*4882a593Smuzhiyun }
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun /* If failure or stage 1, command is complete */
805*4882a593Smuzhiyun if (fail || cmd->stage != 0) {
806*4882a593Smuzhiyun smu_i2c_complete_command(cmd, fail);
807*4882a593Smuzhiyun return;
808*4882a593Smuzhiyun }
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun DPRINTK("SMU: going to stage 1\n");
811*4882a593Smuzhiyun
812*4882a593Smuzhiyun /* Ok, initial command complete, now poll status */
813*4882a593Smuzhiyun scmd->reply_buf = cmd->pdata;
814*4882a593Smuzhiyun scmd->reply_len = sizeof(cmd->pdata);
815*4882a593Smuzhiyun scmd->data_buf = cmd->pdata;
816*4882a593Smuzhiyun scmd->data_len = 1;
817*4882a593Smuzhiyun cmd->pdata[0] = 0;
818*4882a593Smuzhiyun cmd->stage = 1;
819*4882a593Smuzhiyun cmd->retries = 20;
820*4882a593Smuzhiyun smu_queue_cmd(scmd);
821*4882a593Smuzhiyun }
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun
smu_queue_i2c(struct smu_i2c_cmd * cmd)824*4882a593Smuzhiyun int smu_queue_i2c(struct smu_i2c_cmd *cmd)
825*4882a593Smuzhiyun {
826*4882a593Smuzhiyun unsigned long flags;
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun if (smu == NULL)
829*4882a593Smuzhiyun return -ENODEV;
830*4882a593Smuzhiyun
831*4882a593Smuzhiyun /* Fill most fields of scmd */
832*4882a593Smuzhiyun cmd->scmd.cmd = SMU_CMD_I2C_COMMAND;
833*4882a593Smuzhiyun cmd->scmd.done = smu_i2c_low_completion;
834*4882a593Smuzhiyun cmd->scmd.misc = cmd;
835*4882a593Smuzhiyun cmd->scmd.reply_buf = cmd->pdata;
836*4882a593Smuzhiyun cmd->scmd.reply_len = sizeof(cmd->pdata);
837*4882a593Smuzhiyun cmd->scmd.data_buf = (u8 *)(char *)&cmd->info;
838*4882a593Smuzhiyun cmd->scmd.status = 1;
839*4882a593Smuzhiyun cmd->stage = 0;
840*4882a593Smuzhiyun cmd->pdata[0] = 0xff;
841*4882a593Smuzhiyun cmd->retries = 20;
842*4882a593Smuzhiyun cmd->status = 1;
843*4882a593Smuzhiyun
844*4882a593Smuzhiyun /* Check transfer type, sanitize some "info" fields
845*4882a593Smuzhiyun * based on transfer type and do more checking
846*4882a593Smuzhiyun */
847*4882a593Smuzhiyun cmd->info.caddr = cmd->info.devaddr;
848*4882a593Smuzhiyun cmd->read = cmd->info.devaddr & 0x01;
849*4882a593Smuzhiyun switch(cmd->info.type) {
850*4882a593Smuzhiyun case SMU_I2C_TRANSFER_SIMPLE:
851*4882a593Smuzhiyun memset(&cmd->info.sublen, 0, 4);
852*4882a593Smuzhiyun break;
853*4882a593Smuzhiyun case SMU_I2C_TRANSFER_COMBINED:
854*4882a593Smuzhiyun cmd->info.devaddr &= 0xfe;
855*4882a593Smuzhiyun fallthrough;
856*4882a593Smuzhiyun case SMU_I2C_TRANSFER_STDSUB:
857*4882a593Smuzhiyun if (cmd->info.sublen > 3)
858*4882a593Smuzhiyun return -EINVAL;
859*4882a593Smuzhiyun break;
860*4882a593Smuzhiyun default:
861*4882a593Smuzhiyun return -EINVAL;
862*4882a593Smuzhiyun }
863*4882a593Smuzhiyun
864*4882a593Smuzhiyun /* Finish setting up command based on transfer direction
865*4882a593Smuzhiyun */
866*4882a593Smuzhiyun if (cmd->read) {
867*4882a593Smuzhiyun if (cmd->info.datalen > SMU_I2C_READ_MAX)
868*4882a593Smuzhiyun return -EINVAL;
869*4882a593Smuzhiyun memset(cmd->info.data, 0xff, cmd->info.datalen);
870*4882a593Smuzhiyun cmd->scmd.data_len = 9;
871*4882a593Smuzhiyun } else {
872*4882a593Smuzhiyun if (cmd->info.datalen > SMU_I2C_WRITE_MAX)
873*4882a593Smuzhiyun return -EINVAL;
874*4882a593Smuzhiyun cmd->scmd.data_len = 9 + cmd->info.datalen;
875*4882a593Smuzhiyun }
876*4882a593Smuzhiyun
877*4882a593Smuzhiyun DPRINTK("SMU: i2c enqueuing command\n");
878*4882a593Smuzhiyun DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n",
879*4882a593Smuzhiyun cmd->read ? "read" : "write", cmd->info.datalen,
880*4882a593Smuzhiyun cmd->info.bus, cmd->info.caddr,
881*4882a593Smuzhiyun cmd->info.subaddr[0], cmd->info.type);
882*4882a593Smuzhiyun
883*4882a593Smuzhiyun
884*4882a593Smuzhiyun /* Enqueue command in i2c list, and if empty, enqueue also in
885*4882a593Smuzhiyun * main command list
886*4882a593Smuzhiyun */
887*4882a593Smuzhiyun spin_lock_irqsave(&smu->lock, flags);
888*4882a593Smuzhiyun if (smu->cmd_i2c_cur == NULL) {
889*4882a593Smuzhiyun smu->cmd_i2c_cur = cmd;
890*4882a593Smuzhiyun list_add_tail(&cmd->scmd.link, &smu->cmd_list);
891*4882a593Smuzhiyun if (smu->cmd_cur == NULL)
892*4882a593Smuzhiyun smu_start_cmd();
893*4882a593Smuzhiyun } else
894*4882a593Smuzhiyun list_add_tail(&cmd->link, &smu->cmd_i2c_list);
895*4882a593Smuzhiyun spin_unlock_irqrestore(&smu->lock, flags);
896*4882a593Smuzhiyun
897*4882a593Smuzhiyun return 0;
898*4882a593Smuzhiyun }
899*4882a593Smuzhiyun
900*4882a593Smuzhiyun /*
901*4882a593Smuzhiyun * Handling of "partitions"
902*4882a593Smuzhiyun */
903*4882a593Smuzhiyun
smu_read_datablock(u8 * dest,unsigned int addr,unsigned int len)904*4882a593Smuzhiyun static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len)
905*4882a593Smuzhiyun {
906*4882a593Smuzhiyun DECLARE_COMPLETION_ONSTACK(comp);
907*4882a593Smuzhiyun unsigned int chunk;
908*4882a593Smuzhiyun struct smu_cmd cmd;
909*4882a593Smuzhiyun int rc;
910*4882a593Smuzhiyun u8 params[8];
911*4882a593Smuzhiyun
912*4882a593Smuzhiyun /* We currently use a chunk size of 0xe. We could check the
913*4882a593Smuzhiyun * SMU firmware version and use bigger sizes though
914*4882a593Smuzhiyun */
915*4882a593Smuzhiyun chunk = 0xe;
916*4882a593Smuzhiyun
917*4882a593Smuzhiyun while (len) {
918*4882a593Smuzhiyun unsigned int clen = min(len, chunk);
919*4882a593Smuzhiyun
920*4882a593Smuzhiyun cmd.cmd = SMU_CMD_MISC_ee_COMMAND;
921*4882a593Smuzhiyun cmd.data_len = 7;
922*4882a593Smuzhiyun cmd.data_buf = params;
923*4882a593Smuzhiyun cmd.reply_len = chunk;
924*4882a593Smuzhiyun cmd.reply_buf = dest;
925*4882a593Smuzhiyun cmd.done = smu_done_complete;
926*4882a593Smuzhiyun cmd.misc = ∁
927*4882a593Smuzhiyun params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC;
928*4882a593Smuzhiyun params[1] = 0x4;
929*4882a593Smuzhiyun *((u32 *)¶ms[2]) = addr;
930*4882a593Smuzhiyun params[6] = clen;
931*4882a593Smuzhiyun
932*4882a593Smuzhiyun rc = smu_queue_cmd(&cmd);
933*4882a593Smuzhiyun if (rc)
934*4882a593Smuzhiyun return rc;
935*4882a593Smuzhiyun wait_for_completion(&comp);
936*4882a593Smuzhiyun if (cmd.status != 0)
937*4882a593Smuzhiyun return rc;
938*4882a593Smuzhiyun if (cmd.reply_len != clen) {
939*4882a593Smuzhiyun printk(KERN_DEBUG "SMU: short read in "
940*4882a593Smuzhiyun "smu_read_datablock, got: %d, want: %d\n",
941*4882a593Smuzhiyun cmd.reply_len, clen);
942*4882a593Smuzhiyun return -EIO;
943*4882a593Smuzhiyun }
944*4882a593Smuzhiyun len -= clen;
945*4882a593Smuzhiyun addr += clen;
946*4882a593Smuzhiyun dest += clen;
947*4882a593Smuzhiyun }
948*4882a593Smuzhiyun return 0;
949*4882a593Smuzhiyun }
950*4882a593Smuzhiyun
smu_create_sdb_partition(int id)951*4882a593Smuzhiyun static struct smu_sdbp_header *smu_create_sdb_partition(int id)
952*4882a593Smuzhiyun {
953*4882a593Smuzhiyun DECLARE_COMPLETION_ONSTACK(comp);
954*4882a593Smuzhiyun struct smu_simple_cmd cmd;
955*4882a593Smuzhiyun unsigned int addr, len, tlen;
956*4882a593Smuzhiyun struct smu_sdbp_header *hdr;
957*4882a593Smuzhiyun struct property *prop;
958*4882a593Smuzhiyun
959*4882a593Smuzhiyun /* First query the partition info */
960*4882a593Smuzhiyun DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq);
961*4882a593Smuzhiyun smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2,
962*4882a593Smuzhiyun smu_done_complete, &comp,
963*4882a593Smuzhiyun SMU_CMD_PARTITION_LATEST, id);
964*4882a593Smuzhiyun wait_for_completion(&comp);
965*4882a593Smuzhiyun DPRINTK("SMU: done, status: %d, reply_len: %d\n",
966*4882a593Smuzhiyun cmd.cmd.status, cmd.cmd.reply_len);
967*4882a593Smuzhiyun
968*4882a593Smuzhiyun /* Partition doesn't exist (or other error) */
969*4882a593Smuzhiyun if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6)
970*4882a593Smuzhiyun return NULL;
971*4882a593Smuzhiyun
972*4882a593Smuzhiyun /* Fetch address and length from reply */
973*4882a593Smuzhiyun addr = *((u16 *)cmd.buffer);
974*4882a593Smuzhiyun len = cmd.buffer[3] << 2;
975*4882a593Smuzhiyun /* Calucluate total length to allocate, including the 17 bytes
976*4882a593Smuzhiyun * for "sdb-partition-XX" that we append at the end of the buffer
977*4882a593Smuzhiyun */
978*4882a593Smuzhiyun tlen = sizeof(struct property) + len + 18;
979*4882a593Smuzhiyun
980*4882a593Smuzhiyun prop = kzalloc(tlen, GFP_KERNEL);
981*4882a593Smuzhiyun if (prop == NULL)
982*4882a593Smuzhiyun return NULL;
983*4882a593Smuzhiyun hdr = (struct smu_sdbp_header *)(prop + 1);
984*4882a593Smuzhiyun prop->name = ((char *)prop) + tlen - 18;
985*4882a593Smuzhiyun sprintf(prop->name, "sdb-partition-%02x", id);
986*4882a593Smuzhiyun prop->length = len;
987*4882a593Smuzhiyun prop->value = hdr;
988*4882a593Smuzhiyun prop->next = NULL;
989*4882a593Smuzhiyun
990*4882a593Smuzhiyun /* Read the datablock */
991*4882a593Smuzhiyun if (smu_read_datablock((u8 *)hdr, addr, len)) {
992*4882a593Smuzhiyun printk(KERN_DEBUG "SMU: datablock read failed while reading "
993*4882a593Smuzhiyun "partition %02x !\n", id);
994*4882a593Smuzhiyun goto failure;
995*4882a593Smuzhiyun }
996*4882a593Smuzhiyun
997*4882a593Smuzhiyun /* Got it, check a few things and create the property */
998*4882a593Smuzhiyun if (hdr->id != id) {
999*4882a593Smuzhiyun printk(KERN_DEBUG "SMU: Reading partition %02x and got "
1000*4882a593Smuzhiyun "%02x !\n", id, hdr->id);
1001*4882a593Smuzhiyun goto failure;
1002*4882a593Smuzhiyun }
1003*4882a593Smuzhiyun if (of_add_property(smu->of_node, prop)) {
1004*4882a593Smuzhiyun printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x "
1005*4882a593Smuzhiyun "property !\n", id);
1006*4882a593Smuzhiyun goto failure;
1007*4882a593Smuzhiyun }
1008*4882a593Smuzhiyun
1009*4882a593Smuzhiyun return hdr;
1010*4882a593Smuzhiyun failure:
1011*4882a593Smuzhiyun kfree(prop);
1012*4882a593Smuzhiyun return NULL;
1013*4882a593Smuzhiyun }
1014*4882a593Smuzhiyun
1015*4882a593Smuzhiyun /* Note: Only allowed to return error code in pointers (using ERR_PTR)
1016*4882a593Smuzhiyun * when interruptible is 1
1017*4882a593Smuzhiyun */
__smu_get_sdb_partition(int id,unsigned int * size,int interruptible)1018*4882a593Smuzhiyun static const struct smu_sdbp_header *__smu_get_sdb_partition(int id,
1019*4882a593Smuzhiyun unsigned int *size, int interruptible)
1020*4882a593Smuzhiyun {
1021*4882a593Smuzhiyun char pname[32];
1022*4882a593Smuzhiyun const struct smu_sdbp_header *part;
1023*4882a593Smuzhiyun
1024*4882a593Smuzhiyun if (!smu)
1025*4882a593Smuzhiyun return NULL;
1026*4882a593Smuzhiyun
1027*4882a593Smuzhiyun sprintf(pname, "sdb-partition-%02x", id);
1028*4882a593Smuzhiyun
1029*4882a593Smuzhiyun DPRINTK("smu_get_sdb_partition(%02x)\n", id);
1030*4882a593Smuzhiyun
1031*4882a593Smuzhiyun if (interruptible) {
1032*4882a593Smuzhiyun int rc;
1033*4882a593Smuzhiyun rc = mutex_lock_interruptible(&smu_part_access);
1034*4882a593Smuzhiyun if (rc)
1035*4882a593Smuzhiyun return ERR_PTR(rc);
1036*4882a593Smuzhiyun } else
1037*4882a593Smuzhiyun mutex_lock(&smu_part_access);
1038*4882a593Smuzhiyun
1039*4882a593Smuzhiyun part = of_get_property(smu->of_node, pname, size);
1040*4882a593Smuzhiyun if (part == NULL) {
1041*4882a593Smuzhiyun DPRINTK("trying to extract from SMU ...\n");
1042*4882a593Smuzhiyun part = smu_create_sdb_partition(id);
1043*4882a593Smuzhiyun if (part != NULL && size)
1044*4882a593Smuzhiyun *size = part->len << 2;
1045*4882a593Smuzhiyun }
1046*4882a593Smuzhiyun mutex_unlock(&smu_part_access);
1047*4882a593Smuzhiyun return part;
1048*4882a593Smuzhiyun }
1049*4882a593Smuzhiyun
smu_get_sdb_partition(int id,unsigned int * size)1050*4882a593Smuzhiyun const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size)
1051*4882a593Smuzhiyun {
1052*4882a593Smuzhiyun return __smu_get_sdb_partition(id, size, 0);
1053*4882a593Smuzhiyun }
1054*4882a593Smuzhiyun EXPORT_SYMBOL(smu_get_sdb_partition);
1055*4882a593Smuzhiyun
1056*4882a593Smuzhiyun
1057*4882a593Smuzhiyun /*
1058*4882a593Smuzhiyun * Userland driver interface
1059*4882a593Smuzhiyun */
1060*4882a593Smuzhiyun
1061*4882a593Smuzhiyun
1062*4882a593Smuzhiyun static LIST_HEAD(smu_clist);
1063*4882a593Smuzhiyun static DEFINE_SPINLOCK(smu_clist_lock);
1064*4882a593Smuzhiyun
1065*4882a593Smuzhiyun enum smu_file_mode {
1066*4882a593Smuzhiyun smu_file_commands,
1067*4882a593Smuzhiyun smu_file_events,
1068*4882a593Smuzhiyun smu_file_closing
1069*4882a593Smuzhiyun };
1070*4882a593Smuzhiyun
1071*4882a593Smuzhiyun struct smu_private
1072*4882a593Smuzhiyun {
1073*4882a593Smuzhiyun struct list_head list;
1074*4882a593Smuzhiyun enum smu_file_mode mode;
1075*4882a593Smuzhiyun int busy;
1076*4882a593Smuzhiyun struct smu_cmd cmd;
1077*4882a593Smuzhiyun spinlock_t lock;
1078*4882a593Smuzhiyun wait_queue_head_t wait;
1079*4882a593Smuzhiyun u8 buffer[SMU_MAX_DATA];
1080*4882a593Smuzhiyun };
1081*4882a593Smuzhiyun
1082*4882a593Smuzhiyun
smu_open(struct inode * inode,struct file * file)1083*4882a593Smuzhiyun static int smu_open(struct inode *inode, struct file *file)
1084*4882a593Smuzhiyun {
1085*4882a593Smuzhiyun struct smu_private *pp;
1086*4882a593Smuzhiyun unsigned long flags;
1087*4882a593Smuzhiyun
1088*4882a593Smuzhiyun pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL);
1089*4882a593Smuzhiyun if (pp == 0)
1090*4882a593Smuzhiyun return -ENOMEM;
1091*4882a593Smuzhiyun spin_lock_init(&pp->lock);
1092*4882a593Smuzhiyun pp->mode = smu_file_commands;
1093*4882a593Smuzhiyun init_waitqueue_head(&pp->wait);
1094*4882a593Smuzhiyun
1095*4882a593Smuzhiyun mutex_lock(&smu_mutex);
1096*4882a593Smuzhiyun spin_lock_irqsave(&smu_clist_lock, flags);
1097*4882a593Smuzhiyun list_add(&pp->list, &smu_clist);
1098*4882a593Smuzhiyun spin_unlock_irqrestore(&smu_clist_lock, flags);
1099*4882a593Smuzhiyun file->private_data = pp;
1100*4882a593Smuzhiyun mutex_unlock(&smu_mutex);
1101*4882a593Smuzhiyun
1102*4882a593Smuzhiyun return 0;
1103*4882a593Smuzhiyun }
1104*4882a593Smuzhiyun
1105*4882a593Smuzhiyun
smu_user_cmd_done(struct smu_cmd * cmd,void * misc)1106*4882a593Smuzhiyun static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc)
1107*4882a593Smuzhiyun {
1108*4882a593Smuzhiyun struct smu_private *pp = misc;
1109*4882a593Smuzhiyun
1110*4882a593Smuzhiyun wake_up_all(&pp->wait);
1111*4882a593Smuzhiyun }
1112*4882a593Smuzhiyun
1113*4882a593Smuzhiyun
smu_write(struct file * file,const char __user * buf,size_t count,loff_t * ppos)1114*4882a593Smuzhiyun static ssize_t smu_write(struct file *file, const char __user *buf,
1115*4882a593Smuzhiyun size_t count, loff_t *ppos)
1116*4882a593Smuzhiyun {
1117*4882a593Smuzhiyun struct smu_private *pp = file->private_data;
1118*4882a593Smuzhiyun unsigned long flags;
1119*4882a593Smuzhiyun struct smu_user_cmd_hdr hdr;
1120*4882a593Smuzhiyun int rc = 0;
1121*4882a593Smuzhiyun
1122*4882a593Smuzhiyun if (pp->busy)
1123*4882a593Smuzhiyun return -EBUSY;
1124*4882a593Smuzhiyun else if (copy_from_user(&hdr, buf, sizeof(hdr)))
1125*4882a593Smuzhiyun return -EFAULT;
1126*4882a593Smuzhiyun else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) {
1127*4882a593Smuzhiyun pp->mode = smu_file_events;
1128*4882a593Smuzhiyun return 0;
1129*4882a593Smuzhiyun } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) {
1130*4882a593Smuzhiyun const struct smu_sdbp_header *part;
1131*4882a593Smuzhiyun part = __smu_get_sdb_partition(hdr.cmd, NULL, 1);
1132*4882a593Smuzhiyun if (part == NULL)
1133*4882a593Smuzhiyun return -EINVAL;
1134*4882a593Smuzhiyun else if (IS_ERR(part))
1135*4882a593Smuzhiyun return PTR_ERR(part);
1136*4882a593Smuzhiyun return 0;
1137*4882a593Smuzhiyun } else if (hdr.cmdtype != SMU_CMDTYPE_SMU)
1138*4882a593Smuzhiyun return -EINVAL;
1139*4882a593Smuzhiyun else if (pp->mode != smu_file_commands)
1140*4882a593Smuzhiyun return -EBADFD;
1141*4882a593Smuzhiyun else if (hdr.data_len > SMU_MAX_DATA)
1142*4882a593Smuzhiyun return -EINVAL;
1143*4882a593Smuzhiyun
1144*4882a593Smuzhiyun spin_lock_irqsave(&pp->lock, flags);
1145*4882a593Smuzhiyun if (pp->busy) {
1146*4882a593Smuzhiyun spin_unlock_irqrestore(&pp->lock, flags);
1147*4882a593Smuzhiyun return -EBUSY;
1148*4882a593Smuzhiyun }
1149*4882a593Smuzhiyun pp->busy = 1;
1150*4882a593Smuzhiyun pp->cmd.status = 1;
1151*4882a593Smuzhiyun spin_unlock_irqrestore(&pp->lock, flags);
1152*4882a593Smuzhiyun
1153*4882a593Smuzhiyun if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) {
1154*4882a593Smuzhiyun pp->busy = 0;
1155*4882a593Smuzhiyun return -EFAULT;
1156*4882a593Smuzhiyun }
1157*4882a593Smuzhiyun
1158*4882a593Smuzhiyun pp->cmd.cmd = hdr.cmd;
1159*4882a593Smuzhiyun pp->cmd.data_len = hdr.data_len;
1160*4882a593Smuzhiyun pp->cmd.reply_len = SMU_MAX_DATA;
1161*4882a593Smuzhiyun pp->cmd.data_buf = pp->buffer;
1162*4882a593Smuzhiyun pp->cmd.reply_buf = pp->buffer;
1163*4882a593Smuzhiyun pp->cmd.done = smu_user_cmd_done;
1164*4882a593Smuzhiyun pp->cmd.misc = pp;
1165*4882a593Smuzhiyun rc = smu_queue_cmd(&pp->cmd);
1166*4882a593Smuzhiyun if (rc < 0)
1167*4882a593Smuzhiyun return rc;
1168*4882a593Smuzhiyun return count;
1169*4882a593Smuzhiyun }
1170*4882a593Smuzhiyun
1171*4882a593Smuzhiyun
smu_read_command(struct file * file,struct smu_private * pp,char __user * buf,size_t count)1172*4882a593Smuzhiyun static ssize_t smu_read_command(struct file *file, struct smu_private *pp,
1173*4882a593Smuzhiyun char __user *buf, size_t count)
1174*4882a593Smuzhiyun {
1175*4882a593Smuzhiyun DECLARE_WAITQUEUE(wait, current);
1176*4882a593Smuzhiyun struct smu_user_reply_hdr hdr;
1177*4882a593Smuzhiyun unsigned long flags;
1178*4882a593Smuzhiyun int size, rc = 0;
1179*4882a593Smuzhiyun
1180*4882a593Smuzhiyun if (!pp->busy)
1181*4882a593Smuzhiyun return 0;
1182*4882a593Smuzhiyun if (count < sizeof(struct smu_user_reply_hdr))
1183*4882a593Smuzhiyun return -EOVERFLOW;
1184*4882a593Smuzhiyun spin_lock_irqsave(&pp->lock, flags);
1185*4882a593Smuzhiyun if (pp->cmd.status == 1) {
1186*4882a593Smuzhiyun if (file->f_flags & O_NONBLOCK) {
1187*4882a593Smuzhiyun spin_unlock_irqrestore(&pp->lock, flags);
1188*4882a593Smuzhiyun return -EAGAIN;
1189*4882a593Smuzhiyun }
1190*4882a593Smuzhiyun add_wait_queue(&pp->wait, &wait);
1191*4882a593Smuzhiyun for (;;) {
1192*4882a593Smuzhiyun set_current_state(TASK_INTERRUPTIBLE);
1193*4882a593Smuzhiyun rc = 0;
1194*4882a593Smuzhiyun if (pp->cmd.status != 1)
1195*4882a593Smuzhiyun break;
1196*4882a593Smuzhiyun rc = -ERESTARTSYS;
1197*4882a593Smuzhiyun if (signal_pending(current))
1198*4882a593Smuzhiyun break;
1199*4882a593Smuzhiyun spin_unlock_irqrestore(&pp->lock, flags);
1200*4882a593Smuzhiyun schedule();
1201*4882a593Smuzhiyun spin_lock_irqsave(&pp->lock, flags);
1202*4882a593Smuzhiyun }
1203*4882a593Smuzhiyun set_current_state(TASK_RUNNING);
1204*4882a593Smuzhiyun remove_wait_queue(&pp->wait, &wait);
1205*4882a593Smuzhiyun }
1206*4882a593Smuzhiyun spin_unlock_irqrestore(&pp->lock, flags);
1207*4882a593Smuzhiyun if (rc)
1208*4882a593Smuzhiyun return rc;
1209*4882a593Smuzhiyun if (pp->cmd.status != 0)
1210*4882a593Smuzhiyun pp->cmd.reply_len = 0;
1211*4882a593Smuzhiyun size = sizeof(hdr) + pp->cmd.reply_len;
1212*4882a593Smuzhiyun if (count < size)
1213*4882a593Smuzhiyun size = count;
1214*4882a593Smuzhiyun rc = size;
1215*4882a593Smuzhiyun hdr.status = pp->cmd.status;
1216*4882a593Smuzhiyun hdr.reply_len = pp->cmd.reply_len;
1217*4882a593Smuzhiyun if (copy_to_user(buf, &hdr, sizeof(hdr)))
1218*4882a593Smuzhiyun return -EFAULT;
1219*4882a593Smuzhiyun size -= sizeof(hdr);
1220*4882a593Smuzhiyun if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size))
1221*4882a593Smuzhiyun return -EFAULT;
1222*4882a593Smuzhiyun pp->busy = 0;
1223*4882a593Smuzhiyun
1224*4882a593Smuzhiyun return rc;
1225*4882a593Smuzhiyun }
1226*4882a593Smuzhiyun
1227*4882a593Smuzhiyun
smu_read_events(struct file * file,struct smu_private * pp,char __user * buf,size_t count)1228*4882a593Smuzhiyun static ssize_t smu_read_events(struct file *file, struct smu_private *pp,
1229*4882a593Smuzhiyun char __user *buf, size_t count)
1230*4882a593Smuzhiyun {
1231*4882a593Smuzhiyun /* Not implemented */
1232*4882a593Smuzhiyun msleep_interruptible(1000);
1233*4882a593Smuzhiyun return 0;
1234*4882a593Smuzhiyun }
1235*4882a593Smuzhiyun
1236*4882a593Smuzhiyun
smu_read(struct file * file,char __user * buf,size_t count,loff_t * ppos)1237*4882a593Smuzhiyun static ssize_t smu_read(struct file *file, char __user *buf,
1238*4882a593Smuzhiyun size_t count, loff_t *ppos)
1239*4882a593Smuzhiyun {
1240*4882a593Smuzhiyun struct smu_private *pp = file->private_data;
1241*4882a593Smuzhiyun
1242*4882a593Smuzhiyun if (pp->mode == smu_file_commands)
1243*4882a593Smuzhiyun return smu_read_command(file, pp, buf, count);
1244*4882a593Smuzhiyun if (pp->mode == smu_file_events)
1245*4882a593Smuzhiyun return smu_read_events(file, pp, buf, count);
1246*4882a593Smuzhiyun
1247*4882a593Smuzhiyun return -EBADFD;
1248*4882a593Smuzhiyun }
1249*4882a593Smuzhiyun
smu_fpoll(struct file * file,poll_table * wait)1250*4882a593Smuzhiyun static __poll_t smu_fpoll(struct file *file, poll_table *wait)
1251*4882a593Smuzhiyun {
1252*4882a593Smuzhiyun struct smu_private *pp = file->private_data;
1253*4882a593Smuzhiyun __poll_t mask = 0;
1254*4882a593Smuzhiyun unsigned long flags;
1255*4882a593Smuzhiyun
1256*4882a593Smuzhiyun if (pp == 0)
1257*4882a593Smuzhiyun return 0;
1258*4882a593Smuzhiyun
1259*4882a593Smuzhiyun if (pp->mode == smu_file_commands) {
1260*4882a593Smuzhiyun poll_wait(file, &pp->wait, wait);
1261*4882a593Smuzhiyun
1262*4882a593Smuzhiyun spin_lock_irqsave(&pp->lock, flags);
1263*4882a593Smuzhiyun if (pp->busy && pp->cmd.status != 1)
1264*4882a593Smuzhiyun mask |= EPOLLIN;
1265*4882a593Smuzhiyun spin_unlock_irqrestore(&pp->lock, flags);
1266*4882a593Smuzhiyun }
1267*4882a593Smuzhiyun if (pp->mode == smu_file_events) {
1268*4882a593Smuzhiyun /* Not yet implemented */
1269*4882a593Smuzhiyun }
1270*4882a593Smuzhiyun return mask;
1271*4882a593Smuzhiyun }
1272*4882a593Smuzhiyun
smu_release(struct inode * inode,struct file * file)1273*4882a593Smuzhiyun static int smu_release(struct inode *inode, struct file *file)
1274*4882a593Smuzhiyun {
1275*4882a593Smuzhiyun struct smu_private *pp = file->private_data;
1276*4882a593Smuzhiyun unsigned long flags;
1277*4882a593Smuzhiyun unsigned int busy;
1278*4882a593Smuzhiyun
1279*4882a593Smuzhiyun if (pp == 0)
1280*4882a593Smuzhiyun return 0;
1281*4882a593Smuzhiyun
1282*4882a593Smuzhiyun file->private_data = NULL;
1283*4882a593Smuzhiyun
1284*4882a593Smuzhiyun /* Mark file as closing to avoid races with new request */
1285*4882a593Smuzhiyun spin_lock_irqsave(&pp->lock, flags);
1286*4882a593Smuzhiyun pp->mode = smu_file_closing;
1287*4882a593Smuzhiyun busy = pp->busy;
1288*4882a593Smuzhiyun
1289*4882a593Smuzhiyun /* Wait for any pending request to complete */
1290*4882a593Smuzhiyun if (busy && pp->cmd.status == 1) {
1291*4882a593Smuzhiyun DECLARE_WAITQUEUE(wait, current);
1292*4882a593Smuzhiyun
1293*4882a593Smuzhiyun add_wait_queue(&pp->wait, &wait);
1294*4882a593Smuzhiyun for (;;) {
1295*4882a593Smuzhiyun set_current_state(TASK_UNINTERRUPTIBLE);
1296*4882a593Smuzhiyun if (pp->cmd.status != 1)
1297*4882a593Smuzhiyun break;
1298*4882a593Smuzhiyun spin_unlock_irqrestore(&pp->lock, flags);
1299*4882a593Smuzhiyun schedule();
1300*4882a593Smuzhiyun spin_lock_irqsave(&pp->lock, flags);
1301*4882a593Smuzhiyun }
1302*4882a593Smuzhiyun set_current_state(TASK_RUNNING);
1303*4882a593Smuzhiyun remove_wait_queue(&pp->wait, &wait);
1304*4882a593Smuzhiyun }
1305*4882a593Smuzhiyun spin_unlock_irqrestore(&pp->lock, flags);
1306*4882a593Smuzhiyun
1307*4882a593Smuzhiyun spin_lock_irqsave(&smu_clist_lock, flags);
1308*4882a593Smuzhiyun list_del(&pp->list);
1309*4882a593Smuzhiyun spin_unlock_irqrestore(&smu_clist_lock, flags);
1310*4882a593Smuzhiyun kfree(pp);
1311*4882a593Smuzhiyun
1312*4882a593Smuzhiyun return 0;
1313*4882a593Smuzhiyun }
1314*4882a593Smuzhiyun
1315*4882a593Smuzhiyun
1316*4882a593Smuzhiyun static const struct file_operations smu_device_fops = {
1317*4882a593Smuzhiyun .llseek = no_llseek,
1318*4882a593Smuzhiyun .read = smu_read,
1319*4882a593Smuzhiyun .write = smu_write,
1320*4882a593Smuzhiyun .poll = smu_fpoll,
1321*4882a593Smuzhiyun .open = smu_open,
1322*4882a593Smuzhiyun .release = smu_release,
1323*4882a593Smuzhiyun };
1324*4882a593Smuzhiyun
1325*4882a593Smuzhiyun static struct miscdevice pmu_device = {
1326*4882a593Smuzhiyun MISC_DYNAMIC_MINOR, "smu", &smu_device_fops
1327*4882a593Smuzhiyun };
1328*4882a593Smuzhiyun
smu_device_init(void)1329*4882a593Smuzhiyun static int smu_device_init(void)
1330*4882a593Smuzhiyun {
1331*4882a593Smuzhiyun if (!smu)
1332*4882a593Smuzhiyun return -ENODEV;
1333*4882a593Smuzhiyun if (misc_register(&pmu_device) < 0)
1334*4882a593Smuzhiyun printk(KERN_ERR "via-pmu: cannot register misc device.\n");
1335*4882a593Smuzhiyun return 0;
1336*4882a593Smuzhiyun }
1337*4882a593Smuzhiyun device_initcall(smu_device_init);
1338