1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Driver for the media bay on the PowerBook 3400 and 2400.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 1998 Paul Mackerras.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Various evolutions by Benjamin Herrenschmidt & Henry Worth
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun #include <linux/types.h>
10*4882a593Smuzhiyun #include <linux/errno.h>
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/delay.h>
13*4882a593Smuzhiyun #include <linux/sched.h>
14*4882a593Smuzhiyun #include <linux/timer.h>
15*4882a593Smuzhiyun #include <linux/stddef.h>
16*4882a593Smuzhiyun #include <linux/init.h>
17*4882a593Smuzhiyun #include <linux/kthread.h>
18*4882a593Smuzhiyun #include <linux/mutex.h>
19*4882a593Smuzhiyun #include <linux/pgtable.h>
20*4882a593Smuzhiyun #include <asm/prom.h>
21*4882a593Smuzhiyun #include <asm/io.h>
22*4882a593Smuzhiyun #include <asm/machdep.h>
23*4882a593Smuzhiyun #include <asm/pmac_feature.h>
24*4882a593Smuzhiyun #include <asm/mediabay.h>
25*4882a593Smuzhiyun #include <asm/sections.h>
26*4882a593Smuzhiyun #include <asm/ohare.h>
27*4882a593Smuzhiyun #include <asm/heathrow.h>
28*4882a593Smuzhiyun #include <asm/keylargo.h>
29*4882a593Smuzhiyun #include <linux/adb.h>
30*4882a593Smuzhiyun #include <linux/pmu.h>
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define MB_FCR32(bay, r) ((bay)->base + ((r) >> 2))
33*4882a593Smuzhiyun #define MB_FCR8(bay, r) (((volatile u8 __iomem *)((bay)->base)) + (r))
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define MB_IN32(bay,r) (in_le32(MB_FCR32(bay,r)))
36*4882a593Smuzhiyun #define MB_OUT32(bay,r,v) (out_le32(MB_FCR32(bay,r), (v)))
37*4882a593Smuzhiyun #define MB_BIS(bay,r,v) (MB_OUT32((bay), (r), MB_IN32((bay), r) | (v)))
38*4882a593Smuzhiyun #define MB_BIC(bay,r,v) (MB_OUT32((bay), (r), MB_IN32((bay), r) & ~(v)))
39*4882a593Smuzhiyun #define MB_IN8(bay,r) (in_8(MB_FCR8(bay,r)))
40*4882a593Smuzhiyun #define MB_OUT8(bay,r,v) (out_8(MB_FCR8(bay,r), (v)))
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun struct media_bay_info;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun struct mb_ops {
45*4882a593Smuzhiyun char* name;
46*4882a593Smuzhiyun void (*init)(struct media_bay_info *bay);
47*4882a593Smuzhiyun u8 (*content)(struct media_bay_info *bay);
48*4882a593Smuzhiyun void (*power)(struct media_bay_info *bay, int on_off);
49*4882a593Smuzhiyun int (*setup_bus)(struct media_bay_info *bay, u8 device_id);
50*4882a593Smuzhiyun void (*un_reset)(struct media_bay_info *bay);
51*4882a593Smuzhiyun void (*un_reset_ide)(struct media_bay_info *bay);
52*4882a593Smuzhiyun };
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun struct media_bay_info {
55*4882a593Smuzhiyun u32 __iomem *base;
56*4882a593Smuzhiyun int content_id;
57*4882a593Smuzhiyun int state;
58*4882a593Smuzhiyun int last_value;
59*4882a593Smuzhiyun int value_count;
60*4882a593Smuzhiyun int timer;
61*4882a593Smuzhiyun struct macio_dev *mdev;
62*4882a593Smuzhiyun const struct mb_ops* ops;
63*4882a593Smuzhiyun int index;
64*4882a593Smuzhiyun int cached_gpio;
65*4882a593Smuzhiyun int sleeping;
66*4882a593Smuzhiyun int user_lock;
67*4882a593Smuzhiyun struct mutex lock;
68*4882a593Smuzhiyun };
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun #define MAX_BAYS 2
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun static struct media_bay_info media_bays[MAX_BAYS];
73*4882a593Smuzhiyun static int media_bay_count = 0;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun /*
76*4882a593Smuzhiyun * Wait that number of ms between each step in normal polling mode
77*4882a593Smuzhiyun */
78*4882a593Smuzhiyun #define MB_POLL_DELAY 25
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun /*
81*4882a593Smuzhiyun * Consider the media-bay ID value stable if it is the same for
82*4882a593Smuzhiyun * this number of milliseconds
83*4882a593Smuzhiyun */
84*4882a593Smuzhiyun #define MB_STABLE_DELAY 100
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun /* Wait after powering up the media bay this delay in ms
87*4882a593Smuzhiyun * timeout bumped for some powerbooks
88*4882a593Smuzhiyun */
89*4882a593Smuzhiyun #define MB_POWER_DELAY 200
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun /*
92*4882a593Smuzhiyun * Hold the media-bay reset signal true for this many ticks
93*4882a593Smuzhiyun * after a device is inserted before releasing it.
94*4882a593Smuzhiyun */
95*4882a593Smuzhiyun #define MB_RESET_DELAY 50
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun /*
98*4882a593Smuzhiyun * Wait this long after the reset signal is released and before doing
99*4882a593Smuzhiyun * further operations. After this delay, the IDE reset signal is released
100*4882a593Smuzhiyun * too for an IDE device
101*4882a593Smuzhiyun */
102*4882a593Smuzhiyun #define MB_SETUP_DELAY 100
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun /*
105*4882a593Smuzhiyun * Wait this many ticks after an IDE device (e.g. CD-ROM) is inserted
106*4882a593Smuzhiyun * (or until the device is ready) before calling into the driver
107*4882a593Smuzhiyun */
108*4882a593Smuzhiyun #define MB_IDE_WAIT 1000
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun /*
111*4882a593Smuzhiyun * States of a media bay
112*4882a593Smuzhiyun */
113*4882a593Smuzhiyun enum {
114*4882a593Smuzhiyun mb_empty = 0, /* Idle */
115*4882a593Smuzhiyun mb_powering_up, /* power bit set, waiting MB_POWER_DELAY */
116*4882a593Smuzhiyun mb_enabling_bay, /* enable bits set, waiting MB_RESET_DELAY */
117*4882a593Smuzhiyun mb_resetting, /* reset bit unset, waiting MB_SETUP_DELAY */
118*4882a593Smuzhiyun mb_ide_resetting, /* IDE reset bit unser, waiting MB_IDE_WAIT */
119*4882a593Smuzhiyun mb_up, /* Media bay full */
120*4882a593Smuzhiyun mb_powering_down /* Powering down (avoid too fast down/up) */
121*4882a593Smuzhiyun };
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun #define MB_POWER_SOUND 0x08
124*4882a593Smuzhiyun #define MB_POWER_FLOPPY 0x04
125*4882a593Smuzhiyun #define MB_POWER_ATA 0x02
126*4882a593Smuzhiyun #define MB_POWER_PCI 0x01
127*4882a593Smuzhiyun #define MB_POWER_OFF 0x00
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun /*
130*4882a593Smuzhiyun * Functions for polling content of media bay
131*4882a593Smuzhiyun */
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun static u8
ohare_mb_content(struct media_bay_info * bay)134*4882a593Smuzhiyun ohare_mb_content(struct media_bay_info *bay)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun return (MB_IN32(bay, OHARE_MBCR) >> 12) & 7;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun static u8
heathrow_mb_content(struct media_bay_info * bay)140*4882a593Smuzhiyun heathrow_mb_content(struct media_bay_info *bay)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun return (MB_IN32(bay, HEATHROW_MBCR) >> 12) & 7;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun static u8
keylargo_mb_content(struct media_bay_info * bay)146*4882a593Smuzhiyun keylargo_mb_content(struct media_bay_info *bay)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun int new_gpio;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun new_gpio = MB_IN8(bay, KL_GPIO_MEDIABAY_IRQ) & KEYLARGO_GPIO_INPUT_DATA;
151*4882a593Smuzhiyun if (new_gpio) {
152*4882a593Smuzhiyun bay->cached_gpio = new_gpio;
153*4882a593Smuzhiyun return MB_NO;
154*4882a593Smuzhiyun } else if (bay->cached_gpio != new_gpio) {
155*4882a593Smuzhiyun MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_ENABLE);
156*4882a593Smuzhiyun (void)MB_IN32(bay, KEYLARGO_MBCR);
157*4882a593Smuzhiyun udelay(5);
158*4882a593Smuzhiyun MB_BIC(bay, KEYLARGO_MBCR, 0x0000000F);
159*4882a593Smuzhiyun (void)MB_IN32(bay, KEYLARGO_MBCR);
160*4882a593Smuzhiyun udelay(5);
161*4882a593Smuzhiyun bay->cached_gpio = new_gpio;
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun return (MB_IN32(bay, KEYLARGO_MBCR) >> 4) & 7;
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun /*
167*4882a593Smuzhiyun * Functions for powering up/down the bay, puts the bay device
168*4882a593Smuzhiyun * into reset state as well
169*4882a593Smuzhiyun */
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun static void
ohare_mb_power(struct media_bay_info * bay,int on_off)172*4882a593Smuzhiyun ohare_mb_power(struct media_bay_info* bay, int on_off)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun if (on_off) {
175*4882a593Smuzhiyun /* Power up device, assert it's reset line */
176*4882a593Smuzhiyun MB_BIC(bay, OHARE_FCR, OH_BAY_RESET_N);
177*4882a593Smuzhiyun MB_BIC(bay, OHARE_FCR, OH_BAY_POWER_N);
178*4882a593Smuzhiyun } else {
179*4882a593Smuzhiyun /* Disable all devices */
180*4882a593Smuzhiyun MB_BIC(bay, OHARE_FCR, OH_BAY_DEV_MASK);
181*4882a593Smuzhiyun MB_BIC(bay, OHARE_FCR, OH_FLOPPY_ENABLE);
182*4882a593Smuzhiyun /* Cut power from bay, release reset line */
183*4882a593Smuzhiyun MB_BIS(bay, OHARE_FCR, OH_BAY_POWER_N);
184*4882a593Smuzhiyun MB_BIS(bay, OHARE_FCR, OH_BAY_RESET_N);
185*4882a593Smuzhiyun MB_BIS(bay, OHARE_FCR, OH_IDE1_RESET_N);
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun MB_BIC(bay, OHARE_MBCR, 0x00000F00);
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun static void
heathrow_mb_power(struct media_bay_info * bay,int on_off)191*4882a593Smuzhiyun heathrow_mb_power(struct media_bay_info* bay, int on_off)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun if (on_off) {
194*4882a593Smuzhiyun /* Power up device, assert it's reset line */
195*4882a593Smuzhiyun MB_BIC(bay, HEATHROW_FCR, HRW_BAY_RESET_N);
196*4882a593Smuzhiyun MB_BIC(bay, HEATHROW_FCR, HRW_BAY_POWER_N);
197*4882a593Smuzhiyun } else {
198*4882a593Smuzhiyun /* Disable all devices */
199*4882a593Smuzhiyun MB_BIC(bay, HEATHROW_FCR, HRW_BAY_DEV_MASK);
200*4882a593Smuzhiyun MB_BIC(bay, HEATHROW_FCR, HRW_SWIM_ENABLE);
201*4882a593Smuzhiyun /* Cut power from bay, release reset line */
202*4882a593Smuzhiyun MB_BIS(bay, HEATHROW_FCR, HRW_BAY_POWER_N);
203*4882a593Smuzhiyun MB_BIS(bay, HEATHROW_FCR, HRW_BAY_RESET_N);
204*4882a593Smuzhiyun MB_BIS(bay, HEATHROW_FCR, HRW_IDE1_RESET_N);
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun MB_BIC(bay, HEATHROW_MBCR, 0x00000F00);
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun static void
keylargo_mb_power(struct media_bay_info * bay,int on_off)210*4882a593Smuzhiyun keylargo_mb_power(struct media_bay_info* bay, int on_off)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun if (on_off) {
213*4882a593Smuzhiyun /* Power up device, assert it's reset line */
214*4882a593Smuzhiyun MB_BIC(bay, KEYLARGO_MBCR, KL_MBCR_MB0_DEV_RESET);
215*4882a593Smuzhiyun MB_BIC(bay, KEYLARGO_MBCR, KL_MBCR_MB0_DEV_POWER);
216*4882a593Smuzhiyun } else {
217*4882a593Smuzhiyun /* Disable all devices */
218*4882a593Smuzhiyun MB_BIC(bay, KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK);
219*4882a593Smuzhiyun MB_BIC(bay, KEYLARGO_FCR1, KL1_EIDE0_ENABLE);
220*4882a593Smuzhiyun /* Cut power from bay, release reset line */
221*4882a593Smuzhiyun MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_DEV_POWER);
222*4882a593Smuzhiyun MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_DEV_RESET);
223*4882a593Smuzhiyun MB_BIS(bay, KEYLARGO_FCR1, KL1_EIDE0_RESET_N);
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun MB_BIC(bay, KEYLARGO_MBCR, 0x0000000F);
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun /*
229*4882a593Smuzhiyun * Functions for configuring the media bay for a given type of device,
230*4882a593Smuzhiyun * enable the related busses
231*4882a593Smuzhiyun */
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun static int
ohare_mb_setup_bus(struct media_bay_info * bay,u8 device_id)234*4882a593Smuzhiyun ohare_mb_setup_bus(struct media_bay_info* bay, u8 device_id)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun switch(device_id) {
237*4882a593Smuzhiyun case MB_FD:
238*4882a593Smuzhiyun case MB_FD1:
239*4882a593Smuzhiyun MB_BIS(bay, OHARE_FCR, OH_BAY_FLOPPY_ENABLE);
240*4882a593Smuzhiyun MB_BIS(bay, OHARE_FCR, OH_FLOPPY_ENABLE);
241*4882a593Smuzhiyun return 0;
242*4882a593Smuzhiyun case MB_CD:
243*4882a593Smuzhiyun MB_BIC(bay, OHARE_FCR, OH_IDE1_RESET_N);
244*4882a593Smuzhiyun MB_BIS(bay, OHARE_FCR, OH_BAY_IDE_ENABLE);
245*4882a593Smuzhiyun return 0;
246*4882a593Smuzhiyun case MB_PCI:
247*4882a593Smuzhiyun MB_BIS(bay, OHARE_FCR, OH_BAY_PCI_ENABLE);
248*4882a593Smuzhiyun return 0;
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun return -ENODEV;
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun static int
heathrow_mb_setup_bus(struct media_bay_info * bay,u8 device_id)254*4882a593Smuzhiyun heathrow_mb_setup_bus(struct media_bay_info* bay, u8 device_id)
255*4882a593Smuzhiyun {
256*4882a593Smuzhiyun switch(device_id) {
257*4882a593Smuzhiyun case MB_FD:
258*4882a593Smuzhiyun case MB_FD1:
259*4882a593Smuzhiyun MB_BIS(bay, HEATHROW_FCR, HRW_BAY_FLOPPY_ENABLE);
260*4882a593Smuzhiyun MB_BIS(bay, HEATHROW_FCR, HRW_SWIM_ENABLE);
261*4882a593Smuzhiyun return 0;
262*4882a593Smuzhiyun case MB_CD:
263*4882a593Smuzhiyun MB_BIC(bay, HEATHROW_FCR, HRW_IDE1_RESET_N);
264*4882a593Smuzhiyun MB_BIS(bay, HEATHROW_FCR, HRW_BAY_IDE_ENABLE);
265*4882a593Smuzhiyun return 0;
266*4882a593Smuzhiyun case MB_PCI:
267*4882a593Smuzhiyun MB_BIS(bay, HEATHROW_FCR, HRW_BAY_PCI_ENABLE);
268*4882a593Smuzhiyun return 0;
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun return -ENODEV;
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun static int
keylargo_mb_setup_bus(struct media_bay_info * bay,u8 device_id)274*4882a593Smuzhiyun keylargo_mb_setup_bus(struct media_bay_info* bay, u8 device_id)
275*4882a593Smuzhiyun {
276*4882a593Smuzhiyun switch(device_id) {
277*4882a593Smuzhiyun case MB_CD:
278*4882a593Smuzhiyun MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_IDE_ENABLE);
279*4882a593Smuzhiyun MB_BIC(bay, KEYLARGO_FCR1, KL1_EIDE0_RESET_N);
280*4882a593Smuzhiyun MB_BIS(bay, KEYLARGO_FCR1, KL1_EIDE0_ENABLE);
281*4882a593Smuzhiyun return 0;
282*4882a593Smuzhiyun case MB_PCI:
283*4882a593Smuzhiyun MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_PCI_ENABLE);
284*4882a593Smuzhiyun return 0;
285*4882a593Smuzhiyun case MB_SOUND:
286*4882a593Smuzhiyun MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_SOUND_ENABLE);
287*4882a593Smuzhiyun return 0;
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun return -ENODEV;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun /*
293*4882a593Smuzhiyun * Functions for tweaking resets
294*4882a593Smuzhiyun */
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun static void
ohare_mb_un_reset(struct media_bay_info * bay)297*4882a593Smuzhiyun ohare_mb_un_reset(struct media_bay_info* bay)
298*4882a593Smuzhiyun {
299*4882a593Smuzhiyun MB_BIS(bay, OHARE_FCR, OH_BAY_RESET_N);
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun
keylargo_mb_init(struct media_bay_info * bay)302*4882a593Smuzhiyun static void keylargo_mb_init(struct media_bay_info *bay)
303*4882a593Smuzhiyun {
304*4882a593Smuzhiyun MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_ENABLE);
305*4882a593Smuzhiyun }
306*4882a593Smuzhiyun
heathrow_mb_un_reset(struct media_bay_info * bay)307*4882a593Smuzhiyun static void heathrow_mb_un_reset(struct media_bay_info* bay)
308*4882a593Smuzhiyun {
309*4882a593Smuzhiyun MB_BIS(bay, HEATHROW_FCR, HRW_BAY_RESET_N);
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun
keylargo_mb_un_reset(struct media_bay_info * bay)312*4882a593Smuzhiyun static void keylargo_mb_un_reset(struct media_bay_info* bay)
313*4882a593Smuzhiyun {
314*4882a593Smuzhiyun MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_DEV_RESET);
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun
ohare_mb_un_reset_ide(struct media_bay_info * bay)317*4882a593Smuzhiyun static void ohare_mb_un_reset_ide(struct media_bay_info* bay)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun MB_BIS(bay, OHARE_FCR, OH_IDE1_RESET_N);
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun
heathrow_mb_un_reset_ide(struct media_bay_info * bay)322*4882a593Smuzhiyun static void heathrow_mb_un_reset_ide(struct media_bay_info* bay)
323*4882a593Smuzhiyun {
324*4882a593Smuzhiyun MB_BIS(bay, HEATHROW_FCR, HRW_IDE1_RESET_N);
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun
keylargo_mb_un_reset_ide(struct media_bay_info * bay)327*4882a593Smuzhiyun static void keylargo_mb_un_reset_ide(struct media_bay_info* bay)
328*4882a593Smuzhiyun {
329*4882a593Smuzhiyun MB_BIS(bay, KEYLARGO_FCR1, KL1_EIDE0_RESET_N);
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun
set_mb_power(struct media_bay_info * bay,int onoff)332*4882a593Smuzhiyun static inline void set_mb_power(struct media_bay_info* bay, int onoff)
333*4882a593Smuzhiyun {
334*4882a593Smuzhiyun /* Power up up and assert the bay reset line */
335*4882a593Smuzhiyun if (onoff) {
336*4882a593Smuzhiyun bay->ops->power(bay, 1);
337*4882a593Smuzhiyun bay->state = mb_powering_up;
338*4882a593Smuzhiyun pr_debug("mediabay%d: powering up\n", bay->index);
339*4882a593Smuzhiyun } else {
340*4882a593Smuzhiyun /* Make sure everything is powered down & disabled */
341*4882a593Smuzhiyun bay->ops->power(bay, 0);
342*4882a593Smuzhiyun bay->state = mb_powering_down;
343*4882a593Smuzhiyun pr_debug("mediabay%d: powering down\n", bay->index);
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun bay->timer = msecs_to_jiffies(MB_POWER_DELAY);
346*4882a593Smuzhiyun }
347*4882a593Smuzhiyun
poll_media_bay(struct media_bay_info * bay)348*4882a593Smuzhiyun static void poll_media_bay(struct media_bay_info* bay)
349*4882a593Smuzhiyun {
350*4882a593Smuzhiyun int id = bay->ops->content(bay);
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun static char *mb_content_types[] = {
353*4882a593Smuzhiyun "a floppy drive",
354*4882a593Smuzhiyun "a floppy drive",
355*4882a593Smuzhiyun "an unsupported audio device",
356*4882a593Smuzhiyun "an ATA device",
357*4882a593Smuzhiyun "an unsupported PCI device",
358*4882a593Smuzhiyun "an unknown device",
359*4882a593Smuzhiyun };
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun if (id != bay->last_value) {
362*4882a593Smuzhiyun bay->last_value = id;
363*4882a593Smuzhiyun bay->value_count = 0;
364*4882a593Smuzhiyun return;
365*4882a593Smuzhiyun }
366*4882a593Smuzhiyun if (id == bay->content_id)
367*4882a593Smuzhiyun return;
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun bay->value_count += msecs_to_jiffies(MB_POLL_DELAY);
370*4882a593Smuzhiyun if (bay->value_count >= msecs_to_jiffies(MB_STABLE_DELAY)) {
371*4882a593Smuzhiyun /* If the device type changes without going thru
372*4882a593Smuzhiyun * "MB_NO", we force a pass by "MB_NO" to make sure
373*4882a593Smuzhiyun * things are properly reset
374*4882a593Smuzhiyun */
375*4882a593Smuzhiyun if ((id != MB_NO) && (bay->content_id != MB_NO)) {
376*4882a593Smuzhiyun id = MB_NO;
377*4882a593Smuzhiyun pr_debug("mediabay%d: forcing MB_NO\n", bay->index);
378*4882a593Smuzhiyun }
379*4882a593Smuzhiyun pr_debug("mediabay%d: switching to %d\n", bay->index, id);
380*4882a593Smuzhiyun set_mb_power(bay, id != MB_NO);
381*4882a593Smuzhiyun bay->content_id = id;
382*4882a593Smuzhiyun if (id >= MB_NO || id < 0)
383*4882a593Smuzhiyun printk(KERN_INFO "mediabay%d: Bay is now empty\n", bay->index);
384*4882a593Smuzhiyun else
385*4882a593Smuzhiyun printk(KERN_INFO "mediabay%d: Bay contains %s\n",
386*4882a593Smuzhiyun bay->index, mb_content_types[id]);
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun }
389*4882a593Smuzhiyun
check_media_bay(struct macio_dev * baydev)390*4882a593Smuzhiyun int check_media_bay(struct macio_dev *baydev)
391*4882a593Smuzhiyun {
392*4882a593Smuzhiyun struct media_bay_info* bay;
393*4882a593Smuzhiyun int id;
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun if (baydev == NULL)
396*4882a593Smuzhiyun return MB_NO;
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun /* This returns an instant snapshot, not locking, sine
399*4882a593Smuzhiyun * we may be called with the bay lock held. The resulting
400*4882a593Smuzhiyun * fuzzyness of the result if called at the wrong time is
401*4882a593Smuzhiyun * not actually a huge deal
402*4882a593Smuzhiyun */
403*4882a593Smuzhiyun bay = macio_get_drvdata(baydev);
404*4882a593Smuzhiyun if (bay == NULL)
405*4882a593Smuzhiyun return MB_NO;
406*4882a593Smuzhiyun id = bay->content_id;
407*4882a593Smuzhiyun if (bay->state != mb_up)
408*4882a593Smuzhiyun return MB_NO;
409*4882a593Smuzhiyun if (id == MB_FD1)
410*4882a593Smuzhiyun return MB_FD;
411*4882a593Smuzhiyun return id;
412*4882a593Smuzhiyun }
413*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(check_media_bay);
414*4882a593Smuzhiyun
lock_media_bay(struct macio_dev * baydev)415*4882a593Smuzhiyun void lock_media_bay(struct macio_dev *baydev)
416*4882a593Smuzhiyun {
417*4882a593Smuzhiyun struct media_bay_info* bay;
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun if (baydev == NULL)
420*4882a593Smuzhiyun return;
421*4882a593Smuzhiyun bay = macio_get_drvdata(baydev);
422*4882a593Smuzhiyun if (bay == NULL)
423*4882a593Smuzhiyun return;
424*4882a593Smuzhiyun mutex_lock(&bay->lock);
425*4882a593Smuzhiyun bay->user_lock = 1;
426*4882a593Smuzhiyun }
427*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(lock_media_bay);
428*4882a593Smuzhiyun
unlock_media_bay(struct macio_dev * baydev)429*4882a593Smuzhiyun void unlock_media_bay(struct macio_dev *baydev)
430*4882a593Smuzhiyun {
431*4882a593Smuzhiyun struct media_bay_info* bay;
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun if (baydev == NULL)
434*4882a593Smuzhiyun return;
435*4882a593Smuzhiyun bay = macio_get_drvdata(baydev);
436*4882a593Smuzhiyun if (bay == NULL)
437*4882a593Smuzhiyun return;
438*4882a593Smuzhiyun if (bay->user_lock) {
439*4882a593Smuzhiyun bay->user_lock = 0;
440*4882a593Smuzhiyun mutex_unlock(&bay->lock);
441*4882a593Smuzhiyun }
442*4882a593Smuzhiyun }
443*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(unlock_media_bay);
444*4882a593Smuzhiyun
mb_broadcast_hotplug(struct device * dev,void * data)445*4882a593Smuzhiyun static int mb_broadcast_hotplug(struct device *dev, void *data)
446*4882a593Smuzhiyun {
447*4882a593Smuzhiyun struct media_bay_info* bay = data;
448*4882a593Smuzhiyun struct macio_dev *mdev;
449*4882a593Smuzhiyun struct macio_driver *drv;
450*4882a593Smuzhiyun int state;
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun if (dev->bus != &macio_bus_type)
453*4882a593Smuzhiyun return 0;
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun state = bay->state == mb_up ? bay->content_id : MB_NO;
456*4882a593Smuzhiyun if (state == MB_FD1)
457*4882a593Smuzhiyun state = MB_FD;
458*4882a593Smuzhiyun mdev = to_macio_device(dev);
459*4882a593Smuzhiyun drv = to_macio_driver(dev->driver);
460*4882a593Smuzhiyun if (dev->driver && drv->mediabay_event)
461*4882a593Smuzhiyun drv->mediabay_event(mdev, state);
462*4882a593Smuzhiyun return 0;
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun
media_bay_step(int i)465*4882a593Smuzhiyun static void media_bay_step(int i)
466*4882a593Smuzhiyun {
467*4882a593Smuzhiyun struct media_bay_info* bay = &media_bays[i];
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun /* We don't poll when powering down */
470*4882a593Smuzhiyun if (bay->state != mb_powering_down)
471*4882a593Smuzhiyun poll_media_bay(bay);
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun /* If timer expired run state machine */
474*4882a593Smuzhiyun if (bay->timer != 0) {
475*4882a593Smuzhiyun bay->timer -= msecs_to_jiffies(MB_POLL_DELAY);
476*4882a593Smuzhiyun if (bay->timer > 0)
477*4882a593Smuzhiyun return;
478*4882a593Smuzhiyun bay->timer = 0;
479*4882a593Smuzhiyun }
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun switch(bay->state) {
482*4882a593Smuzhiyun case mb_powering_up:
483*4882a593Smuzhiyun if (bay->ops->setup_bus(bay, bay->last_value) < 0) {
484*4882a593Smuzhiyun pr_debug("mediabay%d: device not supported (kind:%d)\n",
485*4882a593Smuzhiyun i, bay->content_id);
486*4882a593Smuzhiyun set_mb_power(bay, 0);
487*4882a593Smuzhiyun break;
488*4882a593Smuzhiyun }
489*4882a593Smuzhiyun bay->timer = msecs_to_jiffies(MB_RESET_DELAY);
490*4882a593Smuzhiyun bay->state = mb_enabling_bay;
491*4882a593Smuzhiyun pr_debug("mediabay%d: enabling (kind:%d)\n", i, bay->content_id);
492*4882a593Smuzhiyun break;
493*4882a593Smuzhiyun case mb_enabling_bay:
494*4882a593Smuzhiyun bay->ops->un_reset(bay);
495*4882a593Smuzhiyun bay->timer = msecs_to_jiffies(MB_SETUP_DELAY);
496*4882a593Smuzhiyun bay->state = mb_resetting;
497*4882a593Smuzhiyun pr_debug("mediabay%d: releasing bay reset (kind:%d)\n",
498*4882a593Smuzhiyun i, bay->content_id);
499*4882a593Smuzhiyun break;
500*4882a593Smuzhiyun case mb_resetting:
501*4882a593Smuzhiyun if (bay->content_id != MB_CD) {
502*4882a593Smuzhiyun pr_debug("mediabay%d: bay is up (kind:%d)\n", i,
503*4882a593Smuzhiyun bay->content_id);
504*4882a593Smuzhiyun bay->state = mb_up;
505*4882a593Smuzhiyun device_for_each_child(&bay->mdev->ofdev.dev,
506*4882a593Smuzhiyun bay, mb_broadcast_hotplug);
507*4882a593Smuzhiyun break;
508*4882a593Smuzhiyun }
509*4882a593Smuzhiyun pr_debug("mediabay%d: releasing ATA reset (kind:%d)\n",
510*4882a593Smuzhiyun i, bay->content_id);
511*4882a593Smuzhiyun bay->ops->un_reset_ide(bay);
512*4882a593Smuzhiyun bay->timer = msecs_to_jiffies(MB_IDE_WAIT);
513*4882a593Smuzhiyun bay->state = mb_ide_resetting;
514*4882a593Smuzhiyun break;
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun case mb_ide_resetting:
517*4882a593Smuzhiyun pr_debug("mediabay%d: bay is up (kind:%d)\n", i, bay->content_id);
518*4882a593Smuzhiyun bay->state = mb_up;
519*4882a593Smuzhiyun device_for_each_child(&bay->mdev->ofdev.dev,
520*4882a593Smuzhiyun bay, mb_broadcast_hotplug);
521*4882a593Smuzhiyun break;
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun case mb_powering_down:
524*4882a593Smuzhiyun bay->state = mb_empty;
525*4882a593Smuzhiyun device_for_each_child(&bay->mdev->ofdev.dev,
526*4882a593Smuzhiyun bay, mb_broadcast_hotplug);
527*4882a593Smuzhiyun pr_debug("mediabay%d: end of power down\n", i);
528*4882a593Smuzhiyun break;
529*4882a593Smuzhiyun }
530*4882a593Smuzhiyun }
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun /*
533*4882a593Smuzhiyun * This procedure runs as a kernel thread to poll the media bay
534*4882a593Smuzhiyun * once each tick and register and unregister the IDE interface
535*4882a593Smuzhiyun * with the IDE driver. It needs to be a thread because
536*4882a593Smuzhiyun * ide_register can't be called from interrupt context.
537*4882a593Smuzhiyun */
media_bay_task(void * x)538*4882a593Smuzhiyun static int media_bay_task(void *x)
539*4882a593Smuzhiyun {
540*4882a593Smuzhiyun int i;
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun while (!kthread_should_stop()) {
543*4882a593Smuzhiyun for (i = 0; i < media_bay_count; ++i) {
544*4882a593Smuzhiyun mutex_lock(&media_bays[i].lock);
545*4882a593Smuzhiyun if (!media_bays[i].sleeping)
546*4882a593Smuzhiyun media_bay_step(i);
547*4882a593Smuzhiyun mutex_unlock(&media_bays[i].lock);
548*4882a593Smuzhiyun }
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun msleep_interruptible(MB_POLL_DELAY);
551*4882a593Smuzhiyun }
552*4882a593Smuzhiyun return 0;
553*4882a593Smuzhiyun }
554*4882a593Smuzhiyun
media_bay_attach(struct macio_dev * mdev,const struct of_device_id * match)555*4882a593Smuzhiyun static int media_bay_attach(struct macio_dev *mdev,
556*4882a593Smuzhiyun const struct of_device_id *match)
557*4882a593Smuzhiyun {
558*4882a593Smuzhiyun struct media_bay_info* bay;
559*4882a593Smuzhiyun u32 __iomem *regbase;
560*4882a593Smuzhiyun struct device_node *ofnode;
561*4882a593Smuzhiyun unsigned long base;
562*4882a593Smuzhiyun int i;
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun ofnode = mdev->ofdev.dev.of_node;
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun if (macio_resource_count(mdev) < 1)
567*4882a593Smuzhiyun return -ENODEV;
568*4882a593Smuzhiyun if (macio_request_resources(mdev, "media-bay"))
569*4882a593Smuzhiyun return -EBUSY;
570*4882a593Smuzhiyun /* Media bay registers are located at the beginning of the
571*4882a593Smuzhiyun * mac-io chip, for now, we trick and align down the first
572*4882a593Smuzhiyun * resource passed in
573*4882a593Smuzhiyun */
574*4882a593Smuzhiyun base = macio_resource_start(mdev, 0) & 0xffff0000u;
575*4882a593Smuzhiyun regbase = (u32 __iomem *)ioremap(base, 0x100);
576*4882a593Smuzhiyun if (regbase == NULL) {
577*4882a593Smuzhiyun macio_release_resources(mdev);
578*4882a593Smuzhiyun return -ENOMEM;
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun i = media_bay_count++;
582*4882a593Smuzhiyun bay = &media_bays[i];
583*4882a593Smuzhiyun bay->mdev = mdev;
584*4882a593Smuzhiyun bay->base = regbase;
585*4882a593Smuzhiyun bay->index = i;
586*4882a593Smuzhiyun bay->ops = match->data;
587*4882a593Smuzhiyun bay->sleeping = 0;
588*4882a593Smuzhiyun mutex_init(&bay->lock);
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun /* Init HW probing */
591*4882a593Smuzhiyun if (bay->ops->init)
592*4882a593Smuzhiyun bay->ops->init(bay);
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun printk(KERN_INFO "mediabay%d: Registered %s media-bay\n", i, bay->ops->name);
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun /* Force an immediate detect */
597*4882a593Smuzhiyun set_mb_power(bay, 0);
598*4882a593Smuzhiyun msleep(MB_POWER_DELAY);
599*4882a593Smuzhiyun bay->content_id = MB_NO;
600*4882a593Smuzhiyun bay->last_value = bay->ops->content(bay);
601*4882a593Smuzhiyun bay->value_count = msecs_to_jiffies(MB_STABLE_DELAY);
602*4882a593Smuzhiyun bay->state = mb_empty;
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun /* Mark us ready by filling our mdev data */
605*4882a593Smuzhiyun macio_set_drvdata(mdev, bay);
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun /* Startup kernel thread */
608*4882a593Smuzhiyun if (i == 0)
609*4882a593Smuzhiyun kthread_run(media_bay_task, NULL, "media-bay");
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun return 0;
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun }
614*4882a593Smuzhiyun
media_bay_suspend(struct macio_dev * mdev,pm_message_t state)615*4882a593Smuzhiyun static int media_bay_suspend(struct macio_dev *mdev, pm_message_t state)
616*4882a593Smuzhiyun {
617*4882a593Smuzhiyun struct media_bay_info *bay = macio_get_drvdata(mdev);
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun if (state.event != mdev->ofdev.dev.power.power_state.event
620*4882a593Smuzhiyun && (state.event & PM_EVENT_SLEEP)) {
621*4882a593Smuzhiyun mutex_lock(&bay->lock);
622*4882a593Smuzhiyun bay->sleeping = 1;
623*4882a593Smuzhiyun set_mb_power(bay, 0);
624*4882a593Smuzhiyun mutex_unlock(&bay->lock);
625*4882a593Smuzhiyun msleep(MB_POLL_DELAY);
626*4882a593Smuzhiyun mdev->ofdev.dev.power.power_state = state;
627*4882a593Smuzhiyun }
628*4882a593Smuzhiyun return 0;
629*4882a593Smuzhiyun }
630*4882a593Smuzhiyun
media_bay_resume(struct macio_dev * mdev)631*4882a593Smuzhiyun static int media_bay_resume(struct macio_dev *mdev)
632*4882a593Smuzhiyun {
633*4882a593Smuzhiyun struct media_bay_info *bay = macio_get_drvdata(mdev);
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun if (mdev->ofdev.dev.power.power_state.event != PM_EVENT_ON) {
636*4882a593Smuzhiyun mdev->ofdev.dev.power.power_state = PMSG_ON;
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun /* We re-enable the bay using it's previous content
639*4882a593Smuzhiyun only if it did not change. Note those bozo timings,
640*4882a593Smuzhiyun they seem to help the 3400 get it right.
641*4882a593Smuzhiyun */
642*4882a593Smuzhiyun /* Force MB power to 0 */
643*4882a593Smuzhiyun mutex_lock(&bay->lock);
644*4882a593Smuzhiyun set_mb_power(bay, 0);
645*4882a593Smuzhiyun msleep(MB_POWER_DELAY);
646*4882a593Smuzhiyun if (bay->ops->content(bay) != bay->content_id) {
647*4882a593Smuzhiyun printk("mediabay%d: Content changed during sleep...\n", bay->index);
648*4882a593Smuzhiyun mutex_unlock(&bay->lock);
649*4882a593Smuzhiyun return 0;
650*4882a593Smuzhiyun }
651*4882a593Smuzhiyun set_mb_power(bay, 1);
652*4882a593Smuzhiyun bay->last_value = bay->content_id;
653*4882a593Smuzhiyun bay->value_count = msecs_to_jiffies(MB_STABLE_DELAY);
654*4882a593Smuzhiyun bay->timer = msecs_to_jiffies(MB_POWER_DELAY);
655*4882a593Smuzhiyun do {
656*4882a593Smuzhiyun msleep(MB_POLL_DELAY);
657*4882a593Smuzhiyun media_bay_step(bay->index);
658*4882a593Smuzhiyun } while((bay->state != mb_empty) &&
659*4882a593Smuzhiyun (bay->state != mb_up));
660*4882a593Smuzhiyun bay->sleeping = 0;
661*4882a593Smuzhiyun mutex_unlock(&bay->lock);
662*4882a593Smuzhiyun }
663*4882a593Smuzhiyun return 0;
664*4882a593Smuzhiyun }
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun /* Definitions of "ops" structures.
668*4882a593Smuzhiyun */
669*4882a593Smuzhiyun static const struct mb_ops ohare_mb_ops = {
670*4882a593Smuzhiyun .name = "Ohare",
671*4882a593Smuzhiyun .content = ohare_mb_content,
672*4882a593Smuzhiyun .power = ohare_mb_power,
673*4882a593Smuzhiyun .setup_bus = ohare_mb_setup_bus,
674*4882a593Smuzhiyun .un_reset = ohare_mb_un_reset,
675*4882a593Smuzhiyun .un_reset_ide = ohare_mb_un_reset_ide,
676*4882a593Smuzhiyun };
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun static const struct mb_ops heathrow_mb_ops = {
679*4882a593Smuzhiyun .name = "Heathrow",
680*4882a593Smuzhiyun .content = heathrow_mb_content,
681*4882a593Smuzhiyun .power = heathrow_mb_power,
682*4882a593Smuzhiyun .setup_bus = heathrow_mb_setup_bus,
683*4882a593Smuzhiyun .un_reset = heathrow_mb_un_reset,
684*4882a593Smuzhiyun .un_reset_ide = heathrow_mb_un_reset_ide,
685*4882a593Smuzhiyun };
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun static const struct mb_ops keylargo_mb_ops = {
688*4882a593Smuzhiyun .name = "KeyLargo",
689*4882a593Smuzhiyun .init = keylargo_mb_init,
690*4882a593Smuzhiyun .content = keylargo_mb_content,
691*4882a593Smuzhiyun .power = keylargo_mb_power,
692*4882a593Smuzhiyun .setup_bus = keylargo_mb_setup_bus,
693*4882a593Smuzhiyun .un_reset = keylargo_mb_un_reset,
694*4882a593Smuzhiyun .un_reset_ide = keylargo_mb_un_reset_ide,
695*4882a593Smuzhiyun };
696*4882a593Smuzhiyun
697*4882a593Smuzhiyun /*
698*4882a593Smuzhiyun * It seems that the bit for the media-bay interrupt in the IRQ_LEVEL
699*4882a593Smuzhiyun * register is always set when there is something in the media bay.
700*4882a593Smuzhiyun * This causes problems for the interrupt code if we attach an interrupt
701*4882a593Smuzhiyun * handler to the media-bay interrupt, because it tends to go into
702*4882a593Smuzhiyun * an infinite loop calling the media bay interrupt handler.
703*4882a593Smuzhiyun * Therefore we do it all by polling the media bay once each tick.
704*4882a593Smuzhiyun */
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun static struct of_device_id media_bay_match[] =
707*4882a593Smuzhiyun {
708*4882a593Smuzhiyun {
709*4882a593Smuzhiyun .name = "media-bay",
710*4882a593Smuzhiyun .compatible = "keylargo-media-bay",
711*4882a593Smuzhiyun .data = &keylargo_mb_ops,
712*4882a593Smuzhiyun },
713*4882a593Smuzhiyun {
714*4882a593Smuzhiyun .name = "media-bay",
715*4882a593Smuzhiyun .compatible = "heathrow-media-bay",
716*4882a593Smuzhiyun .data = &heathrow_mb_ops,
717*4882a593Smuzhiyun },
718*4882a593Smuzhiyun {
719*4882a593Smuzhiyun .name = "media-bay",
720*4882a593Smuzhiyun .compatible = "ohare-media-bay",
721*4882a593Smuzhiyun .data = &ohare_mb_ops,
722*4882a593Smuzhiyun },
723*4882a593Smuzhiyun {},
724*4882a593Smuzhiyun };
725*4882a593Smuzhiyun
726*4882a593Smuzhiyun static struct macio_driver media_bay_driver =
727*4882a593Smuzhiyun {
728*4882a593Smuzhiyun .driver = {
729*4882a593Smuzhiyun .name = "media-bay",
730*4882a593Smuzhiyun .of_match_table = media_bay_match,
731*4882a593Smuzhiyun },
732*4882a593Smuzhiyun .probe = media_bay_attach,
733*4882a593Smuzhiyun .suspend = media_bay_suspend,
734*4882a593Smuzhiyun .resume = media_bay_resume
735*4882a593Smuzhiyun };
736*4882a593Smuzhiyun
media_bay_init(void)737*4882a593Smuzhiyun static int __init media_bay_init(void)
738*4882a593Smuzhiyun {
739*4882a593Smuzhiyun int i;
740*4882a593Smuzhiyun
741*4882a593Smuzhiyun for (i=0; i<MAX_BAYS; i++) {
742*4882a593Smuzhiyun memset((char *)&media_bays[i], 0, sizeof(struct media_bay_info));
743*4882a593Smuzhiyun media_bays[i].content_id = -1;
744*4882a593Smuzhiyun }
745*4882a593Smuzhiyun if (!machine_is(powermac))
746*4882a593Smuzhiyun return 0;
747*4882a593Smuzhiyun
748*4882a593Smuzhiyun macio_register_driver(&media_bay_driver);
749*4882a593Smuzhiyun
750*4882a593Smuzhiyun return 0;
751*4882a593Smuzhiyun }
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun device_initcall(media_bay_init);
754