1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright 2015-16 Golden Delicious Computers
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Author: Nikolaus Schaller <hns@goldelico.com>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * LED driver for the IS31FL319{0,1,3,6,9} to drive 1, 3, 6 or 9 light
8*4882a593Smuzhiyun * effect LEDs.
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/err.h>
12*4882a593Smuzhiyun #include <linux/i2c.h>
13*4882a593Smuzhiyun #include <linux/leds.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/of.h>
16*4882a593Smuzhiyun #include <linux/of_device.h>
17*4882a593Smuzhiyun #include <linux/regmap.h>
18*4882a593Smuzhiyun #include <linux/slab.h>
19*4882a593Smuzhiyun #include <linux/delay.h>
20*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /* register numbers */
23*4882a593Smuzhiyun #define IS31FL319X_SHUTDOWN 0x00
24*4882a593Smuzhiyun #define IS31FL319X_CTRL1 0x01
25*4882a593Smuzhiyun #define IS31FL319X_CTRL2 0x02
26*4882a593Smuzhiyun #define IS31FL319X_CONFIG1 0x03
27*4882a593Smuzhiyun #define IS31FL319X_CONFIG2 0x04
28*4882a593Smuzhiyun #define IS31FL319X_RAMP_MODE 0x05
29*4882a593Smuzhiyun #define IS31FL319X_BREATH_MASK 0x06
30*4882a593Smuzhiyun #define IS31FL319X_PWM(channel) (0x07 + channel)
31*4882a593Smuzhiyun #define IS31FL319X_DATA_UPDATE 0x10
32*4882a593Smuzhiyun #define IS31FL319X_T0(channel) (0x11 + channel)
33*4882a593Smuzhiyun #define IS31FL319X_T123_1 0x1a
34*4882a593Smuzhiyun #define IS31FL319X_T123_2 0x1b
35*4882a593Smuzhiyun #define IS31FL319X_T123_3 0x1c
36*4882a593Smuzhiyun #define IS31FL319X_T4(channel) (0x1d + channel)
37*4882a593Smuzhiyun #define IS31FL319X_TIME_UPDATE 0x26
38*4882a593Smuzhiyun #define IS31FL319X_RESET 0xff
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define IS31FL319X_REG_CNT (IS31FL319X_RESET + 1)
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun #define IS31FL319X_MAX_LEDS 9
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun /* CS (Current Setting) in CONFIG2 register */
45*4882a593Smuzhiyun #define IS31FL319X_CONFIG2_CS_SHIFT 4
46*4882a593Smuzhiyun #define IS31FL319X_CONFIG2_CS_MASK 0x7
47*4882a593Smuzhiyun #define IS31FL319X_CONFIG2_CS_STEP_REF 12
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #define IS31FL319X_CURRENT_MIN ((u32)5000)
50*4882a593Smuzhiyun #define IS31FL319X_CURRENT_MAX ((u32)40000)
51*4882a593Smuzhiyun #define IS31FL319X_CURRENT_STEP ((u32)5000)
52*4882a593Smuzhiyun #define IS31FL319X_CURRENT_DEFAULT ((u32)20000)
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun /* Audio gain in CONFIG2 register */
55*4882a593Smuzhiyun #define IS31FL319X_AUDIO_GAIN_DB_MAX ((u32)21)
56*4882a593Smuzhiyun #define IS31FL319X_AUDIO_GAIN_DB_STEP ((u32)3)
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun /*
59*4882a593Smuzhiyun * regmap is used as a cache of chip's register space,
60*4882a593Smuzhiyun * to avoid reading back brightness values from chip,
61*4882a593Smuzhiyun * which is known to hang.
62*4882a593Smuzhiyun */
63*4882a593Smuzhiyun struct is31fl319x_chip {
64*4882a593Smuzhiyun const struct is31fl319x_chipdef *cdef;
65*4882a593Smuzhiyun struct i2c_client *client;
66*4882a593Smuzhiyun struct gpio_desc *shutdown_gpio;
67*4882a593Smuzhiyun struct regmap *regmap;
68*4882a593Smuzhiyun struct mutex lock;
69*4882a593Smuzhiyun u32 audio_gain_db;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun struct is31fl319x_led {
72*4882a593Smuzhiyun struct is31fl319x_chip *chip;
73*4882a593Smuzhiyun struct led_classdev cdev;
74*4882a593Smuzhiyun u32 max_microamp;
75*4882a593Smuzhiyun bool configured;
76*4882a593Smuzhiyun } leds[IS31FL319X_MAX_LEDS];
77*4882a593Smuzhiyun };
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun struct is31fl319x_chipdef {
80*4882a593Smuzhiyun int num_leds;
81*4882a593Smuzhiyun };
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun static const struct is31fl319x_chipdef is31fl3190_cdef = {
84*4882a593Smuzhiyun .num_leds = 1,
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun static const struct is31fl319x_chipdef is31fl3193_cdef = {
88*4882a593Smuzhiyun .num_leds = 3,
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun static const struct is31fl319x_chipdef is31fl3196_cdef = {
92*4882a593Smuzhiyun .num_leds = 6,
93*4882a593Smuzhiyun };
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun static const struct is31fl319x_chipdef is31fl3199_cdef = {
96*4882a593Smuzhiyun .num_leds = 9,
97*4882a593Smuzhiyun };
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun static const struct of_device_id of_is31fl319x_match[] = {
100*4882a593Smuzhiyun { .compatible = "issi,is31fl3190", .data = &is31fl3190_cdef, },
101*4882a593Smuzhiyun { .compatible = "issi,is31fl3191", .data = &is31fl3190_cdef, },
102*4882a593Smuzhiyun { .compatible = "issi,is31fl3193", .data = &is31fl3193_cdef, },
103*4882a593Smuzhiyun { .compatible = "issi,is31fl3196", .data = &is31fl3196_cdef, },
104*4882a593Smuzhiyun { .compatible = "issi,is31fl3199", .data = &is31fl3199_cdef, },
105*4882a593Smuzhiyun { .compatible = "si-en,sn3199", .data = &is31fl3199_cdef, },
106*4882a593Smuzhiyun { }
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, of_is31fl319x_match);
109*4882a593Smuzhiyun
is31fl319x_brightness_set(struct led_classdev * cdev,enum led_brightness brightness)110*4882a593Smuzhiyun static int is31fl319x_brightness_set(struct led_classdev *cdev,
111*4882a593Smuzhiyun enum led_brightness brightness)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun struct is31fl319x_led *led = container_of(cdev, struct is31fl319x_led,
114*4882a593Smuzhiyun cdev);
115*4882a593Smuzhiyun struct is31fl319x_chip *is31 = led->chip;
116*4882a593Smuzhiyun int chan = led - is31->leds;
117*4882a593Smuzhiyun int ret;
118*4882a593Smuzhiyun int i;
119*4882a593Smuzhiyun u8 ctrl1 = 0, ctrl2 = 0;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun dev_dbg(&is31->client->dev, "%s %d: %d\n", __func__, chan, brightness);
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun mutex_lock(&is31->lock);
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun /* update PWM register */
126*4882a593Smuzhiyun ret = regmap_write(is31->regmap, IS31FL319X_PWM(chan), brightness);
127*4882a593Smuzhiyun if (ret < 0)
128*4882a593Smuzhiyun goto out;
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun /* read current brightness of all PWM channels */
131*4882a593Smuzhiyun for (i = 0; i < is31->cdef->num_leds; i++) {
132*4882a593Smuzhiyun unsigned int pwm_value;
133*4882a593Smuzhiyun bool on;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun /*
136*4882a593Smuzhiyun * since neither cdev nor the chip can provide
137*4882a593Smuzhiyun * the current setting, we read from the regmap cache
138*4882a593Smuzhiyun */
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun ret = regmap_read(is31->regmap, IS31FL319X_PWM(i), &pwm_value);
141*4882a593Smuzhiyun dev_dbg(&is31->client->dev, "%s read %d: ret=%d: %d\n",
142*4882a593Smuzhiyun __func__, i, ret, pwm_value);
143*4882a593Smuzhiyun on = ret >= 0 && pwm_value > LED_OFF;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun if (i < 3)
146*4882a593Smuzhiyun ctrl1 |= on << i; /* 0..2 => bit 0..2 */
147*4882a593Smuzhiyun else if (i < 6)
148*4882a593Smuzhiyun ctrl1 |= on << (i + 1); /* 3..5 => bit 4..6 */
149*4882a593Smuzhiyun else
150*4882a593Smuzhiyun ctrl2 |= on << (i - 6); /* 6..8 => bit 0..2 */
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun if (ctrl1 > 0 || ctrl2 > 0) {
154*4882a593Smuzhiyun dev_dbg(&is31->client->dev, "power up %02x %02x\n",
155*4882a593Smuzhiyun ctrl1, ctrl2);
156*4882a593Smuzhiyun regmap_write(is31->regmap, IS31FL319X_CTRL1, ctrl1);
157*4882a593Smuzhiyun regmap_write(is31->regmap, IS31FL319X_CTRL2, ctrl2);
158*4882a593Smuzhiyun /* update PWMs */
159*4882a593Smuzhiyun regmap_write(is31->regmap, IS31FL319X_DATA_UPDATE, 0x00);
160*4882a593Smuzhiyun /* enable chip from shut down */
161*4882a593Smuzhiyun ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x01);
162*4882a593Smuzhiyun } else {
163*4882a593Smuzhiyun dev_dbg(&is31->client->dev, "power down\n");
164*4882a593Smuzhiyun /* shut down (no need to clear CTRL1/2) */
165*4882a593Smuzhiyun ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x00);
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun out:
169*4882a593Smuzhiyun mutex_unlock(&is31->lock);
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun return ret;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
is31fl319x_parse_child_dt(const struct device * dev,const struct device_node * child,struct is31fl319x_led * led)174*4882a593Smuzhiyun static int is31fl319x_parse_child_dt(const struct device *dev,
175*4882a593Smuzhiyun const struct device_node *child,
176*4882a593Smuzhiyun struct is31fl319x_led *led)
177*4882a593Smuzhiyun {
178*4882a593Smuzhiyun struct led_classdev *cdev = &led->cdev;
179*4882a593Smuzhiyun int ret;
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun if (of_property_read_string(child, "label", &cdev->name))
182*4882a593Smuzhiyun cdev->name = child->name;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun ret = of_property_read_string(child, "linux,default-trigger",
185*4882a593Smuzhiyun &cdev->default_trigger);
186*4882a593Smuzhiyun if (ret < 0 && ret != -EINVAL) /* is optional */
187*4882a593Smuzhiyun return ret;
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun led->max_microamp = IS31FL319X_CURRENT_DEFAULT;
190*4882a593Smuzhiyun ret = of_property_read_u32(child, "led-max-microamp",
191*4882a593Smuzhiyun &led->max_microamp);
192*4882a593Smuzhiyun if (!ret) {
193*4882a593Smuzhiyun if (led->max_microamp < IS31FL319X_CURRENT_MIN)
194*4882a593Smuzhiyun return -EINVAL; /* not supported */
195*4882a593Smuzhiyun led->max_microamp = min(led->max_microamp,
196*4882a593Smuzhiyun IS31FL319X_CURRENT_MAX);
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun return 0;
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun
is31fl319x_parse_dt(struct device * dev,struct is31fl319x_chip * is31)202*4882a593Smuzhiyun static int is31fl319x_parse_dt(struct device *dev,
203*4882a593Smuzhiyun struct is31fl319x_chip *is31)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun struct device_node *np = dev_of_node(dev), *child;
206*4882a593Smuzhiyun int count;
207*4882a593Smuzhiyun int ret;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun if (!np)
210*4882a593Smuzhiyun return -ENODEV;
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun is31->shutdown_gpio = devm_gpiod_get_optional(dev,
213*4882a593Smuzhiyun "shutdown",
214*4882a593Smuzhiyun GPIOD_OUT_HIGH);
215*4882a593Smuzhiyun if (IS_ERR(is31->shutdown_gpio)) {
216*4882a593Smuzhiyun ret = PTR_ERR(is31->shutdown_gpio);
217*4882a593Smuzhiyun dev_err(dev, "Failed to get shutdown gpio: %d\n", ret);
218*4882a593Smuzhiyun return ret;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun is31->cdef = device_get_match_data(dev);
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun count = of_get_available_child_count(np);
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun dev_dbg(dev, "probing with %d leds defined in DT\n", count);
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun if (!count || count > is31->cdef->num_leds) {
228*4882a593Smuzhiyun dev_err(dev, "Number of leds defined must be between 1 and %u\n",
229*4882a593Smuzhiyun is31->cdef->num_leds);
230*4882a593Smuzhiyun return -ENODEV;
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun for_each_available_child_of_node(np, child) {
234*4882a593Smuzhiyun struct is31fl319x_led *led;
235*4882a593Smuzhiyun u32 reg;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun ret = of_property_read_u32(child, "reg", ®);
238*4882a593Smuzhiyun if (ret) {
239*4882a593Smuzhiyun dev_err(dev, "Failed to read led 'reg' property\n");
240*4882a593Smuzhiyun goto put_child_node;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun if (reg < 1 || reg > is31->cdef->num_leds) {
244*4882a593Smuzhiyun dev_err(dev, "invalid led reg %u\n", reg);
245*4882a593Smuzhiyun ret = -EINVAL;
246*4882a593Smuzhiyun goto put_child_node;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun led = &is31->leds[reg - 1];
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun if (led->configured) {
252*4882a593Smuzhiyun dev_err(dev, "led %u is already configured\n", reg);
253*4882a593Smuzhiyun ret = -EINVAL;
254*4882a593Smuzhiyun goto put_child_node;
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun ret = is31fl319x_parse_child_dt(dev, child, led);
258*4882a593Smuzhiyun if (ret) {
259*4882a593Smuzhiyun dev_err(dev, "led %u DT parsing failed\n", reg);
260*4882a593Smuzhiyun goto put_child_node;
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun led->configured = true;
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun is31->audio_gain_db = 0;
267*4882a593Smuzhiyun ret = of_property_read_u32(np, "audio-gain-db", &is31->audio_gain_db);
268*4882a593Smuzhiyun if (!ret)
269*4882a593Smuzhiyun is31->audio_gain_db = min(is31->audio_gain_db,
270*4882a593Smuzhiyun IS31FL319X_AUDIO_GAIN_DB_MAX);
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun return 0;
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun put_child_node:
275*4882a593Smuzhiyun of_node_put(child);
276*4882a593Smuzhiyun return ret;
277*4882a593Smuzhiyun }
278*4882a593Smuzhiyun
is31fl319x_readable_reg(struct device * dev,unsigned int reg)279*4882a593Smuzhiyun static bool is31fl319x_readable_reg(struct device *dev, unsigned int reg)
280*4882a593Smuzhiyun { /* we have no readable registers */
281*4882a593Smuzhiyun return false;
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun
is31fl319x_volatile_reg(struct device * dev,unsigned int reg)284*4882a593Smuzhiyun static bool is31fl319x_volatile_reg(struct device *dev, unsigned int reg)
285*4882a593Smuzhiyun { /* volatile registers are not cached */
286*4882a593Smuzhiyun switch (reg) {
287*4882a593Smuzhiyun case IS31FL319X_DATA_UPDATE:
288*4882a593Smuzhiyun case IS31FL319X_TIME_UPDATE:
289*4882a593Smuzhiyun case IS31FL319X_RESET:
290*4882a593Smuzhiyun return true; /* always write-through */
291*4882a593Smuzhiyun default:
292*4882a593Smuzhiyun return false;
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun static const struct reg_default is31fl319x_reg_defaults[] = {
297*4882a593Smuzhiyun { IS31FL319X_CONFIG1, 0x00},
298*4882a593Smuzhiyun { IS31FL319X_CONFIG2, 0x00},
299*4882a593Smuzhiyun { IS31FL319X_PWM(0), 0x00},
300*4882a593Smuzhiyun { IS31FL319X_PWM(1), 0x00},
301*4882a593Smuzhiyun { IS31FL319X_PWM(2), 0x00},
302*4882a593Smuzhiyun { IS31FL319X_PWM(3), 0x00},
303*4882a593Smuzhiyun { IS31FL319X_PWM(4), 0x00},
304*4882a593Smuzhiyun { IS31FL319X_PWM(5), 0x00},
305*4882a593Smuzhiyun { IS31FL319X_PWM(6), 0x00},
306*4882a593Smuzhiyun { IS31FL319X_PWM(7), 0x00},
307*4882a593Smuzhiyun { IS31FL319X_PWM(8), 0x00},
308*4882a593Smuzhiyun };
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun static struct regmap_config regmap_config = {
311*4882a593Smuzhiyun .reg_bits = 8,
312*4882a593Smuzhiyun .val_bits = 8,
313*4882a593Smuzhiyun .max_register = IS31FL319X_REG_CNT,
314*4882a593Smuzhiyun .cache_type = REGCACHE_FLAT,
315*4882a593Smuzhiyun .readable_reg = is31fl319x_readable_reg,
316*4882a593Smuzhiyun .volatile_reg = is31fl319x_volatile_reg,
317*4882a593Smuzhiyun .reg_defaults = is31fl319x_reg_defaults,
318*4882a593Smuzhiyun .num_reg_defaults = ARRAY_SIZE(is31fl319x_reg_defaults),
319*4882a593Smuzhiyun };
320*4882a593Smuzhiyun
is31fl319x_microamp_to_cs(struct device * dev,u32 microamp)321*4882a593Smuzhiyun static inline int is31fl319x_microamp_to_cs(struct device *dev, u32 microamp)
322*4882a593Smuzhiyun { /* round down to nearest supported value (range check done by caller) */
323*4882a593Smuzhiyun u32 step = microamp / IS31FL319X_CURRENT_STEP;
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun return ((IS31FL319X_CONFIG2_CS_STEP_REF - step) &
326*4882a593Smuzhiyun IS31FL319X_CONFIG2_CS_MASK) <<
327*4882a593Smuzhiyun IS31FL319X_CONFIG2_CS_SHIFT; /* CS encoding */
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun
is31fl319x_db_to_gain(u32 dezibel)330*4882a593Smuzhiyun static inline int is31fl319x_db_to_gain(u32 dezibel)
331*4882a593Smuzhiyun { /* round down to nearest supported value (range check done by caller) */
332*4882a593Smuzhiyun return dezibel / IS31FL319X_AUDIO_GAIN_DB_STEP;
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun
is31fl319x_probe(struct i2c_client * client,const struct i2c_device_id * id)335*4882a593Smuzhiyun static int is31fl319x_probe(struct i2c_client *client,
336*4882a593Smuzhiyun const struct i2c_device_id *id)
337*4882a593Smuzhiyun {
338*4882a593Smuzhiyun struct is31fl319x_chip *is31;
339*4882a593Smuzhiyun struct device *dev = &client->dev;
340*4882a593Smuzhiyun int err;
341*4882a593Smuzhiyun int i = 0;
342*4882a593Smuzhiyun u32 aggregated_led_microamp = IS31FL319X_CURRENT_MAX;
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
345*4882a593Smuzhiyun return -EIO;
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun is31 = devm_kzalloc(&client->dev, sizeof(*is31), GFP_KERNEL);
348*4882a593Smuzhiyun if (!is31)
349*4882a593Smuzhiyun return -ENOMEM;
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun mutex_init(&is31->lock);
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun err = is31fl319x_parse_dt(&client->dev, is31);
354*4882a593Smuzhiyun if (err)
355*4882a593Smuzhiyun goto free_mutex;
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun if (is31->shutdown_gpio) {
358*4882a593Smuzhiyun gpiod_direction_output(is31->shutdown_gpio, 0);
359*4882a593Smuzhiyun mdelay(5);
360*4882a593Smuzhiyun gpiod_direction_output(is31->shutdown_gpio, 1);
361*4882a593Smuzhiyun }
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun is31->client = client;
364*4882a593Smuzhiyun is31->regmap = devm_regmap_init_i2c(client, ®map_config);
365*4882a593Smuzhiyun if (IS_ERR(is31->regmap)) {
366*4882a593Smuzhiyun dev_err(&client->dev, "failed to allocate register map\n");
367*4882a593Smuzhiyun err = PTR_ERR(is31->regmap);
368*4882a593Smuzhiyun goto free_mutex;
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun i2c_set_clientdata(client, is31);
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun /* check for write-reply from chip (we can't read any registers) */
374*4882a593Smuzhiyun err = regmap_write(is31->regmap, IS31FL319X_RESET, 0x00);
375*4882a593Smuzhiyun if (err < 0) {
376*4882a593Smuzhiyun dev_err(&client->dev, "no response from chip write: err = %d\n",
377*4882a593Smuzhiyun err);
378*4882a593Smuzhiyun err = -EIO; /* does not answer */
379*4882a593Smuzhiyun goto free_mutex;
380*4882a593Smuzhiyun }
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun /*
383*4882a593Smuzhiyun * Kernel conventions require per-LED led-max-microamp property.
384*4882a593Smuzhiyun * But the chip does not allow to limit individual LEDs.
385*4882a593Smuzhiyun * So we take minimum from all subnodes for safety of hardware.
386*4882a593Smuzhiyun */
387*4882a593Smuzhiyun for (i = 0; i < is31->cdef->num_leds; i++)
388*4882a593Smuzhiyun if (is31->leds[i].configured &&
389*4882a593Smuzhiyun is31->leds[i].max_microamp < aggregated_led_microamp)
390*4882a593Smuzhiyun aggregated_led_microamp = is31->leds[i].max_microamp;
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun regmap_write(is31->regmap, IS31FL319X_CONFIG2,
393*4882a593Smuzhiyun is31fl319x_microamp_to_cs(dev, aggregated_led_microamp) |
394*4882a593Smuzhiyun is31fl319x_db_to_gain(is31->audio_gain_db));
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun for (i = 0; i < is31->cdef->num_leds; i++) {
397*4882a593Smuzhiyun struct is31fl319x_led *led = &is31->leds[i];
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun if (!led->configured)
400*4882a593Smuzhiyun continue;
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun led->chip = is31;
403*4882a593Smuzhiyun led->cdev.brightness_set_blocking = is31fl319x_brightness_set;
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun err = devm_led_classdev_register(&client->dev, &led->cdev);
406*4882a593Smuzhiyun if (err < 0)
407*4882a593Smuzhiyun goto free_mutex;
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun return 0;
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun free_mutex:
413*4882a593Smuzhiyun mutex_destroy(&is31->lock);
414*4882a593Smuzhiyun return err;
415*4882a593Smuzhiyun }
416*4882a593Smuzhiyun
is31fl319x_remove(struct i2c_client * client)417*4882a593Smuzhiyun static int is31fl319x_remove(struct i2c_client *client)
418*4882a593Smuzhiyun {
419*4882a593Smuzhiyun struct is31fl319x_chip *is31 = i2c_get_clientdata(client);
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun mutex_destroy(&is31->lock);
422*4882a593Smuzhiyun return 0;
423*4882a593Smuzhiyun }
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun /*
426*4882a593Smuzhiyun * i2c-core (and modalias) requires that id_table be properly filled,
427*4882a593Smuzhiyun * even though it is not used for DeviceTree based instantiation.
428*4882a593Smuzhiyun */
429*4882a593Smuzhiyun static const struct i2c_device_id is31fl319x_id[] = {
430*4882a593Smuzhiyun { "is31fl3190" },
431*4882a593Smuzhiyun { "is31fl3191" },
432*4882a593Smuzhiyun { "is31fl3193" },
433*4882a593Smuzhiyun { "is31fl3196" },
434*4882a593Smuzhiyun { "is31fl3199" },
435*4882a593Smuzhiyun { "sn3199" },
436*4882a593Smuzhiyun {},
437*4882a593Smuzhiyun };
438*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, is31fl319x_id);
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun static struct i2c_driver is31fl319x_driver = {
441*4882a593Smuzhiyun .driver = {
442*4882a593Smuzhiyun .name = "leds-is31fl319x",
443*4882a593Smuzhiyun .of_match_table = of_match_ptr(of_is31fl319x_match),
444*4882a593Smuzhiyun },
445*4882a593Smuzhiyun .probe = is31fl319x_probe,
446*4882a593Smuzhiyun .remove = is31fl319x_remove,
447*4882a593Smuzhiyun .id_table = is31fl319x_id,
448*4882a593Smuzhiyun };
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun module_i2c_driver(is31fl319x_driver);
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun MODULE_AUTHOR("H. Nikolaus Schaller <hns@goldelico.com>");
453*4882a593Smuzhiyun MODULE_AUTHOR("Andrey Utkin <andrey_utkin@fastmail.com>");
454*4882a593Smuzhiyun MODULE_DESCRIPTION("IS31FL319X LED driver");
455*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
456