xref: /OK3568_Linux_fs/kernel/drivers/isdn/hardware/mISDN/mISDNipac.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * isac.c   ISAC specific routines
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Author       Karsten Keil <keil@isdn4linux.de>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Copyright 2009  by Karsten Keil <keil@isdn4linux.de>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/irqreturn.h>
11*4882a593Smuzhiyun #include <linux/slab.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/mISDNhw.h>
14*4882a593Smuzhiyun #include "ipac.h"
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #define DBUSY_TIMER_VALUE	80
18*4882a593Smuzhiyun #define ARCOFI_USE		1
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #define ISAC_REV		"2.0"
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun MODULE_AUTHOR("Karsten Keil");
23*4882a593Smuzhiyun MODULE_VERSION(ISAC_REV);
24*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define ReadISAC(is, o)		(is->read_reg(is->dch.hw, o + is->off))
27*4882a593Smuzhiyun #define	WriteISAC(is, o, v)	(is->write_reg(is->dch.hw, o + is->off, v))
28*4882a593Smuzhiyun #define ReadHSCX(h, o)		(h->ip->read_reg(h->ip->hw, h->off + o))
29*4882a593Smuzhiyun #define WriteHSCX(h, o, v)	(h->ip->write_reg(h->ip->hw, h->off + o, v))
30*4882a593Smuzhiyun #define ReadIPAC(ip, o)		(ip->read_reg(ip->hw, o))
31*4882a593Smuzhiyun #define WriteIPAC(ip, o, v)	(ip->write_reg(ip->hw, o, v))
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun static inline void
ph_command(struct isac_hw * isac,u8 command)34*4882a593Smuzhiyun ph_command(struct isac_hw *isac, u8 command)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun 	pr_debug("%s: ph_command %x\n", isac->name, command);
37*4882a593Smuzhiyun 	if (isac->type & IPAC_TYPE_ISACX)
38*4882a593Smuzhiyun 		WriteISAC(isac, ISACX_CIX0, (command << 4) | 0xE);
39*4882a593Smuzhiyun 	else
40*4882a593Smuzhiyun 		WriteISAC(isac, ISAC_CIX0, (command << 2) | 3);
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun static void
isac_ph_state_change(struct isac_hw * isac)44*4882a593Smuzhiyun isac_ph_state_change(struct isac_hw *isac)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun 	switch (isac->state) {
47*4882a593Smuzhiyun 	case (ISAC_IND_RS):
48*4882a593Smuzhiyun 	case (ISAC_IND_EI):
49*4882a593Smuzhiyun 		ph_command(isac, ISAC_CMD_DUI);
50*4882a593Smuzhiyun 	}
51*4882a593Smuzhiyun 	schedule_event(&isac->dch, FLG_PHCHANGE);
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun static void
isac_ph_state_bh(struct dchannel * dch)55*4882a593Smuzhiyun isac_ph_state_bh(struct dchannel *dch)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun 	struct isac_hw *isac = container_of(dch, struct isac_hw, dch);
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 	switch (isac->state) {
60*4882a593Smuzhiyun 	case ISAC_IND_RS:
61*4882a593Smuzhiyun 	case ISAC_IND_EI:
62*4882a593Smuzhiyun 		dch->state = 0;
63*4882a593Smuzhiyun 		l1_event(dch->l1, HW_RESET_IND);
64*4882a593Smuzhiyun 		break;
65*4882a593Smuzhiyun 	case ISAC_IND_DID:
66*4882a593Smuzhiyun 		dch->state = 3;
67*4882a593Smuzhiyun 		l1_event(dch->l1, HW_DEACT_CNF);
68*4882a593Smuzhiyun 		break;
69*4882a593Smuzhiyun 	case ISAC_IND_DR:
70*4882a593Smuzhiyun 	case ISAC_IND_DR6:
71*4882a593Smuzhiyun 		dch->state = 3;
72*4882a593Smuzhiyun 		l1_event(dch->l1, HW_DEACT_IND);
73*4882a593Smuzhiyun 		break;
74*4882a593Smuzhiyun 	case ISAC_IND_PU:
75*4882a593Smuzhiyun 		dch->state = 4;
76*4882a593Smuzhiyun 		l1_event(dch->l1, HW_POWERUP_IND);
77*4882a593Smuzhiyun 		break;
78*4882a593Smuzhiyun 	case ISAC_IND_RSY:
79*4882a593Smuzhiyun 		if (dch->state <= 5) {
80*4882a593Smuzhiyun 			dch->state = 5;
81*4882a593Smuzhiyun 			l1_event(dch->l1, ANYSIGNAL);
82*4882a593Smuzhiyun 		} else {
83*4882a593Smuzhiyun 			dch->state = 8;
84*4882a593Smuzhiyun 			l1_event(dch->l1, LOSTFRAMING);
85*4882a593Smuzhiyun 		}
86*4882a593Smuzhiyun 		break;
87*4882a593Smuzhiyun 	case ISAC_IND_ARD:
88*4882a593Smuzhiyun 		dch->state = 6;
89*4882a593Smuzhiyun 		l1_event(dch->l1, INFO2);
90*4882a593Smuzhiyun 		break;
91*4882a593Smuzhiyun 	case ISAC_IND_AI8:
92*4882a593Smuzhiyun 		dch->state = 7;
93*4882a593Smuzhiyun 		l1_event(dch->l1, INFO4_P8);
94*4882a593Smuzhiyun 		break;
95*4882a593Smuzhiyun 	case ISAC_IND_AI10:
96*4882a593Smuzhiyun 		dch->state = 7;
97*4882a593Smuzhiyun 		l1_event(dch->l1, INFO4_P10);
98*4882a593Smuzhiyun 		break;
99*4882a593Smuzhiyun 	}
100*4882a593Smuzhiyun 	pr_debug("%s: TE newstate %x\n", isac->name, dch->state);
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun static void
isac_empty_fifo(struct isac_hw * isac,int count)104*4882a593Smuzhiyun isac_empty_fifo(struct isac_hw *isac, int count)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun 	u8 *ptr;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	pr_debug("%s: %s  %d\n", isac->name, __func__, count);
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	if (!isac->dch.rx_skb) {
111*4882a593Smuzhiyun 		isac->dch.rx_skb = mI_alloc_skb(isac->dch.maxlen, GFP_ATOMIC);
112*4882a593Smuzhiyun 		if (!isac->dch.rx_skb) {
113*4882a593Smuzhiyun 			pr_info("%s: D receive out of memory\n", isac->name);
114*4882a593Smuzhiyun 			WriteISAC(isac, ISAC_CMDR, 0x80);
115*4882a593Smuzhiyun 			return;
116*4882a593Smuzhiyun 		}
117*4882a593Smuzhiyun 	}
118*4882a593Smuzhiyun 	if ((isac->dch.rx_skb->len + count) >= isac->dch.maxlen) {
119*4882a593Smuzhiyun 		pr_debug("%s: %s overrun %d\n", isac->name, __func__,
120*4882a593Smuzhiyun 			 isac->dch.rx_skb->len + count);
121*4882a593Smuzhiyun 		WriteISAC(isac, ISAC_CMDR, 0x80);
122*4882a593Smuzhiyun 		return;
123*4882a593Smuzhiyun 	}
124*4882a593Smuzhiyun 	ptr = skb_put(isac->dch.rx_skb, count);
125*4882a593Smuzhiyun 	isac->read_fifo(isac->dch.hw, isac->off, ptr, count);
126*4882a593Smuzhiyun 	WriteISAC(isac, ISAC_CMDR, 0x80);
127*4882a593Smuzhiyun 	if (isac->dch.debug & DEBUG_HW_DFIFO) {
128*4882a593Smuzhiyun 		char	pfx[MISDN_MAX_IDLEN + 16];
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 		snprintf(pfx, MISDN_MAX_IDLEN + 15, "D-recv %s %d ",
131*4882a593Smuzhiyun 			 isac->name, count);
132*4882a593Smuzhiyun 		print_hex_dump_bytes(pfx, DUMP_PREFIX_OFFSET, ptr, count);
133*4882a593Smuzhiyun 	}
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun static void
isac_fill_fifo(struct isac_hw * isac)137*4882a593Smuzhiyun isac_fill_fifo(struct isac_hw *isac)
138*4882a593Smuzhiyun {
139*4882a593Smuzhiyun 	int count, more;
140*4882a593Smuzhiyun 	u8 *ptr;
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	if (!isac->dch.tx_skb)
143*4882a593Smuzhiyun 		return;
144*4882a593Smuzhiyun 	count = isac->dch.tx_skb->len - isac->dch.tx_idx;
145*4882a593Smuzhiyun 	if (count <= 0)
146*4882a593Smuzhiyun 		return;
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	more = 0;
149*4882a593Smuzhiyun 	if (count > 32) {
150*4882a593Smuzhiyun 		more = !0;
151*4882a593Smuzhiyun 		count = 32;
152*4882a593Smuzhiyun 	}
153*4882a593Smuzhiyun 	pr_debug("%s: %s  %d\n", isac->name, __func__, count);
154*4882a593Smuzhiyun 	ptr = isac->dch.tx_skb->data + isac->dch.tx_idx;
155*4882a593Smuzhiyun 	isac->dch.tx_idx += count;
156*4882a593Smuzhiyun 	isac->write_fifo(isac->dch.hw, isac->off, ptr, count);
157*4882a593Smuzhiyun 	WriteISAC(isac, ISAC_CMDR, more ? 0x8 : 0xa);
158*4882a593Smuzhiyun 	if (test_and_set_bit(FLG_BUSY_TIMER, &isac->dch.Flags)) {
159*4882a593Smuzhiyun 		pr_debug("%s: %s dbusytimer running\n", isac->name, __func__);
160*4882a593Smuzhiyun 		del_timer(&isac->dch.timer);
161*4882a593Smuzhiyun 	}
162*4882a593Smuzhiyun 	isac->dch.timer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ)/1000);
163*4882a593Smuzhiyun 	add_timer(&isac->dch.timer);
164*4882a593Smuzhiyun 	if (isac->dch.debug & DEBUG_HW_DFIFO) {
165*4882a593Smuzhiyun 		char	pfx[MISDN_MAX_IDLEN + 16];
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 		snprintf(pfx, MISDN_MAX_IDLEN + 15, "D-send %s %d ",
168*4882a593Smuzhiyun 			 isac->name, count);
169*4882a593Smuzhiyun 		print_hex_dump_bytes(pfx, DUMP_PREFIX_OFFSET, ptr, count);
170*4882a593Smuzhiyun 	}
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun static void
isac_rme_irq(struct isac_hw * isac)174*4882a593Smuzhiyun isac_rme_irq(struct isac_hw *isac)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun 	u8 val, count;
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	val = ReadISAC(isac, ISAC_RSTA);
179*4882a593Smuzhiyun 	if ((val & 0x70) != 0x20) {
180*4882a593Smuzhiyun 		if (val & 0x40) {
181*4882a593Smuzhiyun 			pr_debug("%s: ISAC RDO\n", isac->name);
182*4882a593Smuzhiyun #ifdef ERROR_STATISTIC
183*4882a593Smuzhiyun 			isac->dch.err_rx++;
184*4882a593Smuzhiyun #endif
185*4882a593Smuzhiyun 		}
186*4882a593Smuzhiyun 		if (!(val & 0x20)) {
187*4882a593Smuzhiyun 			pr_debug("%s: ISAC CRC error\n", isac->name);
188*4882a593Smuzhiyun #ifdef ERROR_STATISTIC
189*4882a593Smuzhiyun 			isac->dch.err_crc++;
190*4882a593Smuzhiyun #endif
191*4882a593Smuzhiyun 		}
192*4882a593Smuzhiyun 		WriteISAC(isac, ISAC_CMDR, 0x80);
193*4882a593Smuzhiyun 		dev_kfree_skb(isac->dch.rx_skb);
194*4882a593Smuzhiyun 		isac->dch.rx_skb = NULL;
195*4882a593Smuzhiyun 	} else {
196*4882a593Smuzhiyun 		count = ReadISAC(isac, ISAC_RBCL) & 0x1f;
197*4882a593Smuzhiyun 		if (count == 0)
198*4882a593Smuzhiyun 			count = 32;
199*4882a593Smuzhiyun 		isac_empty_fifo(isac, count);
200*4882a593Smuzhiyun 		recv_Dchannel(&isac->dch);
201*4882a593Smuzhiyun 	}
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun static void
isac_xpr_irq(struct isac_hw * isac)205*4882a593Smuzhiyun isac_xpr_irq(struct isac_hw *isac)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun 	if (test_and_clear_bit(FLG_BUSY_TIMER, &isac->dch.Flags))
208*4882a593Smuzhiyun 		del_timer(&isac->dch.timer);
209*4882a593Smuzhiyun 	if (isac->dch.tx_skb && isac->dch.tx_idx < isac->dch.tx_skb->len) {
210*4882a593Smuzhiyun 		isac_fill_fifo(isac);
211*4882a593Smuzhiyun 	} else {
212*4882a593Smuzhiyun 		dev_kfree_skb(isac->dch.tx_skb);
213*4882a593Smuzhiyun 		if (get_next_dframe(&isac->dch))
214*4882a593Smuzhiyun 			isac_fill_fifo(isac);
215*4882a593Smuzhiyun 	}
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun static void
isac_retransmit(struct isac_hw * isac)219*4882a593Smuzhiyun isac_retransmit(struct isac_hw *isac)
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun 	if (test_and_clear_bit(FLG_BUSY_TIMER, &isac->dch.Flags))
222*4882a593Smuzhiyun 		del_timer(&isac->dch.timer);
223*4882a593Smuzhiyun 	if (test_bit(FLG_TX_BUSY, &isac->dch.Flags)) {
224*4882a593Smuzhiyun 		/* Restart frame */
225*4882a593Smuzhiyun 		isac->dch.tx_idx = 0;
226*4882a593Smuzhiyun 		isac_fill_fifo(isac);
227*4882a593Smuzhiyun 	} else if (isac->dch.tx_skb) { /* should not happen */
228*4882a593Smuzhiyun 		pr_info("%s: tx_skb exist but not busy\n", isac->name);
229*4882a593Smuzhiyun 		test_and_set_bit(FLG_TX_BUSY, &isac->dch.Flags);
230*4882a593Smuzhiyun 		isac->dch.tx_idx = 0;
231*4882a593Smuzhiyun 		isac_fill_fifo(isac);
232*4882a593Smuzhiyun 	} else {
233*4882a593Smuzhiyun 		pr_info("%s: ISAC XDU no TX_BUSY\n", isac->name);
234*4882a593Smuzhiyun 		if (get_next_dframe(&isac->dch))
235*4882a593Smuzhiyun 			isac_fill_fifo(isac);
236*4882a593Smuzhiyun 	}
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun static void
isac_mos_irq(struct isac_hw * isac)240*4882a593Smuzhiyun isac_mos_irq(struct isac_hw *isac)
241*4882a593Smuzhiyun {
242*4882a593Smuzhiyun 	u8 val;
243*4882a593Smuzhiyun 	int ret;
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	val = ReadISAC(isac, ISAC_MOSR);
246*4882a593Smuzhiyun 	pr_debug("%s: ISAC MOSR %02x\n", isac->name, val);
247*4882a593Smuzhiyun #if ARCOFI_USE
248*4882a593Smuzhiyun 	if (val & 0x08) {
249*4882a593Smuzhiyun 		if (!isac->mon_rx) {
250*4882a593Smuzhiyun 			isac->mon_rx = kmalloc(MAX_MON_FRAME, GFP_ATOMIC);
251*4882a593Smuzhiyun 			if (!isac->mon_rx) {
252*4882a593Smuzhiyun 				pr_info("%s: ISAC MON RX out of memory!\n",
253*4882a593Smuzhiyun 					isac->name);
254*4882a593Smuzhiyun 				isac->mocr &= 0xf0;
255*4882a593Smuzhiyun 				isac->mocr |= 0x0a;
256*4882a593Smuzhiyun 				WriteISAC(isac, ISAC_MOCR, isac->mocr);
257*4882a593Smuzhiyun 				goto afterMONR0;
258*4882a593Smuzhiyun 			} else
259*4882a593Smuzhiyun 				isac->mon_rxp = 0;
260*4882a593Smuzhiyun 		}
261*4882a593Smuzhiyun 		if (isac->mon_rxp >= MAX_MON_FRAME) {
262*4882a593Smuzhiyun 			isac->mocr &= 0xf0;
263*4882a593Smuzhiyun 			isac->mocr |= 0x0a;
264*4882a593Smuzhiyun 			WriteISAC(isac, ISAC_MOCR, isac->mocr);
265*4882a593Smuzhiyun 			isac->mon_rxp = 0;
266*4882a593Smuzhiyun 			pr_debug("%s: ISAC MON RX overflow!\n", isac->name);
267*4882a593Smuzhiyun 			goto afterMONR0;
268*4882a593Smuzhiyun 		}
269*4882a593Smuzhiyun 		isac->mon_rx[isac->mon_rxp++] = ReadISAC(isac, ISAC_MOR0);
270*4882a593Smuzhiyun 		pr_debug("%s: ISAC MOR0 %02x\n", isac->name,
271*4882a593Smuzhiyun 			 isac->mon_rx[isac->mon_rxp - 1]);
272*4882a593Smuzhiyun 		if (isac->mon_rxp == 1) {
273*4882a593Smuzhiyun 			isac->mocr |= 0x04;
274*4882a593Smuzhiyun 			WriteISAC(isac, ISAC_MOCR, isac->mocr);
275*4882a593Smuzhiyun 		}
276*4882a593Smuzhiyun 	}
277*4882a593Smuzhiyun afterMONR0:
278*4882a593Smuzhiyun 	if (val & 0x80) {
279*4882a593Smuzhiyun 		if (!isac->mon_rx) {
280*4882a593Smuzhiyun 			isac->mon_rx = kmalloc(MAX_MON_FRAME, GFP_ATOMIC);
281*4882a593Smuzhiyun 			if (!isac->mon_rx) {
282*4882a593Smuzhiyun 				pr_info("%s: ISAC MON RX out of memory!\n",
283*4882a593Smuzhiyun 					isac->name);
284*4882a593Smuzhiyun 				isac->mocr &= 0x0f;
285*4882a593Smuzhiyun 				isac->mocr |= 0xa0;
286*4882a593Smuzhiyun 				WriteISAC(isac, ISAC_MOCR, isac->mocr);
287*4882a593Smuzhiyun 				goto afterMONR1;
288*4882a593Smuzhiyun 			} else
289*4882a593Smuzhiyun 				isac->mon_rxp = 0;
290*4882a593Smuzhiyun 		}
291*4882a593Smuzhiyun 		if (isac->mon_rxp >= MAX_MON_FRAME) {
292*4882a593Smuzhiyun 			isac->mocr &= 0x0f;
293*4882a593Smuzhiyun 			isac->mocr |= 0xa0;
294*4882a593Smuzhiyun 			WriteISAC(isac, ISAC_MOCR, isac->mocr);
295*4882a593Smuzhiyun 			isac->mon_rxp = 0;
296*4882a593Smuzhiyun 			pr_debug("%s: ISAC MON RX overflow!\n", isac->name);
297*4882a593Smuzhiyun 			goto afterMONR1;
298*4882a593Smuzhiyun 		}
299*4882a593Smuzhiyun 		isac->mon_rx[isac->mon_rxp++] = ReadISAC(isac, ISAC_MOR1);
300*4882a593Smuzhiyun 		pr_debug("%s: ISAC MOR1 %02x\n", isac->name,
301*4882a593Smuzhiyun 			 isac->mon_rx[isac->mon_rxp - 1]);
302*4882a593Smuzhiyun 		isac->mocr |= 0x40;
303*4882a593Smuzhiyun 		WriteISAC(isac, ISAC_MOCR, isac->mocr);
304*4882a593Smuzhiyun 	}
305*4882a593Smuzhiyun afterMONR1:
306*4882a593Smuzhiyun 	if (val & 0x04) {
307*4882a593Smuzhiyun 		isac->mocr &= 0xf0;
308*4882a593Smuzhiyun 		WriteISAC(isac, ISAC_MOCR, isac->mocr);
309*4882a593Smuzhiyun 		isac->mocr |= 0x0a;
310*4882a593Smuzhiyun 		WriteISAC(isac, ISAC_MOCR, isac->mocr);
311*4882a593Smuzhiyun 		if (isac->monitor) {
312*4882a593Smuzhiyun 			ret = isac->monitor(isac->dch.hw, MONITOR_RX_0,
313*4882a593Smuzhiyun 					    isac->mon_rx, isac->mon_rxp);
314*4882a593Smuzhiyun 			if (ret)
315*4882a593Smuzhiyun 				kfree(isac->mon_rx);
316*4882a593Smuzhiyun 		} else {
317*4882a593Smuzhiyun 			pr_info("%s: MONITOR 0 received %d but no user\n",
318*4882a593Smuzhiyun 				isac->name, isac->mon_rxp);
319*4882a593Smuzhiyun 			kfree(isac->mon_rx);
320*4882a593Smuzhiyun 		}
321*4882a593Smuzhiyun 		isac->mon_rx = NULL;
322*4882a593Smuzhiyun 		isac->mon_rxp = 0;
323*4882a593Smuzhiyun 	}
324*4882a593Smuzhiyun 	if (val & 0x40) {
325*4882a593Smuzhiyun 		isac->mocr &= 0x0f;
326*4882a593Smuzhiyun 		WriteISAC(isac, ISAC_MOCR, isac->mocr);
327*4882a593Smuzhiyun 		isac->mocr |= 0xa0;
328*4882a593Smuzhiyun 		WriteISAC(isac, ISAC_MOCR, isac->mocr);
329*4882a593Smuzhiyun 		if (isac->monitor) {
330*4882a593Smuzhiyun 			ret = isac->monitor(isac->dch.hw, MONITOR_RX_1,
331*4882a593Smuzhiyun 					    isac->mon_rx, isac->mon_rxp);
332*4882a593Smuzhiyun 			if (ret)
333*4882a593Smuzhiyun 				kfree(isac->mon_rx);
334*4882a593Smuzhiyun 		} else {
335*4882a593Smuzhiyun 			pr_info("%s: MONITOR 1 received %d but no user\n",
336*4882a593Smuzhiyun 				isac->name, isac->mon_rxp);
337*4882a593Smuzhiyun 			kfree(isac->mon_rx);
338*4882a593Smuzhiyun 		}
339*4882a593Smuzhiyun 		isac->mon_rx = NULL;
340*4882a593Smuzhiyun 		isac->mon_rxp = 0;
341*4882a593Smuzhiyun 	}
342*4882a593Smuzhiyun 	if (val & 0x02) {
343*4882a593Smuzhiyun 		if ((!isac->mon_tx) || (isac->mon_txc &&
344*4882a593Smuzhiyun 					(isac->mon_txp >= isac->mon_txc) && !(val & 0x08))) {
345*4882a593Smuzhiyun 			isac->mocr &= 0xf0;
346*4882a593Smuzhiyun 			WriteISAC(isac, ISAC_MOCR, isac->mocr);
347*4882a593Smuzhiyun 			isac->mocr |= 0x0a;
348*4882a593Smuzhiyun 			WriteISAC(isac, ISAC_MOCR, isac->mocr);
349*4882a593Smuzhiyun 			if (isac->mon_txc && (isac->mon_txp >= isac->mon_txc)) {
350*4882a593Smuzhiyun 				if (isac->monitor)
351*4882a593Smuzhiyun 					isac->monitor(isac->dch.hw,
352*4882a593Smuzhiyun 						      MONITOR_TX_0, NULL, 0);
353*4882a593Smuzhiyun 			}
354*4882a593Smuzhiyun 			kfree(isac->mon_tx);
355*4882a593Smuzhiyun 			isac->mon_tx = NULL;
356*4882a593Smuzhiyun 			isac->mon_txc = 0;
357*4882a593Smuzhiyun 			isac->mon_txp = 0;
358*4882a593Smuzhiyun 			goto AfterMOX0;
359*4882a593Smuzhiyun 		}
360*4882a593Smuzhiyun 		if (isac->mon_txc && (isac->mon_txp >= isac->mon_txc)) {
361*4882a593Smuzhiyun 			if (isac->monitor)
362*4882a593Smuzhiyun 				isac->monitor(isac->dch.hw,
363*4882a593Smuzhiyun 					      MONITOR_TX_0, NULL, 0);
364*4882a593Smuzhiyun 			kfree(isac->mon_tx);
365*4882a593Smuzhiyun 			isac->mon_tx = NULL;
366*4882a593Smuzhiyun 			isac->mon_txc = 0;
367*4882a593Smuzhiyun 			isac->mon_txp = 0;
368*4882a593Smuzhiyun 			goto AfterMOX0;
369*4882a593Smuzhiyun 		}
370*4882a593Smuzhiyun 		WriteISAC(isac, ISAC_MOX0, isac->mon_tx[isac->mon_txp++]);
371*4882a593Smuzhiyun 		pr_debug("%s: ISAC %02x -> MOX0\n", isac->name,
372*4882a593Smuzhiyun 			 isac->mon_tx[isac->mon_txp - 1]);
373*4882a593Smuzhiyun 	}
374*4882a593Smuzhiyun AfterMOX0:
375*4882a593Smuzhiyun 	if (val & 0x20) {
376*4882a593Smuzhiyun 		if ((!isac->mon_tx) || (isac->mon_txc &&
377*4882a593Smuzhiyun 					(isac->mon_txp >= isac->mon_txc) && !(val & 0x80))) {
378*4882a593Smuzhiyun 			isac->mocr &= 0x0f;
379*4882a593Smuzhiyun 			WriteISAC(isac, ISAC_MOCR, isac->mocr);
380*4882a593Smuzhiyun 			isac->mocr |= 0xa0;
381*4882a593Smuzhiyun 			WriteISAC(isac, ISAC_MOCR, isac->mocr);
382*4882a593Smuzhiyun 			if (isac->mon_txc && (isac->mon_txp >= isac->mon_txc)) {
383*4882a593Smuzhiyun 				if (isac->monitor)
384*4882a593Smuzhiyun 					isac->monitor(isac->dch.hw,
385*4882a593Smuzhiyun 						      MONITOR_TX_1, NULL, 0);
386*4882a593Smuzhiyun 			}
387*4882a593Smuzhiyun 			kfree(isac->mon_tx);
388*4882a593Smuzhiyun 			isac->mon_tx = NULL;
389*4882a593Smuzhiyun 			isac->mon_txc = 0;
390*4882a593Smuzhiyun 			isac->mon_txp = 0;
391*4882a593Smuzhiyun 			goto AfterMOX1;
392*4882a593Smuzhiyun 		}
393*4882a593Smuzhiyun 		if (isac->mon_txc && (isac->mon_txp >= isac->mon_txc)) {
394*4882a593Smuzhiyun 			if (isac->monitor)
395*4882a593Smuzhiyun 				isac->monitor(isac->dch.hw,
396*4882a593Smuzhiyun 					      MONITOR_TX_1, NULL, 0);
397*4882a593Smuzhiyun 			kfree(isac->mon_tx);
398*4882a593Smuzhiyun 			isac->mon_tx = NULL;
399*4882a593Smuzhiyun 			isac->mon_txc = 0;
400*4882a593Smuzhiyun 			isac->mon_txp = 0;
401*4882a593Smuzhiyun 			goto AfterMOX1;
402*4882a593Smuzhiyun 		}
403*4882a593Smuzhiyun 		WriteISAC(isac, ISAC_MOX1, isac->mon_tx[isac->mon_txp++]);
404*4882a593Smuzhiyun 		pr_debug("%s: ISAC %02x -> MOX1\n", isac->name,
405*4882a593Smuzhiyun 			 isac->mon_tx[isac->mon_txp - 1]);
406*4882a593Smuzhiyun 	}
407*4882a593Smuzhiyun AfterMOX1:
408*4882a593Smuzhiyun 	val = 0; /* dummy to avoid warning */
409*4882a593Smuzhiyun #endif
410*4882a593Smuzhiyun }
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun static void
isac_cisq_irq(struct isac_hw * isac)413*4882a593Smuzhiyun isac_cisq_irq(struct isac_hw *isac) {
414*4882a593Smuzhiyun 	u8 val;
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun 	val = ReadISAC(isac, ISAC_CIR0);
417*4882a593Smuzhiyun 	pr_debug("%s: ISAC CIR0 %02X\n", isac->name, val);
418*4882a593Smuzhiyun 	if (val & 2) {
419*4882a593Smuzhiyun 		pr_debug("%s: ph_state change %x->%x\n", isac->name,
420*4882a593Smuzhiyun 			 isac->state, (val >> 2) & 0xf);
421*4882a593Smuzhiyun 		isac->state = (val >> 2) & 0xf;
422*4882a593Smuzhiyun 		isac_ph_state_change(isac);
423*4882a593Smuzhiyun 	}
424*4882a593Smuzhiyun 	if (val & 1) {
425*4882a593Smuzhiyun 		val = ReadISAC(isac, ISAC_CIR1);
426*4882a593Smuzhiyun 		pr_debug("%s: ISAC CIR1 %02X\n", isac->name, val);
427*4882a593Smuzhiyun 	}
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun static void
isacsx_cic_irq(struct isac_hw * isac)431*4882a593Smuzhiyun isacsx_cic_irq(struct isac_hw *isac)
432*4882a593Smuzhiyun {
433*4882a593Smuzhiyun 	u8 val;
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun 	val = ReadISAC(isac, ISACX_CIR0);
436*4882a593Smuzhiyun 	pr_debug("%s: ISACX CIR0 %02X\n", isac->name, val);
437*4882a593Smuzhiyun 	if (val & ISACX_CIR0_CIC0) {
438*4882a593Smuzhiyun 		pr_debug("%s: ph_state change %x->%x\n", isac->name,
439*4882a593Smuzhiyun 			 isac->state, val >> 4);
440*4882a593Smuzhiyun 		isac->state = val >> 4;
441*4882a593Smuzhiyun 		isac_ph_state_change(isac);
442*4882a593Smuzhiyun 	}
443*4882a593Smuzhiyun }
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun static void
isacsx_rme_irq(struct isac_hw * isac)446*4882a593Smuzhiyun isacsx_rme_irq(struct isac_hw *isac)
447*4882a593Smuzhiyun {
448*4882a593Smuzhiyun 	int count;
449*4882a593Smuzhiyun 	u8 val;
450*4882a593Smuzhiyun 
451*4882a593Smuzhiyun 	val = ReadISAC(isac, ISACX_RSTAD);
452*4882a593Smuzhiyun 	if ((val & (ISACX_RSTAD_VFR |
453*4882a593Smuzhiyun 		    ISACX_RSTAD_RDO |
454*4882a593Smuzhiyun 		    ISACX_RSTAD_CRC |
455*4882a593Smuzhiyun 		    ISACX_RSTAD_RAB))
456*4882a593Smuzhiyun 	    != (ISACX_RSTAD_VFR | ISACX_RSTAD_CRC)) {
457*4882a593Smuzhiyun 		pr_debug("%s: RSTAD %#x, dropped\n", isac->name, val);
458*4882a593Smuzhiyun #ifdef ERROR_STATISTIC
459*4882a593Smuzhiyun 		if (val & ISACX_RSTAD_CRC)
460*4882a593Smuzhiyun 			isac->dch.err_rx++;
461*4882a593Smuzhiyun 		else
462*4882a593Smuzhiyun 			isac->dch.err_crc++;
463*4882a593Smuzhiyun #endif
464*4882a593Smuzhiyun 		WriteISAC(isac, ISACX_CMDRD, ISACX_CMDRD_RMC);
465*4882a593Smuzhiyun 		dev_kfree_skb(isac->dch.rx_skb);
466*4882a593Smuzhiyun 		isac->dch.rx_skb = NULL;
467*4882a593Smuzhiyun 	} else {
468*4882a593Smuzhiyun 		count = ReadISAC(isac, ISACX_RBCLD) & 0x1f;
469*4882a593Smuzhiyun 		if (count == 0)
470*4882a593Smuzhiyun 			count = 32;
471*4882a593Smuzhiyun 		isac_empty_fifo(isac, count);
472*4882a593Smuzhiyun 		if (isac->dch.rx_skb) {
473*4882a593Smuzhiyun 			skb_trim(isac->dch.rx_skb, isac->dch.rx_skb->len - 1);
474*4882a593Smuzhiyun 			pr_debug("%s: dchannel received %d\n", isac->name,
475*4882a593Smuzhiyun 				 isac->dch.rx_skb->len);
476*4882a593Smuzhiyun 			recv_Dchannel(&isac->dch);
477*4882a593Smuzhiyun 		}
478*4882a593Smuzhiyun 	}
479*4882a593Smuzhiyun }
480*4882a593Smuzhiyun 
481*4882a593Smuzhiyun irqreturn_t
mISDNisac_irq(struct isac_hw * isac,u8 val)482*4882a593Smuzhiyun mISDNisac_irq(struct isac_hw *isac, u8 val)
483*4882a593Smuzhiyun {
484*4882a593Smuzhiyun 	if (unlikely(!val))
485*4882a593Smuzhiyun 		return IRQ_NONE;
486*4882a593Smuzhiyun 	pr_debug("%s: ISAC interrupt %02x\n", isac->name, val);
487*4882a593Smuzhiyun 	if (isac->type & IPAC_TYPE_ISACX) {
488*4882a593Smuzhiyun 		if (val & ISACX__CIC)
489*4882a593Smuzhiyun 			isacsx_cic_irq(isac);
490*4882a593Smuzhiyun 		if (val & ISACX__ICD) {
491*4882a593Smuzhiyun 			val = ReadISAC(isac, ISACX_ISTAD);
492*4882a593Smuzhiyun 			pr_debug("%s: ISTAD %02x\n", isac->name, val);
493*4882a593Smuzhiyun 			if (val & ISACX_D_XDU) {
494*4882a593Smuzhiyun 				pr_debug("%s: ISAC XDU\n", isac->name);
495*4882a593Smuzhiyun #ifdef ERROR_STATISTIC
496*4882a593Smuzhiyun 				isac->dch.err_tx++;
497*4882a593Smuzhiyun #endif
498*4882a593Smuzhiyun 				isac_retransmit(isac);
499*4882a593Smuzhiyun 			}
500*4882a593Smuzhiyun 			if (val & ISACX_D_XMR) {
501*4882a593Smuzhiyun 				pr_debug("%s: ISAC XMR\n", isac->name);
502*4882a593Smuzhiyun #ifdef ERROR_STATISTIC
503*4882a593Smuzhiyun 				isac->dch.err_tx++;
504*4882a593Smuzhiyun #endif
505*4882a593Smuzhiyun 				isac_retransmit(isac);
506*4882a593Smuzhiyun 			}
507*4882a593Smuzhiyun 			if (val & ISACX_D_XPR)
508*4882a593Smuzhiyun 				isac_xpr_irq(isac);
509*4882a593Smuzhiyun 			if (val & ISACX_D_RFO) {
510*4882a593Smuzhiyun 				pr_debug("%s: ISAC RFO\n", isac->name);
511*4882a593Smuzhiyun 				WriteISAC(isac, ISACX_CMDRD, ISACX_CMDRD_RMC);
512*4882a593Smuzhiyun 			}
513*4882a593Smuzhiyun 			if (val & ISACX_D_RME)
514*4882a593Smuzhiyun 				isacsx_rme_irq(isac);
515*4882a593Smuzhiyun 			if (val & ISACX_D_RPF)
516*4882a593Smuzhiyun 				isac_empty_fifo(isac, 0x20);
517*4882a593Smuzhiyun 		}
518*4882a593Smuzhiyun 	} else {
519*4882a593Smuzhiyun 		if (val & 0x80)	/* RME */
520*4882a593Smuzhiyun 			isac_rme_irq(isac);
521*4882a593Smuzhiyun 		if (val & 0x40)	/* RPF */
522*4882a593Smuzhiyun 			isac_empty_fifo(isac, 32);
523*4882a593Smuzhiyun 		if (val & 0x10)	/* XPR */
524*4882a593Smuzhiyun 			isac_xpr_irq(isac);
525*4882a593Smuzhiyun 		if (val & 0x04)	/* CISQ */
526*4882a593Smuzhiyun 			isac_cisq_irq(isac);
527*4882a593Smuzhiyun 		if (val & 0x20)	/* RSC - never */
528*4882a593Smuzhiyun 			pr_debug("%s: ISAC RSC interrupt\n", isac->name);
529*4882a593Smuzhiyun 		if (val & 0x02)	/* SIN - never */
530*4882a593Smuzhiyun 			pr_debug("%s: ISAC SIN interrupt\n", isac->name);
531*4882a593Smuzhiyun 		if (val & 0x01) {	/* EXI */
532*4882a593Smuzhiyun 			val = ReadISAC(isac, ISAC_EXIR);
533*4882a593Smuzhiyun 			pr_debug("%s: ISAC EXIR %02x\n", isac->name, val);
534*4882a593Smuzhiyun 			if (val & 0x80)	/* XMR */
535*4882a593Smuzhiyun 				pr_debug("%s: ISAC XMR\n", isac->name);
536*4882a593Smuzhiyun 			if (val & 0x40) { /* XDU */
537*4882a593Smuzhiyun 				pr_debug("%s: ISAC XDU\n", isac->name);
538*4882a593Smuzhiyun #ifdef ERROR_STATISTIC
539*4882a593Smuzhiyun 				isac->dch.err_tx++;
540*4882a593Smuzhiyun #endif
541*4882a593Smuzhiyun 				isac_retransmit(isac);
542*4882a593Smuzhiyun 			}
543*4882a593Smuzhiyun 			if (val & 0x04)	/* MOS */
544*4882a593Smuzhiyun 				isac_mos_irq(isac);
545*4882a593Smuzhiyun 		}
546*4882a593Smuzhiyun 	}
547*4882a593Smuzhiyun 	return IRQ_HANDLED;
548*4882a593Smuzhiyun }
549*4882a593Smuzhiyun EXPORT_SYMBOL(mISDNisac_irq);
550*4882a593Smuzhiyun 
551*4882a593Smuzhiyun static int
isac_l1hw(struct mISDNchannel * ch,struct sk_buff * skb)552*4882a593Smuzhiyun isac_l1hw(struct mISDNchannel *ch, struct sk_buff *skb)
553*4882a593Smuzhiyun {
554*4882a593Smuzhiyun 	struct mISDNdevice	*dev = container_of(ch, struct mISDNdevice, D);
555*4882a593Smuzhiyun 	struct dchannel		*dch = container_of(dev, struct dchannel, dev);
556*4882a593Smuzhiyun 	struct isac_hw		*isac = container_of(dch, struct isac_hw, dch);
557*4882a593Smuzhiyun 	int			ret = -EINVAL;
558*4882a593Smuzhiyun 	struct mISDNhead	*hh = mISDN_HEAD_P(skb);
559*4882a593Smuzhiyun 	u32			id;
560*4882a593Smuzhiyun 	u_long			flags;
561*4882a593Smuzhiyun 
562*4882a593Smuzhiyun 	switch (hh->prim) {
563*4882a593Smuzhiyun 	case PH_DATA_REQ:
564*4882a593Smuzhiyun 		spin_lock_irqsave(isac->hwlock, flags);
565*4882a593Smuzhiyun 		ret = dchannel_senddata(dch, skb);
566*4882a593Smuzhiyun 		if (ret > 0) { /* direct TX */
567*4882a593Smuzhiyun 			id = hh->id; /* skb can be freed */
568*4882a593Smuzhiyun 			isac_fill_fifo(isac);
569*4882a593Smuzhiyun 			ret = 0;
570*4882a593Smuzhiyun 			spin_unlock_irqrestore(isac->hwlock, flags);
571*4882a593Smuzhiyun 			queue_ch_frame(ch, PH_DATA_CNF, id, NULL);
572*4882a593Smuzhiyun 		} else
573*4882a593Smuzhiyun 			spin_unlock_irqrestore(isac->hwlock, flags);
574*4882a593Smuzhiyun 		return ret;
575*4882a593Smuzhiyun 	case PH_ACTIVATE_REQ:
576*4882a593Smuzhiyun 		ret = l1_event(dch->l1, hh->prim);
577*4882a593Smuzhiyun 		break;
578*4882a593Smuzhiyun 	case PH_DEACTIVATE_REQ:
579*4882a593Smuzhiyun 		test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags);
580*4882a593Smuzhiyun 		ret = l1_event(dch->l1, hh->prim);
581*4882a593Smuzhiyun 		break;
582*4882a593Smuzhiyun 	}
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 	if (!ret)
585*4882a593Smuzhiyun 		dev_kfree_skb(skb);
586*4882a593Smuzhiyun 	return ret;
587*4882a593Smuzhiyun }
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun static int
isac_ctrl(struct isac_hw * isac,u32 cmd,unsigned long para)590*4882a593Smuzhiyun isac_ctrl(struct isac_hw *isac, u32 cmd, unsigned long para)
591*4882a593Smuzhiyun {
592*4882a593Smuzhiyun 	u8 tl = 0;
593*4882a593Smuzhiyun 	unsigned long flags;
594*4882a593Smuzhiyun 	int ret = 0;
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun 	switch (cmd) {
597*4882a593Smuzhiyun 	case HW_TESTLOOP:
598*4882a593Smuzhiyun 		spin_lock_irqsave(isac->hwlock, flags);
599*4882a593Smuzhiyun 		if (!(isac->type & IPAC_TYPE_ISACX)) {
600*4882a593Smuzhiyun 			/* TODO: implement for IPAC_TYPE_ISACX */
601*4882a593Smuzhiyun 			if (para & 1) /* B1 */
602*4882a593Smuzhiyun 				tl |= 0x0c;
603*4882a593Smuzhiyun 			else if (para & 2) /* B2 */
604*4882a593Smuzhiyun 				tl |= 0x3;
605*4882a593Smuzhiyun 			/* we only support IOM2 mode */
606*4882a593Smuzhiyun 			WriteISAC(isac, ISAC_SPCR, tl);
607*4882a593Smuzhiyun 			if (tl)
608*4882a593Smuzhiyun 				WriteISAC(isac, ISAC_ADF1, 0x8);
609*4882a593Smuzhiyun 			else
610*4882a593Smuzhiyun 				WriteISAC(isac, ISAC_ADF1, 0x0);
611*4882a593Smuzhiyun 		}
612*4882a593Smuzhiyun 		spin_unlock_irqrestore(isac->hwlock, flags);
613*4882a593Smuzhiyun 		break;
614*4882a593Smuzhiyun 	case HW_TIMER3_VALUE:
615*4882a593Smuzhiyun 		ret = l1_event(isac->dch.l1, HW_TIMER3_VALUE | (para & 0xff));
616*4882a593Smuzhiyun 		break;
617*4882a593Smuzhiyun 	default:
618*4882a593Smuzhiyun 		pr_debug("%s: %s unknown command %x %lx\n", isac->name,
619*4882a593Smuzhiyun 			 __func__, cmd, para);
620*4882a593Smuzhiyun 		ret = -1;
621*4882a593Smuzhiyun 	}
622*4882a593Smuzhiyun 	return ret;
623*4882a593Smuzhiyun }
624*4882a593Smuzhiyun 
625*4882a593Smuzhiyun static int
isac_l1cmd(struct dchannel * dch,u32 cmd)626*4882a593Smuzhiyun isac_l1cmd(struct dchannel *dch, u32 cmd)
627*4882a593Smuzhiyun {
628*4882a593Smuzhiyun 	struct isac_hw *isac = container_of(dch, struct isac_hw, dch);
629*4882a593Smuzhiyun 	u_long flags;
630*4882a593Smuzhiyun 
631*4882a593Smuzhiyun 	pr_debug("%s: cmd(%x) state(%02x)\n", isac->name, cmd, isac->state);
632*4882a593Smuzhiyun 	switch (cmd) {
633*4882a593Smuzhiyun 	case INFO3_P8:
634*4882a593Smuzhiyun 		spin_lock_irqsave(isac->hwlock, flags);
635*4882a593Smuzhiyun 		ph_command(isac, ISAC_CMD_AR8);
636*4882a593Smuzhiyun 		spin_unlock_irqrestore(isac->hwlock, flags);
637*4882a593Smuzhiyun 		break;
638*4882a593Smuzhiyun 	case INFO3_P10:
639*4882a593Smuzhiyun 		spin_lock_irqsave(isac->hwlock, flags);
640*4882a593Smuzhiyun 		ph_command(isac, ISAC_CMD_AR10);
641*4882a593Smuzhiyun 		spin_unlock_irqrestore(isac->hwlock, flags);
642*4882a593Smuzhiyun 		break;
643*4882a593Smuzhiyun 	case HW_RESET_REQ:
644*4882a593Smuzhiyun 		spin_lock_irqsave(isac->hwlock, flags);
645*4882a593Smuzhiyun 		if ((isac->state == ISAC_IND_EI) ||
646*4882a593Smuzhiyun 		    (isac->state == ISAC_IND_DR) ||
647*4882a593Smuzhiyun 		    (isac->state == ISAC_IND_DR6) ||
648*4882a593Smuzhiyun 		    (isac->state == ISAC_IND_RS))
649*4882a593Smuzhiyun 			ph_command(isac, ISAC_CMD_TIM);
650*4882a593Smuzhiyun 		else
651*4882a593Smuzhiyun 			ph_command(isac, ISAC_CMD_RS);
652*4882a593Smuzhiyun 		spin_unlock_irqrestore(isac->hwlock, flags);
653*4882a593Smuzhiyun 		break;
654*4882a593Smuzhiyun 	case HW_DEACT_REQ:
655*4882a593Smuzhiyun 		skb_queue_purge(&dch->squeue);
656*4882a593Smuzhiyun 		if (dch->tx_skb) {
657*4882a593Smuzhiyun 			dev_kfree_skb(dch->tx_skb);
658*4882a593Smuzhiyun 			dch->tx_skb = NULL;
659*4882a593Smuzhiyun 		}
660*4882a593Smuzhiyun 		dch->tx_idx = 0;
661*4882a593Smuzhiyun 		if (dch->rx_skb) {
662*4882a593Smuzhiyun 			dev_kfree_skb(dch->rx_skb);
663*4882a593Smuzhiyun 			dch->rx_skb = NULL;
664*4882a593Smuzhiyun 		}
665*4882a593Smuzhiyun 		test_and_clear_bit(FLG_TX_BUSY, &dch->Flags);
666*4882a593Smuzhiyun 		if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
667*4882a593Smuzhiyun 			del_timer(&dch->timer);
668*4882a593Smuzhiyun 		break;
669*4882a593Smuzhiyun 	case HW_POWERUP_REQ:
670*4882a593Smuzhiyun 		spin_lock_irqsave(isac->hwlock, flags);
671*4882a593Smuzhiyun 		ph_command(isac, ISAC_CMD_TIM);
672*4882a593Smuzhiyun 		spin_unlock_irqrestore(isac->hwlock, flags);
673*4882a593Smuzhiyun 		break;
674*4882a593Smuzhiyun 	case PH_ACTIVATE_IND:
675*4882a593Smuzhiyun 		test_and_set_bit(FLG_ACTIVE, &dch->Flags);
676*4882a593Smuzhiyun 		_queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
677*4882a593Smuzhiyun 			    GFP_ATOMIC);
678*4882a593Smuzhiyun 		break;
679*4882a593Smuzhiyun 	case PH_DEACTIVATE_IND:
680*4882a593Smuzhiyun 		test_and_clear_bit(FLG_ACTIVE, &dch->Flags);
681*4882a593Smuzhiyun 		_queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
682*4882a593Smuzhiyun 			    GFP_ATOMIC);
683*4882a593Smuzhiyun 		break;
684*4882a593Smuzhiyun 	default:
685*4882a593Smuzhiyun 		pr_debug("%s: %s unknown command %x\n", isac->name,
686*4882a593Smuzhiyun 			 __func__, cmd);
687*4882a593Smuzhiyun 		return -1;
688*4882a593Smuzhiyun 	}
689*4882a593Smuzhiyun 	return 0;
690*4882a593Smuzhiyun }
691*4882a593Smuzhiyun 
692*4882a593Smuzhiyun static void
isac_release(struct isac_hw * isac)693*4882a593Smuzhiyun isac_release(struct isac_hw *isac)
694*4882a593Smuzhiyun {
695*4882a593Smuzhiyun 	if (isac->type & IPAC_TYPE_ISACX)
696*4882a593Smuzhiyun 		WriteISAC(isac, ISACX_MASK, 0xff);
697*4882a593Smuzhiyun 	else if (isac->type != 0)
698*4882a593Smuzhiyun 		WriteISAC(isac, ISAC_MASK, 0xff);
699*4882a593Smuzhiyun 	if (isac->dch.timer.function != NULL) {
700*4882a593Smuzhiyun 		del_timer(&isac->dch.timer);
701*4882a593Smuzhiyun 		isac->dch.timer.function = NULL;
702*4882a593Smuzhiyun 	}
703*4882a593Smuzhiyun 	kfree(isac->mon_rx);
704*4882a593Smuzhiyun 	isac->mon_rx = NULL;
705*4882a593Smuzhiyun 	kfree(isac->mon_tx);
706*4882a593Smuzhiyun 	isac->mon_tx = NULL;
707*4882a593Smuzhiyun 	if (isac->dch.l1)
708*4882a593Smuzhiyun 		l1_event(isac->dch.l1, CLOSE_CHANNEL);
709*4882a593Smuzhiyun 	mISDN_freedchannel(&isac->dch);
710*4882a593Smuzhiyun }
711*4882a593Smuzhiyun 
712*4882a593Smuzhiyun static void
dbusy_timer_handler(struct timer_list * t)713*4882a593Smuzhiyun dbusy_timer_handler(struct timer_list *t)
714*4882a593Smuzhiyun {
715*4882a593Smuzhiyun 	struct isac_hw *isac = from_timer(isac, t, dch.timer);
716*4882a593Smuzhiyun 	int rbch, star;
717*4882a593Smuzhiyun 	u_long flags;
718*4882a593Smuzhiyun 
719*4882a593Smuzhiyun 	if (test_bit(FLG_BUSY_TIMER, &isac->dch.Flags)) {
720*4882a593Smuzhiyun 		spin_lock_irqsave(isac->hwlock, flags);
721*4882a593Smuzhiyun 		rbch = ReadISAC(isac, ISAC_RBCH);
722*4882a593Smuzhiyun 		star = ReadISAC(isac, ISAC_STAR);
723*4882a593Smuzhiyun 		pr_debug("%s: D-Channel Busy RBCH %02x STAR %02x\n",
724*4882a593Smuzhiyun 			 isac->name, rbch, star);
725*4882a593Smuzhiyun 		if (rbch & ISAC_RBCH_XAC) /* D-Channel Busy */
726*4882a593Smuzhiyun 			test_and_set_bit(FLG_L1_BUSY, &isac->dch.Flags);
727*4882a593Smuzhiyun 		else {
728*4882a593Smuzhiyun 			/* discard frame; reset transceiver */
729*4882a593Smuzhiyun 			test_and_clear_bit(FLG_BUSY_TIMER, &isac->dch.Flags);
730*4882a593Smuzhiyun 			if (isac->dch.tx_idx)
731*4882a593Smuzhiyun 				isac->dch.tx_idx = 0;
732*4882a593Smuzhiyun 			else
733*4882a593Smuzhiyun 				pr_info("%s: ISAC D-Channel Busy no tx_idx\n",
734*4882a593Smuzhiyun 					isac->name);
735*4882a593Smuzhiyun 			/* Transmitter reset */
736*4882a593Smuzhiyun 			WriteISAC(isac, ISAC_CMDR, 0x01);
737*4882a593Smuzhiyun 		}
738*4882a593Smuzhiyun 		spin_unlock_irqrestore(isac->hwlock, flags);
739*4882a593Smuzhiyun 	}
740*4882a593Smuzhiyun }
741*4882a593Smuzhiyun 
742*4882a593Smuzhiyun static int
open_dchannel_caller(struct isac_hw * isac,struct channel_req * rq,void * caller)743*4882a593Smuzhiyun open_dchannel_caller(struct isac_hw *isac, struct channel_req *rq, void *caller)
744*4882a593Smuzhiyun {
745*4882a593Smuzhiyun 	pr_debug("%s: %s dev(%d) open from %p\n", isac->name, __func__,
746*4882a593Smuzhiyun 		 isac->dch.dev.id, caller);
747*4882a593Smuzhiyun 	if (rq->protocol != ISDN_P_TE_S0)
748*4882a593Smuzhiyun 		return -EINVAL;
749*4882a593Smuzhiyun 	if (rq->adr.channel == 1)
750*4882a593Smuzhiyun 		/* E-Channel not supported */
751*4882a593Smuzhiyun 		return -EINVAL;
752*4882a593Smuzhiyun 	rq->ch = &isac->dch.dev.D;
753*4882a593Smuzhiyun 	rq->ch->protocol = rq->protocol;
754*4882a593Smuzhiyun 	if (isac->dch.state == 7)
755*4882a593Smuzhiyun 		_queue_data(rq->ch, PH_ACTIVATE_IND, MISDN_ID_ANY,
756*4882a593Smuzhiyun 			    0, NULL, GFP_KERNEL);
757*4882a593Smuzhiyun 	return 0;
758*4882a593Smuzhiyun }
759*4882a593Smuzhiyun 
760*4882a593Smuzhiyun static int
open_dchannel(struct isac_hw * isac,struct channel_req * rq)761*4882a593Smuzhiyun open_dchannel(struct isac_hw *isac, struct channel_req *rq)
762*4882a593Smuzhiyun {
763*4882a593Smuzhiyun 	return open_dchannel_caller(isac, rq, __builtin_return_address(0));
764*4882a593Smuzhiyun }
765*4882a593Smuzhiyun 
766*4882a593Smuzhiyun static const char *ISACVer[] =
767*4882a593Smuzhiyun {"2086/2186 V1.1", "2085 B1", "2085 B2",
768*4882a593Smuzhiyun  "2085 V2.3"};
769*4882a593Smuzhiyun 
770*4882a593Smuzhiyun static int
isac_init(struct isac_hw * isac)771*4882a593Smuzhiyun isac_init(struct isac_hw *isac)
772*4882a593Smuzhiyun {
773*4882a593Smuzhiyun 	u8 val;
774*4882a593Smuzhiyun 	int err = 0;
775*4882a593Smuzhiyun 
776*4882a593Smuzhiyun 	if (!isac->dch.l1) {
777*4882a593Smuzhiyun 		err = create_l1(&isac->dch, isac_l1cmd);
778*4882a593Smuzhiyun 		if (err)
779*4882a593Smuzhiyun 			return err;
780*4882a593Smuzhiyun 	}
781*4882a593Smuzhiyun 	isac->mon_tx = NULL;
782*4882a593Smuzhiyun 	isac->mon_rx = NULL;
783*4882a593Smuzhiyun 	timer_setup(&isac->dch.timer, dbusy_timer_handler, 0);
784*4882a593Smuzhiyun 	isac->mocr = 0xaa;
785*4882a593Smuzhiyun 	if (isac->type & IPAC_TYPE_ISACX) {
786*4882a593Smuzhiyun 		/* Disable all IRQ */
787*4882a593Smuzhiyun 		WriteISAC(isac, ISACX_MASK, 0xff);
788*4882a593Smuzhiyun 		val = ReadISAC(isac, ISACX_STARD);
789*4882a593Smuzhiyun 		pr_debug("%s: ISACX STARD %x\n", isac->name, val);
790*4882a593Smuzhiyun 		val = ReadISAC(isac, ISACX_ISTAD);
791*4882a593Smuzhiyun 		pr_debug("%s: ISACX ISTAD %x\n", isac->name, val);
792*4882a593Smuzhiyun 		val = ReadISAC(isac, ISACX_ISTA);
793*4882a593Smuzhiyun 		pr_debug("%s: ISACX ISTA %x\n", isac->name, val);
794*4882a593Smuzhiyun 		/* clear LDD */
795*4882a593Smuzhiyun 		WriteISAC(isac, ISACX_TR_CONF0, 0x00);
796*4882a593Smuzhiyun 		/* enable transmitter */
797*4882a593Smuzhiyun 		WriteISAC(isac, ISACX_TR_CONF2, 0x00);
798*4882a593Smuzhiyun 		/* transparent mode 0, RAC, stop/go */
799*4882a593Smuzhiyun 		WriteISAC(isac, ISACX_MODED, 0xc9);
800*4882a593Smuzhiyun 		/* all HDLC IRQ unmasked */
801*4882a593Smuzhiyun 		val = ReadISAC(isac, ISACX_ID);
802*4882a593Smuzhiyun 		if (isac->dch.debug & DEBUG_HW)
803*4882a593Smuzhiyun 			pr_notice("%s: ISACX Design ID %x\n",
804*4882a593Smuzhiyun 				  isac->name, val & 0x3f);
805*4882a593Smuzhiyun 		val = ReadISAC(isac, ISACX_CIR0);
806*4882a593Smuzhiyun 		pr_debug("%s: ISACX CIR0 %02X\n", isac->name, val);
807*4882a593Smuzhiyun 		isac->state = val >> 4;
808*4882a593Smuzhiyun 		isac_ph_state_change(isac);
809*4882a593Smuzhiyun 		ph_command(isac, ISAC_CMD_RS);
810*4882a593Smuzhiyun 		WriteISAC(isac, ISACX_MASK, IPACX__ON);
811*4882a593Smuzhiyun 		WriteISAC(isac, ISACX_MASKD, 0x00);
812*4882a593Smuzhiyun 	} else { /* old isac */
813*4882a593Smuzhiyun 		WriteISAC(isac, ISAC_MASK, 0xff);
814*4882a593Smuzhiyun 		val = ReadISAC(isac, ISAC_STAR);
815*4882a593Smuzhiyun 		pr_debug("%s: ISAC STAR %x\n", isac->name, val);
816*4882a593Smuzhiyun 		val = ReadISAC(isac, ISAC_MODE);
817*4882a593Smuzhiyun 		pr_debug("%s: ISAC MODE %x\n", isac->name, val);
818*4882a593Smuzhiyun 		val = ReadISAC(isac, ISAC_ADF2);
819*4882a593Smuzhiyun 		pr_debug("%s: ISAC ADF2 %x\n", isac->name, val);
820*4882a593Smuzhiyun 		val = ReadISAC(isac, ISAC_ISTA);
821*4882a593Smuzhiyun 		pr_debug("%s: ISAC ISTA %x\n", isac->name, val);
822*4882a593Smuzhiyun 		if (val & 0x01) {
823*4882a593Smuzhiyun 			val = ReadISAC(isac, ISAC_EXIR);
824*4882a593Smuzhiyun 			pr_debug("%s: ISAC EXIR %x\n", isac->name, val);
825*4882a593Smuzhiyun 		}
826*4882a593Smuzhiyun 		val = ReadISAC(isac, ISAC_RBCH);
827*4882a593Smuzhiyun 		if (isac->dch.debug & DEBUG_HW)
828*4882a593Smuzhiyun 			pr_notice("%s: ISAC version (%x): %s\n", isac->name,
829*4882a593Smuzhiyun 				  val, ISACVer[(val >> 5) & 3]);
830*4882a593Smuzhiyun 		isac->type |= ((val >> 5) & 3);
831*4882a593Smuzhiyun 		if (!isac->adf2)
832*4882a593Smuzhiyun 			isac->adf2 = 0x80;
833*4882a593Smuzhiyun 		if (!(isac->adf2 & 0x80)) { /* only IOM 2 Mode */
834*4882a593Smuzhiyun 			pr_info("%s: only support IOM2 mode but adf2=%02x\n",
835*4882a593Smuzhiyun 				isac->name, isac->adf2);
836*4882a593Smuzhiyun 			isac_release(isac);
837*4882a593Smuzhiyun 			return -EINVAL;
838*4882a593Smuzhiyun 		}
839*4882a593Smuzhiyun 		WriteISAC(isac, ISAC_ADF2, isac->adf2);
840*4882a593Smuzhiyun 		WriteISAC(isac, ISAC_SQXR, 0x2f);
841*4882a593Smuzhiyun 		WriteISAC(isac, ISAC_SPCR, 0x00);
842*4882a593Smuzhiyun 		WriteISAC(isac, ISAC_STCR, 0x70);
843*4882a593Smuzhiyun 		WriteISAC(isac, ISAC_MODE, 0xc9);
844*4882a593Smuzhiyun 		WriteISAC(isac, ISAC_TIMR, 0x00);
845*4882a593Smuzhiyun 		WriteISAC(isac, ISAC_ADF1, 0x00);
846*4882a593Smuzhiyun 		val = ReadISAC(isac, ISAC_CIR0);
847*4882a593Smuzhiyun 		pr_debug("%s: ISAC CIR0 %x\n", isac->name, val);
848*4882a593Smuzhiyun 		isac->state = (val >> 2) & 0xf;
849*4882a593Smuzhiyun 		isac_ph_state_change(isac);
850*4882a593Smuzhiyun 		ph_command(isac, ISAC_CMD_RS);
851*4882a593Smuzhiyun 		WriteISAC(isac, ISAC_MASK, 0);
852*4882a593Smuzhiyun 	}
853*4882a593Smuzhiyun 	return err;
854*4882a593Smuzhiyun }
855*4882a593Smuzhiyun 
856*4882a593Smuzhiyun int
mISDNisac_init(struct isac_hw * isac,void * hw)857*4882a593Smuzhiyun mISDNisac_init(struct isac_hw *isac, void *hw)
858*4882a593Smuzhiyun {
859*4882a593Smuzhiyun 	mISDN_initdchannel(&isac->dch, MAX_DFRAME_LEN_L1, isac_ph_state_bh);
860*4882a593Smuzhiyun 	isac->dch.hw = hw;
861*4882a593Smuzhiyun 	isac->dch.dev.D.send = isac_l1hw;
862*4882a593Smuzhiyun 	isac->init = isac_init;
863*4882a593Smuzhiyun 	isac->release = isac_release;
864*4882a593Smuzhiyun 	isac->ctrl = isac_ctrl;
865*4882a593Smuzhiyun 	isac->open = open_dchannel;
866*4882a593Smuzhiyun 	isac->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0);
867*4882a593Smuzhiyun 	isac->dch.dev.nrbchan = 2;
868*4882a593Smuzhiyun 	return 0;
869*4882a593Smuzhiyun }
870*4882a593Smuzhiyun EXPORT_SYMBOL(mISDNisac_init);
871*4882a593Smuzhiyun 
872*4882a593Smuzhiyun static void
waitforCEC(struct hscx_hw * hx)873*4882a593Smuzhiyun waitforCEC(struct hscx_hw *hx)
874*4882a593Smuzhiyun {
875*4882a593Smuzhiyun 	u8 starb, to = 50;
876*4882a593Smuzhiyun 
877*4882a593Smuzhiyun 	while (to) {
878*4882a593Smuzhiyun 		starb = ReadHSCX(hx, IPAC_STARB);
879*4882a593Smuzhiyun 		if (!(starb & 0x04))
880*4882a593Smuzhiyun 			break;
881*4882a593Smuzhiyun 		udelay(1);
882*4882a593Smuzhiyun 		to--;
883*4882a593Smuzhiyun 	}
884*4882a593Smuzhiyun 	if (to < 50)
885*4882a593Smuzhiyun 		pr_debug("%s: B%1d CEC %d us\n", hx->ip->name, hx->bch.nr,
886*4882a593Smuzhiyun 			 50 - to);
887*4882a593Smuzhiyun 	if (!to)
888*4882a593Smuzhiyun 		pr_info("%s: B%1d CEC timeout\n", hx->ip->name, hx->bch.nr);
889*4882a593Smuzhiyun }
890*4882a593Smuzhiyun 
891*4882a593Smuzhiyun 
892*4882a593Smuzhiyun static void
waitforXFW(struct hscx_hw * hx)893*4882a593Smuzhiyun waitforXFW(struct hscx_hw *hx)
894*4882a593Smuzhiyun {
895*4882a593Smuzhiyun 	u8 starb, to = 50;
896*4882a593Smuzhiyun 
897*4882a593Smuzhiyun 	while (to) {
898*4882a593Smuzhiyun 		starb = ReadHSCX(hx, IPAC_STARB);
899*4882a593Smuzhiyun 		if ((starb & 0x44) == 0x40)
900*4882a593Smuzhiyun 			break;
901*4882a593Smuzhiyun 		udelay(1);
902*4882a593Smuzhiyun 		to--;
903*4882a593Smuzhiyun 	}
904*4882a593Smuzhiyun 	if (to < 50)
905*4882a593Smuzhiyun 		pr_debug("%s: B%1d XFW %d us\n", hx->ip->name, hx->bch.nr,
906*4882a593Smuzhiyun 			 50 - to);
907*4882a593Smuzhiyun 	if (!to)
908*4882a593Smuzhiyun 		pr_info("%s: B%1d XFW timeout\n", hx->ip->name, hx->bch.nr);
909*4882a593Smuzhiyun }
910*4882a593Smuzhiyun 
911*4882a593Smuzhiyun static void
hscx_cmdr(struct hscx_hw * hx,u8 cmd)912*4882a593Smuzhiyun hscx_cmdr(struct hscx_hw *hx, u8 cmd)
913*4882a593Smuzhiyun {
914*4882a593Smuzhiyun 	if (hx->ip->type & IPAC_TYPE_IPACX)
915*4882a593Smuzhiyun 		WriteHSCX(hx, IPACX_CMDRB, cmd);
916*4882a593Smuzhiyun 	else {
917*4882a593Smuzhiyun 		waitforCEC(hx);
918*4882a593Smuzhiyun 		WriteHSCX(hx, IPAC_CMDRB, cmd);
919*4882a593Smuzhiyun 	}
920*4882a593Smuzhiyun }
921*4882a593Smuzhiyun 
922*4882a593Smuzhiyun static void
hscx_empty_fifo(struct hscx_hw * hscx,u8 count)923*4882a593Smuzhiyun hscx_empty_fifo(struct hscx_hw *hscx, u8 count)
924*4882a593Smuzhiyun {
925*4882a593Smuzhiyun 	u8 *p;
926*4882a593Smuzhiyun 	int maxlen;
927*4882a593Smuzhiyun 
928*4882a593Smuzhiyun 	pr_debug("%s: B%1d %d\n", hscx->ip->name, hscx->bch.nr, count);
929*4882a593Smuzhiyun 	if (test_bit(FLG_RX_OFF, &hscx->bch.Flags)) {
930*4882a593Smuzhiyun 		hscx->bch.dropcnt += count;
931*4882a593Smuzhiyun 		hscx_cmdr(hscx, 0x80); /* RMC */
932*4882a593Smuzhiyun 		return;
933*4882a593Smuzhiyun 	}
934*4882a593Smuzhiyun 	maxlen = bchannel_get_rxbuf(&hscx->bch, count);
935*4882a593Smuzhiyun 	if (maxlen < 0) {
936*4882a593Smuzhiyun 		hscx_cmdr(hscx, 0x80); /* RMC */
937*4882a593Smuzhiyun 		if (hscx->bch.rx_skb)
938*4882a593Smuzhiyun 			skb_trim(hscx->bch.rx_skb, 0);
939*4882a593Smuzhiyun 		pr_warn("%s.B%d: No bufferspace for %d bytes\n",
940*4882a593Smuzhiyun 			hscx->ip->name, hscx->bch.nr, count);
941*4882a593Smuzhiyun 		return;
942*4882a593Smuzhiyun 	}
943*4882a593Smuzhiyun 	p = skb_put(hscx->bch.rx_skb, count);
944*4882a593Smuzhiyun 
945*4882a593Smuzhiyun 	if (hscx->ip->type & IPAC_TYPE_IPACX)
946*4882a593Smuzhiyun 		hscx->ip->read_fifo(hscx->ip->hw,
947*4882a593Smuzhiyun 				    hscx->off + IPACX_RFIFOB, p, count);
948*4882a593Smuzhiyun 	else
949*4882a593Smuzhiyun 		hscx->ip->read_fifo(hscx->ip->hw,
950*4882a593Smuzhiyun 				    hscx->off, p, count);
951*4882a593Smuzhiyun 
952*4882a593Smuzhiyun 	hscx_cmdr(hscx, 0x80); /* RMC */
953*4882a593Smuzhiyun 
954*4882a593Smuzhiyun 	if (hscx->bch.debug & DEBUG_HW_BFIFO) {
955*4882a593Smuzhiyun 		snprintf(hscx->log, 64, "B%1d-recv %s %d ",
956*4882a593Smuzhiyun 			 hscx->bch.nr, hscx->ip->name, count);
957*4882a593Smuzhiyun 		print_hex_dump_bytes(hscx->log, DUMP_PREFIX_OFFSET, p, count);
958*4882a593Smuzhiyun 	}
959*4882a593Smuzhiyun }
960*4882a593Smuzhiyun 
961*4882a593Smuzhiyun static void
hscx_fill_fifo(struct hscx_hw * hscx)962*4882a593Smuzhiyun hscx_fill_fifo(struct hscx_hw *hscx)
963*4882a593Smuzhiyun {
964*4882a593Smuzhiyun 	int count, more;
965*4882a593Smuzhiyun 	u8 *p;
966*4882a593Smuzhiyun 
967*4882a593Smuzhiyun 	if (!hscx->bch.tx_skb) {
968*4882a593Smuzhiyun 		if (!test_bit(FLG_TX_EMPTY, &hscx->bch.Flags))
969*4882a593Smuzhiyun 			return;
970*4882a593Smuzhiyun 		count = hscx->fifo_size;
971*4882a593Smuzhiyun 		more = 1;
972*4882a593Smuzhiyun 		p = hscx->log;
973*4882a593Smuzhiyun 		memset(p, hscx->bch.fill[0], count);
974*4882a593Smuzhiyun 	} else {
975*4882a593Smuzhiyun 		count = hscx->bch.tx_skb->len - hscx->bch.tx_idx;
976*4882a593Smuzhiyun 		if (count <= 0)
977*4882a593Smuzhiyun 			return;
978*4882a593Smuzhiyun 		p = hscx->bch.tx_skb->data + hscx->bch.tx_idx;
979*4882a593Smuzhiyun 
980*4882a593Smuzhiyun 		more = test_bit(FLG_TRANSPARENT, &hscx->bch.Flags) ? 1 : 0;
981*4882a593Smuzhiyun 		if (count > hscx->fifo_size) {
982*4882a593Smuzhiyun 			count = hscx->fifo_size;
983*4882a593Smuzhiyun 			more = 1;
984*4882a593Smuzhiyun 		}
985*4882a593Smuzhiyun 		pr_debug("%s: B%1d %d/%d/%d\n", hscx->ip->name, hscx->bch.nr,
986*4882a593Smuzhiyun 			 count, hscx->bch.tx_idx, hscx->bch.tx_skb->len);
987*4882a593Smuzhiyun 		hscx->bch.tx_idx += count;
988*4882a593Smuzhiyun 	}
989*4882a593Smuzhiyun 	if (hscx->ip->type & IPAC_TYPE_IPACX)
990*4882a593Smuzhiyun 		hscx->ip->write_fifo(hscx->ip->hw,
991*4882a593Smuzhiyun 				     hscx->off + IPACX_XFIFOB, p, count);
992*4882a593Smuzhiyun 	else {
993*4882a593Smuzhiyun 		waitforXFW(hscx);
994*4882a593Smuzhiyun 		hscx->ip->write_fifo(hscx->ip->hw,
995*4882a593Smuzhiyun 				     hscx->off, p, count);
996*4882a593Smuzhiyun 	}
997*4882a593Smuzhiyun 	hscx_cmdr(hscx, more ? 0x08 : 0x0a);
998*4882a593Smuzhiyun 
999*4882a593Smuzhiyun 	if (hscx->bch.tx_skb && (hscx->bch.debug & DEBUG_HW_BFIFO)) {
1000*4882a593Smuzhiyun 		snprintf(hscx->log, 64, "B%1d-send %s %d ",
1001*4882a593Smuzhiyun 			 hscx->bch.nr, hscx->ip->name, count);
1002*4882a593Smuzhiyun 		print_hex_dump_bytes(hscx->log, DUMP_PREFIX_OFFSET, p, count);
1003*4882a593Smuzhiyun 	}
1004*4882a593Smuzhiyun }
1005*4882a593Smuzhiyun 
1006*4882a593Smuzhiyun static void
hscx_xpr(struct hscx_hw * hx)1007*4882a593Smuzhiyun hscx_xpr(struct hscx_hw *hx)
1008*4882a593Smuzhiyun {
1009*4882a593Smuzhiyun 	if (hx->bch.tx_skb && hx->bch.tx_idx < hx->bch.tx_skb->len) {
1010*4882a593Smuzhiyun 		hscx_fill_fifo(hx);
1011*4882a593Smuzhiyun 	} else {
1012*4882a593Smuzhiyun 		dev_kfree_skb(hx->bch.tx_skb);
1013*4882a593Smuzhiyun 		if (get_next_bframe(&hx->bch)) {
1014*4882a593Smuzhiyun 			hscx_fill_fifo(hx);
1015*4882a593Smuzhiyun 			test_and_clear_bit(FLG_TX_EMPTY, &hx->bch.Flags);
1016*4882a593Smuzhiyun 		} else if (test_bit(FLG_TX_EMPTY, &hx->bch.Flags)) {
1017*4882a593Smuzhiyun 			hscx_fill_fifo(hx);
1018*4882a593Smuzhiyun 		}
1019*4882a593Smuzhiyun 	}
1020*4882a593Smuzhiyun }
1021*4882a593Smuzhiyun 
1022*4882a593Smuzhiyun static void
ipac_rme(struct hscx_hw * hx)1023*4882a593Smuzhiyun ipac_rme(struct hscx_hw *hx)
1024*4882a593Smuzhiyun {
1025*4882a593Smuzhiyun 	int count;
1026*4882a593Smuzhiyun 	u8 rstab;
1027*4882a593Smuzhiyun 
1028*4882a593Smuzhiyun 	if (hx->ip->type & IPAC_TYPE_IPACX)
1029*4882a593Smuzhiyun 		rstab = ReadHSCX(hx, IPACX_RSTAB);
1030*4882a593Smuzhiyun 	else
1031*4882a593Smuzhiyun 		rstab = ReadHSCX(hx, IPAC_RSTAB);
1032*4882a593Smuzhiyun 	pr_debug("%s: B%1d RSTAB %02x\n", hx->ip->name, hx->bch.nr, rstab);
1033*4882a593Smuzhiyun 	if ((rstab & 0xf0) != 0xa0) {
1034*4882a593Smuzhiyun 		/* !(VFR && !RDO && CRC && !RAB) */
1035*4882a593Smuzhiyun 		if (!(rstab & 0x80)) {
1036*4882a593Smuzhiyun 			if (hx->bch.debug & DEBUG_HW_BCHANNEL)
1037*4882a593Smuzhiyun 				pr_notice("%s: B%1d invalid frame\n",
1038*4882a593Smuzhiyun 					  hx->ip->name, hx->bch.nr);
1039*4882a593Smuzhiyun 		}
1040*4882a593Smuzhiyun 		if (rstab & 0x40) {
1041*4882a593Smuzhiyun 			if (hx->bch.debug & DEBUG_HW_BCHANNEL)
1042*4882a593Smuzhiyun 				pr_notice("%s: B%1d RDO proto=%x\n",
1043*4882a593Smuzhiyun 					  hx->ip->name, hx->bch.nr,
1044*4882a593Smuzhiyun 					  hx->bch.state);
1045*4882a593Smuzhiyun 		}
1046*4882a593Smuzhiyun 		if (!(rstab & 0x20)) {
1047*4882a593Smuzhiyun 			if (hx->bch.debug & DEBUG_HW_BCHANNEL)
1048*4882a593Smuzhiyun 				pr_notice("%s: B%1d CRC error\n",
1049*4882a593Smuzhiyun 					  hx->ip->name, hx->bch.nr);
1050*4882a593Smuzhiyun 		}
1051*4882a593Smuzhiyun 		hscx_cmdr(hx, 0x80); /* Do RMC */
1052*4882a593Smuzhiyun 		return;
1053*4882a593Smuzhiyun 	}
1054*4882a593Smuzhiyun 	if (hx->ip->type & IPAC_TYPE_IPACX)
1055*4882a593Smuzhiyun 		count = ReadHSCX(hx, IPACX_RBCLB);
1056*4882a593Smuzhiyun 	else
1057*4882a593Smuzhiyun 		count = ReadHSCX(hx, IPAC_RBCLB);
1058*4882a593Smuzhiyun 	count &= (hx->fifo_size - 1);
1059*4882a593Smuzhiyun 	if (count == 0)
1060*4882a593Smuzhiyun 		count = hx->fifo_size;
1061*4882a593Smuzhiyun 	hscx_empty_fifo(hx, count);
1062*4882a593Smuzhiyun 	if (!hx->bch.rx_skb)
1063*4882a593Smuzhiyun 		return;
1064*4882a593Smuzhiyun 	if (hx->bch.rx_skb->len < 2) {
1065*4882a593Smuzhiyun 		pr_debug("%s: B%1d frame to short %d\n",
1066*4882a593Smuzhiyun 			 hx->ip->name, hx->bch.nr, hx->bch.rx_skb->len);
1067*4882a593Smuzhiyun 		skb_trim(hx->bch.rx_skb, 0);
1068*4882a593Smuzhiyun 	} else {
1069*4882a593Smuzhiyun 		skb_trim(hx->bch.rx_skb, hx->bch.rx_skb->len - 1);
1070*4882a593Smuzhiyun 		recv_Bchannel(&hx->bch, 0, false);
1071*4882a593Smuzhiyun 	}
1072*4882a593Smuzhiyun }
1073*4882a593Smuzhiyun 
1074*4882a593Smuzhiyun static void
ipac_irq(struct hscx_hw * hx,u8 ista)1075*4882a593Smuzhiyun ipac_irq(struct hscx_hw *hx, u8 ista)
1076*4882a593Smuzhiyun {
1077*4882a593Smuzhiyun 	u8 istab, m, exirb = 0;
1078*4882a593Smuzhiyun 
1079*4882a593Smuzhiyun 	if (hx->ip->type & IPAC_TYPE_IPACX)
1080*4882a593Smuzhiyun 		istab = ReadHSCX(hx, IPACX_ISTAB);
1081*4882a593Smuzhiyun 	else if (hx->ip->type & IPAC_TYPE_IPAC) {
1082*4882a593Smuzhiyun 		istab = ReadHSCX(hx, IPAC_ISTAB);
1083*4882a593Smuzhiyun 		m = (hx->bch.nr & 1) ? IPAC__EXA : IPAC__EXB;
1084*4882a593Smuzhiyun 		if (m & ista) {
1085*4882a593Smuzhiyun 			exirb = ReadHSCX(hx, IPAC_EXIRB);
1086*4882a593Smuzhiyun 			pr_debug("%s: B%1d EXIRB %02x\n", hx->ip->name,
1087*4882a593Smuzhiyun 				 hx->bch.nr, exirb);
1088*4882a593Smuzhiyun 		}
1089*4882a593Smuzhiyun 	} else if (hx->bch.nr & 2) { /* HSCX B */
1090*4882a593Smuzhiyun 		if (ista & (HSCX__EXA | HSCX__ICA))
1091*4882a593Smuzhiyun 			ipac_irq(&hx->ip->hscx[0], ista);
1092*4882a593Smuzhiyun 		if (ista & HSCX__EXB) {
1093*4882a593Smuzhiyun 			exirb = ReadHSCX(hx, IPAC_EXIRB);
1094*4882a593Smuzhiyun 			pr_debug("%s: B%1d EXIRB %02x\n", hx->ip->name,
1095*4882a593Smuzhiyun 				 hx->bch.nr, exirb);
1096*4882a593Smuzhiyun 		}
1097*4882a593Smuzhiyun 		istab = ista & 0xF8;
1098*4882a593Smuzhiyun 	} else { /* HSCX A */
1099*4882a593Smuzhiyun 		istab = ReadHSCX(hx, IPAC_ISTAB);
1100*4882a593Smuzhiyun 		if (ista & HSCX__EXA) {
1101*4882a593Smuzhiyun 			exirb = ReadHSCX(hx, IPAC_EXIRB);
1102*4882a593Smuzhiyun 			pr_debug("%s: B%1d EXIRB %02x\n", hx->ip->name,
1103*4882a593Smuzhiyun 				 hx->bch.nr, exirb);
1104*4882a593Smuzhiyun 		}
1105*4882a593Smuzhiyun 		istab = istab & 0xF8;
1106*4882a593Smuzhiyun 	}
1107*4882a593Smuzhiyun 	if (exirb & IPAC_B_XDU)
1108*4882a593Smuzhiyun 		istab |= IPACX_B_XDU;
1109*4882a593Smuzhiyun 	if (exirb & IPAC_B_RFO)
1110*4882a593Smuzhiyun 		istab |= IPACX_B_RFO;
1111*4882a593Smuzhiyun 	pr_debug("%s: B%1d ISTAB %02x\n", hx->ip->name, hx->bch.nr, istab);
1112*4882a593Smuzhiyun 
1113*4882a593Smuzhiyun 	if (!test_bit(FLG_ACTIVE, &hx->bch.Flags))
1114*4882a593Smuzhiyun 		return;
1115*4882a593Smuzhiyun 
1116*4882a593Smuzhiyun 	if (istab & IPACX_B_RME)
1117*4882a593Smuzhiyun 		ipac_rme(hx);
1118*4882a593Smuzhiyun 
1119*4882a593Smuzhiyun 	if (istab & IPACX_B_RPF) {
1120*4882a593Smuzhiyun 		hscx_empty_fifo(hx, hx->fifo_size);
1121*4882a593Smuzhiyun 		if (test_bit(FLG_TRANSPARENT, &hx->bch.Flags))
1122*4882a593Smuzhiyun 			recv_Bchannel(&hx->bch, 0, false);
1123*4882a593Smuzhiyun 	}
1124*4882a593Smuzhiyun 
1125*4882a593Smuzhiyun 	if (istab & IPACX_B_RFO) {
1126*4882a593Smuzhiyun 		pr_debug("%s: B%1d RFO error\n", hx->ip->name, hx->bch.nr);
1127*4882a593Smuzhiyun 		hscx_cmdr(hx, 0x40);	/* RRES */
1128*4882a593Smuzhiyun 	}
1129*4882a593Smuzhiyun 
1130*4882a593Smuzhiyun 	if (istab & IPACX_B_XPR)
1131*4882a593Smuzhiyun 		hscx_xpr(hx);
1132*4882a593Smuzhiyun 
1133*4882a593Smuzhiyun 	if (istab & IPACX_B_XDU) {
1134*4882a593Smuzhiyun 		if (test_bit(FLG_TRANSPARENT, &hx->bch.Flags)) {
1135*4882a593Smuzhiyun 			if (test_bit(FLG_FILLEMPTY, &hx->bch.Flags))
1136*4882a593Smuzhiyun 				test_and_set_bit(FLG_TX_EMPTY, &hx->bch.Flags);
1137*4882a593Smuzhiyun 			hscx_xpr(hx);
1138*4882a593Smuzhiyun 			return;
1139*4882a593Smuzhiyun 		}
1140*4882a593Smuzhiyun 		pr_debug("%s: B%1d XDU error at len %d\n", hx->ip->name,
1141*4882a593Smuzhiyun 			 hx->bch.nr, hx->bch.tx_idx);
1142*4882a593Smuzhiyun 		hx->bch.tx_idx = 0;
1143*4882a593Smuzhiyun 		hscx_cmdr(hx, 0x01);	/* XRES */
1144*4882a593Smuzhiyun 	}
1145*4882a593Smuzhiyun }
1146*4882a593Smuzhiyun 
1147*4882a593Smuzhiyun irqreturn_t
mISDNipac_irq(struct ipac_hw * ipac,int maxloop)1148*4882a593Smuzhiyun mISDNipac_irq(struct ipac_hw *ipac, int maxloop)
1149*4882a593Smuzhiyun {
1150*4882a593Smuzhiyun 	int cnt = maxloop + 1;
1151*4882a593Smuzhiyun 	u8 ista, istad;
1152*4882a593Smuzhiyun 	struct isac_hw  *isac = &ipac->isac;
1153*4882a593Smuzhiyun 
1154*4882a593Smuzhiyun 	if (ipac->type & IPAC_TYPE_IPACX) {
1155*4882a593Smuzhiyun 		ista = ReadIPAC(ipac, ISACX_ISTA);
1156*4882a593Smuzhiyun 		while (ista && --cnt) {
1157*4882a593Smuzhiyun 			pr_debug("%s: ISTA %02x\n", ipac->name, ista);
1158*4882a593Smuzhiyun 			if (ista & IPACX__ICA)
1159*4882a593Smuzhiyun 				ipac_irq(&ipac->hscx[0], ista);
1160*4882a593Smuzhiyun 			if (ista & IPACX__ICB)
1161*4882a593Smuzhiyun 				ipac_irq(&ipac->hscx[1], ista);
1162*4882a593Smuzhiyun 			if (ista & (ISACX__ICD | ISACX__CIC))
1163*4882a593Smuzhiyun 				mISDNisac_irq(&ipac->isac, ista);
1164*4882a593Smuzhiyun 			ista = ReadIPAC(ipac, ISACX_ISTA);
1165*4882a593Smuzhiyun 		}
1166*4882a593Smuzhiyun 	} else if (ipac->type & IPAC_TYPE_IPAC) {
1167*4882a593Smuzhiyun 		ista = ReadIPAC(ipac, IPAC_ISTA);
1168*4882a593Smuzhiyun 		while (ista && --cnt) {
1169*4882a593Smuzhiyun 			pr_debug("%s: ISTA %02x\n", ipac->name, ista);
1170*4882a593Smuzhiyun 			if (ista & (IPAC__ICD | IPAC__EXD)) {
1171*4882a593Smuzhiyun 				istad = ReadISAC(isac, ISAC_ISTA);
1172*4882a593Smuzhiyun 				pr_debug("%s: ISTAD %02x\n", ipac->name, istad);
1173*4882a593Smuzhiyun 				if (istad & IPAC_D_TIN2)
1174*4882a593Smuzhiyun 					pr_debug("%s TIN2 irq\n", ipac->name);
1175*4882a593Smuzhiyun 				if (ista & IPAC__EXD)
1176*4882a593Smuzhiyun 					istad |= 1; /* ISAC EXI */
1177*4882a593Smuzhiyun 				mISDNisac_irq(isac, istad);
1178*4882a593Smuzhiyun 			}
1179*4882a593Smuzhiyun 			if (ista & (IPAC__ICA | IPAC__EXA))
1180*4882a593Smuzhiyun 				ipac_irq(&ipac->hscx[0], ista);
1181*4882a593Smuzhiyun 			if (ista & (IPAC__ICB | IPAC__EXB))
1182*4882a593Smuzhiyun 				ipac_irq(&ipac->hscx[1], ista);
1183*4882a593Smuzhiyun 			ista = ReadIPAC(ipac, IPAC_ISTA);
1184*4882a593Smuzhiyun 		}
1185*4882a593Smuzhiyun 	} else if (ipac->type & IPAC_TYPE_HSCX) {
1186*4882a593Smuzhiyun 		while (--cnt) {
1187*4882a593Smuzhiyun 			ista = ReadIPAC(ipac, IPAC_ISTAB + ipac->hscx[1].off);
1188*4882a593Smuzhiyun 			pr_debug("%s: B2 ISTA %02x\n", ipac->name, ista);
1189*4882a593Smuzhiyun 			if (ista)
1190*4882a593Smuzhiyun 				ipac_irq(&ipac->hscx[1], ista);
1191*4882a593Smuzhiyun 			istad = ReadISAC(isac, ISAC_ISTA);
1192*4882a593Smuzhiyun 			pr_debug("%s: ISTAD %02x\n", ipac->name, istad);
1193*4882a593Smuzhiyun 			if (istad)
1194*4882a593Smuzhiyun 				mISDNisac_irq(isac, istad);
1195*4882a593Smuzhiyun 			if (0 == (ista | istad))
1196*4882a593Smuzhiyun 				break;
1197*4882a593Smuzhiyun 		}
1198*4882a593Smuzhiyun 	}
1199*4882a593Smuzhiyun 	if (cnt > maxloop) /* only for ISAC/HSCX without PCI IRQ test */
1200*4882a593Smuzhiyun 		return IRQ_NONE;
1201*4882a593Smuzhiyun 	if (cnt < maxloop)
1202*4882a593Smuzhiyun 		pr_debug("%s: %d irqloops cpu%d\n", ipac->name,
1203*4882a593Smuzhiyun 			 maxloop - cnt, smp_processor_id());
1204*4882a593Smuzhiyun 	if (maxloop && !cnt)
1205*4882a593Smuzhiyun 		pr_notice("%s: %d IRQ LOOP cpu%d\n", ipac->name,
1206*4882a593Smuzhiyun 			  maxloop, smp_processor_id());
1207*4882a593Smuzhiyun 	return IRQ_HANDLED;
1208*4882a593Smuzhiyun }
1209*4882a593Smuzhiyun EXPORT_SYMBOL(mISDNipac_irq);
1210*4882a593Smuzhiyun 
1211*4882a593Smuzhiyun static int
hscx_mode(struct hscx_hw * hscx,u32 bprotocol)1212*4882a593Smuzhiyun hscx_mode(struct hscx_hw *hscx, u32 bprotocol)
1213*4882a593Smuzhiyun {
1214*4882a593Smuzhiyun 	pr_debug("%s: HSCX %c protocol %x-->%x ch %d\n", hscx->ip->name,
1215*4882a593Smuzhiyun 		 '@' + hscx->bch.nr, hscx->bch.state, bprotocol, hscx->bch.nr);
1216*4882a593Smuzhiyun 	if (hscx->ip->type & IPAC_TYPE_IPACX) {
1217*4882a593Smuzhiyun 		if (hscx->bch.nr & 1) { /* B1 and ICA */
1218*4882a593Smuzhiyun 			WriteIPAC(hscx->ip, ISACX_BCHA_TSDP_BC1, 0x80);
1219*4882a593Smuzhiyun 			WriteIPAC(hscx->ip, ISACX_BCHA_CR, 0x88);
1220*4882a593Smuzhiyun 		} else { /* B2 and ICB */
1221*4882a593Smuzhiyun 			WriteIPAC(hscx->ip, ISACX_BCHB_TSDP_BC1, 0x81);
1222*4882a593Smuzhiyun 			WriteIPAC(hscx->ip, ISACX_BCHB_CR, 0x88);
1223*4882a593Smuzhiyun 		}
1224*4882a593Smuzhiyun 		switch (bprotocol) {
1225*4882a593Smuzhiyun 		case ISDN_P_NONE: /* init */
1226*4882a593Smuzhiyun 			WriteHSCX(hscx, IPACX_MODEB, 0xC0);	/* rec off */
1227*4882a593Smuzhiyun 			WriteHSCX(hscx, IPACX_EXMB,  0x30);	/* std adj. */
1228*4882a593Smuzhiyun 			WriteHSCX(hscx, IPACX_MASKB, 0xFF);	/* ints off */
1229*4882a593Smuzhiyun 			hscx_cmdr(hscx, 0x41);
1230*4882a593Smuzhiyun 			test_and_clear_bit(FLG_HDLC, &hscx->bch.Flags);
1231*4882a593Smuzhiyun 			test_and_clear_bit(FLG_TRANSPARENT, &hscx->bch.Flags);
1232*4882a593Smuzhiyun 			break;
1233*4882a593Smuzhiyun 		case ISDN_P_B_RAW:
1234*4882a593Smuzhiyun 			WriteHSCX(hscx, IPACX_MODEB, 0x88);	/* ex trans */
1235*4882a593Smuzhiyun 			WriteHSCX(hscx, IPACX_EXMB,  0x00);	/* trans */
1236*4882a593Smuzhiyun 			hscx_cmdr(hscx, 0x41);
1237*4882a593Smuzhiyun 			WriteHSCX(hscx, IPACX_MASKB, IPACX_B_ON);
1238*4882a593Smuzhiyun 			test_and_set_bit(FLG_TRANSPARENT, &hscx->bch.Flags);
1239*4882a593Smuzhiyun 			break;
1240*4882a593Smuzhiyun 		case ISDN_P_B_HDLC:
1241*4882a593Smuzhiyun 			WriteHSCX(hscx, IPACX_MODEB, 0xC0);	/* trans */
1242*4882a593Smuzhiyun 			WriteHSCX(hscx, IPACX_EXMB,  0x00);	/* hdlc,crc */
1243*4882a593Smuzhiyun 			hscx_cmdr(hscx, 0x41);
1244*4882a593Smuzhiyun 			WriteHSCX(hscx, IPACX_MASKB, IPACX_B_ON);
1245*4882a593Smuzhiyun 			test_and_set_bit(FLG_HDLC, &hscx->bch.Flags);
1246*4882a593Smuzhiyun 			break;
1247*4882a593Smuzhiyun 		default:
1248*4882a593Smuzhiyun 			pr_info("%s: protocol not known %x\n", hscx->ip->name,
1249*4882a593Smuzhiyun 				bprotocol);
1250*4882a593Smuzhiyun 			return -ENOPROTOOPT;
1251*4882a593Smuzhiyun 		}
1252*4882a593Smuzhiyun 	} else if (hscx->ip->type & IPAC_TYPE_IPAC) { /* IPAC */
1253*4882a593Smuzhiyun 		WriteHSCX(hscx, IPAC_CCR1, 0x82);
1254*4882a593Smuzhiyun 		WriteHSCX(hscx, IPAC_CCR2, 0x30);
1255*4882a593Smuzhiyun 		WriteHSCX(hscx, IPAC_XCCR, 0x07);
1256*4882a593Smuzhiyun 		WriteHSCX(hscx, IPAC_RCCR, 0x07);
1257*4882a593Smuzhiyun 		WriteHSCX(hscx, IPAC_TSAX, hscx->slot);
1258*4882a593Smuzhiyun 		WriteHSCX(hscx, IPAC_TSAR, hscx->slot);
1259*4882a593Smuzhiyun 		switch (bprotocol) {
1260*4882a593Smuzhiyun 		case ISDN_P_NONE:
1261*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_TSAX, 0x1F);
1262*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_TSAR, 0x1F);
1263*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_MODEB, 0x84);
1264*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_CCR1, 0x82);
1265*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_MASKB, 0xFF);	/* ints off */
1266*4882a593Smuzhiyun 			test_and_clear_bit(FLG_HDLC, &hscx->bch.Flags);
1267*4882a593Smuzhiyun 			test_and_clear_bit(FLG_TRANSPARENT, &hscx->bch.Flags);
1268*4882a593Smuzhiyun 			break;
1269*4882a593Smuzhiyun 		case ISDN_P_B_RAW:
1270*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_MODEB, 0xe4);	/* ex trans */
1271*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_CCR1, 0x82);
1272*4882a593Smuzhiyun 			hscx_cmdr(hscx, 0x41);
1273*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_MASKB, 0);
1274*4882a593Smuzhiyun 			test_and_set_bit(FLG_TRANSPARENT, &hscx->bch.Flags);
1275*4882a593Smuzhiyun 			break;
1276*4882a593Smuzhiyun 		case ISDN_P_B_HDLC:
1277*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_MODEB, 0x8c);
1278*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_CCR1, 0x8a);
1279*4882a593Smuzhiyun 			hscx_cmdr(hscx, 0x41);
1280*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_MASKB, 0);
1281*4882a593Smuzhiyun 			test_and_set_bit(FLG_HDLC, &hscx->bch.Flags);
1282*4882a593Smuzhiyun 			break;
1283*4882a593Smuzhiyun 		default:
1284*4882a593Smuzhiyun 			pr_info("%s: protocol not known %x\n", hscx->ip->name,
1285*4882a593Smuzhiyun 				bprotocol);
1286*4882a593Smuzhiyun 			return -ENOPROTOOPT;
1287*4882a593Smuzhiyun 		}
1288*4882a593Smuzhiyun 	} else if (hscx->ip->type & IPAC_TYPE_HSCX) { /* HSCX */
1289*4882a593Smuzhiyun 		WriteHSCX(hscx, IPAC_CCR1, 0x85);
1290*4882a593Smuzhiyun 		WriteHSCX(hscx, IPAC_CCR2, 0x30);
1291*4882a593Smuzhiyun 		WriteHSCX(hscx, IPAC_XCCR, 0x07);
1292*4882a593Smuzhiyun 		WriteHSCX(hscx, IPAC_RCCR, 0x07);
1293*4882a593Smuzhiyun 		WriteHSCX(hscx, IPAC_TSAX, hscx->slot);
1294*4882a593Smuzhiyun 		WriteHSCX(hscx, IPAC_TSAR, hscx->slot);
1295*4882a593Smuzhiyun 		switch (bprotocol) {
1296*4882a593Smuzhiyun 		case ISDN_P_NONE:
1297*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_TSAX, 0x1F);
1298*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_TSAR, 0x1F);
1299*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_MODEB, 0x84);
1300*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_CCR1, 0x85);
1301*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_MASKB, 0xFF);	/* ints off */
1302*4882a593Smuzhiyun 			test_and_clear_bit(FLG_HDLC, &hscx->bch.Flags);
1303*4882a593Smuzhiyun 			test_and_clear_bit(FLG_TRANSPARENT, &hscx->bch.Flags);
1304*4882a593Smuzhiyun 			break;
1305*4882a593Smuzhiyun 		case ISDN_P_B_RAW:
1306*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_MODEB, 0xe4);	/* ex trans */
1307*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_CCR1, 0x85);
1308*4882a593Smuzhiyun 			hscx_cmdr(hscx, 0x41);
1309*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_MASKB, 0);
1310*4882a593Smuzhiyun 			test_and_set_bit(FLG_TRANSPARENT, &hscx->bch.Flags);
1311*4882a593Smuzhiyun 			break;
1312*4882a593Smuzhiyun 		case ISDN_P_B_HDLC:
1313*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_MODEB, 0x8c);
1314*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_CCR1, 0x8d);
1315*4882a593Smuzhiyun 			hscx_cmdr(hscx, 0x41);
1316*4882a593Smuzhiyun 			WriteHSCX(hscx, IPAC_MASKB, 0);
1317*4882a593Smuzhiyun 			test_and_set_bit(FLG_HDLC, &hscx->bch.Flags);
1318*4882a593Smuzhiyun 			break;
1319*4882a593Smuzhiyun 		default:
1320*4882a593Smuzhiyun 			pr_info("%s: protocol not known %x\n", hscx->ip->name,
1321*4882a593Smuzhiyun 				bprotocol);
1322*4882a593Smuzhiyun 			return -ENOPROTOOPT;
1323*4882a593Smuzhiyun 		}
1324*4882a593Smuzhiyun 	} else
1325*4882a593Smuzhiyun 		return -EINVAL;
1326*4882a593Smuzhiyun 	hscx->bch.state = bprotocol;
1327*4882a593Smuzhiyun 	return 0;
1328*4882a593Smuzhiyun }
1329*4882a593Smuzhiyun 
1330*4882a593Smuzhiyun static int
hscx_l2l1(struct mISDNchannel * ch,struct sk_buff * skb)1331*4882a593Smuzhiyun hscx_l2l1(struct mISDNchannel *ch, struct sk_buff *skb)
1332*4882a593Smuzhiyun {
1333*4882a593Smuzhiyun 	struct bchannel *bch = container_of(ch, struct bchannel, ch);
1334*4882a593Smuzhiyun 	struct hscx_hw	*hx = container_of(bch, struct hscx_hw, bch);
1335*4882a593Smuzhiyun 	int ret = -EINVAL;
1336*4882a593Smuzhiyun 	struct mISDNhead *hh = mISDN_HEAD_P(skb);
1337*4882a593Smuzhiyun 	unsigned long flags;
1338*4882a593Smuzhiyun 
1339*4882a593Smuzhiyun 	switch (hh->prim) {
1340*4882a593Smuzhiyun 	case PH_DATA_REQ:
1341*4882a593Smuzhiyun 		spin_lock_irqsave(hx->ip->hwlock, flags);
1342*4882a593Smuzhiyun 		ret = bchannel_senddata(bch, skb);
1343*4882a593Smuzhiyun 		if (ret > 0) { /* direct TX */
1344*4882a593Smuzhiyun 			ret = 0;
1345*4882a593Smuzhiyun 			hscx_fill_fifo(hx);
1346*4882a593Smuzhiyun 		}
1347*4882a593Smuzhiyun 		spin_unlock_irqrestore(hx->ip->hwlock, flags);
1348*4882a593Smuzhiyun 		return ret;
1349*4882a593Smuzhiyun 	case PH_ACTIVATE_REQ:
1350*4882a593Smuzhiyun 		spin_lock_irqsave(hx->ip->hwlock, flags);
1351*4882a593Smuzhiyun 		if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags))
1352*4882a593Smuzhiyun 			ret = hscx_mode(hx, ch->protocol);
1353*4882a593Smuzhiyun 		else
1354*4882a593Smuzhiyun 			ret = 0;
1355*4882a593Smuzhiyun 		spin_unlock_irqrestore(hx->ip->hwlock, flags);
1356*4882a593Smuzhiyun 		if (!ret)
1357*4882a593Smuzhiyun 			_queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0,
1358*4882a593Smuzhiyun 				    NULL, GFP_KERNEL);
1359*4882a593Smuzhiyun 		break;
1360*4882a593Smuzhiyun 	case PH_DEACTIVATE_REQ:
1361*4882a593Smuzhiyun 		spin_lock_irqsave(hx->ip->hwlock, flags);
1362*4882a593Smuzhiyun 		mISDN_clear_bchannel(bch);
1363*4882a593Smuzhiyun 		hscx_mode(hx, ISDN_P_NONE);
1364*4882a593Smuzhiyun 		spin_unlock_irqrestore(hx->ip->hwlock, flags);
1365*4882a593Smuzhiyun 		_queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0,
1366*4882a593Smuzhiyun 			    NULL, GFP_KERNEL);
1367*4882a593Smuzhiyun 		ret = 0;
1368*4882a593Smuzhiyun 		break;
1369*4882a593Smuzhiyun 	default:
1370*4882a593Smuzhiyun 		pr_info("%s: %s unknown prim(%x,%x)\n",
1371*4882a593Smuzhiyun 			hx->ip->name, __func__, hh->prim, hh->id);
1372*4882a593Smuzhiyun 		ret = -EINVAL;
1373*4882a593Smuzhiyun 	}
1374*4882a593Smuzhiyun 	if (!ret)
1375*4882a593Smuzhiyun 		dev_kfree_skb(skb);
1376*4882a593Smuzhiyun 	return ret;
1377*4882a593Smuzhiyun }
1378*4882a593Smuzhiyun 
1379*4882a593Smuzhiyun static int
channel_bctrl(struct bchannel * bch,struct mISDN_ctrl_req * cq)1380*4882a593Smuzhiyun channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
1381*4882a593Smuzhiyun {
1382*4882a593Smuzhiyun 	return mISDN_ctrl_bchannel(bch, cq);
1383*4882a593Smuzhiyun }
1384*4882a593Smuzhiyun 
1385*4882a593Smuzhiyun static int
hscx_bctrl(struct mISDNchannel * ch,u32 cmd,void * arg)1386*4882a593Smuzhiyun hscx_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
1387*4882a593Smuzhiyun {
1388*4882a593Smuzhiyun 	struct bchannel *bch = container_of(ch, struct bchannel, ch);
1389*4882a593Smuzhiyun 	struct hscx_hw	*hx = container_of(bch, struct hscx_hw, bch);
1390*4882a593Smuzhiyun 	int ret = -EINVAL;
1391*4882a593Smuzhiyun 	u_long flags;
1392*4882a593Smuzhiyun 
1393*4882a593Smuzhiyun 	pr_debug("%s: %s cmd:%x %p\n", hx->ip->name, __func__, cmd, arg);
1394*4882a593Smuzhiyun 	switch (cmd) {
1395*4882a593Smuzhiyun 	case CLOSE_CHANNEL:
1396*4882a593Smuzhiyun 		test_and_clear_bit(FLG_OPEN, &bch->Flags);
1397*4882a593Smuzhiyun 		cancel_work_sync(&bch->workq);
1398*4882a593Smuzhiyun 		spin_lock_irqsave(hx->ip->hwlock, flags);
1399*4882a593Smuzhiyun 		mISDN_clear_bchannel(bch);
1400*4882a593Smuzhiyun 		hscx_mode(hx, ISDN_P_NONE);
1401*4882a593Smuzhiyun 		spin_unlock_irqrestore(hx->ip->hwlock, flags);
1402*4882a593Smuzhiyun 		ch->protocol = ISDN_P_NONE;
1403*4882a593Smuzhiyun 		ch->peer = NULL;
1404*4882a593Smuzhiyun 		module_put(hx->ip->owner);
1405*4882a593Smuzhiyun 		ret = 0;
1406*4882a593Smuzhiyun 		break;
1407*4882a593Smuzhiyun 	case CONTROL_CHANNEL:
1408*4882a593Smuzhiyun 		ret = channel_bctrl(bch, arg);
1409*4882a593Smuzhiyun 		break;
1410*4882a593Smuzhiyun 	default:
1411*4882a593Smuzhiyun 		pr_info("%s: %s unknown prim(%x)\n",
1412*4882a593Smuzhiyun 			hx->ip->name, __func__, cmd);
1413*4882a593Smuzhiyun 	}
1414*4882a593Smuzhiyun 	return ret;
1415*4882a593Smuzhiyun }
1416*4882a593Smuzhiyun 
1417*4882a593Smuzhiyun static void
free_ipac(struct ipac_hw * ipac)1418*4882a593Smuzhiyun free_ipac(struct ipac_hw *ipac)
1419*4882a593Smuzhiyun {
1420*4882a593Smuzhiyun 	isac_release(&ipac->isac);
1421*4882a593Smuzhiyun }
1422*4882a593Smuzhiyun 
1423*4882a593Smuzhiyun static const char *HSCXVer[] =
1424*4882a593Smuzhiyun {"A1", "?1", "A2", "?3", "A3", "V2.1", "?6", "?7",
1425*4882a593Smuzhiyun  "?8", "?9", "?10", "?11", "?12", "?13", "?14", "???"};
1426*4882a593Smuzhiyun 
1427*4882a593Smuzhiyun 
1428*4882a593Smuzhiyun 
1429*4882a593Smuzhiyun static void
hscx_init(struct hscx_hw * hx)1430*4882a593Smuzhiyun hscx_init(struct hscx_hw *hx)
1431*4882a593Smuzhiyun {
1432*4882a593Smuzhiyun 	u8 val;
1433*4882a593Smuzhiyun 
1434*4882a593Smuzhiyun 	WriteHSCX(hx, IPAC_RAH2, 0xFF);
1435*4882a593Smuzhiyun 	WriteHSCX(hx, IPAC_XBCH, 0x00);
1436*4882a593Smuzhiyun 	WriteHSCX(hx, IPAC_RLCR, 0x00);
1437*4882a593Smuzhiyun 
1438*4882a593Smuzhiyun 	if (hx->ip->type & IPAC_TYPE_HSCX) {
1439*4882a593Smuzhiyun 		WriteHSCX(hx, IPAC_CCR1, 0x85);
1440*4882a593Smuzhiyun 		val = ReadHSCX(hx, HSCX_VSTR);
1441*4882a593Smuzhiyun 		pr_debug("%s: HSCX VSTR %02x\n", hx->ip->name, val);
1442*4882a593Smuzhiyun 		if (hx->bch.debug & DEBUG_HW)
1443*4882a593Smuzhiyun 			pr_notice("%s: HSCX version %s\n", hx->ip->name,
1444*4882a593Smuzhiyun 				  HSCXVer[val & 0x0f]);
1445*4882a593Smuzhiyun 	} else
1446*4882a593Smuzhiyun 		WriteHSCX(hx, IPAC_CCR1, 0x82);
1447*4882a593Smuzhiyun 	WriteHSCX(hx, IPAC_CCR2, 0x30);
1448*4882a593Smuzhiyun 	WriteHSCX(hx, IPAC_XCCR, 0x07);
1449*4882a593Smuzhiyun 	WriteHSCX(hx, IPAC_RCCR, 0x07);
1450*4882a593Smuzhiyun }
1451*4882a593Smuzhiyun 
1452*4882a593Smuzhiyun static int
ipac_init(struct ipac_hw * ipac)1453*4882a593Smuzhiyun ipac_init(struct ipac_hw *ipac)
1454*4882a593Smuzhiyun {
1455*4882a593Smuzhiyun 	u8 val;
1456*4882a593Smuzhiyun 
1457*4882a593Smuzhiyun 	if (ipac->type & IPAC_TYPE_HSCX) {
1458*4882a593Smuzhiyun 		hscx_init(&ipac->hscx[0]);
1459*4882a593Smuzhiyun 		hscx_init(&ipac->hscx[1]);
1460*4882a593Smuzhiyun 		val = ReadIPAC(ipac, IPAC_ID);
1461*4882a593Smuzhiyun 	} else if (ipac->type & IPAC_TYPE_IPAC) {
1462*4882a593Smuzhiyun 		hscx_init(&ipac->hscx[0]);
1463*4882a593Smuzhiyun 		hscx_init(&ipac->hscx[1]);
1464*4882a593Smuzhiyun 		WriteIPAC(ipac, IPAC_MASK, IPAC__ON);
1465*4882a593Smuzhiyun 		val = ReadIPAC(ipac, IPAC_CONF);
1466*4882a593Smuzhiyun 		/* conf is default 0, but can be overwritten by card setup */
1467*4882a593Smuzhiyun 		pr_debug("%s: IPAC CONF %02x/%02x\n", ipac->name,
1468*4882a593Smuzhiyun 			 val, ipac->conf);
1469*4882a593Smuzhiyun 		WriteIPAC(ipac, IPAC_CONF, ipac->conf);
1470*4882a593Smuzhiyun 		val = ReadIPAC(ipac, IPAC_ID);
1471*4882a593Smuzhiyun 		if (ipac->hscx[0].bch.debug & DEBUG_HW)
1472*4882a593Smuzhiyun 			pr_notice("%s: IPAC Design ID %02x\n", ipac->name, val);
1473*4882a593Smuzhiyun 	}
1474*4882a593Smuzhiyun 	/* nothing special for IPACX to do here */
1475*4882a593Smuzhiyun 	return isac_init(&ipac->isac);
1476*4882a593Smuzhiyun }
1477*4882a593Smuzhiyun 
1478*4882a593Smuzhiyun static int
open_bchannel(struct ipac_hw * ipac,struct channel_req * rq)1479*4882a593Smuzhiyun open_bchannel(struct ipac_hw *ipac, struct channel_req *rq)
1480*4882a593Smuzhiyun {
1481*4882a593Smuzhiyun 	struct bchannel		*bch;
1482*4882a593Smuzhiyun 
1483*4882a593Smuzhiyun 	if (rq->adr.channel == 0 || rq->adr.channel > 2)
1484*4882a593Smuzhiyun 		return -EINVAL;
1485*4882a593Smuzhiyun 	if (rq->protocol == ISDN_P_NONE)
1486*4882a593Smuzhiyun 		return -EINVAL;
1487*4882a593Smuzhiyun 	bch = &ipac->hscx[rq->adr.channel - 1].bch;
1488*4882a593Smuzhiyun 	if (test_and_set_bit(FLG_OPEN, &bch->Flags))
1489*4882a593Smuzhiyun 		return -EBUSY; /* b-channel can be only open once */
1490*4882a593Smuzhiyun 	test_and_clear_bit(FLG_FILLEMPTY, &bch->Flags);
1491*4882a593Smuzhiyun 	bch->ch.protocol = rq->protocol;
1492*4882a593Smuzhiyun 	rq->ch = &bch->ch;
1493*4882a593Smuzhiyun 	return 0;
1494*4882a593Smuzhiyun }
1495*4882a593Smuzhiyun 
1496*4882a593Smuzhiyun static int
channel_ctrl(struct ipac_hw * ipac,struct mISDN_ctrl_req * cq)1497*4882a593Smuzhiyun channel_ctrl(struct ipac_hw *ipac, struct mISDN_ctrl_req *cq)
1498*4882a593Smuzhiyun {
1499*4882a593Smuzhiyun 	int	ret = 0;
1500*4882a593Smuzhiyun 
1501*4882a593Smuzhiyun 	switch (cq->op) {
1502*4882a593Smuzhiyun 	case MISDN_CTRL_GETOP:
1503*4882a593Smuzhiyun 		cq->op = MISDN_CTRL_LOOP | MISDN_CTRL_L1_TIMER3;
1504*4882a593Smuzhiyun 		break;
1505*4882a593Smuzhiyun 	case MISDN_CTRL_LOOP:
1506*4882a593Smuzhiyun 		/* cq->channel: 0 disable, 1 B1 loop 2 B2 loop, 3 both */
1507*4882a593Smuzhiyun 		if (cq->channel < 0 || cq->channel > 3) {
1508*4882a593Smuzhiyun 			ret = -EINVAL;
1509*4882a593Smuzhiyun 			break;
1510*4882a593Smuzhiyun 		}
1511*4882a593Smuzhiyun 		ret = ipac->ctrl(ipac, HW_TESTLOOP, cq->channel);
1512*4882a593Smuzhiyun 		break;
1513*4882a593Smuzhiyun 	case MISDN_CTRL_L1_TIMER3:
1514*4882a593Smuzhiyun 		ret = ipac->isac.ctrl(&ipac->isac, HW_TIMER3_VALUE, cq->p1);
1515*4882a593Smuzhiyun 		break;
1516*4882a593Smuzhiyun 	default:
1517*4882a593Smuzhiyun 		pr_info("%s: unknown CTRL OP %x\n", ipac->name, cq->op);
1518*4882a593Smuzhiyun 		ret = -EINVAL;
1519*4882a593Smuzhiyun 		break;
1520*4882a593Smuzhiyun 	}
1521*4882a593Smuzhiyun 	return ret;
1522*4882a593Smuzhiyun }
1523*4882a593Smuzhiyun 
1524*4882a593Smuzhiyun static int
ipac_dctrl(struct mISDNchannel * ch,u32 cmd,void * arg)1525*4882a593Smuzhiyun ipac_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
1526*4882a593Smuzhiyun {
1527*4882a593Smuzhiyun 	struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
1528*4882a593Smuzhiyun 	struct dchannel *dch = container_of(dev, struct dchannel, dev);
1529*4882a593Smuzhiyun 	struct isac_hw *isac = container_of(dch, struct isac_hw, dch);
1530*4882a593Smuzhiyun 	struct ipac_hw *ipac = container_of(isac, struct ipac_hw, isac);
1531*4882a593Smuzhiyun 	struct channel_req *rq;
1532*4882a593Smuzhiyun 	int err = 0;
1533*4882a593Smuzhiyun 
1534*4882a593Smuzhiyun 	pr_debug("%s: DCTRL: %x %p\n", ipac->name, cmd, arg);
1535*4882a593Smuzhiyun 	switch (cmd) {
1536*4882a593Smuzhiyun 	case OPEN_CHANNEL:
1537*4882a593Smuzhiyun 		rq = arg;
1538*4882a593Smuzhiyun 		if (rq->protocol == ISDN_P_TE_S0)
1539*4882a593Smuzhiyun 			err = open_dchannel_caller(isac, rq, __builtin_return_address(0));
1540*4882a593Smuzhiyun 		else
1541*4882a593Smuzhiyun 			err = open_bchannel(ipac, rq);
1542*4882a593Smuzhiyun 		if (err)
1543*4882a593Smuzhiyun 			break;
1544*4882a593Smuzhiyun 		if (!try_module_get(ipac->owner))
1545*4882a593Smuzhiyun 			pr_info("%s: cannot get module\n", ipac->name);
1546*4882a593Smuzhiyun 		break;
1547*4882a593Smuzhiyun 	case CLOSE_CHANNEL:
1548*4882a593Smuzhiyun 		pr_debug("%s: dev(%d) close from %p\n", ipac->name,
1549*4882a593Smuzhiyun 			 dch->dev.id, __builtin_return_address(0));
1550*4882a593Smuzhiyun 		module_put(ipac->owner);
1551*4882a593Smuzhiyun 		break;
1552*4882a593Smuzhiyun 	case CONTROL_CHANNEL:
1553*4882a593Smuzhiyun 		err = channel_ctrl(ipac, arg);
1554*4882a593Smuzhiyun 		break;
1555*4882a593Smuzhiyun 	default:
1556*4882a593Smuzhiyun 		pr_debug("%s: unknown DCTRL command %x\n", ipac->name, cmd);
1557*4882a593Smuzhiyun 		return -EINVAL;
1558*4882a593Smuzhiyun 	}
1559*4882a593Smuzhiyun 	return err;
1560*4882a593Smuzhiyun }
1561*4882a593Smuzhiyun 
1562*4882a593Smuzhiyun u32
mISDNipac_init(struct ipac_hw * ipac,void * hw)1563*4882a593Smuzhiyun mISDNipac_init(struct ipac_hw *ipac, void *hw)
1564*4882a593Smuzhiyun {
1565*4882a593Smuzhiyun 	u32 ret;
1566*4882a593Smuzhiyun 	u8 i;
1567*4882a593Smuzhiyun 
1568*4882a593Smuzhiyun 	ipac->hw = hw;
1569*4882a593Smuzhiyun 	if (ipac->isac.dch.debug & DEBUG_HW)
1570*4882a593Smuzhiyun 		pr_notice("%s: ipac type %x\n", ipac->name, ipac->type);
1571*4882a593Smuzhiyun 	if (ipac->type & IPAC_TYPE_HSCX) {
1572*4882a593Smuzhiyun 		ipac->isac.type = IPAC_TYPE_ISAC;
1573*4882a593Smuzhiyun 		ipac->hscx[0].off = 0;
1574*4882a593Smuzhiyun 		ipac->hscx[1].off = 0x40;
1575*4882a593Smuzhiyun 		ipac->hscx[0].fifo_size = 32;
1576*4882a593Smuzhiyun 		ipac->hscx[1].fifo_size = 32;
1577*4882a593Smuzhiyun 	} else if (ipac->type & IPAC_TYPE_IPAC) {
1578*4882a593Smuzhiyun 		ipac->isac.type = IPAC_TYPE_IPAC | IPAC_TYPE_ISAC;
1579*4882a593Smuzhiyun 		ipac->hscx[0].off = 0;
1580*4882a593Smuzhiyun 		ipac->hscx[1].off = 0x40;
1581*4882a593Smuzhiyun 		ipac->hscx[0].fifo_size = 64;
1582*4882a593Smuzhiyun 		ipac->hscx[1].fifo_size = 64;
1583*4882a593Smuzhiyun 	} else if (ipac->type & IPAC_TYPE_IPACX) {
1584*4882a593Smuzhiyun 		ipac->isac.type = IPAC_TYPE_IPACX | IPAC_TYPE_ISACX;
1585*4882a593Smuzhiyun 		ipac->hscx[0].off = IPACX_OFF_ICA;
1586*4882a593Smuzhiyun 		ipac->hscx[1].off = IPACX_OFF_ICB;
1587*4882a593Smuzhiyun 		ipac->hscx[0].fifo_size = 64;
1588*4882a593Smuzhiyun 		ipac->hscx[1].fifo_size = 64;
1589*4882a593Smuzhiyun 	} else
1590*4882a593Smuzhiyun 		return 0;
1591*4882a593Smuzhiyun 
1592*4882a593Smuzhiyun 	mISDNisac_init(&ipac->isac, hw);
1593*4882a593Smuzhiyun 
1594*4882a593Smuzhiyun 	ipac->isac.dch.dev.D.ctrl = ipac_dctrl;
1595*4882a593Smuzhiyun 
1596*4882a593Smuzhiyun 	for (i = 0; i < 2; i++) {
1597*4882a593Smuzhiyun 		ipac->hscx[i].bch.nr = i + 1;
1598*4882a593Smuzhiyun 		set_channelmap(i + 1, ipac->isac.dch.dev.channelmap);
1599*4882a593Smuzhiyun 		list_add(&ipac->hscx[i].bch.ch.list,
1600*4882a593Smuzhiyun 			 &ipac->isac.dch.dev.bchannels);
1601*4882a593Smuzhiyun 		mISDN_initbchannel(&ipac->hscx[i].bch, MAX_DATA_MEM,
1602*4882a593Smuzhiyun 				   ipac->hscx[i].fifo_size);
1603*4882a593Smuzhiyun 		ipac->hscx[i].bch.ch.nr = i + 1;
1604*4882a593Smuzhiyun 		ipac->hscx[i].bch.ch.send = &hscx_l2l1;
1605*4882a593Smuzhiyun 		ipac->hscx[i].bch.ch.ctrl = hscx_bctrl;
1606*4882a593Smuzhiyun 		ipac->hscx[i].bch.hw = hw;
1607*4882a593Smuzhiyun 		ipac->hscx[i].ip = ipac;
1608*4882a593Smuzhiyun 		/* default values for IOM time slots
1609*4882a593Smuzhiyun 		 * can be overwritten by card */
1610*4882a593Smuzhiyun 		ipac->hscx[i].slot = (i == 0) ? 0x2f : 0x03;
1611*4882a593Smuzhiyun 	}
1612*4882a593Smuzhiyun 
1613*4882a593Smuzhiyun 	ipac->init = ipac_init;
1614*4882a593Smuzhiyun 	ipac->release = free_ipac;
1615*4882a593Smuzhiyun 
1616*4882a593Smuzhiyun 	ret =	(1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
1617*4882a593Smuzhiyun 		(1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK));
1618*4882a593Smuzhiyun 	return ret;
1619*4882a593Smuzhiyun }
1620*4882a593Smuzhiyun EXPORT_SYMBOL(mISDNipac_init);
1621*4882a593Smuzhiyun 
1622*4882a593Smuzhiyun static int __init
isac_mod_init(void)1623*4882a593Smuzhiyun isac_mod_init(void)
1624*4882a593Smuzhiyun {
1625*4882a593Smuzhiyun 	pr_notice("mISDNipac module version %s\n", ISAC_REV);
1626*4882a593Smuzhiyun 	return 0;
1627*4882a593Smuzhiyun }
1628*4882a593Smuzhiyun 
1629*4882a593Smuzhiyun static void __exit
isac_mod_cleanup(void)1630*4882a593Smuzhiyun isac_mod_cleanup(void)
1631*4882a593Smuzhiyun {
1632*4882a593Smuzhiyun 	pr_notice("mISDNipac module unloaded\n");
1633*4882a593Smuzhiyun }
1634*4882a593Smuzhiyun module_init(isac_mod_init);
1635*4882a593Smuzhiyun module_exit(isac_mod_cleanup);
1636