xref: /OK3568_Linux_fs/kernel/drivers/isdn/hardware/mISDN/hfcsusb.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * hfcsusb.h, HFC-S USB mISDN driver
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #ifndef __HFCSUSB_H__
7*4882a593Smuzhiyun #define __HFCSUSB_H__
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #define DRIVER_NAME "HFC-S_USB"
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #define DBG_HFC_CALL_TRACE	0x00010000
13*4882a593Smuzhiyun #define DBG_HFC_FIFO_VERBOSE	0x00020000
14*4882a593Smuzhiyun #define DBG_HFC_USB_VERBOSE	0x00100000
15*4882a593Smuzhiyun #define DBG_HFC_URB_INFO	0x00200000
16*4882a593Smuzhiyun #define DBG_HFC_URB_ERROR	0x00400000
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define DEFAULT_TRANSP_BURST_SZ 128
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #define HFC_CTRL_TIMEOUT	20	/* 5ms timeout writing/reading regs */
21*4882a593Smuzhiyun #define CLKDEL_TE		0x0f	/* CLKDEL in TE mode */
22*4882a593Smuzhiyun #define CLKDEL_NT		0x6c	/* CLKDEL in NT mode */
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun /* hfcsusb Layer1 commands */
25*4882a593Smuzhiyun #define HFC_L1_ACTIVATE_TE		1
26*4882a593Smuzhiyun #define HFC_L1_ACTIVATE_NT		2
27*4882a593Smuzhiyun #define HFC_L1_DEACTIVATE_NT		3
28*4882a593Smuzhiyun #define HFC_L1_FORCE_DEACTIVATE_TE	4
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun /* cmd FLAGS in HFCUSB_STATES register */
31*4882a593Smuzhiyun #define HFCUSB_LOAD_STATE	0x10
32*4882a593Smuzhiyun #define HFCUSB_ACTIVATE		0x20
33*4882a593Smuzhiyun #define HFCUSB_DO_ACTION	0x40
34*4882a593Smuzhiyun #define HFCUSB_NT_G2_G3		0x80
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun /* timers */
37*4882a593Smuzhiyun #define NT_ACTIVATION_TIMER	0x01	/* enables NT mode activation Timer */
38*4882a593Smuzhiyun #define NT_T1_COUNT		10
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun #define MAX_BCH_SIZE		2048	/* allowed B-channel packet size */
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #define HFCUSB_RX_THRESHOLD	64	/* threshold for fifo report bit rx */
43*4882a593Smuzhiyun #define HFCUSB_TX_THRESHOLD	96	/* threshold for fifo report bit tx */
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun #define HFCUSB_CHIP_ID		0x16	/* Chip ID register index */
46*4882a593Smuzhiyun #define HFCUSB_CIRM		0x00	/* cirm register index */
47*4882a593Smuzhiyun #define HFCUSB_USB_SIZE		0x07	/* int length register */
48*4882a593Smuzhiyun #define HFCUSB_USB_SIZE_I	0x06	/* iso length register */
49*4882a593Smuzhiyun #define HFCUSB_F_CROSS		0x0b	/* bit order register */
50*4882a593Smuzhiyun #define HFCUSB_CLKDEL		0x37	/* bit delay register */
51*4882a593Smuzhiyun #define HFCUSB_CON_HDLC		0xfa	/* channel connect register */
52*4882a593Smuzhiyun #define HFCUSB_HDLC_PAR		0xfb
53*4882a593Smuzhiyun #define HFCUSB_SCTRL		0x31	/* S-bus control register (tx) */
54*4882a593Smuzhiyun #define HFCUSB_SCTRL_E		0x32	/* same for E and special funcs */
55*4882a593Smuzhiyun #define HFCUSB_SCTRL_R		0x33	/* S-bus control register (rx) */
56*4882a593Smuzhiyun #define HFCUSB_F_THRES		0x0c	/* threshold register */
57*4882a593Smuzhiyun #define HFCUSB_FIFO		0x0f	/* fifo select register */
58*4882a593Smuzhiyun #define HFCUSB_F_USAGE		0x1a	/* fifo usage register */
59*4882a593Smuzhiyun #define HFCUSB_MST_MODE0	0x14
60*4882a593Smuzhiyun #define HFCUSB_MST_MODE1	0x15
61*4882a593Smuzhiyun #define HFCUSB_P_DATA		0x1f
62*4882a593Smuzhiyun #define HFCUSB_INC_RES_F	0x0e
63*4882a593Smuzhiyun #define HFCUSB_B1_SSL		0x20
64*4882a593Smuzhiyun #define HFCUSB_B2_SSL		0x21
65*4882a593Smuzhiyun #define HFCUSB_B1_RSL		0x24
66*4882a593Smuzhiyun #define HFCUSB_B2_RSL		0x25
67*4882a593Smuzhiyun #define HFCUSB_STATES		0x30
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun #define HFCUSB_CHIPID		0x40	/* ID value of HFC-S USB */
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun /* fifo registers */
73*4882a593Smuzhiyun #define HFCUSB_NUM_FIFOS	8	/* maximum number of fifos */
74*4882a593Smuzhiyun #define HFCUSB_B1_TX		0	/* index for B1 transmit bulk/int */
75*4882a593Smuzhiyun #define HFCUSB_B1_RX		1	/* index for B1 receive bulk/int */
76*4882a593Smuzhiyun #define HFCUSB_B2_TX		2
77*4882a593Smuzhiyun #define HFCUSB_B2_RX		3
78*4882a593Smuzhiyun #define HFCUSB_D_TX		4
79*4882a593Smuzhiyun #define HFCUSB_D_RX		5
80*4882a593Smuzhiyun #define HFCUSB_PCM_TX		6
81*4882a593Smuzhiyun #define HFCUSB_PCM_RX		7
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun #define USB_INT		0
85*4882a593Smuzhiyun #define USB_BULK	1
86*4882a593Smuzhiyun #define USB_ISOC	2
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun #define ISOC_PACKETS_D	8
89*4882a593Smuzhiyun #define ISOC_PACKETS_B	8
90*4882a593Smuzhiyun #define ISO_BUFFER_SIZE	128
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun /* defines how much ISO packets are handled in one URB */
93*4882a593Smuzhiyun static int iso_packets[8] =
94*4882a593Smuzhiyun { ISOC_PACKETS_B, ISOC_PACKETS_B, ISOC_PACKETS_B, ISOC_PACKETS_B,
95*4882a593Smuzhiyun   ISOC_PACKETS_D, ISOC_PACKETS_D, ISOC_PACKETS_D, ISOC_PACKETS_D
96*4882a593Smuzhiyun };
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun /* Fifo flow Control for TX ISO */
100*4882a593Smuzhiyun #define SINK_MAX	68
101*4882a593Smuzhiyun #define SINK_MIN	48
102*4882a593Smuzhiyun #define SINK_DMIN	12
103*4882a593Smuzhiyun #define SINK_DMAX	18
104*4882a593Smuzhiyun #define BITLINE_INF	(-96 * 8)
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun /* HFC-S USB register access by Control-URSs */
107*4882a593Smuzhiyun #define write_reg_atomic(a, b, c)					\
108*4882a593Smuzhiyun 	usb_control_msg((a)->dev, (a)->ctrl_out_pipe, 0, 0x40, (c), (b), \
109*4882a593Smuzhiyun 			0, 0, HFC_CTRL_TIMEOUT)
110*4882a593Smuzhiyun #define read_reg_atomic(a, b, c)					\
111*4882a593Smuzhiyun 	usb_control_msg((a)->dev, (a)->ctrl_in_pipe, 1, 0xC0, 0, (b), (c), \
112*4882a593Smuzhiyun 			1, HFC_CTRL_TIMEOUT)
113*4882a593Smuzhiyun #define HFC_CTRL_BUFSIZE 64
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun struct ctrl_buf {
116*4882a593Smuzhiyun 	__u8 hfcs_reg;		/* register number */
117*4882a593Smuzhiyun 	__u8 reg_val;		/* value to be written (or read) */
118*4882a593Smuzhiyun };
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun /*
121*4882a593Smuzhiyun  * URB error codes
122*4882a593Smuzhiyun  * Used to represent a list of values and their respective symbolic names
123*4882a593Smuzhiyun  */
124*4882a593Smuzhiyun struct hfcusb_symbolic_list {
125*4882a593Smuzhiyun 	const int num;
126*4882a593Smuzhiyun 	const char *name;
127*4882a593Smuzhiyun };
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun static struct hfcusb_symbolic_list urb_errlist[] = {
130*4882a593Smuzhiyun 	{-ENOMEM, "No memory for allocation of internal structures"},
131*4882a593Smuzhiyun 	{-ENOSPC, "The host controller's bandwidth is already consumed"},
132*4882a593Smuzhiyun 	{-ENOENT, "URB was canceled by unlink_urb"},
133*4882a593Smuzhiyun 	{-EXDEV, "ISO transfer only partially completed"},
134*4882a593Smuzhiyun 	{-EAGAIN, "Too match scheduled for the future"},
135*4882a593Smuzhiyun 	{-ENXIO, "URB already queued"},
136*4882a593Smuzhiyun 	{-EFBIG, "Too much ISO frames requested"},
137*4882a593Smuzhiyun 	{-ENOSR, "Buffer error (overrun)"},
138*4882a593Smuzhiyun 	{-EPIPE, "Specified endpoint is stalled (device not responding)"},
139*4882a593Smuzhiyun 	{-EOVERFLOW, "Babble (bad cable?)"},
140*4882a593Smuzhiyun 	{-EPROTO, "Bit-stuff error (bad cable?)"},
141*4882a593Smuzhiyun 	{-EILSEQ, "CRC/Timeout"},
142*4882a593Smuzhiyun 	{-ETIMEDOUT, "NAK (device does not respond)"},
143*4882a593Smuzhiyun 	{-ESHUTDOWN, "Device unplugged"},
144*4882a593Smuzhiyun 	{-1, NULL}
145*4882a593Smuzhiyun };
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun static inline const char *
symbolic(struct hfcusb_symbolic_list list[],const int num)148*4882a593Smuzhiyun symbolic(struct hfcusb_symbolic_list list[], const int num)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun 	int i;
151*4882a593Smuzhiyun 	for (i = 0; list[i].name != NULL; i++)
152*4882a593Smuzhiyun 		if (list[i].num == num)
153*4882a593Smuzhiyun 			return list[i].name;
154*4882a593Smuzhiyun 	return "<unknown USB Error>";
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun /* USB descriptor need to contain one of the following EndPoint combination: */
158*4882a593Smuzhiyun #define CNF_4INT3ISO	1	/* 4 INT IN, 3 ISO OUT */
159*4882a593Smuzhiyun #define CNF_3INT3ISO	2	/* 3 INT IN, 3 ISO OUT */
160*4882a593Smuzhiyun #define CNF_4ISO3ISO	3	/* 4 ISO IN, 3 ISO OUT */
161*4882a593Smuzhiyun #define CNF_3ISO3ISO	4	/* 3 ISO IN, 3 ISO OUT */
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun #define EP_NUL 1	/* Endpoint at this position not allowed */
164*4882a593Smuzhiyun #define EP_NOP 2	/* all type of endpoints allowed at this position */
165*4882a593Smuzhiyun #define EP_ISO 3	/* Isochron endpoint mandatory at this position */
166*4882a593Smuzhiyun #define EP_BLK 4	/* Bulk endpoint mandatory at this position */
167*4882a593Smuzhiyun #define EP_INT 5	/* Interrupt endpoint mandatory at this position */
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun #define HFC_CHAN_B1	0
170*4882a593Smuzhiyun #define HFC_CHAN_B2	1
171*4882a593Smuzhiyun #define HFC_CHAN_D	2
172*4882a593Smuzhiyun #define HFC_CHAN_E	3
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun /*
176*4882a593Smuzhiyun  * List of all supported endpoint configuration sets, used to find the
177*4882a593Smuzhiyun  * best matching endpoint configuration within a device's USB descriptor.
178*4882a593Smuzhiyun  * We need at least 3 RX endpoints, and 3 TX endpoints, either
179*4882a593Smuzhiyun  * INT-in and ISO-out, or ISO-in and ISO-out)
180*4882a593Smuzhiyun  * with 4 RX endpoints even E-Channel logging is possible
181*4882a593Smuzhiyun  */
182*4882a593Smuzhiyun static int
183*4882a593Smuzhiyun validconf[][19] = {
184*4882a593Smuzhiyun 	/* INT in, ISO out config */
185*4882a593Smuzhiyun 	{EP_NUL, EP_INT, EP_NUL, EP_INT, EP_NUL, EP_INT, EP_NOP, EP_INT,
186*4882a593Smuzhiyun 	 EP_ISO, EP_NUL, EP_ISO, EP_NUL, EP_ISO, EP_NUL, EP_NUL, EP_NUL,
187*4882a593Smuzhiyun 	 CNF_4INT3ISO, 2, 1},
188*4882a593Smuzhiyun 	{EP_NUL, EP_INT, EP_NUL, EP_INT, EP_NUL, EP_INT, EP_NUL, EP_NUL,
189*4882a593Smuzhiyun 	 EP_ISO, EP_NUL, EP_ISO, EP_NUL, EP_ISO, EP_NUL, EP_NUL, EP_NUL,
190*4882a593Smuzhiyun 	 CNF_3INT3ISO, 2, 0},
191*4882a593Smuzhiyun 	/* ISO in, ISO out config */
192*4882a593Smuzhiyun 	{EP_NOP, EP_NOP, EP_NOP, EP_NOP, EP_NOP, EP_NOP, EP_NOP, EP_NOP,
193*4882a593Smuzhiyun 	 EP_ISO, EP_ISO, EP_ISO, EP_ISO, EP_ISO, EP_ISO, EP_NOP, EP_ISO,
194*4882a593Smuzhiyun 	 CNF_4ISO3ISO, 2, 1},
195*4882a593Smuzhiyun 	{EP_NUL, EP_NUL, EP_NUL, EP_NUL, EP_NUL, EP_NUL, EP_NUL, EP_NUL,
196*4882a593Smuzhiyun 	 EP_ISO, EP_ISO, EP_ISO, EP_ISO, EP_ISO, EP_ISO, EP_NUL, EP_NUL,
197*4882a593Smuzhiyun 	 CNF_3ISO3ISO, 2, 0},
198*4882a593Smuzhiyun 	{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} /* EOL element */
199*4882a593Smuzhiyun };
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun /* string description of chosen config */
202*4882a593Smuzhiyun static char *conf_str[] = {
203*4882a593Smuzhiyun 	"4 Interrupt IN + 3 Isochron OUT",
204*4882a593Smuzhiyun 	"3 Interrupt IN + 3 Isochron OUT",
205*4882a593Smuzhiyun 	"4 Isochron IN + 3 Isochron OUT",
206*4882a593Smuzhiyun 	"3 Isochron IN + 3 Isochron OUT"
207*4882a593Smuzhiyun };
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun #define LED_OFF		0	/* no LED support */
211*4882a593Smuzhiyun #define LED_SCHEME1	1	/* LED standard scheme */
212*4882a593Smuzhiyun #define LED_SCHEME2	2	/* not used yet... */
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun #define LED_POWER_ON	1
215*4882a593Smuzhiyun #define LED_POWER_OFF	2
216*4882a593Smuzhiyun #define LED_S0_ON	3
217*4882a593Smuzhiyun #define LED_S0_OFF	4
218*4882a593Smuzhiyun #define LED_B1_ON	5
219*4882a593Smuzhiyun #define LED_B1_OFF	6
220*4882a593Smuzhiyun #define LED_B1_DATA	7
221*4882a593Smuzhiyun #define LED_B2_ON	8
222*4882a593Smuzhiyun #define LED_B2_OFF	9
223*4882a593Smuzhiyun #define LED_B2_DATA	10
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun #define LED_NORMAL	0	/* LEDs are normal */
226*4882a593Smuzhiyun #define LED_INVERTED	1	/* LEDs are inverted */
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun /* time in ms to perform a Flashing LED when B-Channel has traffic */
229*4882a593Smuzhiyun #define LED_TIME      250
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun struct hfcsusb;
234*4882a593Smuzhiyun struct usb_fifo;
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun /* structure defining input+output fifos (interrupt/bulk mode) */
237*4882a593Smuzhiyun struct iso_urb {
238*4882a593Smuzhiyun 	struct urb *urb;
239*4882a593Smuzhiyun 	__u8 buffer[ISO_BUFFER_SIZE];	/* buffer rx/tx USB URB data */
240*4882a593Smuzhiyun 	struct usb_fifo *owner_fifo;	/* pointer to owner fifo */
241*4882a593Smuzhiyun 	__u8 indx; /* Fifos's ISO double buffer 0 or 1 ? */
242*4882a593Smuzhiyun #ifdef ISO_FRAME_START_DEBUG
243*4882a593Smuzhiyun 	int start_frames[ISO_FRAME_START_RING_COUNT];
244*4882a593Smuzhiyun 	__u8 iso_frm_strt_pos; /* index in start_frame[] */
245*4882a593Smuzhiyun #endif
246*4882a593Smuzhiyun };
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun struct usb_fifo {
249*4882a593Smuzhiyun 	int fifonum;		/* fifo index attached to this structure */
250*4882a593Smuzhiyun 	int active;		/* fifo is currently active */
251*4882a593Smuzhiyun 	struct hfcsusb *hw;	/* pointer to main structure */
252*4882a593Smuzhiyun 	int pipe;		/* address of endpoint */
253*4882a593Smuzhiyun 	__u8 usb_packet_maxlen;	/* maximum length for usb transfer */
254*4882a593Smuzhiyun 	unsigned int max_size;	/* maximum size of receive/send packet */
255*4882a593Smuzhiyun 	__u8 intervall;		/* interrupt interval */
256*4882a593Smuzhiyun 	struct urb *urb;	/* transfer structure for usb routines */
257*4882a593Smuzhiyun 	__u8 buffer[128];	/* buffer USB INT OUT URB data */
258*4882a593Smuzhiyun 	int bit_line;		/* how much bits are in the fifo? */
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	__u8 usb_transfer_mode; /* switched between ISO and INT */
261*4882a593Smuzhiyun 	struct iso_urb	iso[2]; /* two urbs to have one always
262*4882a593Smuzhiyun 				   one pending */
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	struct dchannel *dch;	/* link to hfcsusb_t->dch */
265*4882a593Smuzhiyun 	struct bchannel *bch;	/* link to hfcsusb_t->bch */
266*4882a593Smuzhiyun 	struct dchannel *ech;	/* link to hfcsusb_t->ech, TODO: E-CHANNEL */
267*4882a593Smuzhiyun 	int last_urblen;	/* remember length of last packet */
268*4882a593Smuzhiyun 	__u8 stop_gracefull;	/* stops URB retransmission */
269*4882a593Smuzhiyun };
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun struct hfcsusb {
272*4882a593Smuzhiyun 	struct list_head	list;
273*4882a593Smuzhiyun 	struct dchannel		dch;
274*4882a593Smuzhiyun 	struct bchannel		bch[2];
275*4882a593Smuzhiyun 	struct dchannel		ech; /* TODO : wait for struct echannel ;) */
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	struct usb_device	*dev;		/* our device */
278*4882a593Smuzhiyun 	struct usb_interface	*intf;		/* used interface */
279*4882a593Smuzhiyun 	int			if_used;	/* used interface number */
280*4882a593Smuzhiyun 	int			alt_used;	/* used alternate config */
281*4882a593Smuzhiyun 	int			cfg_used;	/* configuration index used */
282*4882a593Smuzhiyun 	int			vend_idx;	/* index in hfcsusb_idtab */
283*4882a593Smuzhiyun 	int			packet_size;
284*4882a593Smuzhiyun 	int			iso_packet_size;
285*4882a593Smuzhiyun 	struct usb_fifo		fifos[HFCUSB_NUM_FIFOS];
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	/* control pipe background handling */
288*4882a593Smuzhiyun 	struct ctrl_buf		ctrl_buff[HFC_CTRL_BUFSIZE];
289*4882a593Smuzhiyun 	int			ctrl_in_idx, ctrl_out_idx, ctrl_cnt;
290*4882a593Smuzhiyun 	struct urb		*ctrl_urb;
291*4882a593Smuzhiyun 	struct usb_ctrlrequest	ctrl_write;
292*4882a593Smuzhiyun 	struct usb_ctrlrequest	ctrl_read;
293*4882a593Smuzhiyun 	int			ctrl_paksize;
294*4882a593Smuzhiyun 	int			ctrl_in_pipe, ctrl_out_pipe;
295*4882a593Smuzhiyun 	spinlock_t		ctrl_lock; /* lock for ctrl */
296*4882a593Smuzhiyun 	spinlock_t              lock;
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	__u8			threshold_mask;
299*4882a593Smuzhiyun 	__u8			led_state;
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	__u8			protocol;
302*4882a593Smuzhiyun 	int			nt_timer;
303*4882a593Smuzhiyun 	int			open;
304*4882a593Smuzhiyun 	__u8			timers;
305*4882a593Smuzhiyun 	__u8			initdone;
306*4882a593Smuzhiyun 	char			name[MISDN_MAX_IDLEN];
307*4882a593Smuzhiyun };
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun /* private vendor specific data */
310*4882a593Smuzhiyun struct hfcsusb_vdata {
311*4882a593Smuzhiyun 	__u8		led_scheme;  /* led display scheme */
312*4882a593Smuzhiyun 	signed short	led_bits[8]; /* array of 8 possible LED bitmask */
313*4882a593Smuzhiyun 	char		*vend_name;  /* device name */
314*4882a593Smuzhiyun };
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun #define HFC_MAX_TE_LAYER1_STATE 8
318*4882a593Smuzhiyun #define HFC_MAX_NT_LAYER1_STATE 4
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun static const char *HFC_TE_LAYER1_STATES[HFC_MAX_TE_LAYER1_STATE + 1] = {
321*4882a593Smuzhiyun 	"TE F0 - Reset",
322*4882a593Smuzhiyun 	"TE F1 - Reset",
323*4882a593Smuzhiyun 	"TE F2 - Sensing",
324*4882a593Smuzhiyun 	"TE F3 - Deactivated",
325*4882a593Smuzhiyun 	"TE F4 - Awaiting signal",
326*4882a593Smuzhiyun 	"TE F5 - Identifying input",
327*4882a593Smuzhiyun 	"TE F6 - Synchronized",
328*4882a593Smuzhiyun 	"TE F7 - Activated",
329*4882a593Smuzhiyun 	"TE F8 - Lost framing",
330*4882a593Smuzhiyun };
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun static const char *HFC_NT_LAYER1_STATES[HFC_MAX_NT_LAYER1_STATE + 1] = {
333*4882a593Smuzhiyun 	"NT G0 - Reset",
334*4882a593Smuzhiyun 	"NT G1 - Deactive",
335*4882a593Smuzhiyun 	"NT G2 - Pending activation",
336*4882a593Smuzhiyun 	"NT G3 - Active",
337*4882a593Smuzhiyun 	"NT G4 - Pending deactivation",
338*4882a593Smuzhiyun };
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun /* supported devices */
341*4882a593Smuzhiyun static const struct usb_device_id hfcsusb_idtab[] = {
342*4882a593Smuzhiyun 	{
343*4882a593Smuzhiyun 		USB_DEVICE(0x0959, 0x2bd0),
344*4882a593Smuzhiyun 		.driver_info = (unsigned long) &((struct hfcsusb_vdata)
345*4882a593Smuzhiyun 			{LED_OFF, {4, 0, 2, 1},
346*4882a593Smuzhiyun 					"ISDN USB TA (Cologne Chip HFC-S USB based)"}),
347*4882a593Smuzhiyun 	},
348*4882a593Smuzhiyun 	{
349*4882a593Smuzhiyun 		USB_DEVICE(0x0675, 0x1688),
350*4882a593Smuzhiyun 		.driver_info = (unsigned long) &((struct hfcsusb_vdata)
351*4882a593Smuzhiyun 			{LED_SCHEME1, {1, 2, 0, 0},
352*4882a593Smuzhiyun 					"DrayTek miniVigor 128 USB ISDN TA"}),
353*4882a593Smuzhiyun 	},
354*4882a593Smuzhiyun 	{
355*4882a593Smuzhiyun 		USB_DEVICE(0x07b0, 0x0007),
356*4882a593Smuzhiyun 		.driver_info = (unsigned long) &((struct hfcsusb_vdata)
357*4882a593Smuzhiyun 			{LED_SCHEME1, {0x80, -64, -32, -16},
358*4882a593Smuzhiyun 					"Billion tiny USB ISDN TA 128"}),
359*4882a593Smuzhiyun 	},
360*4882a593Smuzhiyun 	{
361*4882a593Smuzhiyun 		USB_DEVICE(0x0742, 0x2008),
362*4882a593Smuzhiyun 		.driver_info = (unsigned long) &((struct hfcsusb_vdata)
363*4882a593Smuzhiyun 			{LED_SCHEME1, {4, 0, 2, 1},
364*4882a593Smuzhiyun 					"Stollmann USB TA"}),
365*4882a593Smuzhiyun 	},
366*4882a593Smuzhiyun 	{
367*4882a593Smuzhiyun 		USB_DEVICE(0x0742, 0x2009),
368*4882a593Smuzhiyun 		.driver_info = (unsigned long) &((struct hfcsusb_vdata)
369*4882a593Smuzhiyun 			{LED_SCHEME1, {4, 0, 2, 1},
370*4882a593Smuzhiyun 					"Aceex USB ISDN TA"}),
371*4882a593Smuzhiyun 	},
372*4882a593Smuzhiyun 	{
373*4882a593Smuzhiyun 		USB_DEVICE(0x0742, 0x200A),
374*4882a593Smuzhiyun 		.driver_info = (unsigned long) &((struct hfcsusb_vdata)
375*4882a593Smuzhiyun 			{LED_SCHEME1, {4, 0, 2, 1},
376*4882a593Smuzhiyun 					"OEM USB ISDN TA"}),
377*4882a593Smuzhiyun 	},
378*4882a593Smuzhiyun 	{
379*4882a593Smuzhiyun 		USB_DEVICE(0x08e3, 0x0301),
380*4882a593Smuzhiyun 		.driver_info = (unsigned long) &((struct hfcsusb_vdata)
381*4882a593Smuzhiyun 			{LED_SCHEME1, {2, 0, 1, 4},
382*4882a593Smuzhiyun 					"Olitec USB RNIS"}),
383*4882a593Smuzhiyun 	},
384*4882a593Smuzhiyun 	{
385*4882a593Smuzhiyun 		USB_DEVICE(0x07fa, 0x0846),
386*4882a593Smuzhiyun 		.driver_info = (unsigned long) &((struct hfcsusb_vdata)
387*4882a593Smuzhiyun 			{LED_SCHEME1, {0x80, -64, -32, -16},
388*4882a593Smuzhiyun 					"Bewan Modem RNIS USB"}),
389*4882a593Smuzhiyun 	},
390*4882a593Smuzhiyun 	{
391*4882a593Smuzhiyun 		USB_DEVICE(0x07fa, 0x0847),
392*4882a593Smuzhiyun 		.driver_info = (unsigned long) &((struct hfcsusb_vdata)
393*4882a593Smuzhiyun 			{LED_SCHEME1, {0x80, -64, -32, -16},
394*4882a593Smuzhiyun 					"Djinn Numeris USB"}),
395*4882a593Smuzhiyun 	},
396*4882a593Smuzhiyun 	{
397*4882a593Smuzhiyun 		USB_DEVICE(0x07b0, 0x0006),
398*4882a593Smuzhiyun 		.driver_info = (unsigned long) &((struct hfcsusb_vdata)
399*4882a593Smuzhiyun 			{LED_SCHEME1, {0x80, -64, -32, -16},
400*4882a593Smuzhiyun 					"Twister ISDN TA"}),
401*4882a593Smuzhiyun 	},
402*4882a593Smuzhiyun 	{
403*4882a593Smuzhiyun 		USB_DEVICE(0x071d, 0x1005),
404*4882a593Smuzhiyun 		.driver_info = (unsigned long) &((struct hfcsusb_vdata)
405*4882a593Smuzhiyun 			{LED_SCHEME1, {0x02, 0, 0x01, 0x04},
406*4882a593Smuzhiyun 					"Eicon DIVA USB 4.0"}),
407*4882a593Smuzhiyun 	},
408*4882a593Smuzhiyun 	{
409*4882a593Smuzhiyun 		USB_DEVICE(0x0586, 0x0102),
410*4882a593Smuzhiyun 		.driver_info = (unsigned long) &((struct hfcsusb_vdata)
411*4882a593Smuzhiyun 			{LED_SCHEME1, {0x88, -64, -32, -16},
412*4882a593Smuzhiyun 					"ZyXEL OMNI.NET USB II"}),
413*4882a593Smuzhiyun 	},
414*4882a593Smuzhiyun 	{
415*4882a593Smuzhiyun 		USB_DEVICE(0x1ae7, 0x0525),
416*4882a593Smuzhiyun 		.driver_info = (unsigned long) &((struct hfcsusb_vdata)
417*4882a593Smuzhiyun 			{LED_SCHEME1, {0x88, -64, -32, -16},
418*4882a593Smuzhiyun 					"X-Tensions USB ISDN TA XC-525"}),
419*4882a593Smuzhiyun 	},
420*4882a593Smuzhiyun 	{ }
421*4882a593Smuzhiyun };
422*4882a593Smuzhiyun 
423*4882a593Smuzhiyun MODULE_DEVICE_TABLE(usb, hfcsusb_idtab);
424*4882a593Smuzhiyun 
425*4882a593Smuzhiyun #endif	/* __HFCSUSB_H__ */
426