xref: /OK3568_Linux_fs/kernel/drivers/irqchip/irq-ts4800.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Multiplexed-IRQs driver for TS-4800's FPGA
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright (c) 2015 - Savoir-faire Linux
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * This file is licensed under the terms of the GNU General Public
7*4882a593Smuzhiyun  * License version 2. This program is licensed "as is" without any
8*4882a593Smuzhiyun  * warranty of any kind, whether express or implied.
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/interrupt.h>
12*4882a593Smuzhiyun #include <linux/io.h>
13*4882a593Smuzhiyun #include <linux/irq.h>
14*4882a593Smuzhiyun #include <linux/irqchip.h>
15*4882a593Smuzhiyun #include <linux/irqchip/chained_irq.h>
16*4882a593Smuzhiyun #include <linux/irqdomain.h>
17*4882a593Smuzhiyun #include <linux/module.h>
18*4882a593Smuzhiyun #include <linux/of.h>
19*4882a593Smuzhiyun #include <linux/of_address.h>
20*4882a593Smuzhiyun #include <linux/of_irq.h>
21*4882a593Smuzhiyun #include <linux/platform_device.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define IRQ_MASK        0x4
24*4882a593Smuzhiyun #define IRQ_STATUS      0x8
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun struct ts4800_irq_data {
27*4882a593Smuzhiyun 	void __iomem            *base;
28*4882a593Smuzhiyun 	struct irq_domain       *domain;
29*4882a593Smuzhiyun 	struct irq_chip         irq_chip;
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun 
ts4800_irq_mask(struct irq_data * d)32*4882a593Smuzhiyun static void ts4800_irq_mask(struct irq_data *d)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun 	struct ts4800_irq_data *data = irq_data_get_irq_chip_data(d);
35*4882a593Smuzhiyun 	u16 reg = readw(data->base + IRQ_MASK);
36*4882a593Smuzhiyun 	u16 mask = 1 << d->hwirq;
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun 	writew(reg | mask, data->base + IRQ_MASK);
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun 
ts4800_irq_unmask(struct irq_data * d)41*4882a593Smuzhiyun static void ts4800_irq_unmask(struct irq_data *d)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun 	struct ts4800_irq_data *data = irq_data_get_irq_chip_data(d);
44*4882a593Smuzhiyun 	u16 reg = readw(data->base + IRQ_MASK);
45*4882a593Smuzhiyun 	u16 mask = 1 << d->hwirq;
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun 	writew(reg & ~mask, data->base + IRQ_MASK);
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun 
ts4800_irqdomain_map(struct irq_domain * d,unsigned int irq,irq_hw_number_t hwirq)50*4882a593Smuzhiyun static int ts4800_irqdomain_map(struct irq_domain *d, unsigned int irq,
51*4882a593Smuzhiyun 				irq_hw_number_t hwirq)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun 	struct ts4800_irq_data *data = d->host_data;
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	irq_set_chip_and_handler(irq, &data->irq_chip, handle_simple_irq);
56*4882a593Smuzhiyun 	irq_set_chip_data(irq, data);
57*4882a593Smuzhiyun 	irq_set_noprobe(irq);
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 	return 0;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun static const struct irq_domain_ops ts4800_ic_ops = {
63*4882a593Smuzhiyun 	.map = ts4800_irqdomain_map,
64*4882a593Smuzhiyun 	.xlate = irq_domain_xlate_onecell,
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun 
ts4800_ic_chained_handle_irq(struct irq_desc * desc)67*4882a593Smuzhiyun static void ts4800_ic_chained_handle_irq(struct irq_desc *desc)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun 	struct ts4800_irq_data *data = irq_desc_get_handler_data(desc);
70*4882a593Smuzhiyun 	struct irq_chip *chip = irq_desc_get_chip(desc);
71*4882a593Smuzhiyun 	u16 status = readw(data->base + IRQ_STATUS);
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	chained_irq_enter(chip, desc);
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	if (unlikely(status == 0)) {
76*4882a593Smuzhiyun 		handle_bad_irq(desc);
77*4882a593Smuzhiyun 		goto out;
78*4882a593Smuzhiyun 	}
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	do {
81*4882a593Smuzhiyun 		unsigned int bit = __ffs(status);
82*4882a593Smuzhiyun 		int irq = irq_find_mapping(data->domain, bit);
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 		status &= ~(1 << bit);
85*4882a593Smuzhiyun 		generic_handle_irq(irq);
86*4882a593Smuzhiyun 	} while (status);
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun out:
89*4882a593Smuzhiyun 	chained_irq_exit(chip, desc);
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun 
ts4800_ic_probe(struct platform_device * pdev)92*4882a593Smuzhiyun static int ts4800_ic_probe(struct platform_device *pdev)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun 	struct device_node *node = pdev->dev.of_node;
95*4882a593Smuzhiyun 	struct ts4800_irq_data *data;
96*4882a593Smuzhiyun 	struct irq_chip *irq_chip;
97*4882a593Smuzhiyun 	struct resource *res;
98*4882a593Smuzhiyun 	int parent_irq;
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
101*4882a593Smuzhiyun 	if (!data)
102*4882a593Smuzhiyun 		return -ENOMEM;
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
105*4882a593Smuzhiyun 	data->base = devm_ioremap_resource(&pdev->dev, res);
106*4882a593Smuzhiyun 	if (IS_ERR(data->base))
107*4882a593Smuzhiyun 		return PTR_ERR(data->base);
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	writew(0xFFFF, data->base + IRQ_MASK);
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	parent_irq = irq_of_parse_and_map(node, 0);
112*4882a593Smuzhiyun 	if (!parent_irq) {
113*4882a593Smuzhiyun 		dev_err(&pdev->dev, "failed to get parent IRQ\n");
114*4882a593Smuzhiyun 		return -EINVAL;
115*4882a593Smuzhiyun 	}
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	irq_chip = &data->irq_chip;
118*4882a593Smuzhiyun 	irq_chip->name = dev_name(&pdev->dev);
119*4882a593Smuzhiyun 	irq_chip->irq_mask = ts4800_irq_mask;
120*4882a593Smuzhiyun 	irq_chip->irq_unmask = ts4800_irq_unmask;
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	data->domain = irq_domain_add_linear(node, 8, &ts4800_ic_ops, data);
123*4882a593Smuzhiyun 	if (!data->domain) {
124*4882a593Smuzhiyun 		dev_err(&pdev->dev, "cannot add IRQ domain\n");
125*4882a593Smuzhiyun 		return -ENOMEM;
126*4882a593Smuzhiyun 	}
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	irq_set_chained_handler_and_data(parent_irq,
129*4882a593Smuzhiyun 					 ts4800_ic_chained_handle_irq, data);
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	platform_set_drvdata(pdev, data);
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	return 0;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun 
ts4800_ic_remove(struct platform_device * pdev)136*4882a593Smuzhiyun static int ts4800_ic_remove(struct platform_device *pdev)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun 	struct ts4800_irq_data *data = platform_get_drvdata(pdev);
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	irq_domain_remove(data->domain);
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	return 0;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun static const struct of_device_id ts4800_ic_of_match[] = {
146*4882a593Smuzhiyun 	{ .compatible = "technologic,ts4800-irqc", },
147*4882a593Smuzhiyun 	{},
148*4882a593Smuzhiyun };
149*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ts4800_ic_of_match);
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun static struct platform_driver ts4800_ic_driver = {
152*4882a593Smuzhiyun 	.probe  = ts4800_ic_probe,
153*4882a593Smuzhiyun 	.remove = ts4800_ic_remove,
154*4882a593Smuzhiyun 	.driver = {
155*4882a593Smuzhiyun 		.name = "ts4800-irqc",
156*4882a593Smuzhiyun 		.of_match_table = ts4800_ic_of_match,
157*4882a593Smuzhiyun 	},
158*4882a593Smuzhiyun };
159*4882a593Smuzhiyun module_platform_driver(ts4800_ic_driver);
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun MODULE_AUTHOR("Damien Riegel <damien.riegel@savoirfairelinux.com>");
162*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
163*4882a593Smuzhiyun MODULE_ALIAS("platform:ts4800_irqc");
164