xref: /OK3568_Linux_fs/kernel/drivers/irqchip/irq-loongson-htpic.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  Copyright (C) 2020, Jiaxun Yang <jiaxun.yang@flygoat.com>
4*4882a593Smuzhiyun  *  Loongson HTPIC IRQ support
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <linux/init.h>
8*4882a593Smuzhiyun #include <linux/of_address.h>
9*4882a593Smuzhiyun #include <linux/of_irq.h>
10*4882a593Smuzhiyun #include <linux/irqchip.h>
11*4882a593Smuzhiyun #include <linux/irqchip/chained_irq.h>
12*4882a593Smuzhiyun #include <linux/irq.h>
13*4882a593Smuzhiyun #include <linux/io.h>
14*4882a593Smuzhiyun #include <linux/syscore_ops.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <asm/i8259.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define HTPIC_MAX_PARENT_IRQ	4
19*4882a593Smuzhiyun #define HTINT_NUM_VECTORS	8
20*4882a593Smuzhiyun #define HTINT_EN_OFF		0x20
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun struct loongson_htpic {
23*4882a593Smuzhiyun 	void __iomem *base;
24*4882a593Smuzhiyun 	struct irq_domain *domain;
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun static struct loongson_htpic *htpic;
28*4882a593Smuzhiyun 
htpic_irq_dispatch(struct irq_desc * desc)29*4882a593Smuzhiyun static void htpic_irq_dispatch(struct irq_desc *desc)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun 	struct loongson_htpic *priv = irq_desc_get_handler_data(desc);
32*4882a593Smuzhiyun 	struct irq_chip *chip = irq_desc_get_chip(desc);
33*4882a593Smuzhiyun 	uint32_t pending;
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun 	chained_irq_enter(chip, desc);
36*4882a593Smuzhiyun 	pending = readl(priv->base);
37*4882a593Smuzhiyun 	/* Ack all IRQs at once, otherwise IRQ flood might happen */
38*4882a593Smuzhiyun 	writel(pending, priv->base);
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 	if (!pending)
41*4882a593Smuzhiyun 		spurious_interrupt();
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 	while (pending) {
44*4882a593Smuzhiyun 		int bit = __ffs(pending);
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun 		if (unlikely(bit > 15)) {
47*4882a593Smuzhiyun 			spurious_interrupt();
48*4882a593Smuzhiyun 			break;
49*4882a593Smuzhiyun 		}
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 		generic_handle_irq(irq_linear_revmap(priv->domain, bit));
52*4882a593Smuzhiyun 		pending &= ~BIT(bit);
53*4882a593Smuzhiyun 	}
54*4882a593Smuzhiyun 	chained_irq_exit(chip, desc);
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun 
htpic_reg_init(void)57*4882a593Smuzhiyun static void htpic_reg_init(void)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun 	int i;
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	for (i = 0; i < HTINT_NUM_VECTORS; i++) {
62*4882a593Smuzhiyun 		uint32_t val;
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 		/* Disable all HT Vectors */
65*4882a593Smuzhiyun 		writel(0x0, htpic->base + HTINT_EN_OFF + i * 0x4);
66*4882a593Smuzhiyun 		val = readl(htpic->base + i * 0x4);
67*4882a593Smuzhiyun 		/* Ack all possible pending IRQs */
68*4882a593Smuzhiyun 		writel(GENMASK(31, 0), htpic->base + i * 0x4);
69*4882a593Smuzhiyun 	}
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	/* Enable 16 vectors for PIC */
72*4882a593Smuzhiyun 	writel(0xffff, htpic->base + HTINT_EN_OFF);
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun 
htpic_resume(void)75*4882a593Smuzhiyun static void htpic_resume(void)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun 	htpic_reg_init();
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun struct syscore_ops htpic_syscore_ops = {
81*4882a593Smuzhiyun 	.resume		= htpic_resume,
82*4882a593Smuzhiyun };
83*4882a593Smuzhiyun 
htpic_of_init(struct device_node * node,struct device_node * parent)84*4882a593Smuzhiyun int __init htpic_of_init(struct device_node *node, struct device_node *parent)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun 	unsigned int parent_irq[4];
87*4882a593Smuzhiyun 	int i, err;
88*4882a593Smuzhiyun 	int num_parents = 0;
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	if (htpic) {
91*4882a593Smuzhiyun 		pr_err("loongson-htpic: Only one HTPIC is allowed in the system\n");
92*4882a593Smuzhiyun 		return -ENODEV;
93*4882a593Smuzhiyun 	}
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	htpic = kzalloc(sizeof(*htpic), GFP_KERNEL);
96*4882a593Smuzhiyun 	if (!htpic)
97*4882a593Smuzhiyun 		return -ENOMEM;
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	htpic->base = of_iomap(node, 0);
100*4882a593Smuzhiyun 	if (!htpic->base) {
101*4882a593Smuzhiyun 		err = -ENODEV;
102*4882a593Smuzhiyun 		goto out_free;
103*4882a593Smuzhiyun 	}
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	htpic->domain = __init_i8259_irqs(node);
106*4882a593Smuzhiyun 	if (!htpic->domain) {
107*4882a593Smuzhiyun 		pr_err("loongson-htpic: Failed to initialize i8259 IRQs\n");
108*4882a593Smuzhiyun 		err = -ENOMEM;
109*4882a593Smuzhiyun 		goto out_iounmap;
110*4882a593Smuzhiyun 	}
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	/* Interrupt may come from any of the 4 interrupt line */
113*4882a593Smuzhiyun 	for (i = 0; i < HTPIC_MAX_PARENT_IRQ; i++) {
114*4882a593Smuzhiyun 		parent_irq[i] = irq_of_parse_and_map(node, i);
115*4882a593Smuzhiyun 		if (parent_irq[i] <= 0)
116*4882a593Smuzhiyun 			break;
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 		num_parents++;
119*4882a593Smuzhiyun 	}
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	if (!num_parents) {
122*4882a593Smuzhiyun 		pr_err("loongson-htpic: Failed to get parent irqs\n");
123*4882a593Smuzhiyun 		err = -ENODEV;
124*4882a593Smuzhiyun 		goto out_remove_domain;
125*4882a593Smuzhiyun 	}
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	htpic_reg_init();
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	for (i = 0; i < num_parents; i++) {
130*4882a593Smuzhiyun 		irq_set_chained_handler_and_data(parent_irq[i],
131*4882a593Smuzhiyun 						htpic_irq_dispatch, htpic);
132*4882a593Smuzhiyun 	}
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	register_syscore_ops(&htpic_syscore_ops);
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	return 0;
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun out_remove_domain:
139*4882a593Smuzhiyun 	irq_domain_remove(htpic->domain);
140*4882a593Smuzhiyun out_iounmap:
141*4882a593Smuzhiyun 	iounmap(htpic->base);
142*4882a593Smuzhiyun out_free:
143*4882a593Smuzhiyun 	kfree(htpic);
144*4882a593Smuzhiyun 	return err;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun IRQCHIP_DECLARE(loongson_htpic, "loongson,htpic-1.0", htpic_of_init);
148