1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2002 ARM Limited, All Rights Reserved. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef _IRQ_GIC_COMMON_H 7*4882a593Smuzhiyun #define _IRQ_GIC_COMMON_H 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <linux/of.h> 10*4882a593Smuzhiyun #include <linux/irqdomain.h> 11*4882a593Smuzhiyun #include <linux/irqchip/arm-gic-common.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun struct gic_quirk { 14*4882a593Smuzhiyun const char *desc; 15*4882a593Smuzhiyun const char *compatible; 16*4882a593Smuzhiyun bool (*init)(void *data); 17*4882a593Smuzhiyun u32 iidr; 18*4882a593Smuzhiyun u32 mask; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun int gic_configure_irq(unsigned int irq, unsigned int type, 22*4882a593Smuzhiyun void __iomem *base, void (*sync_access)(void)); 23*4882a593Smuzhiyun void gic_dist_config(void __iomem *base, int gic_irqs, 24*4882a593Smuzhiyun void (*sync_access)(void)); 25*4882a593Smuzhiyun void gic_cpu_config(void __iomem *base, int nr, void (*sync_access)(void)); 26*4882a593Smuzhiyun void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks, 27*4882a593Smuzhiyun void *data); 28*4882a593Smuzhiyun void gic_enable_of_quirks(const struct device_node *np, 29*4882a593Smuzhiyun const struct gic_quirk *quirks, void *data); 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun void gic_set_kvm_info(const struct gic_kvm_info *info); 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #endif /* _IRQ_GIC_COMMON_H */ 34