1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * IOMMU API for s390 PCI devices
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright IBM Corp. 2015
6*4882a593Smuzhiyun * Author(s): Gerald Schaefer <gerald.schaefer@de.ibm.com>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/pci.h>
10*4882a593Smuzhiyun #include <linux/iommu.h>
11*4882a593Smuzhiyun #include <linux/iommu-helper.h>
12*4882a593Smuzhiyun #include <linux/sizes.h>
13*4882a593Smuzhiyun #include <asm/pci_dma.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun /*
16*4882a593Smuzhiyun * Physically contiguous memory regions can be mapped with 4 KiB alignment,
17*4882a593Smuzhiyun * we allow all page sizes that are an order of 4KiB (no special large page
18*4882a593Smuzhiyun * support so far).
19*4882a593Smuzhiyun */
20*4882a593Smuzhiyun #define S390_IOMMU_PGSIZES (~0xFFFUL)
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun static const struct iommu_ops s390_iommu_ops;
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun struct s390_domain {
25*4882a593Smuzhiyun struct iommu_domain domain;
26*4882a593Smuzhiyun struct list_head devices;
27*4882a593Smuzhiyun unsigned long *dma_table;
28*4882a593Smuzhiyun spinlock_t dma_table_lock;
29*4882a593Smuzhiyun spinlock_t list_lock;
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun struct s390_domain_device {
33*4882a593Smuzhiyun struct list_head list;
34*4882a593Smuzhiyun struct zpci_dev *zdev;
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun
to_s390_domain(struct iommu_domain * dom)37*4882a593Smuzhiyun static struct s390_domain *to_s390_domain(struct iommu_domain *dom)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun return container_of(dom, struct s390_domain, domain);
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun
s390_iommu_capable(enum iommu_cap cap)42*4882a593Smuzhiyun static bool s390_iommu_capable(enum iommu_cap cap)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun switch (cap) {
45*4882a593Smuzhiyun case IOMMU_CAP_CACHE_COHERENCY:
46*4882a593Smuzhiyun return true;
47*4882a593Smuzhiyun case IOMMU_CAP_INTR_REMAP:
48*4882a593Smuzhiyun return true;
49*4882a593Smuzhiyun default:
50*4882a593Smuzhiyun return false;
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
s390_domain_alloc(unsigned domain_type)54*4882a593Smuzhiyun static struct iommu_domain *s390_domain_alloc(unsigned domain_type)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun struct s390_domain *s390_domain;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun if (domain_type != IOMMU_DOMAIN_UNMANAGED)
59*4882a593Smuzhiyun return NULL;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun s390_domain = kzalloc(sizeof(*s390_domain), GFP_KERNEL);
62*4882a593Smuzhiyun if (!s390_domain)
63*4882a593Smuzhiyun return NULL;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun s390_domain->dma_table = dma_alloc_cpu_table();
66*4882a593Smuzhiyun if (!s390_domain->dma_table) {
67*4882a593Smuzhiyun kfree(s390_domain);
68*4882a593Smuzhiyun return NULL;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun spin_lock_init(&s390_domain->dma_table_lock);
72*4882a593Smuzhiyun spin_lock_init(&s390_domain->list_lock);
73*4882a593Smuzhiyun INIT_LIST_HEAD(&s390_domain->devices);
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun return &s390_domain->domain;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
s390_domain_free(struct iommu_domain * domain)78*4882a593Smuzhiyun static void s390_domain_free(struct iommu_domain *domain)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun struct s390_domain *s390_domain = to_s390_domain(domain);
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun dma_cleanup_tables(s390_domain->dma_table);
83*4882a593Smuzhiyun kfree(s390_domain);
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
s390_iommu_attach_device(struct iommu_domain * domain,struct device * dev)86*4882a593Smuzhiyun static int s390_iommu_attach_device(struct iommu_domain *domain,
87*4882a593Smuzhiyun struct device *dev)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun struct s390_domain *s390_domain = to_s390_domain(domain);
90*4882a593Smuzhiyun struct zpci_dev *zdev = to_zpci_dev(dev);
91*4882a593Smuzhiyun struct s390_domain_device *domain_device;
92*4882a593Smuzhiyun unsigned long flags;
93*4882a593Smuzhiyun int rc;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun if (!zdev)
96*4882a593Smuzhiyun return -ENODEV;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun domain_device = kzalloc(sizeof(*domain_device), GFP_KERNEL);
99*4882a593Smuzhiyun if (!domain_device)
100*4882a593Smuzhiyun return -ENOMEM;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun if (zdev->dma_table)
103*4882a593Smuzhiyun zpci_dma_exit_device(zdev);
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun zdev->dma_table = s390_domain->dma_table;
106*4882a593Smuzhiyun rc = zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma,
107*4882a593Smuzhiyun (u64) zdev->dma_table);
108*4882a593Smuzhiyun if (rc)
109*4882a593Smuzhiyun goto out_restore;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun spin_lock_irqsave(&s390_domain->list_lock, flags);
112*4882a593Smuzhiyun /* First device defines the DMA range limits */
113*4882a593Smuzhiyun if (list_empty(&s390_domain->devices)) {
114*4882a593Smuzhiyun domain->geometry.aperture_start = zdev->start_dma;
115*4882a593Smuzhiyun domain->geometry.aperture_end = zdev->end_dma;
116*4882a593Smuzhiyun domain->geometry.force_aperture = true;
117*4882a593Smuzhiyun /* Allow only devices with identical DMA range limits */
118*4882a593Smuzhiyun } else if (domain->geometry.aperture_start != zdev->start_dma ||
119*4882a593Smuzhiyun domain->geometry.aperture_end != zdev->end_dma) {
120*4882a593Smuzhiyun rc = -EINVAL;
121*4882a593Smuzhiyun spin_unlock_irqrestore(&s390_domain->list_lock, flags);
122*4882a593Smuzhiyun goto out_restore;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun domain_device->zdev = zdev;
125*4882a593Smuzhiyun zdev->s390_domain = s390_domain;
126*4882a593Smuzhiyun list_add(&domain_device->list, &s390_domain->devices);
127*4882a593Smuzhiyun spin_unlock_irqrestore(&s390_domain->list_lock, flags);
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun return 0;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun out_restore:
132*4882a593Smuzhiyun zpci_dma_init_device(zdev);
133*4882a593Smuzhiyun kfree(domain_device);
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun return rc;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
s390_iommu_detach_device(struct iommu_domain * domain,struct device * dev)138*4882a593Smuzhiyun static void s390_iommu_detach_device(struct iommu_domain *domain,
139*4882a593Smuzhiyun struct device *dev)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun struct s390_domain *s390_domain = to_s390_domain(domain);
142*4882a593Smuzhiyun struct zpci_dev *zdev = to_zpci_dev(dev);
143*4882a593Smuzhiyun struct s390_domain_device *domain_device, *tmp;
144*4882a593Smuzhiyun unsigned long flags;
145*4882a593Smuzhiyun int found = 0;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun if (!zdev)
148*4882a593Smuzhiyun return;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun spin_lock_irqsave(&s390_domain->list_lock, flags);
151*4882a593Smuzhiyun list_for_each_entry_safe(domain_device, tmp, &s390_domain->devices,
152*4882a593Smuzhiyun list) {
153*4882a593Smuzhiyun if (domain_device->zdev == zdev) {
154*4882a593Smuzhiyun list_del(&domain_device->list);
155*4882a593Smuzhiyun kfree(domain_device);
156*4882a593Smuzhiyun found = 1;
157*4882a593Smuzhiyun break;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun spin_unlock_irqrestore(&s390_domain->list_lock, flags);
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun if (found) {
163*4882a593Smuzhiyun zdev->s390_domain = NULL;
164*4882a593Smuzhiyun zpci_unregister_ioat(zdev, 0);
165*4882a593Smuzhiyun zpci_dma_init_device(zdev);
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun
s390_iommu_probe_device(struct device * dev)169*4882a593Smuzhiyun static struct iommu_device *s390_iommu_probe_device(struct device *dev)
170*4882a593Smuzhiyun {
171*4882a593Smuzhiyun struct zpci_dev *zdev = to_zpci_dev(dev);
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun return &zdev->iommu_dev;
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun
s390_iommu_release_device(struct device * dev)176*4882a593Smuzhiyun static void s390_iommu_release_device(struct device *dev)
177*4882a593Smuzhiyun {
178*4882a593Smuzhiyun struct zpci_dev *zdev = to_zpci_dev(dev);
179*4882a593Smuzhiyun struct iommu_domain *domain;
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun /*
182*4882a593Smuzhiyun * This is a workaround for a scenario where the IOMMU API common code
183*4882a593Smuzhiyun * "forgets" to call the detach_dev callback: After binding a device
184*4882a593Smuzhiyun * to vfio-pci and completing the VFIO_SET_IOMMU ioctl (which triggers
185*4882a593Smuzhiyun * the attach_dev), removing the device via
186*4882a593Smuzhiyun * "echo 1 > /sys/bus/pci/devices/.../remove" won't trigger detach_dev,
187*4882a593Smuzhiyun * only release_device will be called via the BUS_NOTIFY_REMOVED_DEVICE
188*4882a593Smuzhiyun * notifier.
189*4882a593Smuzhiyun *
190*4882a593Smuzhiyun * So let's call detach_dev from here if it hasn't been called before.
191*4882a593Smuzhiyun */
192*4882a593Smuzhiyun if (zdev && zdev->s390_domain) {
193*4882a593Smuzhiyun domain = iommu_get_domain_for_dev(dev);
194*4882a593Smuzhiyun if (domain)
195*4882a593Smuzhiyun s390_iommu_detach_device(domain, dev);
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun
s390_iommu_update_trans(struct s390_domain * s390_domain,unsigned long pa,dma_addr_t dma_addr,size_t size,int flags)199*4882a593Smuzhiyun static int s390_iommu_update_trans(struct s390_domain *s390_domain,
200*4882a593Smuzhiyun unsigned long pa, dma_addr_t dma_addr,
201*4882a593Smuzhiyun size_t size, int flags)
202*4882a593Smuzhiyun {
203*4882a593Smuzhiyun struct s390_domain_device *domain_device;
204*4882a593Smuzhiyun u8 *page_addr = (u8 *) (pa & PAGE_MASK);
205*4882a593Smuzhiyun dma_addr_t start_dma_addr = dma_addr;
206*4882a593Smuzhiyun unsigned long irq_flags, nr_pages, i;
207*4882a593Smuzhiyun unsigned long *entry;
208*4882a593Smuzhiyun int rc = 0;
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun if (dma_addr < s390_domain->domain.geometry.aperture_start ||
211*4882a593Smuzhiyun dma_addr + size > s390_domain->domain.geometry.aperture_end)
212*4882a593Smuzhiyun return -EINVAL;
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
215*4882a593Smuzhiyun if (!nr_pages)
216*4882a593Smuzhiyun return 0;
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun spin_lock_irqsave(&s390_domain->dma_table_lock, irq_flags);
219*4882a593Smuzhiyun for (i = 0; i < nr_pages; i++) {
220*4882a593Smuzhiyun entry = dma_walk_cpu_trans(s390_domain->dma_table, dma_addr);
221*4882a593Smuzhiyun if (!entry) {
222*4882a593Smuzhiyun rc = -ENOMEM;
223*4882a593Smuzhiyun goto undo_cpu_trans;
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun dma_update_cpu_trans(entry, page_addr, flags);
226*4882a593Smuzhiyun page_addr += PAGE_SIZE;
227*4882a593Smuzhiyun dma_addr += PAGE_SIZE;
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun spin_lock(&s390_domain->list_lock);
231*4882a593Smuzhiyun list_for_each_entry(domain_device, &s390_domain->devices, list) {
232*4882a593Smuzhiyun rc = zpci_refresh_trans((u64) domain_device->zdev->fh << 32,
233*4882a593Smuzhiyun start_dma_addr, nr_pages * PAGE_SIZE);
234*4882a593Smuzhiyun if (rc)
235*4882a593Smuzhiyun break;
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun spin_unlock(&s390_domain->list_lock);
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun undo_cpu_trans:
240*4882a593Smuzhiyun if (rc && ((flags & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID)) {
241*4882a593Smuzhiyun flags = ZPCI_PTE_INVALID;
242*4882a593Smuzhiyun while (i-- > 0) {
243*4882a593Smuzhiyun page_addr -= PAGE_SIZE;
244*4882a593Smuzhiyun dma_addr -= PAGE_SIZE;
245*4882a593Smuzhiyun entry = dma_walk_cpu_trans(s390_domain->dma_table,
246*4882a593Smuzhiyun dma_addr);
247*4882a593Smuzhiyun if (!entry)
248*4882a593Smuzhiyun break;
249*4882a593Smuzhiyun dma_update_cpu_trans(entry, page_addr, flags);
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun spin_unlock_irqrestore(&s390_domain->dma_table_lock, irq_flags);
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun return rc;
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun
s390_iommu_map(struct iommu_domain * domain,unsigned long iova,phys_addr_t paddr,size_t size,int prot,gfp_t gfp)257*4882a593Smuzhiyun static int s390_iommu_map(struct iommu_domain *domain, unsigned long iova,
258*4882a593Smuzhiyun phys_addr_t paddr, size_t size, int prot, gfp_t gfp)
259*4882a593Smuzhiyun {
260*4882a593Smuzhiyun struct s390_domain *s390_domain = to_s390_domain(domain);
261*4882a593Smuzhiyun int flags = ZPCI_PTE_VALID, rc = 0;
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun if (!(prot & IOMMU_READ))
264*4882a593Smuzhiyun return -EINVAL;
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun if (!(prot & IOMMU_WRITE))
267*4882a593Smuzhiyun flags |= ZPCI_TABLE_PROTECTED;
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun rc = s390_iommu_update_trans(s390_domain, (unsigned long) paddr, iova,
270*4882a593Smuzhiyun size, flags);
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun return rc;
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun
s390_iommu_iova_to_phys(struct iommu_domain * domain,dma_addr_t iova)275*4882a593Smuzhiyun static phys_addr_t s390_iommu_iova_to_phys(struct iommu_domain *domain,
276*4882a593Smuzhiyun dma_addr_t iova)
277*4882a593Smuzhiyun {
278*4882a593Smuzhiyun struct s390_domain *s390_domain = to_s390_domain(domain);
279*4882a593Smuzhiyun unsigned long *sto, *pto, *rto, flags;
280*4882a593Smuzhiyun unsigned int rtx, sx, px;
281*4882a593Smuzhiyun phys_addr_t phys = 0;
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun if (iova < domain->geometry.aperture_start ||
284*4882a593Smuzhiyun iova > domain->geometry.aperture_end)
285*4882a593Smuzhiyun return 0;
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun rtx = calc_rtx(iova);
288*4882a593Smuzhiyun sx = calc_sx(iova);
289*4882a593Smuzhiyun px = calc_px(iova);
290*4882a593Smuzhiyun rto = s390_domain->dma_table;
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun spin_lock_irqsave(&s390_domain->dma_table_lock, flags);
293*4882a593Smuzhiyun if (rto && reg_entry_isvalid(rto[rtx])) {
294*4882a593Smuzhiyun sto = get_rt_sto(rto[rtx]);
295*4882a593Smuzhiyun if (sto && reg_entry_isvalid(sto[sx])) {
296*4882a593Smuzhiyun pto = get_st_pto(sto[sx]);
297*4882a593Smuzhiyun if (pto && pt_entry_isvalid(pto[px]))
298*4882a593Smuzhiyun phys = pto[px] & ZPCI_PTE_ADDR_MASK;
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun spin_unlock_irqrestore(&s390_domain->dma_table_lock, flags);
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun return phys;
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun
s390_iommu_unmap(struct iommu_domain * domain,unsigned long iova,size_t size,struct iommu_iotlb_gather * gather)306*4882a593Smuzhiyun static size_t s390_iommu_unmap(struct iommu_domain *domain,
307*4882a593Smuzhiyun unsigned long iova, size_t size,
308*4882a593Smuzhiyun struct iommu_iotlb_gather *gather)
309*4882a593Smuzhiyun {
310*4882a593Smuzhiyun struct s390_domain *s390_domain = to_s390_domain(domain);
311*4882a593Smuzhiyun int flags = ZPCI_PTE_INVALID;
312*4882a593Smuzhiyun phys_addr_t paddr;
313*4882a593Smuzhiyun int rc;
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun paddr = s390_iommu_iova_to_phys(domain, iova);
316*4882a593Smuzhiyun if (!paddr)
317*4882a593Smuzhiyun return 0;
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun rc = s390_iommu_update_trans(s390_domain, (unsigned long) paddr, iova,
320*4882a593Smuzhiyun size, flags);
321*4882a593Smuzhiyun if (rc)
322*4882a593Smuzhiyun return 0;
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun return size;
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun
zpci_init_iommu(struct zpci_dev * zdev)327*4882a593Smuzhiyun int zpci_init_iommu(struct zpci_dev *zdev)
328*4882a593Smuzhiyun {
329*4882a593Smuzhiyun int rc = 0;
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun rc = iommu_device_sysfs_add(&zdev->iommu_dev, NULL, NULL,
332*4882a593Smuzhiyun "s390-iommu.%08x", zdev->fid);
333*4882a593Smuzhiyun if (rc)
334*4882a593Smuzhiyun goto out_err;
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun iommu_device_set_ops(&zdev->iommu_dev, &s390_iommu_ops);
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun rc = iommu_device_register(&zdev->iommu_dev);
339*4882a593Smuzhiyun if (rc)
340*4882a593Smuzhiyun goto out_sysfs;
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun return 0;
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun out_sysfs:
345*4882a593Smuzhiyun iommu_device_sysfs_remove(&zdev->iommu_dev);
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun out_err:
348*4882a593Smuzhiyun return rc;
349*4882a593Smuzhiyun }
350*4882a593Smuzhiyun
zpci_destroy_iommu(struct zpci_dev * zdev)351*4882a593Smuzhiyun void zpci_destroy_iommu(struct zpci_dev *zdev)
352*4882a593Smuzhiyun {
353*4882a593Smuzhiyun iommu_device_unregister(&zdev->iommu_dev);
354*4882a593Smuzhiyun iommu_device_sysfs_remove(&zdev->iommu_dev);
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun static const struct iommu_ops s390_iommu_ops = {
358*4882a593Smuzhiyun .capable = s390_iommu_capable,
359*4882a593Smuzhiyun .domain_alloc = s390_domain_alloc,
360*4882a593Smuzhiyun .domain_free = s390_domain_free,
361*4882a593Smuzhiyun .attach_dev = s390_iommu_attach_device,
362*4882a593Smuzhiyun .detach_dev = s390_iommu_detach_device,
363*4882a593Smuzhiyun .map = s390_iommu_map,
364*4882a593Smuzhiyun .unmap = s390_iommu_unmap,
365*4882a593Smuzhiyun .iova_to_phys = s390_iommu_iova_to_phys,
366*4882a593Smuzhiyun .probe_device = s390_iommu_probe_device,
367*4882a593Smuzhiyun .release_device = s390_iommu_release_device,
368*4882a593Smuzhiyun .device_group = generic_device_group,
369*4882a593Smuzhiyun .pgsize_bitmap = S390_IOMMU_PGSIZES,
370*4882a593Smuzhiyun };
371*4882a593Smuzhiyun
s390_iommu_init(void)372*4882a593Smuzhiyun static int __init s390_iommu_init(void)
373*4882a593Smuzhiyun {
374*4882a593Smuzhiyun return bus_set_iommu(&pci_bus_type, &s390_iommu_ops);
375*4882a593Smuzhiyun }
376*4882a593Smuzhiyun subsys_initcall(s390_iommu_init);
377