1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2013 Freescale Semiconductor, Inc. 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __FSL_PAMU_DOMAIN_H 8*4882a593Smuzhiyun #define __FSL_PAMU_DOMAIN_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include "fsl_pamu.h" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun struct dma_window { 13*4882a593Smuzhiyun phys_addr_t paddr; 14*4882a593Smuzhiyun u64 size; 15*4882a593Smuzhiyun int valid; 16*4882a593Smuzhiyun int prot; 17*4882a593Smuzhiyun }; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun struct fsl_dma_domain { 20*4882a593Smuzhiyun /* 21*4882a593Smuzhiyun * Indicates the geometry size for the domain. 22*4882a593Smuzhiyun * This would be set when the geometry is 23*4882a593Smuzhiyun * configured for the domain. 24*4882a593Smuzhiyun */ 25*4882a593Smuzhiyun dma_addr_t geom_size; 26*4882a593Smuzhiyun /* 27*4882a593Smuzhiyun * Number of windows assocaited with this domain. 28*4882a593Smuzhiyun * During domain initialization, it is set to the 29*4882a593Smuzhiyun * the maximum number of subwindows allowed for a LIODN. 30*4882a593Smuzhiyun * Minimum value for this is 1 indicating a single PAMU 31*4882a593Smuzhiyun * window, without any sub windows. Value can be set/ 32*4882a593Smuzhiyun * queried by set_attr/get_attr API for DOMAIN_ATTR_WINDOWS. 33*4882a593Smuzhiyun * Value can only be set once the geometry has been configured. 34*4882a593Smuzhiyun */ 35*4882a593Smuzhiyun u32 win_cnt; 36*4882a593Smuzhiyun /* 37*4882a593Smuzhiyun * win_arr contains information of the configured 38*4882a593Smuzhiyun * windows for a domain. This is allocated only 39*4882a593Smuzhiyun * when the number of windows for the domain are 40*4882a593Smuzhiyun * set. 41*4882a593Smuzhiyun */ 42*4882a593Smuzhiyun struct dma_window *win_arr; 43*4882a593Smuzhiyun /* list of devices associated with the domain */ 44*4882a593Smuzhiyun struct list_head devices; 45*4882a593Smuzhiyun /* dma_domain states: 46*4882a593Smuzhiyun * mapped - A particular mapping has been created 47*4882a593Smuzhiyun * within the configured geometry. 48*4882a593Smuzhiyun * enabled - DMA has been enabled for the given 49*4882a593Smuzhiyun * domain. This translates to setting of the 50*4882a593Smuzhiyun * valid bit for the primary PAACE in the PAMU 51*4882a593Smuzhiyun * PAACT table. Domain geometry should be set and 52*4882a593Smuzhiyun * it must have a valid mapping before DMA can be 53*4882a593Smuzhiyun * enabled for it. 54*4882a593Smuzhiyun * 55*4882a593Smuzhiyun */ 56*4882a593Smuzhiyun int mapped; 57*4882a593Smuzhiyun int enabled; 58*4882a593Smuzhiyun /* stash_id obtained from the stash attribute details */ 59*4882a593Smuzhiyun u32 stash_id; 60*4882a593Smuzhiyun struct pamu_stash_attribute dma_stash; 61*4882a593Smuzhiyun u32 snoop_id; 62*4882a593Smuzhiyun struct iommu_domain iommu_domain; 63*4882a593Smuzhiyun spinlock_t domain_lock; 64*4882a593Smuzhiyun }; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun /* domain-device relationship */ 67*4882a593Smuzhiyun struct device_domain_info { 68*4882a593Smuzhiyun struct list_head link; /* link to domain siblings */ 69*4882a593Smuzhiyun struct device *dev; 70*4882a593Smuzhiyun u32 liodn; 71*4882a593Smuzhiyun struct fsl_dma_domain *domain; /* pointer to domain */ 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun #endif /* __FSL_PAMU_DOMAIN_H */ 74