1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun# The IOVA library may also be used by non-IOMMU_API users 3*4882a593Smuzhiyunconfig IOMMU_IOVA 4*4882a593Smuzhiyun tristate 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun# The IOASID library may also be used by non-IOMMU_API users 7*4882a593Smuzhiyunconfig IOASID 8*4882a593Smuzhiyun tristate 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun# IOMMU_API always gets selected by whoever wants it. 11*4882a593Smuzhiyunconfig IOMMU_API 12*4882a593Smuzhiyun bool 13*4882a593Smuzhiyun 14*4882a593Smuzhiyunif IOMMU_IOVA 15*4882a593Smuzhiyun 16*4882a593Smuzhiyunconfig IOMMU_LIMIT_IOVA_ALIGNMENT 17*4882a593Smuzhiyun bool "Limit IOVA alignment" 18*4882a593Smuzhiyun help 19*4882a593Smuzhiyun When the IOVA framework applies IOVA alignment it aligns all 20*4882a593Smuzhiyun IOVAs to the smallest PAGE_SIZE order which is greater than or 21*4882a593Smuzhiyun equal to the requested IOVA size. This works fine for sizes up 22*4882a593Smuzhiyun to several MiB, but for larger sizes it results in address 23*4882a593Smuzhiyun space wastage and fragmentation. For example drivers with a 4 24*4882a593Smuzhiyun GiB IOVA space might run out of IOVA space when allocating 25*4882a593Smuzhiyun buffers great than 64 MiB. 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun Enable this option to impose a limit on the alignment of IOVAs. 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun If unsure, say N. 30*4882a593Smuzhiyun 31*4882a593Smuzhiyunconfig IOMMU_IOVA_ALIGNMENT 32*4882a593Smuzhiyun int "Maximum PAGE_SIZE order of alignment for IOVAs" 33*4882a593Smuzhiyun depends on IOMMU_LIMIT_IOVA_ALIGNMENT 34*4882a593Smuzhiyun range 4 9 35*4882a593Smuzhiyun default 9 36*4882a593Smuzhiyun help 37*4882a593Smuzhiyun With this parameter you can specify the maximum PAGE_SIZE order for 38*4882a593Smuzhiyun IOVAs. Larger IOVAs will be aligned only to this specified order. 39*4882a593Smuzhiyun The order is expressed a power of two multiplied by the PAGE_SIZE. 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun If unsure, leave the default value "9". 42*4882a593Smuzhiyunendif 43*4882a593Smuzhiyun 44*4882a593Smuzhiyunmenuconfig IOMMU_SUPPORT 45*4882a593Smuzhiyun bool "IOMMU Hardware Support" 46*4882a593Smuzhiyun depends on MMU 47*4882a593Smuzhiyun default y 48*4882a593Smuzhiyun help 49*4882a593Smuzhiyun Say Y here if you want to compile device drivers for IO Memory 50*4882a593Smuzhiyun Management Units into the kernel. These devices usually allow to 51*4882a593Smuzhiyun remap DMA requests and/or remap interrupts from other devices on the 52*4882a593Smuzhiyun system. 53*4882a593Smuzhiyun 54*4882a593Smuzhiyunif IOMMU_SUPPORT 55*4882a593Smuzhiyun 56*4882a593Smuzhiyunmenu "Generic IOMMU Pagetable Support" 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun# Selected by the actual pagetable implementations 59*4882a593Smuzhiyunconfig IOMMU_IO_PGTABLE 60*4882a593Smuzhiyun bool 61*4882a593Smuzhiyun 62*4882a593Smuzhiyunconfig IOMMU_IO_PGTABLE_LPAE 63*4882a593Smuzhiyun bool "ARMv7/v8 Long Descriptor Format" 64*4882a593Smuzhiyun select IOMMU_IO_PGTABLE 65*4882a593Smuzhiyun depends on ARM || ARM64 || (COMPILE_TEST && !GENERIC_ATOMIC64) 66*4882a593Smuzhiyun help 67*4882a593Smuzhiyun Enable support for the ARM long descriptor pagetable format. 68*4882a593Smuzhiyun This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page 69*4882a593Smuzhiyun sizes at both stage-1 and stage-2, as well as address spaces 70*4882a593Smuzhiyun up to 48-bits in size. 71*4882a593Smuzhiyun 72*4882a593Smuzhiyunconfig IOMMU_IO_PGTABLE_LPAE_SELFTEST 73*4882a593Smuzhiyun bool "LPAE selftests" 74*4882a593Smuzhiyun depends on IOMMU_IO_PGTABLE_LPAE 75*4882a593Smuzhiyun help 76*4882a593Smuzhiyun Enable self-tests for LPAE page table allocator. This performs 77*4882a593Smuzhiyun a series of page-table consistency checks during boot. 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun If unsure, say N here. 80*4882a593Smuzhiyun 81*4882a593Smuzhiyunconfig IOMMU_IO_PGTABLE_ARMV7S 82*4882a593Smuzhiyun bool "ARMv7/v8 Short Descriptor Format" 83*4882a593Smuzhiyun select IOMMU_IO_PGTABLE 84*4882a593Smuzhiyun depends on ARM || ARM64 || COMPILE_TEST 85*4882a593Smuzhiyun help 86*4882a593Smuzhiyun Enable support for the ARM Short-descriptor pagetable format. 87*4882a593Smuzhiyun This supports 32-bit virtual and physical addresses mapped using 88*4882a593Smuzhiyun 2-level tables with 4KB pages/1MB sections, and contiguous entries 89*4882a593Smuzhiyun for 64KB pages/16MB supersections if indicated by the IOMMU driver. 90*4882a593Smuzhiyun 91*4882a593Smuzhiyunconfig IOMMU_IO_PGTABLE_ARMV7S_SELFTEST 92*4882a593Smuzhiyun bool "ARMv7s selftests" 93*4882a593Smuzhiyun depends on IOMMU_IO_PGTABLE_ARMV7S 94*4882a593Smuzhiyun help 95*4882a593Smuzhiyun Enable self-tests for ARMv7s page table allocator. This performs 96*4882a593Smuzhiyun a series of page-table consistency checks during boot. 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun If unsure, say N here. 99*4882a593Smuzhiyun 100*4882a593Smuzhiyunendmenu 101*4882a593Smuzhiyun 102*4882a593Smuzhiyunconfig IOMMU_DEBUGFS 103*4882a593Smuzhiyun bool "Export IOMMU internals in DebugFS" 104*4882a593Smuzhiyun depends on DEBUG_FS 105*4882a593Smuzhiyun help 106*4882a593Smuzhiyun Allows exposure of IOMMU device internals. This option enables 107*4882a593Smuzhiyun the use of debugfs by IOMMU drivers as required. Devices can, 108*4882a593Smuzhiyun at initialization time, cause the IOMMU code to create a top-level 109*4882a593Smuzhiyun debug/iommu directory, and then populate a subdirectory with 110*4882a593Smuzhiyun entries as required. 111*4882a593Smuzhiyun 112*4882a593Smuzhiyunconfig IOMMU_DEFAULT_PASSTHROUGH 113*4882a593Smuzhiyun bool "IOMMU passthrough by default" 114*4882a593Smuzhiyun depends on IOMMU_API 115*4882a593Smuzhiyun help 116*4882a593Smuzhiyun Enable passthrough by default, removing the need to pass in 117*4882a593Smuzhiyun iommu.passthrough=on or iommu=pt through command line. If this 118*4882a593Smuzhiyun is enabled, you can still disable with iommu.passthrough=off 119*4882a593Smuzhiyun or iommu=nopt depending on the architecture. 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun If unsure, say N here. 122*4882a593Smuzhiyun 123*4882a593Smuzhiyunconfig OF_IOMMU 124*4882a593Smuzhiyun def_bool y 125*4882a593Smuzhiyun depends on OF && IOMMU_API 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun# IOMMU-agnostic DMA-mapping layer 128*4882a593Smuzhiyunconfig IOMMU_DMA 129*4882a593Smuzhiyun bool 130*4882a593Smuzhiyun select DMA_OPS 131*4882a593Smuzhiyun select IOMMU_API 132*4882a593Smuzhiyun select IOMMU_IOVA 133*4882a593Smuzhiyun select IRQ_MSI_IOMMU 134*4882a593Smuzhiyun select NEED_SG_DMA_LENGTH 135*4882a593Smuzhiyun 136*4882a593Smuzhiyunconfig FSL_PAMU 137*4882a593Smuzhiyun bool "Freescale IOMMU support" 138*4882a593Smuzhiyun depends on PCI 139*4882a593Smuzhiyun depends on PHYS_64BIT 140*4882a593Smuzhiyun depends on PPC_E500MC || (COMPILE_TEST && PPC) 141*4882a593Smuzhiyun select IOMMU_API 142*4882a593Smuzhiyun select GENERIC_ALLOCATOR 143*4882a593Smuzhiyun help 144*4882a593Smuzhiyun Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms. 145*4882a593Smuzhiyun PAMU can authorize memory access, remap the memory address, and remap I/O 146*4882a593Smuzhiyun transaction types. 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun# MSM IOMMU support 149*4882a593Smuzhiyunconfig MSM_IOMMU 150*4882a593Smuzhiyun bool "MSM IOMMU Support" 151*4882a593Smuzhiyun depends on ARM 152*4882a593Smuzhiyun depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST 153*4882a593Smuzhiyun select IOMMU_API 154*4882a593Smuzhiyun select IOMMU_IO_PGTABLE_ARMV7S 155*4882a593Smuzhiyun help 156*4882a593Smuzhiyun Support for the IOMMUs found on certain Qualcomm SOCs. 157*4882a593Smuzhiyun These IOMMUs allow virtualization of the address space used by most 158*4882a593Smuzhiyun cores within the multimedia subsystem. 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun If unsure, say N here. 161*4882a593Smuzhiyun 162*4882a593Smuzhiyunsource "drivers/iommu/amd/Kconfig" 163*4882a593Smuzhiyunsource "drivers/iommu/intel/Kconfig" 164*4882a593Smuzhiyun 165*4882a593Smuzhiyunconfig IRQ_REMAP 166*4882a593Smuzhiyun bool "Support for Interrupt Remapping" 167*4882a593Smuzhiyun depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI 168*4882a593Smuzhiyun select DMAR_TABLE 169*4882a593Smuzhiyun help 170*4882a593Smuzhiyun Supports Interrupt remapping for IO-APIC and MSI devices. 171*4882a593Smuzhiyun To use x2apic mode in the CPU's which support x2APIC enhancements or 172*4882a593Smuzhiyun to support platforms with CPU's having > 8 bit APIC ID, say Y. 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun# OMAP IOMMU support 175*4882a593Smuzhiyunconfig OMAP_IOMMU 176*4882a593Smuzhiyun bool "OMAP IOMMU Support" 177*4882a593Smuzhiyun depends on ARCH_OMAP2PLUS || COMPILE_TEST 178*4882a593Smuzhiyun select IOMMU_API 179*4882a593Smuzhiyun help 180*4882a593Smuzhiyun The OMAP3 media platform drivers depend on iommu support, 181*4882a593Smuzhiyun if you need them say Y here. 182*4882a593Smuzhiyun 183*4882a593Smuzhiyunconfig OMAP_IOMMU_DEBUG 184*4882a593Smuzhiyun bool "Export OMAP IOMMU internals in DebugFS" 185*4882a593Smuzhiyun depends on OMAP_IOMMU && DEBUG_FS 186*4882a593Smuzhiyun help 187*4882a593Smuzhiyun Select this to see extensive information about 188*4882a593Smuzhiyun the internal state of OMAP IOMMU in debugfs. 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun Say N unless you know you need this. 191*4882a593Smuzhiyun 192*4882a593Smuzhiyunconfig ROCKCHIP_IOMMU 193*4882a593Smuzhiyun tristate "Rockchip IOMMU Support" 194*4882a593Smuzhiyun depends on ARM || ARM64 195*4882a593Smuzhiyun depends on ARCH_ROCKCHIP || COMPILE_TEST 196*4882a593Smuzhiyun select IOMMU_API 197*4882a593Smuzhiyun select ARM_DMA_USE_IOMMU 198*4882a593Smuzhiyun help 199*4882a593Smuzhiyun Support for IOMMUs found on Rockchip rk32xx SOCs. 200*4882a593Smuzhiyun These IOMMUs allow virtualization of the address space used by most 201*4882a593Smuzhiyun cores within the multimedia subsystem. 202*4882a593Smuzhiyun Say Y here if you are using a Rockchip SoC that includes an IOMMU 203*4882a593Smuzhiyun device. 204*4882a593Smuzhiyun 205*4882a593Smuzhiyunconfig SUN50I_IOMMU 206*4882a593Smuzhiyun bool "Allwinner H6 IOMMU Support" 207*4882a593Smuzhiyun depends on HAS_DMA 208*4882a593Smuzhiyun depends on ARCH_SUNXI || COMPILE_TEST 209*4882a593Smuzhiyun select ARM_DMA_USE_IOMMU 210*4882a593Smuzhiyun select IOMMU_API 211*4882a593Smuzhiyun help 212*4882a593Smuzhiyun Support for the IOMMU introduced in the Allwinner H6 SoCs. 213*4882a593Smuzhiyun 214*4882a593Smuzhiyunconfig TEGRA_IOMMU_GART 215*4882a593Smuzhiyun bool "Tegra GART IOMMU Support" 216*4882a593Smuzhiyun depends on ARCH_TEGRA_2x_SOC 217*4882a593Smuzhiyun depends on TEGRA_MC 218*4882a593Smuzhiyun select IOMMU_API 219*4882a593Smuzhiyun help 220*4882a593Smuzhiyun Enables support for remapping discontiguous physical memory 221*4882a593Smuzhiyun shared with the operating system into contiguous I/O virtual 222*4882a593Smuzhiyun space through the GART (Graphics Address Relocation Table) 223*4882a593Smuzhiyun hardware included on Tegra SoCs. 224*4882a593Smuzhiyun 225*4882a593Smuzhiyunconfig TEGRA_IOMMU_SMMU 226*4882a593Smuzhiyun bool "NVIDIA Tegra SMMU Support" 227*4882a593Smuzhiyun depends on ARCH_TEGRA 228*4882a593Smuzhiyun depends on TEGRA_AHB 229*4882a593Smuzhiyun depends on TEGRA_MC 230*4882a593Smuzhiyun select IOMMU_API 231*4882a593Smuzhiyun help 232*4882a593Smuzhiyun This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra 233*4882a593Smuzhiyun SoCs (Tegra30 up to Tegra210). 234*4882a593Smuzhiyun 235*4882a593Smuzhiyunconfig EXYNOS_IOMMU 236*4882a593Smuzhiyun bool "Exynos IOMMU Support" 237*4882a593Smuzhiyun depends on ARCH_EXYNOS || COMPILE_TEST 238*4882a593Smuzhiyun depends on !CPU_BIG_ENDIAN # revisit driver if we can enable big-endian ptes 239*4882a593Smuzhiyun select IOMMU_API 240*4882a593Smuzhiyun select ARM_DMA_USE_IOMMU 241*4882a593Smuzhiyun help 242*4882a593Smuzhiyun Support for the IOMMU (System MMU) of Samsung Exynos application 243*4882a593Smuzhiyun processor family. This enables H/W multimedia accelerators to see 244*4882a593Smuzhiyun non-linear physical memory chunks as linear memory in their 245*4882a593Smuzhiyun address space. 246*4882a593Smuzhiyun 247*4882a593Smuzhiyun If unsure, say N here. 248*4882a593Smuzhiyun 249*4882a593Smuzhiyunconfig EXYNOS_IOMMU_DEBUG 250*4882a593Smuzhiyun bool "Debugging log for Exynos IOMMU" 251*4882a593Smuzhiyun depends on EXYNOS_IOMMU 252*4882a593Smuzhiyun help 253*4882a593Smuzhiyun Select this to see the detailed log message that shows what 254*4882a593Smuzhiyun happens in the IOMMU driver. 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun Say N unless you need kernel log message for IOMMU debugging. 257*4882a593Smuzhiyun 258*4882a593Smuzhiyunconfig IPMMU_VMSA 259*4882a593Smuzhiyun bool "Renesas VMSA-compatible IPMMU" 260*4882a593Smuzhiyun depends on ARCH_RENESAS || (COMPILE_TEST && !GENERIC_ATOMIC64) 261*4882a593Smuzhiyun select IOMMU_API 262*4882a593Smuzhiyun select IOMMU_IO_PGTABLE_LPAE 263*4882a593Smuzhiyun select ARM_DMA_USE_IOMMU 264*4882a593Smuzhiyun help 265*4882a593Smuzhiyun Support for the Renesas VMSA-compatible IPMMU found in the R-Mobile 266*4882a593Smuzhiyun APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs. 267*4882a593Smuzhiyun 268*4882a593Smuzhiyun If unsure, say N. 269*4882a593Smuzhiyun 270*4882a593Smuzhiyunconfig SPAPR_TCE_IOMMU 271*4882a593Smuzhiyun bool "sPAPR TCE IOMMU Support" 272*4882a593Smuzhiyun depends on PPC_POWERNV || PPC_PSERIES 273*4882a593Smuzhiyun select IOMMU_API 274*4882a593Smuzhiyun help 275*4882a593Smuzhiyun Enables bits of IOMMU API required by VFIO. The iommu_ops 276*4882a593Smuzhiyun is not implemented as it is not necessary for VFIO. 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun# ARM IOMMU support 279*4882a593Smuzhiyunconfig ARM_SMMU 280*4882a593Smuzhiyun tristate "ARM Ltd. System MMU (SMMU) Support" 281*4882a593Smuzhiyun depends on ARM64 || ARM || (COMPILE_TEST && !GENERIC_ATOMIC64) 282*4882a593Smuzhiyun depends on QCOM_SCM || !QCOM_SCM #if QCOM_SCM=m this can't be =y 283*4882a593Smuzhiyun select IOMMU_API 284*4882a593Smuzhiyun select IOMMU_IO_PGTABLE_LPAE 285*4882a593Smuzhiyun select ARM_DMA_USE_IOMMU if ARM 286*4882a593Smuzhiyun help 287*4882a593Smuzhiyun Support for implementations of the ARM System MMU architecture 288*4882a593Smuzhiyun versions 1 and 2. 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun Say Y here if your SoC includes an IOMMU device implementing 291*4882a593Smuzhiyun the ARM SMMU architecture. 292*4882a593Smuzhiyun 293*4882a593Smuzhiyunconfig ARM_SMMU_LEGACY_DT_BINDINGS 294*4882a593Smuzhiyun bool "Support the legacy \"mmu-masters\" devicetree bindings" 295*4882a593Smuzhiyun depends on ARM_SMMU=y && OF 296*4882a593Smuzhiyun help 297*4882a593Smuzhiyun Support for the badly designed and deprecated "mmu-masters" 298*4882a593Smuzhiyun devicetree bindings. This allows some DMA masters to attach 299*4882a593Smuzhiyun to the SMMU but does not provide any support via the DMA API. 300*4882a593Smuzhiyun If you're lucky, you might be able to get VFIO up and running. 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun If you say Y here then you'll make me very sad. Instead, say N 303*4882a593Smuzhiyun and move your firmware to the utopian future that was 2016. 304*4882a593Smuzhiyun 305*4882a593Smuzhiyunconfig ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT 306*4882a593Smuzhiyun bool "Default to disabling bypass on ARM SMMU v1 and v2" 307*4882a593Smuzhiyun depends on ARM_SMMU 308*4882a593Smuzhiyun default y 309*4882a593Smuzhiyun help 310*4882a593Smuzhiyun Say Y here to (by default) disable bypass streams such that 311*4882a593Smuzhiyun incoming transactions from devices that are not attached to 312*4882a593Smuzhiyun an iommu domain will report an abort back to the device and 313*4882a593Smuzhiyun will not be allowed to pass through the SMMU. 314*4882a593Smuzhiyun 315*4882a593Smuzhiyun Any old kernels that existed before this KConfig was 316*4882a593Smuzhiyun introduced would default to _allowing_ bypass (AKA the 317*4882a593Smuzhiyun equivalent of NO for this config). However the default for 318*4882a593Smuzhiyun this option is YES because the old behavior is insecure. 319*4882a593Smuzhiyun 320*4882a593Smuzhiyun There are few reasons to allow unmatched stream bypass, and 321*4882a593Smuzhiyun even fewer good ones. If saying YES here breaks your board 322*4882a593Smuzhiyun you should work on fixing your board. This KConfig option 323*4882a593Smuzhiyun is expected to be removed in the future and we'll simply 324*4882a593Smuzhiyun hardcode the bypass disable in the code. 325*4882a593Smuzhiyun 326*4882a593Smuzhiyun NOTE: the kernel command line parameter 327*4882a593Smuzhiyun 'arm-smmu.disable_bypass' will continue to override this 328*4882a593Smuzhiyun config. 329*4882a593Smuzhiyun 330*4882a593Smuzhiyunconfig ARM_SMMU_V3 331*4882a593Smuzhiyun tristate "ARM Ltd. System MMU Version 3 (SMMUv3) Support" 332*4882a593Smuzhiyun depends on ARM64 333*4882a593Smuzhiyun select IOMMU_API 334*4882a593Smuzhiyun select IOMMU_IO_PGTABLE_LPAE 335*4882a593Smuzhiyun select GENERIC_MSI_IRQ_DOMAIN 336*4882a593Smuzhiyun help 337*4882a593Smuzhiyun Support for implementations of the ARM System MMU architecture 338*4882a593Smuzhiyun version 3 providing translation support to a PCIe root complex. 339*4882a593Smuzhiyun 340*4882a593Smuzhiyun Say Y here if your system includes an IOMMU device implementing 341*4882a593Smuzhiyun the ARM SMMUv3 architecture. 342*4882a593Smuzhiyun 343*4882a593Smuzhiyunconfig ARM_SMMU_V3_SVA 344*4882a593Smuzhiyun bool "Shared Virtual Addressing support for the ARM SMMUv3" 345*4882a593Smuzhiyun depends on ARM_SMMU_V3 346*4882a593Smuzhiyun help 347*4882a593Smuzhiyun Support for sharing process address spaces with devices using the 348*4882a593Smuzhiyun SMMUv3. 349*4882a593Smuzhiyun 350*4882a593Smuzhiyun Say Y here if your system supports SVA extensions such as PCIe PASID 351*4882a593Smuzhiyun and PRI. 352*4882a593Smuzhiyun 353*4882a593Smuzhiyunconfig S390_IOMMU 354*4882a593Smuzhiyun def_bool y if S390 && PCI 355*4882a593Smuzhiyun depends on S390 && PCI 356*4882a593Smuzhiyun select IOMMU_API 357*4882a593Smuzhiyun help 358*4882a593Smuzhiyun Support for the IOMMU API for s390 PCI devices. 359*4882a593Smuzhiyun 360*4882a593Smuzhiyunconfig S390_CCW_IOMMU 361*4882a593Smuzhiyun bool "S390 CCW IOMMU Support" 362*4882a593Smuzhiyun depends on S390 && CCW || COMPILE_TEST 363*4882a593Smuzhiyun select IOMMU_API 364*4882a593Smuzhiyun help 365*4882a593Smuzhiyun Enables bits of IOMMU API required by VFIO. The iommu_ops 366*4882a593Smuzhiyun is not implemented as it is not necessary for VFIO. 367*4882a593Smuzhiyun 368*4882a593Smuzhiyunconfig S390_AP_IOMMU 369*4882a593Smuzhiyun bool "S390 AP IOMMU Support" 370*4882a593Smuzhiyun depends on S390 && ZCRYPT || COMPILE_TEST 371*4882a593Smuzhiyun select IOMMU_API 372*4882a593Smuzhiyun help 373*4882a593Smuzhiyun Enables bits of IOMMU API required by VFIO. The iommu_ops 374*4882a593Smuzhiyun is not implemented as it is not necessary for VFIO. 375*4882a593Smuzhiyun 376*4882a593Smuzhiyunconfig MTK_IOMMU 377*4882a593Smuzhiyun bool "MTK IOMMU Support" 378*4882a593Smuzhiyun depends on ARCH_MEDIATEK || COMPILE_TEST 379*4882a593Smuzhiyun select ARM_DMA_USE_IOMMU 380*4882a593Smuzhiyun select IOMMU_API 381*4882a593Smuzhiyun select IOMMU_IO_PGTABLE_ARMV7S 382*4882a593Smuzhiyun select MEMORY 383*4882a593Smuzhiyun select MTK_SMI 384*4882a593Smuzhiyun help 385*4882a593Smuzhiyun Support for the M4U on certain Mediatek SOCs. M4U is MultiMedia 386*4882a593Smuzhiyun Memory Management Unit. This option enables remapping of DMA memory 387*4882a593Smuzhiyun accesses for the multimedia subsystem. 388*4882a593Smuzhiyun 389*4882a593Smuzhiyun If unsure, say N here. 390*4882a593Smuzhiyun 391*4882a593Smuzhiyunconfig MTK_IOMMU_V1 392*4882a593Smuzhiyun bool "MTK IOMMU Version 1 (M4U gen1) Support" 393*4882a593Smuzhiyun depends on ARM 394*4882a593Smuzhiyun depends on ARCH_MEDIATEK || COMPILE_TEST 395*4882a593Smuzhiyun select ARM_DMA_USE_IOMMU 396*4882a593Smuzhiyun select IOMMU_API 397*4882a593Smuzhiyun select MEMORY 398*4882a593Smuzhiyun select MTK_SMI 399*4882a593Smuzhiyun help 400*4882a593Smuzhiyun Support for the M4U on certain Mediatek SoCs. M4U generation 1 HW is 401*4882a593Smuzhiyun Multimedia Memory Managememt Unit. This option enables remapping of 402*4882a593Smuzhiyun DMA memory accesses for the multimedia subsystem. 403*4882a593Smuzhiyun 404*4882a593Smuzhiyun if unsure, say N here. 405*4882a593Smuzhiyun 406*4882a593Smuzhiyunconfig QCOM_IOMMU 407*4882a593Smuzhiyun # Note: iommu drivers cannot (yet?) be built as modules 408*4882a593Smuzhiyun bool "Qualcomm IOMMU Support" 409*4882a593Smuzhiyun depends on ARCH_QCOM || (COMPILE_TEST && !GENERIC_ATOMIC64) 410*4882a593Smuzhiyun depends on QCOM_SCM=y 411*4882a593Smuzhiyun select IOMMU_API 412*4882a593Smuzhiyun select IOMMU_IO_PGTABLE_LPAE 413*4882a593Smuzhiyun select ARM_DMA_USE_IOMMU 414*4882a593Smuzhiyun help 415*4882a593Smuzhiyun Support for IOMMU on certain Qualcomm SoCs. 416*4882a593Smuzhiyun 417*4882a593Smuzhiyunconfig HYPERV_IOMMU 418*4882a593Smuzhiyun bool "Hyper-V x2APIC IRQ Handling" 419*4882a593Smuzhiyun depends on HYPERV && X86 420*4882a593Smuzhiyun select IOMMU_API 421*4882a593Smuzhiyun default HYPERV 422*4882a593Smuzhiyun help 423*4882a593Smuzhiyun Stub IOMMU driver to handle IRQs as to allow Hyper-V Linux 424*4882a593Smuzhiyun guests to run with x2APIC mode enabled. 425*4882a593Smuzhiyun 426*4882a593Smuzhiyunconfig VIRTIO_IOMMU 427*4882a593Smuzhiyun tristate "Virtio IOMMU driver" 428*4882a593Smuzhiyun depends on VIRTIO 429*4882a593Smuzhiyun depends on ARM64 430*4882a593Smuzhiyun select IOMMU_API 431*4882a593Smuzhiyun select INTERVAL_TREE 432*4882a593Smuzhiyun help 433*4882a593Smuzhiyun Para-virtualised IOMMU driver with virtio. 434*4882a593Smuzhiyun 435*4882a593Smuzhiyun Say Y here if you intend to run this kernel as a guest. 436*4882a593Smuzhiyun 437*4882a593Smuzhiyunendif # IOMMU_SUPPORT 438