1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Qualcomm #define SM8250 interconnect IDs 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2020, The Linux Foundation. All rights reserved. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef __DRIVERS_INTERCONNECT_QCOM_SM8250_H 9*4882a593Smuzhiyun #define __DRIVERS_INTERCONNECT_QCOM_SM8250_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #define SM8250_A1NOC_SNOC_MAS 0 12*4882a593Smuzhiyun #define SM8250_A1NOC_SNOC_SLV 1 13*4882a593Smuzhiyun #define SM8250_A2NOC_SNOC_MAS 2 14*4882a593Smuzhiyun #define SM8250_A2NOC_SNOC_SLV 3 15*4882a593Smuzhiyun #define SM8250_MASTER_A1NOC_CFG 4 16*4882a593Smuzhiyun #define SM8250_MASTER_A2NOC_CFG 5 17*4882a593Smuzhiyun #define SM8250_MASTER_AMPSS_M0 6 18*4882a593Smuzhiyun #define SM8250_MASTER_ANOC_PCIE_GEM_NOC 7 19*4882a593Smuzhiyun #define SM8250_MASTER_CAMNOC_HF 8 20*4882a593Smuzhiyun #define SM8250_MASTER_CAMNOC_ICP 9 21*4882a593Smuzhiyun #define SM8250_MASTER_CAMNOC_SF 10 22*4882a593Smuzhiyun #define SM8250_MASTER_CNOC_A2NOC 11 23*4882a593Smuzhiyun #define SM8250_MASTER_CNOC_DC_NOC 12 24*4882a593Smuzhiyun #define SM8250_MASTER_CNOC_MNOC_CFG 13 25*4882a593Smuzhiyun #define SM8250_MASTER_COMPUTE_NOC 14 26*4882a593Smuzhiyun #define SM8250_MASTER_CRYPTO_CORE_0 15 27*4882a593Smuzhiyun #define SM8250_MASTER_GEM_NOC_CFG 16 28*4882a593Smuzhiyun #define SM8250_MASTER_GEM_NOC_PCIE_SNOC 17 29*4882a593Smuzhiyun #define SM8250_MASTER_GEM_NOC_SNOC 18 30*4882a593Smuzhiyun #define SM8250_MASTER_GIC 19 31*4882a593Smuzhiyun #define SM8250_MASTER_GPU_TCU 20 32*4882a593Smuzhiyun #define SM8250_MASTER_GRAPHICS_3D 21 33*4882a593Smuzhiyun #define SM8250_MASTER_IPA 22 34*4882a593Smuzhiyun #define SM8250_MASTER_IPA_CORE 23 35*4882a593Smuzhiyun #define SM8250_MASTER_LLCC 24 36*4882a593Smuzhiyun #define SM8250_MASTER_MDP_PORT0 25 37*4882a593Smuzhiyun #define SM8250_MASTER_MDP_PORT1 26 38*4882a593Smuzhiyun #define SM8250_MASTER_MNOC_HF_MEM_NOC 27 39*4882a593Smuzhiyun #define SM8250_MASTER_MNOC_SF_MEM_NOC 28 40*4882a593Smuzhiyun #define SM8250_MASTER_NPU 29 41*4882a593Smuzhiyun #define SM8250_MASTER_NPU_CDP 30 42*4882a593Smuzhiyun #define SM8250_MASTER_NPU_NOC_CFG 31 43*4882a593Smuzhiyun #define SM8250_MASTER_NPU_SYS 32 44*4882a593Smuzhiyun #define SM8250_MASTER_PCIE 33 45*4882a593Smuzhiyun #define SM8250_MASTER_PCIE_1 34 46*4882a593Smuzhiyun #define SM8250_MASTER_PCIE_2 35 47*4882a593Smuzhiyun #define SM8250_MASTER_PIMEM 36 48*4882a593Smuzhiyun #define SM8250_MASTER_QDSS_BAM 37 49*4882a593Smuzhiyun #define SM8250_MASTER_QDSS_DAP 38 50*4882a593Smuzhiyun #define SM8250_MASTER_QDSS_ETR 39 51*4882a593Smuzhiyun #define SM8250_MASTER_QSPI_0 40 52*4882a593Smuzhiyun #define SM8250_MASTER_QUP_0 41 53*4882a593Smuzhiyun #define SM8250_MASTER_QUP_1 42 54*4882a593Smuzhiyun #define SM8250_MASTER_QUP_2 43 55*4882a593Smuzhiyun #define SM8250_MASTER_ROTATOR 44 56*4882a593Smuzhiyun #define SM8250_MASTER_SDCC_2 45 57*4882a593Smuzhiyun #define SM8250_MASTER_SDCC_4 46 58*4882a593Smuzhiyun #define SM8250_MASTER_SNOC_CFG 47 59*4882a593Smuzhiyun #define SM8250_MASTER_SNOC_GC_MEM_NOC 48 60*4882a593Smuzhiyun #define SM8250_MASTER_SNOC_SF_MEM_NOC 49 61*4882a593Smuzhiyun #define SM8250_MASTER_SYS_TCU 50 62*4882a593Smuzhiyun #define SM8250_MASTER_TSIF 51 63*4882a593Smuzhiyun #define SM8250_MASTER_UFS_CARD 52 64*4882a593Smuzhiyun #define SM8250_MASTER_UFS_MEM 53 65*4882a593Smuzhiyun #define SM8250_MASTER_USB3 54 66*4882a593Smuzhiyun #define SM8250_MASTER_USB3_1 55 67*4882a593Smuzhiyun #define SM8250_MASTER_VIDEO_P0 56 68*4882a593Smuzhiyun #define SM8250_MASTER_VIDEO_P1 57 69*4882a593Smuzhiyun #define SM8250_MASTER_VIDEO_PROC 58 70*4882a593Smuzhiyun #define SM8250_SLAVE_A1NOC_CFG 59 71*4882a593Smuzhiyun #define SM8250_SLAVE_A2NOC_CFG 60 72*4882a593Smuzhiyun #define SM8250_SLAVE_AHB2PHY_NORTH 61 73*4882a593Smuzhiyun #define SM8250_SLAVE_AHB2PHY_SOUTH 62 74*4882a593Smuzhiyun #define SM8250_SLAVE_ANOC_PCIE_GEM_NOC 63 75*4882a593Smuzhiyun #define SM8250_SLAVE_ANOC_PCIE_GEM_NOC_1 64 76*4882a593Smuzhiyun #define SM8250_SLAVE_AOSS 65 77*4882a593Smuzhiyun #define SM8250_SLAVE_APPSS 66 78*4882a593Smuzhiyun #define SM8250_SLAVE_CAMERA_CFG 67 79*4882a593Smuzhiyun #define SM8250_SLAVE_CDSP_CFG 68 80*4882a593Smuzhiyun #define SM8250_SLAVE_CDSP_MEM_NOC 69 81*4882a593Smuzhiyun #define SM8250_SLAVE_CLK_CTL 70 82*4882a593Smuzhiyun #define SM8250_SLAVE_CNOC_A2NOC 71 83*4882a593Smuzhiyun #define SM8250_SLAVE_CNOC_DDRSS 72 84*4882a593Smuzhiyun #define SM8250_SLAVE_CNOC_MNOC_CFG 73 85*4882a593Smuzhiyun #define SM8250_SLAVE_CRYPTO_0_CFG 74 86*4882a593Smuzhiyun #define SM8250_SLAVE_CX_RDPM 75 87*4882a593Smuzhiyun #define SM8250_SLAVE_DCC_CFG 76 88*4882a593Smuzhiyun #define SM8250_SLAVE_DISPLAY_CFG 77 89*4882a593Smuzhiyun #define SM8250_SLAVE_EBI_CH0 78 90*4882a593Smuzhiyun #define SM8250_SLAVE_GEM_NOC_CFG 79 91*4882a593Smuzhiyun #define SM8250_SLAVE_GEM_NOC_SNOC 80 92*4882a593Smuzhiyun #define SM8250_SLAVE_GRAPHICS_3D_CFG 81 93*4882a593Smuzhiyun #define SM8250_SLAVE_IMEM_CFG 82 94*4882a593Smuzhiyun #define SM8250_SLAVE_IPA_CFG 83 95*4882a593Smuzhiyun #define SM8250_SLAVE_IPA_CORE 84 96*4882a593Smuzhiyun #define SM8250_SLAVE_IPC_ROUTER_CFG 85 97*4882a593Smuzhiyun #define SM8250_SLAVE_ISENSE_CFG 86 98*4882a593Smuzhiyun #define SM8250_SLAVE_LLCC 87 99*4882a593Smuzhiyun #define SM8250_SLAVE_LLCC_CFG 88 100*4882a593Smuzhiyun #define SM8250_SLAVE_LPASS 89 101*4882a593Smuzhiyun #define SM8250_SLAVE_MEM_NOC_PCIE_SNOC 90 102*4882a593Smuzhiyun #define SM8250_SLAVE_MNOC_HF_MEM_NOC 91 103*4882a593Smuzhiyun #define SM8250_SLAVE_MNOC_SF_MEM_NOC 92 104*4882a593Smuzhiyun #define SM8250_SLAVE_NPU_CAL_DP0 93 105*4882a593Smuzhiyun #define SM8250_SLAVE_NPU_CAL_DP1 94 106*4882a593Smuzhiyun #define SM8250_SLAVE_NPU_CFG 95 107*4882a593Smuzhiyun #define SM8250_SLAVE_NPU_COMPUTE_NOC 96 108*4882a593Smuzhiyun #define SM8250_SLAVE_NPU_CP 97 109*4882a593Smuzhiyun #define SM8250_SLAVE_NPU_DPM 98 110*4882a593Smuzhiyun #define SM8250_SLAVE_NPU_INT_DMA_BWMON_CFG 99 111*4882a593Smuzhiyun #define SM8250_SLAVE_NPU_LLM_CFG 100 112*4882a593Smuzhiyun #define SM8250_SLAVE_NPU_TCM 101 113*4882a593Smuzhiyun #define SM8250_SLAVE_OCIMEM 102 114*4882a593Smuzhiyun #define SM8250_SLAVE_PCIE_0 103 115*4882a593Smuzhiyun #define SM8250_SLAVE_PCIE_0_CFG 104 116*4882a593Smuzhiyun #define SM8250_SLAVE_PCIE_1 105 117*4882a593Smuzhiyun #define SM8250_SLAVE_PCIE_1_CFG 106 118*4882a593Smuzhiyun #define SM8250_SLAVE_PCIE_2 107 119*4882a593Smuzhiyun #define SM8250_SLAVE_PCIE_2_CFG 108 120*4882a593Smuzhiyun #define SM8250_SLAVE_PDM 109 121*4882a593Smuzhiyun #define SM8250_SLAVE_PIMEM 110 122*4882a593Smuzhiyun #define SM8250_SLAVE_PIMEM_CFG 111 123*4882a593Smuzhiyun #define SM8250_SLAVE_PRNG 112 124*4882a593Smuzhiyun #define SM8250_SLAVE_QDSS_CFG 113 125*4882a593Smuzhiyun #define SM8250_SLAVE_QDSS_STM 114 126*4882a593Smuzhiyun #define SM8250_SLAVE_QSPI_0 115 127*4882a593Smuzhiyun #define SM8250_SLAVE_QUP_0 116 128*4882a593Smuzhiyun #define SM8250_SLAVE_QUP_1 117 129*4882a593Smuzhiyun #define SM8250_SLAVE_QUP_2 118 130*4882a593Smuzhiyun #define SM8250_SLAVE_RBCPR_CX_CFG 119 131*4882a593Smuzhiyun #define SM8250_SLAVE_RBCPR_MMCX_CFG 120 132*4882a593Smuzhiyun #define SM8250_SLAVE_RBCPR_MX_CFG 121 133*4882a593Smuzhiyun #define SM8250_SLAVE_SDCC_2 122 134*4882a593Smuzhiyun #define SM8250_SLAVE_SDCC_4 123 135*4882a593Smuzhiyun #define SM8250_SLAVE_SERVICE_A1NOC 124 136*4882a593Smuzhiyun #define SM8250_SLAVE_SERVICE_A2NOC 125 137*4882a593Smuzhiyun #define SM8250_SLAVE_SERVICE_CNOC 126 138*4882a593Smuzhiyun #define SM8250_SLAVE_SERVICE_GEM_NOC 127 139*4882a593Smuzhiyun #define SM8250_SLAVE_SERVICE_GEM_NOC_1 128 140*4882a593Smuzhiyun #define SM8250_SLAVE_SERVICE_GEM_NOC_2 129 141*4882a593Smuzhiyun #define SM8250_SLAVE_SERVICE_MNOC 130 142*4882a593Smuzhiyun #define SM8250_SLAVE_SERVICE_NPU_NOC 131 143*4882a593Smuzhiyun #define SM8250_SLAVE_SERVICE_SNOC 132 144*4882a593Smuzhiyun #define SM8250_SLAVE_SNOC_CFG 133 145*4882a593Smuzhiyun #define SM8250_SLAVE_SNOC_GEM_NOC_GC 134 146*4882a593Smuzhiyun #define SM8250_SLAVE_SNOC_GEM_NOC_SF 135 147*4882a593Smuzhiyun #define SM8250_SLAVE_TCSR 136 148*4882a593Smuzhiyun #define SM8250_SLAVE_TCU 137 149*4882a593Smuzhiyun #define SM8250_SLAVE_TLMM_NORTH 138 150*4882a593Smuzhiyun #define SM8250_SLAVE_TLMM_SOUTH 139 151*4882a593Smuzhiyun #define SM8250_SLAVE_TLMM_WEST 140 152*4882a593Smuzhiyun #define SM8250_SLAVE_TSIF 141 153*4882a593Smuzhiyun #define SM8250_SLAVE_UFS_CARD_CFG 142 154*4882a593Smuzhiyun #define SM8250_SLAVE_UFS_MEM_CFG 143 155*4882a593Smuzhiyun #define SM8250_SLAVE_USB3 144 156*4882a593Smuzhiyun #define SM8250_SLAVE_USB3_1 145 157*4882a593Smuzhiyun #define SM8250_SLAVE_VENUS_CFG 146 158*4882a593Smuzhiyun #define SM8250_SLAVE_VSENSE_CTRL_CFG 147 159*4882a593Smuzhiyun #define SM8250_SNOC_CNOC_MAS 148 160*4882a593Smuzhiyun #define SM8250_SNOC_CNOC_SLV 149 161*4882a593Smuzhiyun #define SM8250_MASTER_EPSS_L3_APPS 150 162*4882a593Smuzhiyun #define SM8250_SLAVE_EPSS_L3 151 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun #endif 165