1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2016 Golden Delicious Comp. GmbH&Co. KG
4*4882a593Smuzhiyun * Nikolaus Schaller <hns@goldelico.com>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/i2c.h>
8*4882a593Smuzhiyun #include <linux/iio/iio.h>
9*4882a593Smuzhiyun #include "tsc2007.h"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun struct tsc2007_iio {
12*4882a593Smuzhiyun struct tsc2007 *ts;
13*4882a593Smuzhiyun };
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #define TSC2007_CHAN_IIO(_chan, _name, _type, _chan_info) \
16*4882a593Smuzhiyun { \
17*4882a593Smuzhiyun .datasheet_name = _name, \
18*4882a593Smuzhiyun .type = _type, \
19*4882a593Smuzhiyun .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
20*4882a593Smuzhiyun BIT(_chan_info), \
21*4882a593Smuzhiyun .indexed = 1, \
22*4882a593Smuzhiyun .channel = _chan, \
23*4882a593Smuzhiyun }
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun static const struct iio_chan_spec tsc2007_iio_channel[] = {
26*4882a593Smuzhiyun TSC2007_CHAN_IIO(0, "x", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
27*4882a593Smuzhiyun TSC2007_CHAN_IIO(1, "y", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
28*4882a593Smuzhiyun TSC2007_CHAN_IIO(2, "z1", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
29*4882a593Smuzhiyun TSC2007_CHAN_IIO(3, "z2", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
30*4882a593Smuzhiyun TSC2007_CHAN_IIO(4, "adc", IIO_VOLTAGE, IIO_CHAN_INFO_RAW),
31*4882a593Smuzhiyun TSC2007_CHAN_IIO(5, "rt", IIO_VOLTAGE, IIO_CHAN_INFO_RAW), /* Ohms? */
32*4882a593Smuzhiyun TSC2007_CHAN_IIO(6, "pen", IIO_PRESSURE, IIO_CHAN_INFO_RAW),
33*4882a593Smuzhiyun TSC2007_CHAN_IIO(7, "temp0", IIO_TEMP, IIO_CHAN_INFO_RAW),
34*4882a593Smuzhiyun TSC2007_CHAN_IIO(8, "temp1", IIO_TEMP, IIO_CHAN_INFO_RAW),
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun
tsc2007_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)37*4882a593Smuzhiyun static int tsc2007_read_raw(struct iio_dev *indio_dev,
38*4882a593Smuzhiyun struct iio_chan_spec const *chan,
39*4882a593Smuzhiyun int *val, int *val2, long mask)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun struct tsc2007_iio *iio = iio_priv(indio_dev);
42*4882a593Smuzhiyun struct tsc2007 *tsc = iio->ts;
43*4882a593Smuzhiyun int adc_chan = chan->channel;
44*4882a593Smuzhiyun int ret = 0;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun if (adc_chan >= ARRAY_SIZE(tsc2007_iio_channel))
47*4882a593Smuzhiyun return -EINVAL;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun if (mask != IIO_CHAN_INFO_RAW)
50*4882a593Smuzhiyun return -EINVAL;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun mutex_lock(&tsc->mlock);
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun switch (chan->channel) {
55*4882a593Smuzhiyun case 0:
56*4882a593Smuzhiyun *val = tsc2007_xfer(tsc, READ_X);
57*4882a593Smuzhiyun break;
58*4882a593Smuzhiyun case 1:
59*4882a593Smuzhiyun *val = tsc2007_xfer(tsc, READ_Y);
60*4882a593Smuzhiyun break;
61*4882a593Smuzhiyun case 2:
62*4882a593Smuzhiyun *val = tsc2007_xfer(tsc, READ_Z1);
63*4882a593Smuzhiyun break;
64*4882a593Smuzhiyun case 3:
65*4882a593Smuzhiyun *val = tsc2007_xfer(tsc, READ_Z2);
66*4882a593Smuzhiyun break;
67*4882a593Smuzhiyun case 4:
68*4882a593Smuzhiyun *val = tsc2007_xfer(tsc, (ADC_ON_12BIT | TSC2007_MEASURE_AUX));
69*4882a593Smuzhiyun break;
70*4882a593Smuzhiyun case 5: {
71*4882a593Smuzhiyun struct ts_event tc;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun tc.x = tsc2007_xfer(tsc, READ_X);
74*4882a593Smuzhiyun tc.z1 = tsc2007_xfer(tsc, READ_Z1);
75*4882a593Smuzhiyun tc.z2 = tsc2007_xfer(tsc, READ_Z2);
76*4882a593Smuzhiyun *val = tsc2007_calculate_resistance(tsc, &tc);
77*4882a593Smuzhiyun break;
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun case 6:
80*4882a593Smuzhiyun *val = tsc2007_is_pen_down(tsc);
81*4882a593Smuzhiyun break;
82*4882a593Smuzhiyun case 7:
83*4882a593Smuzhiyun *val = tsc2007_xfer(tsc,
84*4882a593Smuzhiyun (ADC_ON_12BIT | TSC2007_MEASURE_TEMP0));
85*4882a593Smuzhiyun break;
86*4882a593Smuzhiyun case 8:
87*4882a593Smuzhiyun *val = tsc2007_xfer(tsc,
88*4882a593Smuzhiyun (ADC_ON_12BIT | TSC2007_MEASURE_TEMP1));
89*4882a593Smuzhiyun break;
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun /* Prepare for next touch reading - power down ADC, enable PENIRQ */
93*4882a593Smuzhiyun tsc2007_xfer(tsc, PWRDOWN);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun mutex_unlock(&tsc->mlock);
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun ret = IIO_VAL_INT;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun return ret;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun static const struct iio_info tsc2007_iio_info = {
103*4882a593Smuzhiyun .read_raw = tsc2007_read_raw,
104*4882a593Smuzhiyun };
105*4882a593Smuzhiyun
tsc2007_iio_configure(struct tsc2007 * ts)106*4882a593Smuzhiyun int tsc2007_iio_configure(struct tsc2007 *ts)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun struct iio_dev *indio_dev;
109*4882a593Smuzhiyun struct tsc2007_iio *iio;
110*4882a593Smuzhiyun int error;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun indio_dev = devm_iio_device_alloc(&ts->client->dev, sizeof(*iio));
113*4882a593Smuzhiyun if (!indio_dev) {
114*4882a593Smuzhiyun dev_err(&ts->client->dev, "iio_device_alloc failed\n");
115*4882a593Smuzhiyun return -ENOMEM;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun iio = iio_priv(indio_dev);
119*4882a593Smuzhiyun iio->ts = ts;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun indio_dev->name = "tsc2007";
122*4882a593Smuzhiyun indio_dev->info = &tsc2007_iio_info;
123*4882a593Smuzhiyun indio_dev->modes = INDIO_DIRECT_MODE;
124*4882a593Smuzhiyun indio_dev->channels = tsc2007_iio_channel;
125*4882a593Smuzhiyun indio_dev->num_channels = ARRAY_SIZE(tsc2007_iio_channel);
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun error = devm_iio_device_register(&ts->client->dev, indio_dev);
128*4882a593Smuzhiyun if (error) {
129*4882a593Smuzhiyun dev_err(&ts->client->dev,
130*4882a593Smuzhiyun "iio_device_register() failed: %d\n", error);
131*4882a593Smuzhiyun return error;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun return 0;
135*4882a593Smuzhiyun }
136