1*4882a593Smuzhiyun /* drivers/input/touchscreen/gt9xx.h 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * 2010 - 2013 Goodix Technology. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify 6*4882a593Smuzhiyun * it under the terms of the GNU General Public License as published by 7*4882a593Smuzhiyun * the Free Software Foundation; either version 2 of the License, or 8*4882a593Smuzhiyun * (at your option) any later version. 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * This program is distributed in the hope that it will be a reference 11*4882a593Smuzhiyun * to you, when you are integrating the GOODiX's CTP IC into your system, 12*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 13*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14*4882a593Smuzhiyun * General Public License for more details. 15*4882a593Smuzhiyun * 16*4882a593Smuzhiyun */ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #ifndef _GOODIX_GT9XX_H_ 19*4882a593Smuzhiyun #define _GOODIX_GT9XX_H_ 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #include <linux/kernel.h> 22*4882a593Smuzhiyun #include <linux/hrtimer.h> 23*4882a593Smuzhiyun #include <linux/i2c.h> 24*4882a593Smuzhiyun #include <linux/input.h> 25*4882a593Smuzhiyun #include <linux/module.h> 26*4882a593Smuzhiyun #include <linux/delay.h> 27*4882a593Smuzhiyun #include <linux/i2c.h> 28*4882a593Smuzhiyun #include <linux/proc_fs.h> 29*4882a593Smuzhiyun #include <linux/string.h> 30*4882a593Smuzhiyun #include <linux/uaccess.h> 31*4882a593Smuzhiyun #include <linux/vmalloc.h> 32*4882a593Smuzhiyun #include <linux/interrupt.h> 33*4882a593Smuzhiyun #include <linux/io.h> 34*4882a593Smuzhiyun #include <linux/of_gpio.h> 35*4882a593Smuzhiyun #include <linux/gpio.h> 36*4882a593Smuzhiyun #include <linux/slab.h> 37*4882a593Smuzhiyun #include "../tp_suspend.h" 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun //#include <mach/gpio.h> 40*4882a593Smuzhiyun //#include <linux/earlysuspend.h> 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #define CONFIG_8_9 0 43*4882a593Smuzhiyun #define DEBUG_SWITCH 0 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun //***************************PART1:ON/OFF define******************************* 46*4882a593Smuzhiyun #define GTP_CUSTOM_CFG 0 47*4882a593Smuzhiyun #if CONFIG_8_9 48*4882a593Smuzhiyun #define GTP_CHANGE_X2Y 1 49*4882a593Smuzhiyun #define GTP_X_REVERSE_ENABLE 0 50*4882a593Smuzhiyun #define GTP_Y_REVERSE_ENABLE 1 51*4882a593Smuzhiyun #else 52*4882a593Smuzhiyun #define GTP_CHANGE_X2Y 1 53*4882a593Smuzhiyun #define GTP_X_REVERSE_ENABLE 1 54*4882a593Smuzhiyun #define GTP_Y_REVERSE_ENABLE 0 55*4882a593Smuzhiyun #endif 56*4882a593Smuzhiyun #define GTP_DRIVER_SEND_CFG 1 57*4882a593Smuzhiyun #define GTP_HAVE_TOUCH_KEY 0 58*4882a593Smuzhiyun #define GTP_POWER_CTRL_SLEEP 0 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun #if defined(CONFIG_CHROME_PLATFORMS) 61*4882a593Smuzhiyun #define GTP_ICS_SLOT_REPORT 1 62*4882a593Smuzhiyun #else 63*4882a593Smuzhiyun #define GTP_ICS_SLOT_REPORT 0 64*4882a593Smuzhiyun #endif 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun #define GTP_AUTO_UPDATE 0 // auto update fw by .bin file as default 67*4882a593Smuzhiyun #define GTP_HEADER_FW_UPDATE 0 // auto update fw by gtp_default_FW in gt9xx_firmware.h, function together with GTP_AUTO_UPDATE 68*4882a593Smuzhiyun #define GTP_AUTO_UPDATE_CFG 0 // auto update config by .cfg file, function together with GTP_AUTO_UPDATE 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun #define GTP_COMPATIBLE_MODE 1 /* compatible with GT9XXF */ 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun #define GTP_CREATE_WR_NODE 0 73*4882a593Smuzhiyun #define GTP_ESD_PROTECT 0 // esd protection with a cycle of 2 seconds 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun #define GTP_WITH_PEN 0 76*4882a593Smuzhiyun #define GTP_PEN_HAVE_BUTTON 0 // active pen has buttons, function together with GTP_WITH_PEN 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun #define GTP_GESTURE_WAKEUP 0 // gesture wakeup 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun #define GTP_DEBUG_ON 1 81*4882a593Smuzhiyun #define GTP_DEBUG_ARRAY_ON 0 82*4882a593Smuzhiyun #define GTP_DEBUG_FUNC_ON 0 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun /* init use fixed clk num */ 85*4882a593Smuzhiyun /* if open, u8 p_main_clk[6] = {69,69,69,69,69,167}; */ 86*4882a593Smuzhiyun #define GTP_USE_FIXED_CLK 1 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun #define PEN_DOWN 1 89*4882a593Smuzhiyun #define PEN_RELEASE 0 90*4882a593Smuzhiyun #define PEN_DOWN_UP 2 //fjp 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun #if GTP_COMPATIBLE_MODE 93*4882a593Smuzhiyun typedef enum 94*4882a593Smuzhiyun { 95*4882a593Smuzhiyun CHIP_TYPE_GT9 = 0, 96*4882a593Smuzhiyun CHIP_TYPE_GT9F = 1, 97*4882a593Smuzhiyun CHIP_TYPE_GT9110 = 2, 98*4882a593Smuzhiyun } CHIP_TYPE_T; 99*4882a593Smuzhiyun #endif 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun struct goodix_ts_data { 102*4882a593Smuzhiyun spinlock_t irq_lock; 103*4882a593Smuzhiyun struct i2c_client *client; 104*4882a593Smuzhiyun struct input_dev *input_dev; 105*4882a593Smuzhiyun struct hrtimer timer; 106*4882a593Smuzhiyun struct work_struct work; 107*4882a593Smuzhiyun //struct early_suspend early_suspend; 108*4882a593Smuzhiyun s32 irq_is_disable; 109*4882a593Smuzhiyun s32 use_irq; 110*4882a593Smuzhiyun u16 abs_x_max; 111*4882a593Smuzhiyun u16 abs_y_max; 112*4882a593Smuzhiyun u8 max_touch_num; 113*4882a593Smuzhiyun u8 int_trigger_type; 114*4882a593Smuzhiyun u8 green_wake_mode; 115*4882a593Smuzhiyun u8 enter_update; 116*4882a593Smuzhiyun u8 gtp_is_suspend; 117*4882a593Smuzhiyun u8 gtp_rawdiff_mode; 118*4882a593Smuzhiyun u8 gtp_cfg_len; 119*4882a593Smuzhiyun u8 fixed_cfg; 120*4882a593Smuzhiyun u8 fw_error; 121*4882a593Smuzhiyun u8 pnl_init_error; 122*4882a593Smuzhiyun u8 cfg_file_num; 123*4882a593Smuzhiyun //add struct tp_device by Sam 124*4882a593Smuzhiyun struct tp_device tp; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun //add by Daniel(yc) 127*4882a593Smuzhiyun int irq; 128*4882a593Smuzhiyun int irq_pin; 129*4882a593Smuzhiyun int pwr_pin; 130*4882a593Smuzhiyun int rst_pin; 131*4882a593Smuzhiyun int tp_select_pin; 132*4882a593Smuzhiyun int rst_val; 133*4882a593Smuzhiyun u8 pendown; 134*4882a593Smuzhiyun unsigned long irq_flags; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun #if GTP_WITH_PEN 137*4882a593Smuzhiyun struct input_dev *pen_dev; 138*4882a593Smuzhiyun #endif 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun #if GTP_ESD_PROTECT 141*4882a593Smuzhiyun spinlock_t esd_lock; 142*4882a593Smuzhiyun u8 esd_running; 143*4882a593Smuzhiyun s32 clk_tick_cnt; 144*4882a593Smuzhiyun #endif 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun #if GTP_COMPATIBLE_MODE 147*4882a593Smuzhiyun u16 bak_ref_len; 148*4882a593Smuzhiyun s32 ref_chk_fs_times; 149*4882a593Smuzhiyun s32 clk_chk_fs_times; 150*4882a593Smuzhiyun CHIP_TYPE_T chip_type; 151*4882a593Smuzhiyun u8 rqst_processing; 152*4882a593Smuzhiyun u8 is_950; 153*4882a593Smuzhiyun #endif 154*4882a593Smuzhiyun struct regulator *tp_regulator; 155*4882a593Smuzhiyun }; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun extern u16 show_len; 158*4882a593Smuzhiyun extern u16 total_len; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun //*************************** PART2:TODO define ********************************** 162*4882a593Smuzhiyun // STEP_1(REQUIRED): Define Configuration Information Group(s) 163*4882a593Smuzhiyun // Sensor_ID Map: 164*4882a593Smuzhiyun /* sensor_opt1 sensor_opt2 Sensor_ID 165*4882a593Smuzhiyun GND GND 0 166*4882a593Smuzhiyun VDDIO GND 1 167*4882a593Smuzhiyun NC GND 2 168*4882a593Smuzhiyun GND NC/300K 3 169*4882a593Smuzhiyun VDDIO NC/300K 4 170*4882a593Smuzhiyun NC NC/300K 5 171*4882a593Smuzhiyun */ 172*4882a593Smuzhiyun // TODO: define your own default or for Sensor_ID == 0 config here. 173*4882a593Smuzhiyun // The predefined one is just a sample config, which is not suitable for your tp in most cases. 174*4882a593Smuzhiyun /* 175*4882a593Smuzhiyun #define CTP_CFG_GROUP1 {\ 176*4882a593Smuzhiyun 0x46,0xE0,0x01,0x56,0x03,0x02,0xF1,0x01,0x02,0x44,\ 177*4882a593Smuzhiyun 0x00,0x04,0x46,0x32,0x03,0x00,0x00,0x00,0x00,0x00,\ 178*4882a593Smuzhiyun 0x00,0x11,0x04,0x26,0x01,0x74,0x77,0x05,0x00,0x88,\ 179*4882a593Smuzhiyun 0x64,0x0F,0xD0,0x07,0x05,0x07,0x00,0xDA,0x01,0x1D,\ 180*4882a593Smuzhiyun 0x00,0x01,0x08,0x08,0x33,0x33,0x5D,0xAA,0x00,0x00,\ 181*4882a593Smuzhiyun 0x00,0x32,0x96,0x54,0xC5,0x03,0x02,0x00,0x00,0x01,\ 182*4882a593Smuzhiyun 0xC8,0x38,0x00,0xA0,0x45,0x00,0x91,0x57,0x00,0x80,\ 183*4882a593Smuzhiyun 0x6C,0x00,0x61,0x87,0x00,0x61,0x10,0x0B,0x08,0x00,\ 184*4882a593Smuzhiyun 0x51,0x40,0x30,0xFF,0xFF,0x00,0x04,0x00,0x00,0x1E,\ 185*4882a593Smuzhiyun 0x0A,0x00,0x06,0x0B,0x09,0x0F,0x08,0x07,0x01,0x03,\ 186*4882a593Smuzhiyun 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ 187*4882a593Smuzhiyun 0x00,0x00,0x00,0x03,0x02,0x05,0x04,0x07,0x06,0x09,\ 188*4882a593Smuzhiyun 0x0C,0x0D,0x0E,0x0F,0x10,0x11,0x12,0x13,0xFF,0xFF,\ 189*4882a593Smuzhiyun 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x00,\ 190*4882a593Smuzhiyun 0x00,0x00,0x08,0x09,0x0A,0x0D,0x0E,0xFF,0xFF,0xFF,\ 191*4882a593Smuzhiyun 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,\ 192*4882a593Smuzhiyun 0x00,0x00,0x00,0xFF,0x0B,0x0C,0xFF,0xFF,0xFF,0xFF,\ 193*4882a593Smuzhiyun 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,\ 194*4882a593Smuzhiyun 0xFF,0xFF,0xFF,0xFF,0x6C,0xB2,0xB2,0x6C,0xFF,0x00,\ 195*4882a593Smuzhiyun 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x80,0x80,\ 196*4882a593Smuzhiyun 0x8C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ 197*4882a593Smuzhiyun 0x08,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,\ 198*4882a593Smuzhiyun 0x00,0x00,0x00,0x00,0x00,0x00,0xF6,0x01\ 199*4882a593Smuzhiyun } 200*4882a593Smuzhiyun */ 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun /* 203*4882a593Smuzhiyun //WGJ10187_GT9271_Config_20140623_104014_0X41.cfg 204*4882a593Smuzhiyun #define CTP_CFG_GROUP1 {\ 205*4882a593Smuzhiyun 0x41,0xB0,0x04,0x80,0x07,0x05,0xF5,0x00,0x01,0x08,0x28,0x0F,0x64,0x32,0x03, \ 206*4882a593Smuzhiyun 0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x16,0x19,0x1E,0x14,0x8F,0x2F,0x99, \ 207*4882a593Smuzhiyun 0x41,0x43,0x15,0x0E,0x00,0x00,0x00,0x22,0x03,0x1D,0x00,0x00,0x00,0x00,0x00, \ 208*4882a593Smuzhiyun 0x00,0x00,0x00,0x00,0x06,0x00,0x2D,0x62,0x94,0xC5,0x02,0x07,0x17,0x00,0x04, \ 209*4882a593Smuzhiyun 0x92,0x30,0x00,0x86,0x39,0x00,0x7F,0x42,0x00,0x79,0x4D,0x00,0x74,0x5A,0x00, \ 210*4882a593Smuzhiyun 0x74,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, \ 211*4882a593Smuzhiyun 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, \ 212*4882a593Smuzhiyun 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x17,0x16,0x15,0x14,0x11,0x10,0x0F,0x0E, \ 213*4882a593Smuzhiyun 0x0D,0x0C,0x09,0x08,0x07,0x06,0x05,0x04,0x01,0x00,0xFF,0xFF,0x00,0x00,0x00, \ 214*4882a593Smuzhiyun 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x04,0x06,0x07,0x08,0x0A,0x0C, \ 215*4882a593Smuzhiyun 0x0D,0x0F,0x10,0x11,0x12,0x13,0x14,0x29,0x28,0x27,0x26,0x25,0x24,0x23,0x22, \ 216*4882a593Smuzhiyun 0x21,0x20,0x1F,0x1E,0x1C,0x1B,0x19,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00, \ 217*4882a593Smuzhiyun 0x00,0x00,0x00,0x00,0x3D,0x01 \ 218*4882a593Smuzhiyun } 219*4882a593Smuzhiyun */ 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun //WGJ10187_GT9271_Config_20140623_104014_0X41.cfg 222*4882a593Smuzhiyun #define CTP_CFG_GROUP1 {\ 223*4882a593Smuzhiyun 0x41,0x80,0x07,0xB0,0x04,0x0A,0x05,0x00,0x01,0x08,0x28,0x0F,0x50,0x32,0x03, \ 224*4882a593Smuzhiyun 0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x8F,0x2F,0x99, \ 225*4882a593Smuzhiyun 0x2B,0x2D,0x31,0x0D,0x00,0x00,0x00,0x01,0x03,0x1D,0x00,0x00,0x00,0x00,0x00, \ 226*4882a593Smuzhiyun 0x00,0x00,0x00,0x00,0x00,0x00,0x23,0x55,0x94,0xC5,0x02,0x07,0x00,0x00,0x00, \ 227*4882a593Smuzhiyun 0x8C,0x26,0x00,0x7B,0x2D,0x00,0x6C,0x36,0x00,0x61,0x41,0x00,0x58,0x4E,0x00, \ 228*4882a593Smuzhiyun 0x58,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, \ 229*4882a593Smuzhiyun 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, \ 230*4882a593Smuzhiyun 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x04,0x05,0x06,0x07,0x08,0x09, \ 231*4882a593Smuzhiyun 0x0C,0x0D,0x0E,0x0F,0x10,0x11,0x14,0x15,0x16,0x17,0xFF,0xFF,0x00,0x00,0x00, \ 232*4882a593Smuzhiyun 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x13,0x12,0x11,0x10,0x0F,0x0D,0x0C, \ 233*4882a593Smuzhiyun 0x0A,0x08,0x07,0x06,0x04,0x02,0x00,0x19,0x1B,0x1C,0x1E,0x1F,0x20,0x21,0x22, \ 234*4882a593Smuzhiyun 0x23,0x24,0x25,0x26,0x27,0x28,0x29,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00, \ 235*4882a593Smuzhiyun 0x00,0x00,0x00,0x00,0xB5,0x01 \ 236*4882a593Smuzhiyun } 237*4882a593Smuzhiyun 238*4882a593Smuzhiyun // TODO: define your config for Sensor_ID == 1 here, if needed 239*4882a593Smuzhiyun #define CTP_CFG_GROUP2 {\ 240*4882a593Smuzhiyun } 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun // TODO: define your config for Sensor_ID == 2 here, if needed 243*4882a593Smuzhiyun #define CTP_CFG_GROUP3 {\ 244*4882a593Smuzhiyun } 245*4882a593Smuzhiyun 246*4882a593Smuzhiyun // TODO: define your config for Sensor_ID == 3 here, if needed 247*4882a593Smuzhiyun #define CTP_CFG_GROUP4 {\ 248*4882a593Smuzhiyun } 249*4882a593Smuzhiyun // TODO: define your config for Sensor_ID == 4 here, if needed 250*4882a593Smuzhiyun #define CTP_CFG_GROUP5 {\ 251*4882a593Smuzhiyun } 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun // TODO: define your config for Sensor_ID == 5 here, if needed 254*4882a593Smuzhiyun #define CTP_CFG_GROUP6 {\ 255*4882a593Smuzhiyun } 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun // STEP_2(REQUIRED): Customize your I/O ports & I/O operations 258*4882a593Smuzhiyun /* 259*4882a593Smuzhiyun #define GTP_RST_PORT S5PV210_GPJ3(6) 260*4882a593Smuzhiyun #define GTP_INT_PORT S5PV210_GPH1(3) 261*4882a593Smuzhiyun #define GTP_INT_IRQ gpio_to_irq(GTP_INT_PORT) 262*4882a593Smuzhiyun #define GTP_INT_CFG S3C_GPIO_SFN(0xF) 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun #define GTP_GPIO_AS_INPUT(pin) do{\ 265*4882a593Smuzhiyun gpio_direction_input(pin);\ 266*4882a593Smuzhiyun s3c_gpio_setpull(pin, S3C_GPIO_PULL_NONE);\ 267*4882a593Smuzhiyun }while(0) 268*4882a593Smuzhiyun #define GTP_GPIO_AS_INT(pin) do{\ 269*4882a593Smuzhiyun GTP_GPIO_AS_INPUT(pin);\ 270*4882a593Smuzhiyun s3c_gpio_cfgpin(pin, GTP_INT_CFG);\ 271*4882a593Smuzhiyun }while(0) 272*4882a593Smuzhiyun */ 273*4882a593Smuzhiyun #define GTP_GPIO_GET_VALUE(pin) gpio_get_value(pin) 274*4882a593Smuzhiyun #define GTP_GPIO_OUTPUT(pin,level) gpio_direction_output(pin,level) 275*4882a593Smuzhiyun #define GTP_GPIO_REQUEST(pin, label) gpio_request(pin, label) 276*4882a593Smuzhiyun #define GTP_GPIO_FREE(pin) gpio_free(pin) 277*4882a593Smuzhiyun #define GTP_IRQ_TAB {IRQ_TYPE_EDGE_RISING, IRQ_TYPE_EDGE_FALLING, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH} 278*4882a593Smuzhiyun 279*4882a593Smuzhiyun // STEP_3(optional): Specify your special config info if needed 280*4882a593Smuzhiyun #if GTP_CUSTOM_CFG 281*4882a593Smuzhiyun #define GTP_MAX_HEIGHT 800 282*4882a593Smuzhiyun #define GTP_MAX_WIDTH 480 283*4882a593Smuzhiyun #define GTP_INT_TRIGGER 0 // 0: Rising 1: Falling 284*4882a593Smuzhiyun #else 285*4882a593Smuzhiyun #define GTP_MAX_HEIGHT 4096 286*4882a593Smuzhiyun #define GTP_MAX_WIDTH 4096 287*4882a593Smuzhiyun #define GTP_INT_TRIGGER 1 288*4882a593Smuzhiyun #endif 289*4882a593Smuzhiyun #define GTP_MAX_TOUCH 10 290*4882a593Smuzhiyun 291*4882a593Smuzhiyun // STEP_4(optional): If keys are available and reported as keys, config your key info here 292*4882a593Smuzhiyun #if GTP_HAVE_TOUCH_KEY 293*4882a593Smuzhiyun #define GTP_KEY_TAB {KEY_MENU, KEY_HOME, KEY_BACK} 294*4882a593Smuzhiyun #endif 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun //***************************PART3:OTHER define********************************* 297*4882a593Smuzhiyun #define GTP_DRIVER_VERSION "V2.2<2014/01/14>" 298*4882a593Smuzhiyun #define GTP_I2C_NAME "Goodix-TS" 299*4882a593Smuzhiyun #define GT91XX_CONFIG_PROC_FILE "gt9xx_config" 300*4882a593Smuzhiyun #define GTP_POLL_TIME 10 301*4882a593Smuzhiyun #define GTP_ADDR_LENGTH 2 302*4882a593Smuzhiyun #define GTP_CONFIG_MIN_LENGTH 186 303*4882a593Smuzhiyun #define GTP_CONFIG_MAX_LENGTH 240 304*4882a593Smuzhiyun #define FAIL 0 305*4882a593Smuzhiyun #define SUCCESS 1 306*4882a593Smuzhiyun #define SWITCH_OFF 0 307*4882a593Smuzhiyun #define SWITCH_ON 1 308*4882a593Smuzhiyun 309*4882a593Smuzhiyun //******************** For GT9XXF Start **********************// 310*4882a593Smuzhiyun #define GTP_REG_BAK_REF 0x99D0 311*4882a593Smuzhiyun #define GTP_REG_MAIN_CLK 0x8020 312*4882a593Smuzhiyun #define GTP_REG_CHIP_TYPE 0x8000 313*4882a593Smuzhiyun #define GTP_REG_HAVE_KEY 0x804E 314*4882a593Smuzhiyun #define GTP_REG_MATRIX_DRVNUM 0x8069 315*4882a593Smuzhiyun #define GTP_REG_MATRIX_SENNUM 0x806A 316*4882a593Smuzhiyun 317*4882a593Smuzhiyun #define GTP_FL_FW_BURN 0x00 318*4882a593Smuzhiyun #define GTP_FL_ESD_RECOVERY 0x01 319*4882a593Smuzhiyun #define GTP_FL_READ_REPAIR 0x02 320*4882a593Smuzhiyun 321*4882a593Smuzhiyun #define GTP_BAK_REF_SEND 0 322*4882a593Smuzhiyun #define GTP_BAK_REF_STORE 1 323*4882a593Smuzhiyun #define CFG_LOC_DRVA_NUM 29 324*4882a593Smuzhiyun #define CFG_LOC_DRVB_NUM 30 325*4882a593Smuzhiyun #define CFG_LOC_SENS_NUM 31 326*4882a593Smuzhiyun 327*4882a593Smuzhiyun #define GTP_CHK_FW_MAX 40 328*4882a593Smuzhiyun #define GTP_CHK_FS_MNT_MAX 300 329*4882a593Smuzhiyun #define GTP_BAK_REF_PATH "/data/gtp_ref.bin" 330*4882a593Smuzhiyun #define GTP_MAIN_CLK_PATH "/data/gtp_clk.bin" 331*4882a593Smuzhiyun #define GTP_RQST_CONFIG 0x01 332*4882a593Smuzhiyun #define GTP_RQST_BAK_REF 0x02 333*4882a593Smuzhiyun #define GTP_RQST_RESET 0x03 334*4882a593Smuzhiyun #define GTP_RQST_MAIN_CLOCK 0x04 335*4882a593Smuzhiyun #define GTP_RQST_RESPONDED 0x00 336*4882a593Smuzhiyun #define GTP_RQST_IDLE 0xFF 337*4882a593Smuzhiyun 338*4882a593Smuzhiyun //******************** For GT9XXF End **********************// 339*4882a593Smuzhiyun // Registers define 340*4882a593Smuzhiyun #define GTP_READ_COOR_ADDR 0x814E 341*4882a593Smuzhiyun #define GTP_REG_SLEEP 0x8040 342*4882a593Smuzhiyun #define GTP_REG_SENSOR_ID 0x814A 343*4882a593Smuzhiyun #define GTP_REG_CONFIG_DATA 0x8047 344*4882a593Smuzhiyun #define GTP_REG_VERSION 0x8140 345*4882a593Smuzhiyun 346*4882a593Smuzhiyun #define RESOLUTION_LOC 3 347*4882a593Smuzhiyun #define TRIGGER_LOC 8 348*4882a593Smuzhiyun 349*4882a593Smuzhiyun #define CFG_GROUP_LEN(p_cfg_grp) (sizeof(p_cfg_grp) / sizeof(p_cfg_grp[0])) 350*4882a593Smuzhiyun 351*4882a593Smuzhiyun // Log define 352*4882a593Smuzhiyun #define GTP_ERROR(fmt,arg...) printk("<<-GTP-ERROR->> "fmt"\n",##arg) 353*4882a593Smuzhiyun #if DEBUG_SWITCH 354*4882a593Smuzhiyun #define GTP_INFO(fmt,arg...) printk("<<-GTP-INFO->> "fmt"\n",##arg) 355*4882a593Smuzhiyun #define GTP_DEBUG(fmt,arg...) do{\ 356*4882a593Smuzhiyun if(GTP_DEBUG_ON)\ 357*4882a593Smuzhiyun printk("<<-GTP-DEBUG->> [%d]"fmt"\n",__LINE__, ##arg);\ 358*4882a593Smuzhiyun }while(0) 359*4882a593Smuzhiyun #define GTP_DEBUG_ARRAY(array, num) do{\ 360*4882a593Smuzhiyun s32 i;\ 361*4882a593Smuzhiyun u8* a = array;\ 362*4882a593Smuzhiyun if(GTP_DEBUG_ARRAY_ON)\ 363*4882a593Smuzhiyun {\ 364*4882a593Smuzhiyun printk("<<-GTP-DEBUG-ARRAY->>\n");\ 365*4882a593Smuzhiyun for (i = 0; i < (num); i++)\ 366*4882a593Smuzhiyun {\ 367*4882a593Smuzhiyun printk("%02x ", (a)[i]);\ 368*4882a593Smuzhiyun if ((i + 1 ) %10 == 0)\ 369*4882a593Smuzhiyun {\ 370*4882a593Smuzhiyun printk("\n");\ 371*4882a593Smuzhiyun }\ 372*4882a593Smuzhiyun }\ 373*4882a593Smuzhiyun printk("\n");\ 374*4882a593Smuzhiyun }\ 375*4882a593Smuzhiyun }while(0) 376*4882a593Smuzhiyun #define GTP_DEBUG_FUNC() do{\ 377*4882a593Smuzhiyun if(GTP_DEBUG_FUNC_ON)\ 378*4882a593Smuzhiyun printk(" <<-GTP-FUNC->> Func:%s@Line:%d\n",__func__,__LINE__);\ 379*4882a593Smuzhiyun }while(0) 380*4882a593Smuzhiyun 381*4882a593Smuzhiyun #else 382*4882a593Smuzhiyun #define GTP_INFO(fmt,arg...) 383*4882a593Smuzhiyun #define GTP_DEBUG(fmt,arg...) 384*4882a593Smuzhiyun #define GTP_DEBUG_ARRAY(array, num) 385*4882a593Smuzhiyun #define GTP_DEBUG_FUNC() 386*4882a593Smuzhiyun #endif 387*4882a593Smuzhiyun #define GTP_SWAP(x, y) do{\ 388*4882a593Smuzhiyun typeof(x) z = x;\ 389*4882a593Smuzhiyun x = y;\ 390*4882a593Smuzhiyun y = z;\ 391*4882a593Smuzhiyun }while (0) 392*4882a593Smuzhiyun 393*4882a593Smuzhiyun //*****************************End of Part III******************************** 394*4882a593Smuzhiyun #define TRUE 1 395*4882a593Smuzhiyun #define FALSE 0 396*4882a593Smuzhiyun 397*4882a593Smuzhiyun #endif /* _GOODIX_GT9XX_H_ */ 398