1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * AD7879/AD7889 based touchscreen and GPIO driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2008-2010 Michael Hennerich, Analog Devices Inc.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * History:
8*4882a593Smuzhiyun * Copyright (c) 2005 David Brownell
9*4882a593Smuzhiyun * Copyright (c) 2006 Nokia Corporation
10*4882a593Smuzhiyun * Various changes: Imre Deak <imre.deak@nokia.com>
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * Using code from:
13*4882a593Smuzhiyun * - corgi_ts.c
14*4882a593Smuzhiyun * Copyright (C) 2004-2005 Richard Purdie
15*4882a593Smuzhiyun * - omap_ts.[hc], ads7846.h, ts_osk.c
16*4882a593Smuzhiyun * Copyright (C) 2002 MontaVista Software
17*4882a593Smuzhiyun * Copyright (C) 2004 Texas Instruments
18*4882a593Smuzhiyun * Copyright (C) 2005 Dirk Behme
19*4882a593Smuzhiyun * - ad7877.c
20*4882a593Smuzhiyun * Copyright (C) 2006-2008 Analog Devices Inc.
21*4882a593Smuzhiyun */
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #include <linux/device.h>
24*4882a593Smuzhiyun #include <linux/delay.h>
25*4882a593Smuzhiyun #include <linux/input.h>
26*4882a593Smuzhiyun #include <linux/interrupt.h>
27*4882a593Smuzhiyun #include <linux/irq.h>
28*4882a593Smuzhiyun #include <linux/property.h>
29*4882a593Smuzhiyun #include <linux/regmap.h>
30*4882a593Smuzhiyun #include <linux/slab.h>
31*4882a593Smuzhiyun #include <linux/gpio/driver.h>
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #include <linux/input/touchscreen.h>
34*4882a593Smuzhiyun #include <linux/module.h>
35*4882a593Smuzhiyun #include "ad7879.h"
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #define AD7879_REG_ZEROS 0
38*4882a593Smuzhiyun #define AD7879_REG_CTRL1 1
39*4882a593Smuzhiyun #define AD7879_REG_CTRL2 2
40*4882a593Smuzhiyun #define AD7879_REG_CTRL3 3
41*4882a593Smuzhiyun #define AD7879_REG_AUX1HIGH 4
42*4882a593Smuzhiyun #define AD7879_REG_AUX1LOW 5
43*4882a593Smuzhiyun #define AD7879_REG_TEMP1HIGH 6
44*4882a593Smuzhiyun #define AD7879_REG_TEMP1LOW 7
45*4882a593Smuzhiyun #define AD7879_REG_XPLUS 8
46*4882a593Smuzhiyun #define AD7879_REG_YPLUS 9
47*4882a593Smuzhiyun #define AD7879_REG_Z1 10
48*4882a593Smuzhiyun #define AD7879_REG_Z2 11
49*4882a593Smuzhiyun #define AD7879_REG_AUXVBAT 12
50*4882a593Smuzhiyun #define AD7879_REG_TEMP 13
51*4882a593Smuzhiyun #define AD7879_REG_REVID 14
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun /* Control REG 1 */
54*4882a593Smuzhiyun #define AD7879_TMR(x) ((x & 0xFF) << 0)
55*4882a593Smuzhiyun #define AD7879_ACQ(x) ((x & 0x3) << 8)
56*4882a593Smuzhiyun #define AD7879_MODE_NOC (0 << 10) /* Do not convert */
57*4882a593Smuzhiyun #define AD7879_MODE_SCC (1 << 10) /* Single channel conversion */
58*4882a593Smuzhiyun #define AD7879_MODE_SEQ0 (2 << 10) /* Sequence 0 in Slave Mode */
59*4882a593Smuzhiyun #define AD7879_MODE_SEQ1 (3 << 10) /* Sequence 1 in Master Mode */
60*4882a593Smuzhiyun #define AD7879_MODE_INT (1 << 15) /* PENIRQ disabled INT enabled */
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun /* Control REG 2 */
63*4882a593Smuzhiyun #define AD7879_FCD(x) ((x & 0x3) << 0)
64*4882a593Smuzhiyun #define AD7879_RESET (1 << 4)
65*4882a593Smuzhiyun #define AD7879_MFS(x) ((x & 0x3) << 5)
66*4882a593Smuzhiyun #define AD7879_AVG(x) ((x & 0x3) << 7)
67*4882a593Smuzhiyun #define AD7879_SER (1 << 9) /* non-differential */
68*4882a593Smuzhiyun #define AD7879_DFR (0 << 9) /* differential */
69*4882a593Smuzhiyun #define AD7879_GPIOPOL (1 << 10)
70*4882a593Smuzhiyun #define AD7879_GPIODIR (1 << 11)
71*4882a593Smuzhiyun #define AD7879_GPIO_DATA (1 << 12)
72*4882a593Smuzhiyun #define AD7879_GPIO_EN (1 << 13)
73*4882a593Smuzhiyun #define AD7879_PM(x) ((x & 0x3) << 14)
74*4882a593Smuzhiyun #define AD7879_PM_SHUTDOWN (0)
75*4882a593Smuzhiyun #define AD7879_PM_DYN (1)
76*4882a593Smuzhiyun #define AD7879_PM_FULLON (2)
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun /* Control REG 3 */
79*4882a593Smuzhiyun #define AD7879_TEMPMASK_BIT (1<<15)
80*4882a593Smuzhiyun #define AD7879_AUXVBATMASK_BIT (1<<14)
81*4882a593Smuzhiyun #define AD7879_INTMODE_BIT (1<<13)
82*4882a593Smuzhiyun #define AD7879_GPIOALERTMASK_BIT (1<<12)
83*4882a593Smuzhiyun #define AD7879_AUXLOW_BIT (1<<11)
84*4882a593Smuzhiyun #define AD7879_AUXHIGH_BIT (1<<10)
85*4882a593Smuzhiyun #define AD7879_TEMPLOW_BIT (1<<9)
86*4882a593Smuzhiyun #define AD7879_TEMPHIGH_BIT (1<<8)
87*4882a593Smuzhiyun #define AD7879_YPLUS_BIT (1<<7)
88*4882a593Smuzhiyun #define AD7879_XPLUS_BIT (1<<6)
89*4882a593Smuzhiyun #define AD7879_Z1_BIT (1<<5)
90*4882a593Smuzhiyun #define AD7879_Z2_BIT (1<<4)
91*4882a593Smuzhiyun #define AD7879_AUX_BIT (1<<3)
92*4882a593Smuzhiyun #define AD7879_VBAT_BIT (1<<2)
93*4882a593Smuzhiyun #define AD7879_TEMP_BIT (1<<1)
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun enum {
96*4882a593Smuzhiyun AD7879_SEQ_YPOS = 0,
97*4882a593Smuzhiyun AD7879_SEQ_XPOS = 1,
98*4882a593Smuzhiyun AD7879_SEQ_Z1 = 2,
99*4882a593Smuzhiyun AD7879_SEQ_Z2 = 3,
100*4882a593Smuzhiyun AD7879_NR_SENSE = 4,
101*4882a593Smuzhiyun };
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun #define MAX_12BIT ((1<<12)-1)
104*4882a593Smuzhiyun #define TS_PEN_UP_TIMEOUT msecs_to_jiffies(50)
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun struct ad7879 {
107*4882a593Smuzhiyun struct regmap *regmap;
108*4882a593Smuzhiyun struct device *dev;
109*4882a593Smuzhiyun struct input_dev *input;
110*4882a593Smuzhiyun struct timer_list timer;
111*4882a593Smuzhiyun #ifdef CONFIG_GPIOLIB
112*4882a593Smuzhiyun struct gpio_chip gc;
113*4882a593Smuzhiyun struct mutex mutex;
114*4882a593Smuzhiyun #endif
115*4882a593Smuzhiyun unsigned int irq;
116*4882a593Smuzhiyun bool disabled; /* P: input->mutex */
117*4882a593Smuzhiyun bool suspended; /* P: input->mutex */
118*4882a593Smuzhiyun bool swap_xy;
119*4882a593Smuzhiyun u16 conversion_data[AD7879_NR_SENSE];
120*4882a593Smuzhiyun char phys[32];
121*4882a593Smuzhiyun u8 first_conversion_delay;
122*4882a593Smuzhiyun u8 acquisition_time;
123*4882a593Smuzhiyun u8 averaging;
124*4882a593Smuzhiyun u8 pen_down_acc_interval;
125*4882a593Smuzhiyun u8 median;
126*4882a593Smuzhiyun u16 x_plate_ohms;
127*4882a593Smuzhiyun u16 cmd_crtl1;
128*4882a593Smuzhiyun u16 cmd_crtl2;
129*4882a593Smuzhiyun u16 cmd_crtl3;
130*4882a593Smuzhiyun int x;
131*4882a593Smuzhiyun int y;
132*4882a593Smuzhiyun int Rt;
133*4882a593Smuzhiyun };
134*4882a593Smuzhiyun
ad7879_read(struct ad7879 * ts,u8 reg)135*4882a593Smuzhiyun static int ad7879_read(struct ad7879 *ts, u8 reg)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun unsigned int val;
138*4882a593Smuzhiyun int error;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun error = regmap_read(ts->regmap, reg, &val);
141*4882a593Smuzhiyun if (error) {
142*4882a593Smuzhiyun dev_err(ts->dev, "failed to read register %#02x: %d\n",
143*4882a593Smuzhiyun reg, error);
144*4882a593Smuzhiyun return error;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun return val;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
ad7879_write(struct ad7879 * ts,u8 reg,u16 val)150*4882a593Smuzhiyun static int ad7879_write(struct ad7879 *ts, u8 reg, u16 val)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun int error;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun error = regmap_write(ts->regmap, reg, val);
155*4882a593Smuzhiyun if (error) {
156*4882a593Smuzhiyun dev_err(ts->dev,
157*4882a593Smuzhiyun "failed to write %#04x to register %#02x: %d\n",
158*4882a593Smuzhiyun val, reg, error);
159*4882a593Smuzhiyun return error;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun return 0;
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
ad7879_report(struct ad7879 * ts)165*4882a593Smuzhiyun static int ad7879_report(struct ad7879 *ts)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun struct input_dev *input_dev = ts->input;
168*4882a593Smuzhiyun unsigned Rt;
169*4882a593Smuzhiyun u16 x, y, z1, z2;
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun x = ts->conversion_data[AD7879_SEQ_XPOS] & MAX_12BIT;
172*4882a593Smuzhiyun y = ts->conversion_data[AD7879_SEQ_YPOS] & MAX_12BIT;
173*4882a593Smuzhiyun z1 = ts->conversion_data[AD7879_SEQ_Z1] & MAX_12BIT;
174*4882a593Smuzhiyun z2 = ts->conversion_data[AD7879_SEQ_Z2] & MAX_12BIT;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun if (ts->swap_xy)
177*4882a593Smuzhiyun swap(x, y);
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun /*
180*4882a593Smuzhiyun * The samples processed here are already preprocessed by the AD7879.
181*4882a593Smuzhiyun * The preprocessing function consists of a median and an averaging
182*4882a593Smuzhiyun * filter. The combination of these two techniques provides a robust
183*4882a593Smuzhiyun * solution, discarding the spurious noise in the signal and keeping
184*4882a593Smuzhiyun * only the data of interest. The size of both filters is
185*4882a593Smuzhiyun * programmable. (dev.platform_data, see linux/platform_data/ad7879.h)
186*4882a593Smuzhiyun * Other user-programmable conversion controls include variable
187*4882a593Smuzhiyun * acquisition time, and first conversion delay. Up to 16 averages can
188*4882a593Smuzhiyun * be taken per conversion.
189*4882a593Smuzhiyun */
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun if (likely(x && z1)) {
192*4882a593Smuzhiyun /* compute touch pressure resistance using equation #1 */
193*4882a593Smuzhiyun Rt = (z2 - z1) * x * ts->x_plate_ohms;
194*4882a593Smuzhiyun Rt /= z1;
195*4882a593Smuzhiyun Rt = (Rt + 2047) >> 12;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun /*
198*4882a593Smuzhiyun * Sample found inconsistent, pressure is beyond
199*4882a593Smuzhiyun * the maximum. Don't report it to user space.
200*4882a593Smuzhiyun */
201*4882a593Smuzhiyun if (Rt > input_abs_get_max(input_dev, ABS_PRESSURE))
202*4882a593Smuzhiyun return -EINVAL;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun /*
205*4882a593Smuzhiyun * Note that we delay reporting events by one sample.
206*4882a593Smuzhiyun * This is done to avoid reporting last sample of the
207*4882a593Smuzhiyun * touch sequence, which may be incomplete if finger
208*4882a593Smuzhiyun * leaves the surface before last reading is taken.
209*4882a593Smuzhiyun */
210*4882a593Smuzhiyun if (timer_pending(&ts->timer)) {
211*4882a593Smuzhiyun /* Touch continues */
212*4882a593Smuzhiyun input_report_key(input_dev, BTN_TOUCH, 1);
213*4882a593Smuzhiyun input_report_abs(input_dev, ABS_X, ts->x);
214*4882a593Smuzhiyun input_report_abs(input_dev, ABS_Y, ts->y);
215*4882a593Smuzhiyun input_report_abs(input_dev, ABS_PRESSURE, ts->Rt);
216*4882a593Smuzhiyun input_sync(input_dev);
217*4882a593Smuzhiyun }
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun ts->x = x;
220*4882a593Smuzhiyun ts->y = y;
221*4882a593Smuzhiyun ts->Rt = Rt;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun return 0;
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun return -EINVAL;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
ad7879_ts_event_release(struct ad7879 * ts)229*4882a593Smuzhiyun static void ad7879_ts_event_release(struct ad7879 *ts)
230*4882a593Smuzhiyun {
231*4882a593Smuzhiyun struct input_dev *input_dev = ts->input;
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun input_report_abs(input_dev, ABS_PRESSURE, 0);
234*4882a593Smuzhiyun input_report_key(input_dev, BTN_TOUCH, 0);
235*4882a593Smuzhiyun input_sync(input_dev);
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun
ad7879_timer(struct timer_list * t)238*4882a593Smuzhiyun static void ad7879_timer(struct timer_list *t)
239*4882a593Smuzhiyun {
240*4882a593Smuzhiyun struct ad7879 *ts = from_timer(ts, t, timer);
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun ad7879_ts_event_release(ts);
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun
ad7879_irq(int irq,void * handle)245*4882a593Smuzhiyun static irqreturn_t ad7879_irq(int irq, void *handle)
246*4882a593Smuzhiyun {
247*4882a593Smuzhiyun struct ad7879 *ts = handle;
248*4882a593Smuzhiyun int error;
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun error = regmap_bulk_read(ts->regmap, AD7879_REG_XPLUS,
251*4882a593Smuzhiyun ts->conversion_data, AD7879_NR_SENSE);
252*4882a593Smuzhiyun if (error)
253*4882a593Smuzhiyun dev_err_ratelimited(ts->dev, "failed to read %#02x: %d\n",
254*4882a593Smuzhiyun AD7879_REG_XPLUS, error);
255*4882a593Smuzhiyun else if (!ad7879_report(ts))
256*4882a593Smuzhiyun mod_timer(&ts->timer, jiffies + TS_PEN_UP_TIMEOUT);
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun return IRQ_HANDLED;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun
__ad7879_enable(struct ad7879 * ts)261*4882a593Smuzhiyun static void __ad7879_enable(struct ad7879 *ts)
262*4882a593Smuzhiyun {
263*4882a593Smuzhiyun ad7879_write(ts, AD7879_REG_CTRL2, ts->cmd_crtl2);
264*4882a593Smuzhiyun ad7879_write(ts, AD7879_REG_CTRL3, ts->cmd_crtl3);
265*4882a593Smuzhiyun ad7879_write(ts, AD7879_REG_CTRL1, ts->cmd_crtl1);
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun enable_irq(ts->irq);
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun
__ad7879_disable(struct ad7879 * ts)270*4882a593Smuzhiyun static void __ad7879_disable(struct ad7879 *ts)
271*4882a593Smuzhiyun {
272*4882a593Smuzhiyun u16 reg = (ts->cmd_crtl2 & ~AD7879_PM(-1)) |
273*4882a593Smuzhiyun AD7879_PM(AD7879_PM_SHUTDOWN);
274*4882a593Smuzhiyun disable_irq(ts->irq);
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun if (del_timer_sync(&ts->timer))
277*4882a593Smuzhiyun ad7879_ts_event_release(ts);
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun ad7879_write(ts, AD7879_REG_CTRL2, reg);
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun
ad7879_open(struct input_dev * input)283*4882a593Smuzhiyun static int ad7879_open(struct input_dev *input)
284*4882a593Smuzhiyun {
285*4882a593Smuzhiyun struct ad7879 *ts = input_get_drvdata(input);
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun /* protected by input->mutex */
288*4882a593Smuzhiyun if (!ts->disabled && !ts->suspended)
289*4882a593Smuzhiyun __ad7879_enable(ts);
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun return 0;
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun
ad7879_close(struct input_dev * input)294*4882a593Smuzhiyun static void ad7879_close(struct input_dev *input)
295*4882a593Smuzhiyun {
296*4882a593Smuzhiyun struct ad7879 *ts = input_get_drvdata(input);
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun /* protected by input->mutex */
299*4882a593Smuzhiyun if (!ts->disabled && !ts->suspended)
300*4882a593Smuzhiyun __ad7879_disable(ts);
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun
ad7879_suspend(struct device * dev)303*4882a593Smuzhiyun static int __maybe_unused ad7879_suspend(struct device *dev)
304*4882a593Smuzhiyun {
305*4882a593Smuzhiyun struct ad7879 *ts = dev_get_drvdata(dev);
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun mutex_lock(&ts->input->mutex);
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun if (!ts->suspended && !ts->disabled && ts->input->users)
310*4882a593Smuzhiyun __ad7879_disable(ts);
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun ts->suspended = true;
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun mutex_unlock(&ts->input->mutex);
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun return 0;
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun
ad7879_resume(struct device * dev)319*4882a593Smuzhiyun static int __maybe_unused ad7879_resume(struct device *dev)
320*4882a593Smuzhiyun {
321*4882a593Smuzhiyun struct ad7879 *ts = dev_get_drvdata(dev);
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun mutex_lock(&ts->input->mutex);
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun if (ts->suspended && !ts->disabled && ts->input->users)
326*4882a593Smuzhiyun __ad7879_enable(ts);
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun ts->suspended = false;
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun mutex_unlock(&ts->input->mutex);
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun return 0;
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun SIMPLE_DEV_PM_OPS(ad7879_pm_ops, ad7879_suspend, ad7879_resume);
336*4882a593Smuzhiyun EXPORT_SYMBOL(ad7879_pm_ops);
337*4882a593Smuzhiyun
ad7879_toggle(struct ad7879 * ts,bool disable)338*4882a593Smuzhiyun static void ad7879_toggle(struct ad7879 *ts, bool disable)
339*4882a593Smuzhiyun {
340*4882a593Smuzhiyun mutex_lock(&ts->input->mutex);
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun if (!ts->suspended && ts->input->users != 0) {
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun if (disable) {
345*4882a593Smuzhiyun if (ts->disabled)
346*4882a593Smuzhiyun __ad7879_enable(ts);
347*4882a593Smuzhiyun } else {
348*4882a593Smuzhiyun if (!ts->disabled)
349*4882a593Smuzhiyun __ad7879_disable(ts);
350*4882a593Smuzhiyun }
351*4882a593Smuzhiyun }
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun ts->disabled = disable;
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun mutex_unlock(&ts->input->mutex);
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun
ad7879_disable_show(struct device * dev,struct device_attribute * attr,char * buf)358*4882a593Smuzhiyun static ssize_t ad7879_disable_show(struct device *dev,
359*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
360*4882a593Smuzhiyun {
361*4882a593Smuzhiyun struct ad7879 *ts = dev_get_drvdata(dev);
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun return sprintf(buf, "%u\n", ts->disabled);
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun
ad7879_disable_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)366*4882a593Smuzhiyun static ssize_t ad7879_disable_store(struct device *dev,
367*4882a593Smuzhiyun struct device_attribute *attr,
368*4882a593Smuzhiyun const char *buf, size_t count)
369*4882a593Smuzhiyun {
370*4882a593Smuzhiyun struct ad7879 *ts = dev_get_drvdata(dev);
371*4882a593Smuzhiyun unsigned int val;
372*4882a593Smuzhiyun int error;
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun error = kstrtouint(buf, 10, &val);
375*4882a593Smuzhiyun if (error)
376*4882a593Smuzhiyun return error;
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun ad7879_toggle(ts, val);
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun return count;
381*4882a593Smuzhiyun }
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun static DEVICE_ATTR(disable, 0664, ad7879_disable_show, ad7879_disable_store);
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun static struct attribute *ad7879_attributes[] = {
386*4882a593Smuzhiyun &dev_attr_disable.attr,
387*4882a593Smuzhiyun NULL
388*4882a593Smuzhiyun };
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun static const struct attribute_group ad7879_attr_group = {
391*4882a593Smuzhiyun .attrs = ad7879_attributes,
392*4882a593Smuzhiyun };
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun #ifdef CONFIG_GPIOLIB
ad7879_gpio_direction_input(struct gpio_chip * chip,unsigned gpio)395*4882a593Smuzhiyun static int ad7879_gpio_direction_input(struct gpio_chip *chip,
396*4882a593Smuzhiyun unsigned gpio)
397*4882a593Smuzhiyun {
398*4882a593Smuzhiyun struct ad7879 *ts = gpiochip_get_data(chip);
399*4882a593Smuzhiyun int err;
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun mutex_lock(&ts->mutex);
402*4882a593Smuzhiyun ts->cmd_crtl2 |= AD7879_GPIO_EN | AD7879_GPIODIR | AD7879_GPIOPOL;
403*4882a593Smuzhiyun err = ad7879_write(ts, AD7879_REG_CTRL2, ts->cmd_crtl2);
404*4882a593Smuzhiyun mutex_unlock(&ts->mutex);
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun return err;
407*4882a593Smuzhiyun }
408*4882a593Smuzhiyun
ad7879_gpio_direction_output(struct gpio_chip * chip,unsigned gpio,int level)409*4882a593Smuzhiyun static int ad7879_gpio_direction_output(struct gpio_chip *chip,
410*4882a593Smuzhiyun unsigned gpio, int level)
411*4882a593Smuzhiyun {
412*4882a593Smuzhiyun struct ad7879 *ts = gpiochip_get_data(chip);
413*4882a593Smuzhiyun int err;
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun mutex_lock(&ts->mutex);
416*4882a593Smuzhiyun ts->cmd_crtl2 &= ~AD7879_GPIODIR;
417*4882a593Smuzhiyun ts->cmd_crtl2 |= AD7879_GPIO_EN | AD7879_GPIOPOL;
418*4882a593Smuzhiyun if (level)
419*4882a593Smuzhiyun ts->cmd_crtl2 |= AD7879_GPIO_DATA;
420*4882a593Smuzhiyun else
421*4882a593Smuzhiyun ts->cmd_crtl2 &= ~AD7879_GPIO_DATA;
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun err = ad7879_write(ts, AD7879_REG_CTRL2, ts->cmd_crtl2);
424*4882a593Smuzhiyun mutex_unlock(&ts->mutex);
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun return err;
427*4882a593Smuzhiyun }
428*4882a593Smuzhiyun
ad7879_gpio_get_value(struct gpio_chip * chip,unsigned gpio)429*4882a593Smuzhiyun static int ad7879_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
430*4882a593Smuzhiyun {
431*4882a593Smuzhiyun struct ad7879 *ts = gpiochip_get_data(chip);
432*4882a593Smuzhiyun u16 val;
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun mutex_lock(&ts->mutex);
435*4882a593Smuzhiyun val = ad7879_read(ts, AD7879_REG_CTRL2);
436*4882a593Smuzhiyun mutex_unlock(&ts->mutex);
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun return !!(val & AD7879_GPIO_DATA);
439*4882a593Smuzhiyun }
440*4882a593Smuzhiyun
ad7879_gpio_set_value(struct gpio_chip * chip,unsigned gpio,int value)441*4882a593Smuzhiyun static void ad7879_gpio_set_value(struct gpio_chip *chip,
442*4882a593Smuzhiyun unsigned gpio, int value)
443*4882a593Smuzhiyun {
444*4882a593Smuzhiyun struct ad7879 *ts = gpiochip_get_data(chip);
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun mutex_lock(&ts->mutex);
447*4882a593Smuzhiyun if (value)
448*4882a593Smuzhiyun ts->cmd_crtl2 |= AD7879_GPIO_DATA;
449*4882a593Smuzhiyun else
450*4882a593Smuzhiyun ts->cmd_crtl2 &= ~AD7879_GPIO_DATA;
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun ad7879_write(ts, AD7879_REG_CTRL2, ts->cmd_crtl2);
453*4882a593Smuzhiyun mutex_unlock(&ts->mutex);
454*4882a593Smuzhiyun }
455*4882a593Smuzhiyun
ad7879_gpio_add(struct ad7879 * ts)456*4882a593Smuzhiyun static int ad7879_gpio_add(struct ad7879 *ts)
457*4882a593Smuzhiyun {
458*4882a593Smuzhiyun int ret = 0;
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun mutex_init(&ts->mutex);
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun /* Do not create a chip unless flagged for it */
463*4882a593Smuzhiyun if (!device_property_read_bool(ts->dev, "gpio-controller"))
464*4882a593Smuzhiyun return 0;
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun ts->gc.direction_input = ad7879_gpio_direction_input;
467*4882a593Smuzhiyun ts->gc.direction_output = ad7879_gpio_direction_output;
468*4882a593Smuzhiyun ts->gc.get = ad7879_gpio_get_value;
469*4882a593Smuzhiyun ts->gc.set = ad7879_gpio_set_value;
470*4882a593Smuzhiyun ts->gc.can_sleep = 1;
471*4882a593Smuzhiyun ts->gc.base = -1;
472*4882a593Smuzhiyun ts->gc.ngpio = 1;
473*4882a593Smuzhiyun ts->gc.label = "AD7879-GPIO";
474*4882a593Smuzhiyun ts->gc.owner = THIS_MODULE;
475*4882a593Smuzhiyun ts->gc.parent = ts->dev;
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun ret = devm_gpiochip_add_data(ts->dev, &ts->gc, ts);
478*4882a593Smuzhiyun if (ret)
479*4882a593Smuzhiyun dev_err(ts->dev, "failed to register gpio %d\n",
480*4882a593Smuzhiyun ts->gc.base);
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun return ret;
483*4882a593Smuzhiyun }
484*4882a593Smuzhiyun #else
ad7879_gpio_add(struct ad7879 * ts)485*4882a593Smuzhiyun static int ad7879_gpio_add(struct ad7879 *ts)
486*4882a593Smuzhiyun {
487*4882a593Smuzhiyun return 0;
488*4882a593Smuzhiyun }
489*4882a593Smuzhiyun #endif
490*4882a593Smuzhiyun
ad7879_parse_dt(struct device * dev,struct ad7879 * ts)491*4882a593Smuzhiyun static int ad7879_parse_dt(struct device *dev, struct ad7879 *ts)
492*4882a593Smuzhiyun {
493*4882a593Smuzhiyun int err;
494*4882a593Smuzhiyun u32 tmp;
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun err = device_property_read_u32(dev, "adi,resistance-plate-x", &tmp);
497*4882a593Smuzhiyun if (err) {
498*4882a593Smuzhiyun dev_err(dev, "failed to get resistance-plate-x property\n");
499*4882a593Smuzhiyun return err;
500*4882a593Smuzhiyun }
501*4882a593Smuzhiyun ts->x_plate_ohms = (u16)tmp;
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun device_property_read_u8(dev, "adi,first-conversion-delay",
504*4882a593Smuzhiyun &ts->first_conversion_delay);
505*4882a593Smuzhiyun device_property_read_u8(dev, "adi,acquisition-time",
506*4882a593Smuzhiyun &ts->acquisition_time);
507*4882a593Smuzhiyun device_property_read_u8(dev, "adi,median-filter-size", &ts->median);
508*4882a593Smuzhiyun device_property_read_u8(dev, "adi,averaging", &ts->averaging);
509*4882a593Smuzhiyun device_property_read_u8(dev, "adi,conversion-interval",
510*4882a593Smuzhiyun &ts->pen_down_acc_interval);
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun ts->swap_xy = device_property_read_bool(dev, "touchscreen-swapped-x-y");
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun return 0;
515*4882a593Smuzhiyun }
516*4882a593Smuzhiyun
ad7879_probe(struct device * dev,struct regmap * regmap,int irq,u16 bustype,u8 devid)517*4882a593Smuzhiyun int ad7879_probe(struct device *dev, struct regmap *regmap,
518*4882a593Smuzhiyun int irq, u16 bustype, u8 devid)
519*4882a593Smuzhiyun {
520*4882a593Smuzhiyun struct ad7879 *ts;
521*4882a593Smuzhiyun struct input_dev *input_dev;
522*4882a593Smuzhiyun int err;
523*4882a593Smuzhiyun u16 revid;
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun if (irq <= 0) {
526*4882a593Smuzhiyun dev_err(dev, "No IRQ specified\n");
527*4882a593Smuzhiyun return -EINVAL;
528*4882a593Smuzhiyun }
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun ts = devm_kzalloc(dev, sizeof(*ts), GFP_KERNEL);
531*4882a593Smuzhiyun if (!ts)
532*4882a593Smuzhiyun return -ENOMEM;
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun err = ad7879_parse_dt(dev, ts);
535*4882a593Smuzhiyun if (err)
536*4882a593Smuzhiyun return err;
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun input_dev = devm_input_allocate_device(dev);
539*4882a593Smuzhiyun if (!input_dev) {
540*4882a593Smuzhiyun dev_err(dev, "Failed to allocate input device\n");
541*4882a593Smuzhiyun return -ENOMEM;
542*4882a593Smuzhiyun }
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun ts->dev = dev;
545*4882a593Smuzhiyun ts->input = input_dev;
546*4882a593Smuzhiyun ts->irq = irq;
547*4882a593Smuzhiyun ts->regmap = regmap;
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun timer_setup(&ts->timer, ad7879_timer, 0);
550*4882a593Smuzhiyun snprintf(ts->phys, sizeof(ts->phys), "%s/input0", dev_name(dev));
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun input_dev->name = "AD7879 Touchscreen";
553*4882a593Smuzhiyun input_dev->phys = ts->phys;
554*4882a593Smuzhiyun input_dev->dev.parent = dev;
555*4882a593Smuzhiyun input_dev->id.bustype = bustype;
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun input_dev->open = ad7879_open;
558*4882a593Smuzhiyun input_dev->close = ad7879_close;
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun input_set_drvdata(input_dev, ts);
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun input_set_capability(input_dev, EV_KEY, BTN_TOUCH);
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun input_set_abs_params(input_dev, ABS_X, 0, MAX_12BIT, 0, 0);
565*4882a593Smuzhiyun input_set_abs_params(input_dev, ABS_Y, 0, MAX_12BIT, 0, 0);
566*4882a593Smuzhiyun input_set_capability(input_dev, EV_ABS, ABS_PRESSURE);
567*4882a593Smuzhiyun touchscreen_parse_properties(input_dev, false, NULL);
568*4882a593Smuzhiyun if (!input_abs_get_max(input_dev, ABS_PRESSURE)) {
569*4882a593Smuzhiyun dev_err(dev, "Touchscreen pressure is not specified\n");
570*4882a593Smuzhiyun return -EINVAL;
571*4882a593Smuzhiyun }
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun err = ad7879_write(ts, AD7879_REG_CTRL2, AD7879_RESET);
574*4882a593Smuzhiyun if (err < 0) {
575*4882a593Smuzhiyun dev_err(dev, "Failed to write %s\n", input_dev->name);
576*4882a593Smuzhiyun return err;
577*4882a593Smuzhiyun }
578*4882a593Smuzhiyun
579*4882a593Smuzhiyun revid = ad7879_read(ts, AD7879_REG_REVID);
580*4882a593Smuzhiyun input_dev->id.product = (revid & 0xff);
581*4882a593Smuzhiyun input_dev->id.version = revid >> 8;
582*4882a593Smuzhiyun if (input_dev->id.product != devid) {
583*4882a593Smuzhiyun dev_err(dev, "Failed to probe %s (%x vs %x)\n",
584*4882a593Smuzhiyun input_dev->name, devid, revid);
585*4882a593Smuzhiyun return -ENODEV;
586*4882a593Smuzhiyun }
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun ts->cmd_crtl3 = AD7879_YPLUS_BIT |
589*4882a593Smuzhiyun AD7879_XPLUS_BIT |
590*4882a593Smuzhiyun AD7879_Z2_BIT |
591*4882a593Smuzhiyun AD7879_Z1_BIT |
592*4882a593Smuzhiyun AD7879_TEMPMASK_BIT |
593*4882a593Smuzhiyun AD7879_AUXVBATMASK_BIT |
594*4882a593Smuzhiyun AD7879_GPIOALERTMASK_BIT;
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun ts->cmd_crtl2 = AD7879_PM(AD7879_PM_DYN) | AD7879_DFR |
597*4882a593Smuzhiyun AD7879_AVG(ts->averaging) |
598*4882a593Smuzhiyun AD7879_MFS(ts->median) |
599*4882a593Smuzhiyun AD7879_FCD(ts->first_conversion_delay);
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun ts->cmd_crtl1 = AD7879_MODE_INT | AD7879_MODE_SEQ1 |
602*4882a593Smuzhiyun AD7879_ACQ(ts->acquisition_time) |
603*4882a593Smuzhiyun AD7879_TMR(ts->pen_down_acc_interval);
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun err = devm_request_threaded_irq(dev, ts->irq, NULL, ad7879_irq,
606*4882a593Smuzhiyun IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
607*4882a593Smuzhiyun dev_name(dev), ts);
608*4882a593Smuzhiyun if (err) {
609*4882a593Smuzhiyun dev_err(dev, "Failed to request IRQ: %d\n", err);
610*4882a593Smuzhiyun return err;
611*4882a593Smuzhiyun }
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun __ad7879_disable(ts);
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun err = devm_device_add_group(dev, &ad7879_attr_group);
616*4882a593Smuzhiyun if (err)
617*4882a593Smuzhiyun return err;
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun err = ad7879_gpio_add(ts);
620*4882a593Smuzhiyun if (err)
621*4882a593Smuzhiyun return err;
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun err = input_register_device(input_dev);
624*4882a593Smuzhiyun if (err)
625*4882a593Smuzhiyun return err;
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun dev_set_drvdata(dev, ts);
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun return 0;
630*4882a593Smuzhiyun }
631*4882a593Smuzhiyun EXPORT_SYMBOL(ad7879_probe);
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
634*4882a593Smuzhiyun MODULE_DESCRIPTION("AD7879(-1) touchscreen Driver");
635*4882a593Smuzhiyun MODULE_LICENSE("GPL");
636