xref: /OK3568_Linux_fs/kernel/drivers/input/serio/ps2-gpio.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * GPIO based serio bus driver for bit banging the PS/2 protocol
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Author: Danilo Krummrich <danilokrummrich@dk-develop.de>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
9*4882a593Smuzhiyun #include <linux/interrupt.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/serio.h>
12*4882a593Smuzhiyun #include <linux/slab.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun #include <linux/workqueue.h>
15*4882a593Smuzhiyun #include <linux/completion.h>
16*4882a593Smuzhiyun #include <linux/mutex.h>
17*4882a593Smuzhiyun #include <linux/preempt.h>
18*4882a593Smuzhiyun #include <linux/property.h>
19*4882a593Smuzhiyun #include <linux/of.h>
20*4882a593Smuzhiyun #include <linux/jiffies.h>
21*4882a593Smuzhiyun #include <linux/delay.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define DRIVER_NAME		"ps2-gpio"
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #define PS2_MODE_RX		0
26*4882a593Smuzhiyun #define PS2_MODE_TX		1
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #define PS2_START_BIT		0
29*4882a593Smuzhiyun #define PS2_DATA_BIT0		1
30*4882a593Smuzhiyun #define PS2_DATA_BIT1		2
31*4882a593Smuzhiyun #define PS2_DATA_BIT2		3
32*4882a593Smuzhiyun #define PS2_DATA_BIT3		4
33*4882a593Smuzhiyun #define PS2_DATA_BIT4		5
34*4882a593Smuzhiyun #define PS2_DATA_BIT5		6
35*4882a593Smuzhiyun #define PS2_DATA_BIT6		7
36*4882a593Smuzhiyun #define PS2_DATA_BIT7		8
37*4882a593Smuzhiyun #define PS2_PARITY_BIT		9
38*4882a593Smuzhiyun #define PS2_STOP_BIT		10
39*4882a593Smuzhiyun #define PS2_TX_TIMEOUT		11
40*4882a593Smuzhiyun #define PS2_ACK_BIT		12
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #define PS2_DEV_RET_ACK		0xfa
43*4882a593Smuzhiyun #define PS2_DEV_RET_NACK	0xfe
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun #define PS2_CMD_RESEND		0xfe
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun struct ps2_gpio_data {
48*4882a593Smuzhiyun 	struct device *dev;
49*4882a593Smuzhiyun 	struct serio *serio;
50*4882a593Smuzhiyun 	unsigned char mode;
51*4882a593Smuzhiyun 	struct gpio_desc *gpio_clk;
52*4882a593Smuzhiyun 	struct gpio_desc *gpio_data;
53*4882a593Smuzhiyun 	bool write_enable;
54*4882a593Smuzhiyun 	int irq;
55*4882a593Smuzhiyun 	unsigned char rx_cnt;
56*4882a593Smuzhiyun 	unsigned char rx_byte;
57*4882a593Smuzhiyun 	unsigned char tx_cnt;
58*4882a593Smuzhiyun 	unsigned char tx_byte;
59*4882a593Smuzhiyun 	struct completion tx_done;
60*4882a593Smuzhiyun 	struct mutex tx_mutex;
61*4882a593Smuzhiyun 	struct delayed_work tx_work;
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun 
ps2_gpio_open(struct serio * serio)64*4882a593Smuzhiyun static int ps2_gpio_open(struct serio *serio)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun 	struct ps2_gpio_data *drvdata = serio->port_data;
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	enable_irq(drvdata->irq);
69*4882a593Smuzhiyun 	return 0;
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun 
ps2_gpio_close(struct serio * serio)72*4882a593Smuzhiyun static void ps2_gpio_close(struct serio *serio)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun 	struct ps2_gpio_data *drvdata = serio->port_data;
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	flush_delayed_work(&drvdata->tx_work);
77*4882a593Smuzhiyun 	disable_irq(drvdata->irq);
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun 
__ps2_gpio_write(struct serio * serio,unsigned char val)80*4882a593Smuzhiyun static int __ps2_gpio_write(struct serio *serio, unsigned char val)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun 	struct ps2_gpio_data *drvdata = serio->port_data;
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 	disable_irq_nosync(drvdata->irq);
85*4882a593Smuzhiyun 	gpiod_direction_output(drvdata->gpio_clk, 0);
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	drvdata->mode = PS2_MODE_TX;
88*4882a593Smuzhiyun 	drvdata->tx_byte = val;
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	schedule_delayed_work(&drvdata->tx_work, usecs_to_jiffies(200));
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	return 0;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun 
ps2_gpio_write(struct serio * serio,unsigned char val)95*4882a593Smuzhiyun static int ps2_gpio_write(struct serio *serio, unsigned char val)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun 	struct ps2_gpio_data *drvdata = serio->port_data;
98*4882a593Smuzhiyun 	int ret = 0;
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	if (in_task()) {
101*4882a593Smuzhiyun 		mutex_lock(&drvdata->tx_mutex);
102*4882a593Smuzhiyun 		__ps2_gpio_write(serio, val);
103*4882a593Smuzhiyun 		if (!wait_for_completion_timeout(&drvdata->tx_done,
104*4882a593Smuzhiyun 						 msecs_to_jiffies(10000)))
105*4882a593Smuzhiyun 			ret = SERIO_TIMEOUT;
106*4882a593Smuzhiyun 		mutex_unlock(&drvdata->tx_mutex);
107*4882a593Smuzhiyun 	} else {
108*4882a593Smuzhiyun 		__ps2_gpio_write(serio, val);
109*4882a593Smuzhiyun 	}
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	return ret;
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun 
ps2_gpio_tx_work_fn(struct work_struct * work)114*4882a593Smuzhiyun static void ps2_gpio_tx_work_fn(struct work_struct *work)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun 	struct delayed_work *dwork = to_delayed_work(work);
117*4882a593Smuzhiyun 	struct ps2_gpio_data *drvdata = container_of(dwork,
118*4882a593Smuzhiyun 						    struct ps2_gpio_data,
119*4882a593Smuzhiyun 						    tx_work);
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	enable_irq(drvdata->irq);
122*4882a593Smuzhiyun 	gpiod_direction_output(drvdata->gpio_data, 0);
123*4882a593Smuzhiyun 	gpiod_direction_input(drvdata->gpio_clk);
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun 
ps2_gpio_irq_rx(struct ps2_gpio_data * drvdata)126*4882a593Smuzhiyun static irqreturn_t ps2_gpio_irq_rx(struct ps2_gpio_data *drvdata)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun 	unsigned char byte, cnt;
129*4882a593Smuzhiyun 	int data;
130*4882a593Smuzhiyun 	int rxflags = 0;
131*4882a593Smuzhiyun 	static unsigned long old_jiffies;
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	byte = drvdata->rx_byte;
134*4882a593Smuzhiyun 	cnt = drvdata->rx_cnt;
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	if (old_jiffies == 0)
137*4882a593Smuzhiyun 		old_jiffies = jiffies;
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	if ((jiffies - old_jiffies) > usecs_to_jiffies(100)) {
140*4882a593Smuzhiyun 		dev_err(drvdata->dev,
141*4882a593Smuzhiyun 			"RX: timeout, probably we missed an interrupt\n");
142*4882a593Smuzhiyun 		goto err;
143*4882a593Smuzhiyun 	}
144*4882a593Smuzhiyun 	old_jiffies = jiffies;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	data = gpiod_get_value(drvdata->gpio_data);
147*4882a593Smuzhiyun 	if (unlikely(data < 0)) {
148*4882a593Smuzhiyun 		dev_err(drvdata->dev, "RX: failed to get data gpio val: %d\n",
149*4882a593Smuzhiyun 			data);
150*4882a593Smuzhiyun 		goto err;
151*4882a593Smuzhiyun 	}
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	switch (cnt) {
154*4882a593Smuzhiyun 	case PS2_START_BIT:
155*4882a593Smuzhiyun 		/* start bit should be low */
156*4882a593Smuzhiyun 		if (unlikely(data)) {
157*4882a593Smuzhiyun 			dev_err(drvdata->dev, "RX: start bit should be low\n");
158*4882a593Smuzhiyun 			goto err;
159*4882a593Smuzhiyun 		}
160*4882a593Smuzhiyun 		break;
161*4882a593Smuzhiyun 	case PS2_DATA_BIT0:
162*4882a593Smuzhiyun 	case PS2_DATA_BIT1:
163*4882a593Smuzhiyun 	case PS2_DATA_BIT2:
164*4882a593Smuzhiyun 	case PS2_DATA_BIT3:
165*4882a593Smuzhiyun 	case PS2_DATA_BIT4:
166*4882a593Smuzhiyun 	case PS2_DATA_BIT5:
167*4882a593Smuzhiyun 	case PS2_DATA_BIT6:
168*4882a593Smuzhiyun 	case PS2_DATA_BIT7:
169*4882a593Smuzhiyun 		/* processing data bits */
170*4882a593Smuzhiyun 		if (data)
171*4882a593Smuzhiyun 			byte |= (data << (cnt - 1));
172*4882a593Smuzhiyun 		break;
173*4882a593Smuzhiyun 	case PS2_PARITY_BIT:
174*4882a593Smuzhiyun 		/* check odd parity */
175*4882a593Smuzhiyun 		if (!((hweight8(byte) & 1) ^ data)) {
176*4882a593Smuzhiyun 			rxflags |= SERIO_PARITY;
177*4882a593Smuzhiyun 			dev_warn(drvdata->dev, "RX: parity error\n");
178*4882a593Smuzhiyun 			if (!drvdata->write_enable)
179*4882a593Smuzhiyun 				goto err;
180*4882a593Smuzhiyun 		}
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 		/* Do not send spurious ACK's and NACK's when write fn is
183*4882a593Smuzhiyun 		 * not provided.
184*4882a593Smuzhiyun 		 */
185*4882a593Smuzhiyun 		if (!drvdata->write_enable) {
186*4882a593Smuzhiyun 			if (byte == PS2_DEV_RET_NACK)
187*4882a593Smuzhiyun 				goto err;
188*4882a593Smuzhiyun 			else if (byte == PS2_DEV_RET_ACK)
189*4882a593Smuzhiyun 				break;
190*4882a593Smuzhiyun 		}
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 		/* Let's send the data without waiting for the stop bit to be
193*4882a593Smuzhiyun 		 * sent. It may happen that we miss the stop bit. When this
194*4882a593Smuzhiyun 		 * happens we have no way to recover from this, certainly
195*4882a593Smuzhiyun 		 * missing the parity bit would be recognized when processing
196*4882a593Smuzhiyun 		 * the stop bit. When missing both, data is lost.
197*4882a593Smuzhiyun 		 */
198*4882a593Smuzhiyun 		serio_interrupt(drvdata->serio, byte, rxflags);
199*4882a593Smuzhiyun 		dev_dbg(drvdata->dev, "RX: sending byte 0x%x\n", byte);
200*4882a593Smuzhiyun 		break;
201*4882a593Smuzhiyun 	case PS2_STOP_BIT:
202*4882a593Smuzhiyun 		/* stop bit should be high */
203*4882a593Smuzhiyun 		if (unlikely(!data)) {
204*4882a593Smuzhiyun 			dev_err(drvdata->dev, "RX: stop bit should be high\n");
205*4882a593Smuzhiyun 			goto err;
206*4882a593Smuzhiyun 		}
207*4882a593Smuzhiyun 		cnt = byte = 0;
208*4882a593Smuzhiyun 		old_jiffies = 0;
209*4882a593Smuzhiyun 		goto end; /* success */
210*4882a593Smuzhiyun 	default:
211*4882a593Smuzhiyun 		dev_err(drvdata->dev, "RX: got out of sync with the device\n");
212*4882a593Smuzhiyun 		goto err;
213*4882a593Smuzhiyun 	}
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	cnt++;
216*4882a593Smuzhiyun 	goto end; /* success */
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun err:
219*4882a593Smuzhiyun 	cnt = byte = 0;
220*4882a593Smuzhiyun 	old_jiffies = 0;
221*4882a593Smuzhiyun 	__ps2_gpio_write(drvdata->serio, PS2_CMD_RESEND);
222*4882a593Smuzhiyun end:
223*4882a593Smuzhiyun 	drvdata->rx_cnt = cnt;
224*4882a593Smuzhiyun 	drvdata->rx_byte = byte;
225*4882a593Smuzhiyun 	return IRQ_HANDLED;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun 
ps2_gpio_irq_tx(struct ps2_gpio_data * drvdata)228*4882a593Smuzhiyun static irqreturn_t ps2_gpio_irq_tx(struct ps2_gpio_data *drvdata)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun 	unsigned char byte, cnt;
231*4882a593Smuzhiyun 	int data;
232*4882a593Smuzhiyun 	static unsigned long old_jiffies;
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	cnt = drvdata->tx_cnt;
235*4882a593Smuzhiyun 	byte = drvdata->tx_byte;
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	if (old_jiffies == 0)
238*4882a593Smuzhiyun 		old_jiffies = jiffies;
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 	if ((jiffies - old_jiffies) > usecs_to_jiffies(100)) {
241*4882a593Smuzhiyun 		dev_err(drvdata->dev,
242*4882a593Smuzhiyun 			"TX: timeout, probably we missed an interrupt\n");
243*4882a593Smuzhiyun 		goto err;
244*4882a593Smuzhiyun 	}
245*4882a593Smuzhiyun 	old_jiffies = jiffies;
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	switch (cnt) {
248*4882a593Smuzhiyun 	case PS2_START_BIT:
249*4882a593Smuzhiyun 		/* should never happen */
250*4882a593Smuzhiyun 		dev_err(drvdata->dev,
251*4882a593Smuzhiyun 			"TX: start bit should have been sent already\n");
252*4882a593Smuzhiyun 		goto err;
253*4882a593Smuzhiyun 	case PS2_DATA_BIT0:
254*4882a593Smuzhiyun 	case PS2_DATA_BIT1:
255*4882a593Smuzhiyun 	case PS2_DATA_BIT2:
256*4882a593Smuzhiyun 	case PS2_DATA_BIT3:
257*4882a593Smuzhiyun 	case PS2_DATA_BIT4:
258*4882a593Smuzhiyun 	case PS2_DATA_BIT5:
259*4882a593Smuzhiyun 	case PS2_DATA_BIT6:
260*4882a593Smuzhiyun 	case PS2_DATA_BIT7:
261*4882a593Smuzhiyun 		data = byte & BIT(cnt - 1);
262*4882a593Smuzhiyun 		gpiod_set_value(drvdata->gpio_data, data);
263*4882a593Smuzhiyun 		break;
264*4882a593Smuzhiyun 	case PS2_PARITY_BIT:
265*4882a593Smuzhiyun 		/* do odd parity */
266*4882a593Smuzhiyun 		data = !(hweight8(byte) & 1);
267*4882a593Smuzhiyun 		gpiod_set_value(drvdata->gpio_data, data);
268*4882a593Smuzhiyun 		break;
269*4882a593Smuzhiyun 	case PS2_STOP_BIT:
270*4882a593Smuzhiyun 		/* release data line to generate stop bit */
271*4882a593Smuzhiyun 		gpiod_direction_input(drvdata->gpio_data);
272*4882a593Smuzhiyun 		break;
273*4882a593Smuzhiyun 	case PS2_TX_TIMEOUT:
274*4882a593Smuzhiyun 		/* Devices generate one extra clock pulse before sending the
275*4882a593Smuzhiyun 		 * acknowledgment.
276*4882a593Smuzhiyun 		 */
277*4882a593Smuzhiyun 		break;
278*4882a593Smuzhiyun 	case PS2_ACK_BIT:
279*4882a593Smuzhiyun 		gpiod_direction_input(drvdata->gpio_data);
280*4882a593Smuzhiyun 		data = gpiod_get_value(drvdata->gpio_data);
281*4882a593Smuzhiyun 		if (data) {
282*4882a593Smuzhiyun 			dev_warn(drvdata->dev, "TX: received NACK, retry\n");
283*4882a593Smuzhiyun 			goto err;
284*4882a593Smuzhiyun 		}
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 		drvdata->mode = PS2_MODE_RX;
287*4882a593Smuzhiyun 		complete(&drvdata->tx_done);
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 		cnt = 1;
290*4882a593Smuzhiyun 		old_jiffies = 0;
291*4882a593Smuzhiyun 		goto end; /* success */
292*4882a593Smuzhiyun 	default:
293*4882a593Smuzhiyun 		/* Probably we missed the stop bit. Therefore we release data
294*4882a593Smuzhiyun 		 * line and try again.
295*4882a593Smuzhiyun 		 */
296*4882a593Smuzhiyun 		gpiod_direction_input(drvdata->gpio_data);
297*4882a593Smuzhiyun 		dev_err(drvdata->dev, "TX: got out of sync with the device\n");
298*4882a593Smuzhiyun 		goto err;
299*4882a593Smuzhiyun 	}
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	cnt++;
302*4882a593Smuzhiyun 	goto end; /* success */
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun err:
305*4882a593Smuzhiyun 	cnt = 1;
306*4882a593Smuzhiyun 	old_jiffies = 0;
307*4882a593Smuzhiyun 	gpiod_direction_input(drvdata->gpio_data);
308*4882a593Smuzhiyun 	__ps2_gpio_write(drvdata->serio, drvdata->tx_byte);
309*4882a593Smuzhiyun end:
310*4882a593Smuzhiyun 	drvdata->tx_cnt = cnt;
311*4882a593Smuzhiyun 	return IRQ_HANDLED;
312*4882a593Smuzhiyun }
313*4882a593Smuzhiyun 
ps2_gpio_irq(int irq,void * dev_id)314*4882a593Smuzhiyun static irqreturn_t ps2_gpio_irq(int irq, void *dev_id)
315*4882a593Smuzhiyun {
316*4882a593Smuzhiyun 	struct ps2_gpio_data *drvdata = dev_id;
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 	return drvdata->mode ? ps2_gpio_irq_tx(drvdata) :
319*4882a593Smuzhiyun 		ps2_gpio_irq_rx(drvdata);
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun 
ps2_gpio_get_props(struct device * dev,struct ps2_gpio_data * drvdata)322*4882a593Smuzhiyun static int ps2_gpio_get_props(struct device *dev,
323*4882a593Smuzhiyun 				 struct ps2_gpio_data *drvdata)
324*4882a593Smuzhiyun {
325*4882a593Smuzhiyun 	drvdata->gpio_data = devm_gpiod_get(dev, "data", GPIOD_IN);
326*4882a593Smuzhiyun 	if (IS_ERR(drvdata->gpio_data)) {
327*4882a593Smuzhiyun 		dev_err(dev, "failed to request data gpio: %ld",
328*4882a593Smuzhiyun 			PTR_ERR(drvdata->gpio_data));
329*4882a593Smuzhiyun 		return PTR_ERR(drvdata->gpio_data);
330*4882a593Smuzhiyun 	}
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 	drvdata->gpio_clk = devm_gpiod_get(dev, "clk", GPIOD_IN);
333*4882a593Smuzhiyun 	if (IS_ERR(drvdata->gpio_clk)) {
334*4882a593Smuzhiyun 		dev_err(dev, "failed to request clock gpio: %ld",
335*4882a593Smuzhiyun 			PTR_ERR(drvdata->gpio_clk));
336*4882a593Smuzhiyun 		return PTR_ERR(drvdata->gpio_clk);
337*4882a593Smuzhiyun 	}
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun 	drvdata->write_enable = device_property_read_bool(dev,
340*4882a593Smuzhiyun 				"write-enable");
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	return 0;
343*4882a593Smuzhiyun }
344*4882a593Smuzhiyun 
ps2_gpio_probe(struct platform_device * pdev)345*4882a593Smuzhiyun static int ps2_gpio_probe(struct platform_device *pdev)
346*4882a593Smuzhiyun {
347*4882a593Smuzhiyun 	struct ps2_gpio_data *drvdata;
348*4882a593Smuzhiyun 	struct serio *serio;
349*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
350*4882a593Smuzhiyun 	int error;
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	drvdata = devm_kzalloc(dev, sizeof(struct ps2_gpio_data), GFP_KERNEL);
353*4882a593Smuzhiyun 	serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
354*4882a593Smuzhiyun 	if (!drvdata || !serio) {
355*4882a593Smuzhiyun 		error = -ENOMEM;
356*4882a593Smuzhiyun 		goto err_free_serio;
357*4882a593Smuzhiyun 	}
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun 	error = ps2_gpio_get_props(dev, drvdata);
360*4882a593Smuzhiyun 	if (error)
361*4882a593Smuzhiyun 		goto err_free_serio;
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	if (gpiod_cansleep(drvdata->gpio_data) ||
364*4882a593Smuzhiyun 	    gpiod_cansleep(drvdata->gpio_clk)) {
365*4882a593Smuzhiyun 		dev_err(dev, "GPIO data or clk are connected via slow bus\n");
366*4882a593Smuzhiyun 		error = -EINVAL;
367*4882a593Smuzhiyun 		goto err_free_serio;
368*4882a593Smuzhiyun 	}
369*4882a593Smuzhiyun 
370*4882a593Smuzhiyun 	drvdata->irq = platform_get_irq(pdev, 0);
371*4882a593Smuzhiyun 	if (drvdata->irq < 0) {
372*4882a593Smuzhiyun 		error = drvdata->irq;
373*4882a593Smuzhiyun 		goto err_free_serio;
374*4882a593Smuzhiyun 	}
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun 	error = devm_request_irq(dev, drvdata->irq, ps2_gpio_irq,
377*4882a593Smuzhiyun 				 IRQF_NO_THREAD, DRIVER_NAME, drvdata);
378*4882a593Smuzhiyun 	if (error) {
379*4882a593Smuzhiyun 		dev_err(dev, "failed to request irq %d: %d\n",
380*4882a593Smuzhiyun 			drvdata->irq, error);
381*4882a593Smuzhiyun 		goto err_free_serio;
382*4882a593Smuzhiyun 	}
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun 	/* Keep irq disabled until serio->open is called. */
385*4882a593Smuzhiyun 	disable_irq(drvdata->irq);
386*4882a593Smuzhiyun 
387*4882a593Smuzhiyun 	serio->id.type = SERIO_8042;
388*4882a593Smuzhiyun 	serio->open = ps2_gpio_open;
389*4882a593Smuzhiyun 	serio->close = ps2_gpio_close;
390*4882a593Smuzhiyun 	/* Write can be enabled in platform/dt data, but possibly it will not
391*4882a593Smuzhiyun 	 * work because of the tough timings.
392*4882a593Smuzhiyun 	 */
393*4882a593Smuzhiyun 	serio->write = drvdata->write_enable ? ps2_gpio_write : NULL;
394*4882a593Smuzhiyun 	serio->port_data = drvdata;
395*4882a593Smuzhiyun 	serio->dev.parent = dev;
396*4882a593Smuzhiyun 	strlcpy(serio->name, dev_name(dev), sizeof(serio->name));
397*4882a593Smuzhiyun 	strlcpy(serio->phys, dev_name(dev), sizeof(serio->phys));
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun 	drvdata->serio = serio;
400*4882a593Smuzhiyun 	drvdata->dev = dev;
401*4882a593Smuzhiyun 	drvdata->mode = PS2_MODE_RX;
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun 	/* Tx count always starts at 1, as the start bit is sent implicitly by
404*4882a593Smuzhiyun 	 * host-to-device communication initialization.
405*4882a593Smuzhiyun 	 */
406*4882a593Smuzhiyun 	drvdata->tx_cnt = 1;
407*4882a593Smuzhiyun 
408*4882a593Smuzhiyun 	INIT_DELAYED_WORK(&drvdata->tx_work, ps2_gpio_tx_work_fn);
409*4882a593Smuzhiyun 	init_completion(&drvdata->tx_done);
410*4882a593Smuzhiyun 	mutex_init(&drvdata->tx_mutex);
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun 	serio_register_port(serio);
413*4882a593Smuzhiyun 	platform_set_drvdata(pdev, drvdata);
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun 	return 0;	/* success */
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun err_free_serio:
418*4882a593Smuzhiyun 	kfree(serio);
419*4882a593Smuzhiyun 	return error;
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun 
ps2_gpio_remove(struct platform_device * pdev)422*4882a593Smuzhiyun static int ps2_gpio_remove(struct platform_device *pdev)
423*4882a593Smuzhiyun {
424*4882a593Smuzhiyun 	struct ps2_gpio_data *drvdata = platform_get_drvdata(pdev);
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun 	serio_unregister_port(drvdata->serio);
427*4882a593Smuzhiyun 	return 0;
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun #if defined(CONFIG_OF)
431*4882a593Smuzhiyun static const struct of_device_id ps2_gpio_match[] = {
432*4882a593Smuzhiyun 	{ .compatible = "ps2-gpio", },
433*4882a593Smuzhiyun 	{ },
434*4882a593Smuzhiyun };
435*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ps2_gpio_match);
436*4882a593Smuzhiyun #endif
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun static struct platform_driver ps2_gpio_driver = {
439*4882a593Smuzhiyun 	.probe		= ps2_gpio_probe,
440*4882a593Smuzhiyun 	.remove		= ps2_gpio_remove,
441*4882a593Smuzhiyun 	.driver = {
442*4882a593Smuzhiyun 		.name = DRIVER_NAME,
443*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(ps2_gpio_match),
444*4882a593Smuzhiyun 	},
445*4882a593Smuzhiyun };
446*4882a593Smuzhiyun module_platform_driver(ps2_gpio_driver);
447*4882a593Smuzhiyun 
448*4882a593Smuzhiyun MODULE_AUTHOR("Danilo Krummrich <danilokrummrich@dk-develop.de>");
449*4882a593Smuzhiyun MODULE_DESCRIPTION("GPIO PS2 driver");
450*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
451