1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * OLPC serio driver for multiplexed input from Marvell MMP security processor
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2011-2013 One Laptop Per Child
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/interrupt.h>
10*4882a593Smuzhiyun #include <linux/serio.h>
11*4882a593Smuzhiyun #include <linux/err.h>
12*4882a593Smuzhiyun #include <linux/platform_device.h>
13*4882a593Smuzhiyun #include <linux/io.h>
14*4882a593Smuzhiyun #include <linux/of.h>
15*4882a593Smuzhiyun #include <linux/slab.h>
16*4882a593Smuzhiyun #include <linux/delay.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun /*
19*4882a593Smuzhiyun * The OLPC XO-1.75 and XO-4 laptops do not have a hardware PS/2 controller.
20*4882a593Smuzhiyun * Instead, the OLPC firmware runs a bit-banging PS/2 implementation on an
21*4882a593Smuzhiyun * otherwise-unused slow processor which is included in the Marvell MMP2/MMP3
22*4882a593Smuzhiyun * SoC, known as the "Security Processor" (SP) or "Wireless Trusted Module"
23*4882a593Smuzhiyun * (WTM). This firmware then reports its results via the WTM registers,
24*4882a593Smuzhiyun * which we read from the Application Processor (AP, i.e. main CPU) in this
25*4882a593Smuzhiyun * driver.
26*4882a593Smuzhiyun *
27*4882a593Smuzhiyun * On the hardware side we have a PS/2 mouse and an AT keyboard, the data
28*4882a593Smuzhiyun * is multiplexed through this system. We create a serio port for each one,
29*4882a593Smuzhiyun * and demultiplex the data accordingly.
30*4882a593Smuzhiyun */
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun /* WTM register offsets */
33*4882a593Smuzhiyun #define SECURE_PROCESSOR_COMMAND 0x40
34*4882a593Smuzhiyun #define COMMAND_RETURN_STATUS 0x80
35*4882a593Smuzhiyun #define COMMAND_FIFO_STATUS 0xc4
36*4882a593Smuzhiyun #define PJ_RST_INTERRUPT 0xc8
37*4882a593Smuzhiyun #define PJ_INTERRUPT_MASK 0xcc
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun /*
40*4882a593Smuzhiyun * The upper byte of SECURE_PROCESSOR_COMMAND and COMMAND_RETURN_STATUS is
41*4882a593Smuzhiyun * used to identify which port (device) is being talked to. The lower byte
42*4882a593Smuzhiyun * is the data being sent/received.
43*4882a593Smuzhiyun */
44*4882a593Smuzhiyun #define PORT_MASK 0xff00
45*4882a593Smuzhiyun #define DATA_MASK 0x00ff
46*4882a593Smuzhiyun #define PORT_SHIFT 8
47*4882a593Smuzhiyun #define KEYBOARD_PORT 0
48*4882a593Smuzhiyun #define TOUCHPAD_PORT 1
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun /* COMMAND_FIFO_STATUS */
51*4882a593Smuzhiyun #define CMD_CNTR_MASK 0x7 /* Number of pending/unprocessed commands */
52*4882a593Smuzhiyun #define MAX_PENDING_CMDS 4 /* from device specs */
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun /* PJ_RST_INTERRUPT */
55*4882a593Smuzhiyun #define SP_COMMAND_COMPLETE_RESET 0x1
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun /* PJ_INTERRUPT_MASK */
58*4882a593Smuzhiyun #define INT_0 (1 << 0)
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun /* COMMAND_FIFO_STATUS */
61*4882a593Smuzhiyun #define CMD_STS_MASK 0x100
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun struct olpc_apsp {
64*4882a593Smuzhiyun struct device *dev;
65*4882a593Smuzhiyun struct serio *kbio;
66*4882a593Smuzhiyun struct serio *padio;
67*4882a593Smuzhiyun void __iomem *base;
68*4882a593Smuzhiyun int open_count;
69*4882a593Smuzhiyun int irq;
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun
olpc_apsp_write(struct serio * port,unsigned char val)72*4882a593Smuzhiyun static int olpc_apsp_write(struct serio *port, unsigned char val)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun struct olpc_apsp *priv = port->port_data;
75*4882a593Smuzhiyun unsigned int i;
76*4882a593Smuzhiyun u32 which = 0;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun if (port == priv->padio)
79*4882a593Smuzhiyun which = TOUCHPAD_PORT << PORT_SHIFT;
80*4882a593Smuzhiyun else
81*4882a593Smuzhiyun which = KEYBOARD_PORT << PORT_SHIFT;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun dev_dbg(priv->dev, "olpc_apsp_write which=%x val=%x\n", which, val);
84*4882a593Smuzhiyun for (i = 0; i < 50; i++) {
85*4882a593Smuzhiyun u32 sts = readl(priv->base + COMMAND_FIFO_STATUS);
86*4882a593Smuzhiyun if ((sts & CMD_CNTR_MASK) < MAX_PENDING_CMDS) {
87*4882a593Smuzhiyun writel(which | val,
88*4882a593Smuzhiyun priv->base + SECURE_PROCESSOR_COMMAND);
89*4882a593Smuzhiyun return 0;
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun /* SP busy. This has not been seen in practice. */
92*4882a593Smuzhiyun mdelay(1);
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun dev_dbg(priv->dev, "olpc_apsp_write timeout, status=%x\n",
96*4882a593Smuzhiyun readl(priv->base + COMMAND_FIFO_STATUS));
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun return -ETIMEDOUT;
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
olpc_apsp_rx(int irq,void * dev_id)101*4882a593Smuzhiyun static irqreturn_t olpc_apsp_rx(int irq, void *dev_id)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun struct olpc_apsp *priv = dev_id;
104*4882a593Smuzhiyun unsigned int w, tmp;
105*4882a593Smuzhiyun struct serio *serio;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun /*
108*4882a593Smuzhiyun * Write 1 to PJ_RST_INTERRUPT to acknowledge and clear the interrupt
109*4882a593Smuzhiyun * Write 0xff00 to SECURE_PROCESSOR_COMMAND.
110*4882a593Smuzhiyun */
111*4882a593Smuzhiyun tmp = readl(priv->base + PJ_RST_INTERRUPT);
112*4882a593Smuzhiyun if (!(tmp & SP_COMMAND_COMPLETE_RESET)) {
113*4882a593Smuzhiyun dev_warn(priv->dev, "spurious interrupt?\n");
114*4882a593Smuzhiyun return IRQ_NONE;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun w = readl(priv->base + COMMAND_RETURN_STATUS);
118*4882a593Smuzhiyun dev_dbg(priv->dev, "olpc_apsp_rx %x\n", w);
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun if (w >> PORT_SHIFT == KEYBOARD_PORT)
121*4882a593Smuzhiyun serio = priv->kbio;
122*4882a593Smuzhiyun else
123*4882a593Smuzhiyun serio = priv->padio;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun serio_interrupt(serio, w & DATA_MASK, 0);
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun /* Ack and clear interrupt */
128*4882a593Smuzhiyun writel(tmp | SP_COMMAND_COMPLETE_RESET, priv->base + PJ_RST_INTERRUPT);
129*4882a593Smuzhiyun writel(PORT_MASK, priv->base + SECURE_PROCESSOR_COMMAND);
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun pm_wakeup_event(priv->dev, 1000);
132*4882a593Smuzhiyun return IRQ_HANDLED;
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
olpc_apsp_open(struct serio * port)135*4882a593Smuzhiyun static int olpc_apsp_open(struct serio *port)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun struct olpc_apsp *priv = port->port_data;
138*4882a593Smuzhiyun unsigned int tmp;
139*4882a593Smuzhiyun unsigned long l;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun if (priv->open_count++ == 0) {
142*4882a593Smuzhiyun l = readl(priv->base + COMMAND_FIFO_STATUS);
143*4882a593Smuzhiyun if (!(l & CMD_STS_MASK)) {
144*4882a593Smuzhiyun dev_err(priv->dev, "SP cannot accept commands.\n");
145*4882a593Smuzhiyun return -EIO;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun /* Enable interrupt 0 by clearing its bit */
149*4882a593Smuzhiyun tmp = readl(priv->base + PJ_INTERRUPT_MASK);
150*4882a593Smuzhiyun writel(tmp & ~INT_0, priv->base + PJ_INTERRUPT_MASK);
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun return 0;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
olpc_apsp_close(struct serio * port)156*4882a593Smuzhiyun static void olpc_apsp_close(struct serio *port)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun struct olpc_apsp *priv = port->port_data;
159*4882a593Smuzhiyun unsigned int tmp;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun if (--priv->open_count == 0) {
162*4882a593Smuzhiyun /* Disable interrupt 0 */
163*4882a593Smuzhiyun tmp = readl(priv->base + PJ_INTERRUPT_MASK);
164*4882a593Smuzhiyun writel(tmp | INT_0, priv->base + PJ_INTERRUPT_MASK);
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
olpc_apsp_probe(struct platform_device * pdev)168*4882a593Smuzhiyun static int olpc_apsp_probe(struct platform_device *pdev)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun struct serio *kb_serio, *pad_serio;
171*4882a593Smuzhiyun struct olpc_apsp *priv;
172*4882a593Smuzhiyun struct resource *res;
173*4882a593Smuzhiyun int error;
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun priv = devm_kzalloc(&pdev->dev, sizeof(struct olpc_apsp), GFP_KERNEL);
176*4882a593Smuzhiyun if (!priv)
177*4882a593Smuzhiyun return -ENOMEM;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun priv->dev = &pdev->dev;
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
182*4882a593Smuzhiyun priv->base = devm_ioremap_resource(&pdev->dev, res);
183*4882a593Smuzhiyun if (IS_ERR(priv->base)) {
184*4882a593Smuzhiyun dev_err(&pdev->dev, "Failed to map WTM registers\n");
185*4882a593Smuzhiyun return PTR_ERR(priv->base);
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun priv->irq = platform_get_irq(pdev, 0);
189*4882a593Smuzhiyun if (priv->irq < 0)
190*4882a593Smuzhiyun return priv->irq;
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun /* KEYBOARD */
193*4882a593Smuzhiyun kb_serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
194*4882a593Smuzhiyun if (!kb_serio)
195*4882a593Smuzhiyun return -ENOMEM;
196*4882a593Smuzhiyun kb_serio->id.type = SERIO_8042_XL;
197*4882a593Smuzhiyun kb_serio->write = olpc_apsp_write;
198*4882a593Smuzhiyun kb_serio->open = olpc_apsp_open;
199*4882a593Smuzhiyun kb_serio->close = olpc_apsp_close;
200*4882a593Smuzhiyun kb_serio->port_data = priv;
201*4882a593Smuzhiyun kb_serio->dev.parent = &pdev->dev;
202*4882a593Smuzhiyun strlcpy(kb_serio->name, "sp keyboard", sizeof(kb_serio->name));
203*4882a593Smuzhiyun strlcpy(kb_serio->phys, "sp/serio0", sizeof(kb_serio->phys));
204*4882a593Smuzhiyun priv->kbio = kb_serio;
205*4882a593Smuzhiyun serio_register_port(kb_serio);
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun /* TOUCHPAD */
208*4882a593Smuzhiyun pad_serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
209*4882a593Smuzhiyun if (!pad_serio) {
210*4882a593Smuzhiyun error = -ENOMEM;
211*4882a593Smuzhiyun goto err_pad;
212*4882a593Smuzhiyun }
213*4882a593Smuzhiyun pad_serio->id.type = SERIO_8042;
214*4882a593Smuzhiyun pad_serio->write = olpc_apsp_write;
215*4882a593Smuzhiyun pad_serio->open = olpc_apsp_open;
216*4882a593Smuzhiyun pad_serio->close = olpc_apsp_close;
217*4882a593Smuzhiyun pad_serio->port_data = priv;
218*4882a593Smuzhiyun pad_serio->dev.parent = &pdev->dev;
219*4882a593Smuzhiyun strlcpy(pad_serio->name, "sp touchpad", sizeof(pad_serio->name));
220*4882a593Smuzhiyun strlcpy(pad_serio->phys, "sp/serio1", sizeof(pad_serio->phys));
221*4882a593Smuzhiyun priv->padio = pad_serio;
222*4882a593Smuzhiyun serio_register_port(pad_serio);
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun error = request_irq(priv->irq, olpc_apsp_rx, 0, "olpc-apsp", priv);
225*4882a593Smuzhiyun if (error) {
226*4882a593Smuzhiyun dev_err(&pdev->dev, "Failed to request IRQ\n");
227*4882a593Smuzhiyun goto err_irq;
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun device_init_wakeup(priv->dev, 1);
231*4882a593Smuzhiyun platform_set_drvdata(pdev, priv);
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun dev_dbg(&pdev->dev, "probed successfully.\n");
234*4882a593Smuzhiyun return 0;
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun err_irq:
237*4882a593Smuzhiyun serio_unregister_port(pad_serio);
238*4882a593Smuzhiyun err_pad:
239*4882a593Smuzhiyun serio_unregister_port(kb_serio);
240*4882a593Smuzhiyun return error;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun
olpc_apsp_remove(struct platform_device * pdev)243*4882a593Smuzhiyun static int olpc_apsp_remove(struct platform_device *pdev)
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun struct olpc_apsp *priv = platform_get_drvdata(pdev);
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun free_irq(priv->irq, priv);
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun serio_unregister_port(priv->kbio);
250*4882a593Smuzhiyun serio_unregister_port(priv->padio);
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun return 0;
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun static const struct of_device_id olpc_apsp_dt_ids[] = {
256*4882a593Smuzhiyun { .compatible = "olpc,ap-sp", },
257*4882a593Smuzhiyun {}
258*4882a593Smuzhiyun };
259*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, olpc_apsp_dt_ids);
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun static struct platform_driver olpc_apsp_driver = {
262*4882a593Smuzhiyun .probe = olpc_apsp_probe,
263*4882a593Smuzhiyun .remove = olpc_apsp_remove,
264*4882a593Smuzhiyun .driver = {
265*4882a593Smuzhiyun .name = "olpc-apsp",
266*4882a593Smuzhiyun .of_match_table = olpc_apsp_dt_ids,
267*4882a593Smuzhiyun },
268*4882a593Smuzhiyun };
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun MODULE_DESCRIPTION("OLPC AP-SP serio driver");
271*4882a593Smuzhiyun MODULE_LICENSE("GPL");
272*4882a593Smuzhiyun module_platform_driver(olpc_apsp_driver);
273