1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun #ifndef _I8042_IO_H 3*4882a593Smuzhiyun #define _I8042_IO_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun /* 7*4882a593Smuzhiyun * Names. 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define I8042_KBD_PHYS_DESC "isa0060/serio0" 11*4882a593Smuzhiyun #define I8042_AUX_PHYS_DESC "isa0060/serio1" 12*4882a593Smuzhiyun #define I8042_MUX_PHYS_DESC "isa0060/serio%d" 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun /* 15*4882a593Smuzhiyun * IRQs. 16*4882a593Smuzhiyun */ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #ifdef __alpha__ 19*4882a593Smuzhiyun # define I8042_KBD_IRQ 1 20*4882a593Smuzhiyun # define I8042_AUX_IRQ (RTC_PORT(0) == 0x170 ? 9 : 12) /* Jensen is special */ 21*4882a593Smuzhiyun #elif defined(__arm__) 22*4882a593Smuzhiyun /* defined in include/asm-arm/arch-xxx/irqs.h */ 23*4882a593Smuzhiyun #include <asm/irq.h> 24*4882a593Smuzhiyun #elif defined(CONFIG_PPC) 25*4882a593Smuzhiyun extern int of_i8042_kbd_irq; 26*4882a593Smuzhiyun extern int of_i8042_aux_irq; 27*4882a593Smuzhiyun # define I8042_KBD_IRQ of_i8042_kbd_irq 28*4882a593Smuzhiyun # define I8042_AUX_IRQ of_i8042_aux_irq 29*4882a593Smuzhiyun #else 30*4882a593Smuzhiyun # define I8042_KBD_IRQ 1 31*4882a593Smuzhiyun # define I8042_AUX_IRQ 12 32*4882a593Smuzhiyun #endif 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun /* 36*4882a593Smuzhiyun * Register numbers. 37*4882a593Smuzhiyun */ 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #define I8042_COMMAND_REG 0x64 40*4882a593Smuzhiyun #define I8042_STATUS_REG 0x64 41*4882a593Smuzhiyun #define I8042_DATA_REG 0x60 42*4882a593Smuzhiyun i8042_read_data(void)43*4882a593Smuzhiyunstatic inline int i8042_read_data(void) 44*4882a593Smuzhiyun { 45*4882a593Smuzhiyun return inb(I8042_DATA_REG); 46*4882a593Smuzhiyun } 47*4882a593Smuzhiyun i8042_read_status(void)48*4882a593Smuzhiyunstatic inline int i8042_read_status(void) 49*4882a593Smuzhiyun { 50*4882a593Smuzhiyun return inb(I8042_STATUS_REG); 51*4882a593Smuzhiyun } 52*4882a593Smuzhiyun i8042_write_data(int val)53*4882a593Smuzhiyunstatic inline void i8042_write_data(int val) 54*4882a593Smuzhiyun { 55*4882a593Smuzhiyun outb(val, I8042_DATA_REG); 56*4882a593Smuzhiyun } 57*4882a593Smuzhiyun i8042_write_command(int val)58*4882a593Smuzhiyunstatic inline void i8042_write_command(int val) 59*4882a593Smuzhiyun { 60*4882a593Smuzhiyun outb(val, I8042_COMMAND_REG); 61*4882a593Smuzhiyun } 62*4882a593Smuzhiyun i8042_platform_init(void)63*4882a593Smuzhiyunstatic inline int i8042_platform_init(void) 64*4882a593Smuzhiyun { 65*4882a593Smuzhiyun /* 66*4882a593Smuzhiyun * On some platforms touching the i8042 data register region can do really 67*4882a593Smuzhiyun * bad things. Because of this the region is always reserved on such boxes. 68*4882a593Smuzhiyun */ 69*4882a593Smuzhiyun #if defined(CONFIG_PPC) 70*4882a593Smuzhiyun if (check_legacy_ioport(I8042_DATA_REG)) 71*4882a593Smuzhiyun return -ENODEV; 72*4882a593Smuzhiyun #endif 73*4882a593Smuzhiyun #if !defined(__sh__) && !defined(__alpha__) 74*4882a593Smuzhiyun if (!request_region(I8042_DATA_REG, 16, "i8042")) 75*4882a593Smuzhiyun return -EBUSY; 76*4882a593Smuzhiyun #endif 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun i8042_reset = I8042_RESET_ALWAYS; 79*4882a593Smuzhiyun return 0; 80*4882a593Smuzhiyun } 81*4882a593Smuzhiyun i8042_platform_exit(void)82*4882a593Smuzhiyunstatic inline void i8042_platform_exit(void) 83*4882a593Smuzhiyun { 84*4882a593Smuzhiyun #if !defined(__sh__) && !defined(__alpha__) 85*4882a593Smuzhiyun release_region(I8042_DATA_REG, 16); 86*4882a593Smuzhiyun #endif 87*4882a593Smuzhiyun } 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun #endif /* _I8042_IO_H */ 90