1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Driver is originally developed by Pavel Sokolov <psokolov@synopsys.com>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/err.h>
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/interrupt.h>
11*4882a593Smuzhiyun #include <linux/input.h>
12*4882a593Smuzhiyun #include <linux/serio.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun #include <linux/of.h>
15*4882a593Smuzhiyun #include <linux/io.h>
16*4882a593Smuzhiyun #include <linux/kernel.h>
17*4882a593Smuzhiyun #include <linux/slab.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #define ARC_PS2_PORTS 2
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define ARC_ARC_PS2_ID 0x0001f609
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #define STAT_TIMEOUT 128
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #define PS2_STAT_RX_FRM_ERR (1)
26*4882a593Smuzhiyun #define PS2_STAT_RX_BUF_OVER (1 << 1)
27*4882a593Smuzhiyun #define PS2_STAT_RX_INT_EN (1 << 2)
28*4882a593Smuzhiyun #define PS2_STAT_RX_VAL (1 << 3)
29*4882a593Smuzhiyun #define PS2_STAT_TX_ISNOT_FUL (1 << 4)
30*4882a593Smuzhiyun #define PS2_STAT_TX_INT_EN (1 << 5)
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun struct arc_ps2_port {
33*4882a593Smuzhiyun void __iomem *data_addr;
34*4882a593Smuzhiyun void __iomem *status_addr;
35*4882a593Smuzhiyun struct serio *io;
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun struct arc_ps2_data {
39*4882a593Smuzhiyun struct arc_ps2_port port[ARC_PS2_PORTS];
40*4882a593Smuzhiyun void __iomem *addr;
41*4882a593Smuzhiyun unsigned int frame_error;
42*4882a593Smuzhiyun unsigned int buf_overflow;
43*4882a593Smuzhiyun unsigned int total_int;
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun
arc_ps2_check_rx(struct arc_ps2_data * arc_ps2,struct arc_ps2_port * port)46*4882a593Smuzhiyun static void arc_ps2_check_rx(struct arc_ps2_data *arc_ps2,
47*4882a593Smuzhiyun struct arc_ps2_port *port)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun unsigned int timeout = 1000;
50*4882a593Smuzhiyun unsigned int flag, status;
51*4882a593Smuzhiyun unsigned char data;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun do {
54*4882a593Smuzhiyun status = ioread32(port->status_addr);
55*4882a593Smuzhiyun if (!(status & PS2_STAT_RX_VAL))
56*4882a593Smuzhiyun return;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun data = ioread32(port->data_addr) & 0xff;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun flag = 0;
61*4882a593Smuzhiyun arc_ps2->total_int++;
62*4882a593Smuzhiyun if (status & PS2_STAT_RX_FRM_ERR) {
63*4882a593Smuzhiyun arc_ps2->frame_error++;
64*4882a593Smuzhiyun flag |= SERIO_PARITY;
65*4882a593Smuzhiyun } else if (status & PS2_STAT_RX_BUF_OVER) {
66*4882a593Smuzhiyun arc_ps2->buf_overflow++;
67*4882a593Smuzhiyun flag |= SERIO_FRAME;
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun serio_interrupt(port->io, data, flag);
71*4882a593Smuzhiyun } while (--timeout);
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun dev_err(&port->io->dev, "PS/2 hardware stuck\n");
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
arc_ps2_interrupt(int irq,void * dev)76*4882a593Smuzhiyun static irqreturn_t arc_ps2_interrupt(int irq, void *dev)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun struct arc_ps2_data *arc_ps2 = dev;
79*4882a593Smuzhiyun int i;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun for (i = 0; i < ARC_PS2_PORTS; i++)
82*4882a593Smuzhiyun arc_ps2_check_rx(arc_ps2, &arc_ps2->port[i]);
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun return IRQ_HANDLED;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
arc_ps2_write(struct serio * io,unsigned char val)87*4882a593Smuzhiyun static int arc_ps2_write(struct serio *io, unsigned char val)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun unsigned status;
90*4882a593Smuzhiyun struct arc_ps2_port *port = io->port_data;
91*4882a593Smuzhiyun int timeout = STAT_TIMEOUT;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun do {
94*4882a593Smuzhiyun status = ioread32(port->status_addr);
95*4882a593Smuzhiyun cpu_relax();
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun if (status & PS2_STAT_TX_ISNOT_FUL) {
98*4882a593Smuzhiyun iowrite32(val & 0xff, port->data_addr);
99*4882a593Smuzhiyun return 0;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun } while (--timeout);
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun dev_err(&io->dev, "write timeout\n");
105*4882a593Smuzhiyun return -ETIMEDOUT;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
arc_ps2_open(struct serio * io)108*4882a593Smuzhiyun static int arc_ps2_open(struct serio *io)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun struct arc_ps2_port *port = io->port_data;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun iowrite32(PS2_STAT_RX_INT_EN, port->status_addr);
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun return 0;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
arc_ps2_close(struct serio * io)117*4882a593Smuzhiyun static void arc_ps2_close(struct serio *io)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun struct arc_ps2_port *port = io->port_data;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun iowrite32(ioread32(port->status_addr) & ~PS2_STAT_RX_INT_EN,
122*4882a593Smuzhiyun port->status_addr);
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
arc_ps2_calc_addr(struct arc_ps2_data * arc_ps2,int index,bool status)125*4882a593Smuzhiyun static void __iomem *arc_ps2_calc_addr(struct arc_ps2_data *arc_ps2,
126*4882a593Smuzhiyun int index, bool status)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun void __iomem *addr;
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun addr = arc_ps2->addr + 4 + 4 * index;
131*4882a593Smuzhiyun if (status)
132*4882a593Smuzhiyun addr += ARC_PS2_PORTS * 4;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun return addr;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
arc_ps2_inhibit_ports(struct arc_ps2_data * arc_ps2)137*4882a593Smuzhiyun static void arc_ps2_inhibit_ports(struct arc_ps2_data *arc_ps2)
138*4882a593Smuzhiyun {
139*4882a593Smuzhiyun void __iomem *addr;
140*4882a593Smuzhiyun u32 val;
141*4882a593Smuzhiyun int i;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun for (i = 0; i < ARC_PS2_PORTS; i++) {
144*4882a593Smuzhiyun addr = arc_ps2_calc_addr(arc_ps2, i, true);
145*4882a593Smuzhiyun val = ioread32(addr);
146*4882a593Smuzhiyun val &= ~(PS2_STAT_RX_INT_EN | PS2_STAT_TX_INT_EN);
147*4882a593Smuzhiyun iowrite32(val, addr);
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun
arc_ps2_create_port(struct platform_device * pdev,struct arc_ps2_data * arc_ps2,int index)151*4882a593Smuzhiyun static int arc_ps2_create_port(struct platform_device *pdev,
152*4882a593Smuzhiyun struct arc_ps2_data *arc_ps2,
153*4882a593Smuzhiyun int index)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun struct arc_ps2_port *port = &arc_ps2->port[index];
156*4882a593Smuzhiyun struct serio *io;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun io = kzalloc(sizeof(struct serio), GFP_KERNEL);
159*4882a593Smuzhiyun if (!io)
160*4882a593Smuzhiyun return -ENOMEM;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun io->id.type = SERIO_8042;
163*4882a593Smuzhiyun io->write = arc_ps2_write;
164*4882a593Smuzhiyun io->open = arc_ps2_open;
165*4882a593Smuzhiyun io->close = arc_ps2_close;
166*4882a593Smuzhiyun snprintf(io->name, sizeof(io->name), "ARC PS/2 port%d", index);
167*4882a593Smuzhiyun snprintf(io->phys, sizeof(io->phys), "arc/serio%d", index);
168*4882a593Smuzhiyun io->port_data = port;
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun port->io = io;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun port->data_addr = arc_ps2_calc_addr(arc_ps2, index, false);
173*4882a593Smuzhiyun port->status_addr = arc_ps2_calc_addr(arc_ps2, index, true);
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun dev_dbg(&pdev->dev, "port%d is allocated (data = 0x%p, status = 0x%p)\n",
176*4882a593Smuzhiyun index, port->data_addr, port->status_addr);
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun serio_register_port(port->io);
179*4882a593Smuzhiyun return 0;
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun
arc_ps2_probe(struct platform_device * pdev)182*4882a593Smuzhiyun static int arc_ps2_probe(struct platform_device *pdev)
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun struct arc_ps2_data *arc_ps2;
185*4882a593Smuzhiyun struct resource *res;
186*4882a593Smuzhiyun int irq;
187*4882a593Smuzhiyun int error, id, i;
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun irq = platform_get_irq_byname(pdev, "arc_ps2_irq");
190*4882a593Smuzhiyun if (irq < 0)
191*4882a593Smuzhiyun return -EINVAL;
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun arc_ps2 = devm_kzalloc(&pdev->dev, sizeof(struct arc_ps2_data),
194*4882a593Smuzhiyun GFP_KERNEL);
195*4882a593Smuzhiyun if (!arc_ps2) {
196*4882a593Smuzhiyun dev_err(&pdev->dev, "out of memory\n");
197*4882a593Smuzhiyun return -ENOMEM;
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
201*4882a593Smuzhiyun arc_ps2->addr = devm_ioremap_resource(&pdev->dev, res);
202*4882a593Smuzhiyun if (IS_ERR(arc_ps2->addr))
203*4882a593Smuzhiyun return PTR_ERR(arc_ps2->addr);
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun dev_info(&pdev->dev, "irq = %d, address = 0x%p, ports = %i\n",
206*4882a593Smuzhiyun irq, arc_ps2->addr, ARC_PS2_PORTS);
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun id = ioread32(arc_ps2->addr);
209*4882a593Smuzhiyun if (id != ARC_ARC_PS2_ID) {
210*4882a593Smuzhiyun dev_err(&pdev->dev, "device id does not match\n");
211*4882a593Smuzhiyun return -ENXIO;
212*4882a593Smuzhiyun }
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun arc_ps2_inhibit_ports(arc_ps2);
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun error = devm_request_irq(&pdev->dev, irq, arc_ps2_interrupt,
217*4882a593Smuzhiyun 0, "arc_ps2", arc_ps2);
218*4882a593Smuzhiyun if (error) {
219*4882a593Smuzhiyun dev_err(&pdev->dev, "Could not allocate IRQ\n");
220*4882a593Smuzhiyun return error;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun for (i = 0; i < ARC_PS2_PORTS; i++) {
224*4882a593Smuzhiyun error = arc_ps2_create_port(pdev, arc_ps2, i);
225*4882a593Smuzhiyun if (error) {
226*4882a593Smuzhiyun while (--i >= 0)
227*4882a593Smuzhiyun serio_unregister_port(arc_ps2->port[i].io);
228*4882a593Smuzhiyun return error;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun platform_set_drvdata(pdev, arc_ps2);
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun return 0;
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun
arc_ps2_remove(struct platform_device * pdev)237*4882a593Smuzhiyun static int arc_ps2_remove(struct platform_device *pdev)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun struct arc_ps2_data *arc_ps2 = platform_get_drvdata(pdev);
240*4882a593Smuzhiyun int i;
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun for (i = 0; i < ARC_PS2_PORTS; i++)
243*4882a593Smuzhiyun serio_unregister_port(arc_ps2->port[i].io);
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun dev_dbg(&pdev->dev, "interrupt count = %i\n", arc_ps2->total_int);
246*4882a593Smuzhiyun dev_dbg(&pdev->dev, "frame error count = %i\n", arc_ps2->frame_error);
247*4882a593Smuzhiyun dev_dbg(&pdev->dev, "buffer overflow count = %i\n",
248*4882a593Smuzhiyun arc_ps2->buf_overflow);
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun return 0;
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun #ifdef CONFIG_OF
254*4882a593Smuzhiyun static const struct of_device_id arc_ps2_match[] = {
255*4882a593Smuzhiyun { .compatible = "snps,arc_ps2" },
256*4882a593Smuzhiyun { },
257*4882a593Smuzhiyun };
258*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, arc_ps2_match);
259*4882a593Smuzhiyun #endif
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun static struct platform_driver arc_ps2_driver = {
262*4882a593Smuzhiyun .driver = {
263*4882a593Smuzhiyun .name = "arc_ps2",
264*4882a593Smuzhiyun .of_match_table = of_match_ptr(arc_ps2_match),
265*4882a593Smuzhiyun },
266*4882a593Smuzhiyun .probe = arc_ps2_probe,
267*4882a593Smuzhiyun .remove = arc_ps2_remove,
268*4882a593Smuzhiyun };
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun module_platform_driver(arc_ps2_driver);
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun MODULE_LICENSE("GPL");
273*4882a593Smuzhiyun MODULE_AUTHOR("Pavel Sokolov <psokolov@synopsys.com>");
274*4882a593Smuzhiyun MODULE_DESCRIPTION("ARC PS/2 Driver");
275