xref: /OK3568_Linux_fs/kernel/drivers/input/serio/apbps2.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2013 Aeroflex Gaisler
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * This driver supports the APBPS2 PS/2 core available in the GRLIB
6*4882a593Smuzhiyun  * VHDL IP core library.
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Full documentation of the APBPS2 core can be found here:
9*4882a593Smuzhiyun  * http://www.gaisler.com/products/grlib/grip.pdf
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * See "Documentation/devicetree/bindings/input/ps2keyb-mouse-apbps2.txt" for
12*4882a593Smuzhiyun  * information on open firmware properties.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  * Contributors: Daniel Hellstrom <daniel@gaisler.com>
15*4882a593Smuzhiyun  */
16*4882a593Smuzhiyun #include <linux/platform_device.h>
17*4882a593Smuzhiyun #include <linux/of_device.h>
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/serio.h>
20*4882a593Smuzhiyun #include <linux/errno.h>
21*4882a593Smuzhiyun #include <linux/interrupt.h>
22*4882a593Smuzhiyun #include <linux/of_irq.h>
23*4882a593Smuzhiyun #include <linux/device.h>
24*4882a593Smuzhiyun #include <linux/delay.h>
25*4882a593Smuzhiyun #include <linux/err.h>
26*4882a593Smuzhiyun #include <linux/slab.h>
27*4882a593Smuzhiyun #include <linux/string.h>
28*4882a593Smuzhiyun #include <linux/kernel.h>
29*4882a593Smuzhiyun #include <linux/io.h>
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun struct apbps2_regs {
32*4882a593Smuzhiyun 	u32 __iomem data;	/* 0x00 */
33*4882a593Smuzhiyun 	u32 __iomem status;	/* 0x04 */
34*4882a593Smuzhiyun 	u32 __iomem ctrl;	/* 0x08 */
35*4882a593Smuzhiyun 	u32 __iomem reload;	/* 0x0c */
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #define APBPS2_STATUS_DR	(1<<0)
39*4882a593Smuzhiyun #define APBPS2_STATUS_PE	(1<<1)
40*4882a593Smuzhiyun #define APBPS2_STATUS_FE	(1<<2)
41*4882a593Smuzhiyun #define APBPS2_STATUS_KI	(1<<3)
42*4882a593Smuzhiyun #define APBPS2_STATUS_RF	(1<<4)
43*4882a593Smuzhiyun #define APBPS2_STATUS_TF	(1<<5)
44*4882a593Smuzhiyun #define APBPS2_STATUS_TCNT	(0x1f<<22)
45*4882a593Smuzhiyun #define APBPS2_STATUS_RCNT	(0x1f<<27)
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun #define APBPS2_CTRL_RE		(1<<0)
48*4882a593Smuzhiyun #define APBPS2_CTRL_TE		(1<<1)
49*4882a593Smuzhiyun #define APBPS2_CTRL_RI		(1<<2)
50*4882a593Smuzhiyun #define APBPS2_CTRL_TI		(1<<3)
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun struct apbps2_priv {
53*4882a593Smuzhiyun 	struct serio		*io;
54*4882a593Smuzhiyun 	struct apbps2_regs	__iomem *regs;
55*4882a593Smuzhiyun };
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun static int apbps2_idx;
58*4882a593Smuzhiyun 
apbps2_isr(int irq,void * dev_id)59*4882a593Smuzhiyun static irqreturn_t apbps2_isr(int irq, void *dev_id)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun 	struct apbps2_priv *priv = dev_id;
62*4882a593Smuzhiyun 	unsigned long status, data, rxflags;
63*4882a593Smuzhiyun 	irqreturn_t ret = IRQ_NONE;
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 	while ((status = ioread32be(&priv->regs->status)) & APBPS2_STATUS_DR) {
66*4882a593Smuzhiyun 		data = ioread32be(&priv->regs->data);
67*4882a593Smuzhiyun 		rxflags = (status & APBPS2_STATUS_PE) ? SERIO_PARITY : 0;
68*4882a593Smuzhiyun 		rxflags |= (status & APBPS2_STATUS_FE) ? SERIO_FRAME : 0;
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 		/* clear error bits? */
71*4882a593Smuzhiyun 		if (rxflags)
72*4882a593Smuzhiyun 			iowrite32be(0, &priv->regs->status);
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 		serio_interrupt(priv->io, data, rxflags);
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 		ret = IRQ_HANDLED;
77*4882a593Smuzhiyun 	}
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	return ret;
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun 
apbps2_write(struct serio * io,unsigned char val)82*4882a593Smuzhiyun static int apbps2_write(struct serio *io, unsigned char val)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun 	struct apbps2_priv *priv = io->port_data;
85*4882a593Smuzhiyun 	unsigned int tleft = 10000; /* timeout in 100ms */
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	/* delay until PS/2 controller has room for more chars */
88*4882a593Smuzhiyun 	while ((ioread32be(&priv->regs->status) & APBPS2_STATUS_TF) && tleft--)
89*4882a593Smuzhiyun 		udelay(10);
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 	if ((ioread32be(&priv->regs->status) & APBPS2_STATUS_TF) == 0) {
92*4882a593Smuzhiyun 		iowrite32be(val, &priv->regs->data);
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 		iowrite32be(APBPS2_CTRL_RE | APBPS2_CTRL_RI | APBPS2_CTRL_TE,
95*4882a593Smuzhiyun 				&priv->regs->ctrl);
96*4882a593Smuzhiyun 		return 0;
97*4882a593Smuzhiyun 	}
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	return -ETIMEDOUT;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun 
apbps2_open(struct serio * io)102*4882a593Smuzhiyun static int apbps2_open(struct serio *io)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun 	struct apbps2_priv *priv = io->port_data;
105*4882a593Smuzhiyun 	int limit;
106*4882a593Smuzhiyun 	unsigned long tmp;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	/* clear error flags */
109*4882a593Smuzhiyun 	iowrite32be(0, &priv->regs->status);
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	/* Clear old data if available (unlikely) */
112*4882a593Smuzhiyun 	limit = 1024;
113*4882a593Smuzhiyun 	while ((ioread32be(&priv->regs->status) & APBPS2_STATUS_DR) && --limit)
114*4882a593Smuzhiyun 		tmp = ioread32be(&priv->regs->data);
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	/* Enable reciever and it's interrupt */
117*4882a593Smuzhiyun 	iowrite32be(APBPS2_CTRL_RE | APBPS2_CTRL_RI, &priv->regs->ctrl);
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	return 0;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun 
apbps2_close(struct serio * io)122*4882a593Smuzhiyun static void apbps2_close(struct serio *io)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun 	struct apbps2_priv *priv = io->port_data;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	/* stop interrupts at PS/2 HW level */
127*4882a593Smuzhiyun 	iowrite32be(0, &priv->regs->ctrl);
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun /* Initialize one APBPS2 PS/2 core */
apbps2_of_probe(struct platform_device * ofdev)131*4882a593Smuzhiyun static int apbps2_of_probe(struct platform_device *ofdev)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun 	struct apbps2_priv *priv;
134*4882a593Smuzhiyun 	int irq, err;
135*4882a593Smuzhiyun 	u32 freq_hz;
136*4882a593Smuzhiyun 	struct resource *res;
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	priv = devm_kzalloc(&ofdev->dev, sizeof(*priv), GFP_KERNEL);
139*4882a593Smuzhiyun 	if (!priv) {
140*4882a593Smuzhiyun 		dev_err(&ofdev->dev, "memory allocation failed\n");
141*4882a593Smuzhiyun 		return -ENOMEM;
142*4882a593Smuzhiyun 	}
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	/* Find Device Address */
145*4882a593Smuzhiyun 	res = platform_get_resource(ofdev, IORESOURCE_MEM, 0);
146*4882a593Smuzhiyun 	priv->regs = devm_ioremap_resource(&ofdev->dev, res);
147*4882a593Smuzhiyun 	if (IS_ERR(priv->regs))
148*4882a593Smuzhiyun 		return PTR_ERR(priv->regs);
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	/* Reset hardware, disable interrupt */
151*4882a593Smuzhiyun 	iowrite32be(0, &priv->regs->ctrl);
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	/* IRQ */
154*4882a593Smuzhiyun 	irq = irq_of_parse_and_map(ofdev->dev.of_node, 0);
155*4882a593Smuzhiyun 	err = devm_request_irq(&ofdev->dev, irq, apbps2_isr,
156*4882a593Smuzhiyun 				IRQF_SHARED, "apbps2", priv);
157*4882a593Smuzhiyun 	if (err) {
158*4882a593Smuzhiyun 		dev_err(&ofdev->dev, "request IRQ%d failed\n", irq);
159*4882a593Smuzhiyun 		return err;
160*4882a593Smuzhiyun 	}
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	/* Get core frequency */
163*4882a593Smuzhiyun 	if (of_property_read_u32(ofdev->dev.of_node, "freq", &freq_hz)) {
164*4882a593Smuzhiyun 		dev_err(&ofdev->dev, "unable to get core frequency\n");
165*4882a593Smuzhiyun 		return -EINVAL;
166*4882a593Smuzhiyun 	}
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	/* Set reload register to core freq in kHz/10 */
169*4882a593Smuzhiyun 	iowrite32be(freq_hz / 10000, &priv->regs->reload);
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	priv->io = kzalloc(sizeof(struct serio), GFP_KERNEL);
172*4882a593Smuzhiyun 	if (!priv->io)
173*4882a593Smuzhiyun 		return -ENOMEM;
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	priv->io->id.type = SERIO_8042;
176*4882a593Smuzhiyun 	priv->io->open = apbps2_open;
177*4882a593Smuzhiyun 	priv->io->close = apbps2_close;
178*4882a593Smuzhiyun 	priv->io->write = apbps2_write;
179*4882a593Smuzhiyun 	priv->io->port_data = priv;
180*4882a593Smuzhiyun 	strlcpy(priv->io->name, "APBPS2 PS/2", sizeof(priv->io->name));
181*4882a593Smuzhiyun 	snprintf(priv->io->phys, sizeof(priv->io->phys),
182*4882a593Smuzhiyun 		 "apbps2_%d", apbps2_idx++);
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	dev_info(&ofdev->dev, "irq = %d, base = 0x%p\n", irq, priv->regs);
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	serio_register_port(priv->io);
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	platform_set_drvdata(ofdev, priv);
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	return 0;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun 
apbps2_of_remove(struct platform_device * of_dev)193*4882a593Smuzhiyun static int apbps2_of_remove(struct platform_device *of_dev)
194*4882a593Smuzhiyun {
195*4882a593Smuzhiyun 	struct apbps2_priv *priv = platform_get_drvdata(of_dev);
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	serio_unregister_port(priv->io);
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	return 0;
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun static const struct of_device_id apbps2_of_match[] = {
203*4882a593Smuzhiyun 	{ .name = "GAISLER_APBPS2", },
204*4882a593Smuzhiyun 	{ .name = "01_060", },
205*4882a593Smuzhiyun 	{}
206*4882a593Smuzhiyun };
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, apbps2_of_match);
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun static struct platform_driver apbps2_of_driver = {
211*4882a593Smuzhiyun 	.driver = {
212*4882a593Smuzhiyun 		.name = "grlib-apbps2",
213*4882a593Smuzhiyun 		.of_match_table = apbps2_of_match,
214*4882a593Smuzhiyun 	},
215*4882a593Smuzhiyun 	.probe = apbps2_of_probe,
216*4882a593Smuzhiyun 	.remove = apbps2_of_remove,
217*4882a593Smuzhiyun };
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun module_platform_driver(apbps2_of_driver);
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun MODULE_AUTHOR("Aeroflex Gaisler AB.");
222*4882a593Smuzhiyun MODULE_DESCRIPTION("GRLIB APBPS2 PS/2 serial I/O");
223*4882a593Smuzhiyun MODULE_LICENSE("GPL");
224