1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * drivers/input/sensors/accel/bma2xx.c
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Author: Bin Yang <yangbin@rock - chips.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * This software is licensed under the terms of the GNU General Public
9*4882a593Smuzhiyun * License version 2, as published by the Free Software Foundation, and
10*4882a593Smuzhiyun * may be copied, distributed, and modified under those terms.
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful,
13*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of
14*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15*4882a593Smuzhiyun * GNU General Public License for more details.
16*4882a593Smuzhiyun */
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/init.h>
20*4882a593Smuzhiyun #include <linux/i2c.h>
21*4882a593Smuzhiyun #include <linux/input.h>
22*4882a593Smuzhiyun #include <linux/workqueue.h>
23*4882a593Smuzhiyun #include <linux/mutex.h>
24*4882a593Smuzhiyun #include <linux/slab.h>
25*4882a593Smuzhiyun #include <linux/mutex.h>
26*4882a593Smuzhiyun #include <linux/interrupt.h>
27*4882a593Smuzhiyun #include <linux/delay.h>
28*4882a593Smuzhiyun #include <linux/fs.h>
29*4882a593Smuzhiyun #include <linux/uaccess.h>
30*4882a593Smuzhiyun #ifdef CONFIG_HAS_EARLYSUSPEND
31*4882a593Smuzhiyun #include <linux/earlysuspend.h>
32*4882a593Smuzhiyun #endif
33*4882a593Smuzhiyun #include <linux/sensor-dev.h>
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define BMA2X2_RANGE_SET 3 /* +/ - 2G */
36*4882a593Smuzhiyun #define BMA2X2_BW_SET 12 /* 125HZ */
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun #define LOW_G_INTERRUPT REL_Z
39*4882a593Smuzhiyun #define HIGH_G_INTERRUPT REL_HWHEEL
40*4882a593Smuzhiyun #define SLOP_INTERRUPT REL_DIAL
41*4882a593Smuzhiyun #define DOUBLE_TAP_INTERRUPT REL_WHEEL
42*4882a593Smuzhiyun #define SINGLE_TAP_INTERRUPT REL_MISC
43*4882a593Smuzhiyun #define ORIENT_INTERRUPT ABS_PRESSURE
44*4882a593Smuzhiyun #define FLAT_INTERRUPT ABS_DISTANCE
45*4882a593Smuzhiyun #define SLOW_NO_MOTION_INTERRUPT REL_Y
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun #define HIGH_G_INTERRUPT_X_HAPPENED 1
48*4882a593Smuzhiyun #define HIGH_G_INTERRUPT_Y_HAPPENED 2
49*4882a593Smuzhiyun #define HIGH_G_INTERRUPT_Z_HAPPENED 3
50*4882a593Smuzhiyun #define HIGH_G_INTERRUPT_X_NEGATIVE_HAPPENED 4
51*4882a593Smuzhiyun #define HIGH_G_INTERRUPT_Y_NEGATIVE_HAPPENED 5
52*4882a593Smuzhiyun #define HIGH_G_INTERRUPT_Z_NEGATIVE_HAPPENED 6
53*4882a593Smuzhiyun #define SLOPE_INTERRUPT_X_HAPPENED 7
54*4882a593Smuzhiyun #define SLOPE_INTERRUPT_Y_HAPPENED 8
55*4882a593Smuzhiyun #define SLOPE_INTERRUPT_Z_HAPPENED 9
56*4882a593Smuzhiyun #define SLOPE_INTERRUPT_X_NEGATIVE_HAPPENED 10
57*4882a593Smuzhiyun #define SLOPE_INTERRUPT_Y_NEGATIVE_HAPPENED 11
58*4882a593Smuzhiyun #define SLOPE_INTERRUPT_Z_NEGATIVE_HAPPENED 12
59*4882a593Smuzhiyun #define DOUBLE_TAP_INTERRUPT_HAPPENED 13
60*4882a593Smuzhiyun #define SINGLE_TAP_INTERRUPT_HAPPENED 14
61*4882a593Smuzhiyun #define UPWARD_PORTRAIT_UP_INTERRUPT_HAPPENED 15
62*4882a593Smuzhiyun #define UPWARD_PORTRAIT_DOWN_INTERRUPT_HAPPENED 16
63*4882a593Smuzhiyun #define UPWARD_LANDSCAPE_LEFT_INTERRUPT_HAPPENED 17
64*4882a593Smuzhiyun #define UPWARD_LANDSCAPE_RIGHT_INTERRUPT_HAPPENED 18
65*4882a593Smuzhiyun #define DOWNWARD_PORTRAIT_UP_INTERRUPT_HAPPENED 19
66*4882a593Smuzhiyun #define DOWNWARD_PORTRAIT_DOWN_INTERRUPT_HAPPENED 20
67*4882a593Smuzhiyun #define DOWNWARD_LANDSCAPE_LEFT_INTERRUPT_HAPPENED 21
68*4882a593Smuzhiyun #define DOWNWARD_LANDSCAPE_RIGHT_INTERRUPT_HAPPENED 22
69*4882a593Smuzhiyun #define FLAT_INTERRUPT_TRUE_HAPPENED 23
70*4882a593Smuzhiyun #define FLAT_INTERRUPT_FALSE_HAPPENED 24
71*4882a593Smuzhiyun #define LOW_G_INTERRUPT_HAPPENED 25
72*4882a593Smuzhiyun #define SLOW_NO_MOTION_INTERRUPT_HAPPENED 26
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun #define PAD_LOWG 0
75*4882a593Smuzhiyun #define PAD_HIGHG 1
76*4882a593Smuzhiyun #define PAD_SLOP 2
77*4882a593Smuzhiyun #define PAD_DOUBLE_TAP 3
78*4882a593Smuzhiyun #define PAD_SINGLE_TAP 4
79*4882a593Smuzhiyun #define PAD_ORIENT 5
80*4882a593Smuzhiyun #define PAD_FLAT 6
81*4882a593Smuzhiyun #define PAD_SLOW_NO_MOTION 7
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun #define BMA2X2_CHIP_ID_REG 0x00
84*4882a593Smuzhiyun #define BMA2X2_VERSION_REG 0x01
85*4882a593Smuzhiyun #define BMA2X2_X_AXIS_LSB_REG 0x02
86*4882a593Smuzhiyun #define BMA2X2_X_AXIS_MSB_REG 0x03
87*4882a593Smuzhiyun #define BMA2X2_Y_AXIS_LSB_REG 0x04
88*4882a593Smuzhiyun #define BMA2X2_Y_AXIS_MSB_REG 0x05
89*4882a593Smuzhiyun #define BMA2X2_Z_AXIS_LSB_REG 0x06
90*4882a593Smuzhiyun #define BMA2X2_Z_AXIS_MSB_REG 0x07
91*4882a593Smuzhiyun #define BMA2X2_TEMPERATURE_REG 0x08
92*4882a593Smuzhiyun #define BMA2X2_STATUS1_REG 0x09
93*4882a593Smuzhiyun #define BMA2X2_STATUS2_REG 0x0A
94*4882a593Smuzhiyun #define BMA2X2_STATUS_TAP_SLOPE_REG 0x0B
95*4882a593Smuzhiyun #define BMA2X2_STATUS_ORIENT_HIGH_REG 0x0C
96*4882a593Smuzhiyun #define BMA2X2_STATUS_FIFO_REG 0x0E
97*4882a593Smuzhiyun #define BMA2X2_RANGE_SEL_REG 0x0F
98*4882a593Smuzhiyun #define BMA2X2_BW_SEL_REG 0x10
99*4882a593Smuzhiyun #define BMA2X2_MODE_CTRL_REG 0x11
100*4882a593Smuzhiyun #define BMA2X2_LOW_NOISE_CTRL_REG 0x12
101*4882a593Smuzhiyun #define BMA2X2_DATA_CTRL_REG 0x13
102*4882a593Smuzhiyun #define BMA2X2_RESET_REG 0x14
103*4882a593Smuzhiyun #define BMA2X2_INT_ENABLE1_REG 0x16
104*4882a593Smuzhiyun #define BMA2X2_INT_ENABLE2_REG 0x17
105*4882a593Smuzhiyun #define BMA2X2_INT_SLO_NO_MOT_REG 0x18
106*4882a593Smuzhiyun #define BMA2X2_INT1_PAD_SEL_REG 0x19
107*4882a593Smuzhiyun #define BMA2X2_INT_DATA_SEL_REG 0x1A
108*4882a593Smuzhiyun #define BMA2X2_INT2_PAD_SEL_REG 0x1B
109*4882a593Smuzhiyun #define BMA2X2_INT_SRC_REG 0x1E
110*4882a593Smuzhiyun #define BMA2X2_INT_SET_REG 0x20
111*4882a593Smuzhiyun #define BMA2X2_INT_CTRL_REG 0x21
112*4882a593Smuzhiyun #define BMA2X2_LOW_DURN_REG 0x22
113*4882a593Smuzhiyun #define BMA2X2_LOW_THRES_REG 0x23
114*4882a593Smuzhiyun #define BMA2X2_LOW_HIGH_HYST_REG 0x24
115*4882a593Smuzhiyun #define BMA2X2_HIGH_DURN_REG 0x25
116*4882a593Smuzhiyun #define BMA2X2_HIGH_THRES_REG 0x26
117*4882a593Smuzhiyun #define BMA2X2_SLOPE_DURN_REG 0x27
118*4882a593Smuzhiyun #define BMA2X2_SLOPE_THRES_REG 0x28
119*4882a593Smuzhiyun #define BMA2X2_SLO_NO_MOT_THRES_REG 0x29
120*4882a593Smuzhiyun #define BMA2X2_TAP_PARAM_REG 0x2A
121*4882a593Smuzhiyun #define BMA2X2_TAP_THRES_REG 0x2B
122*4882a593Smuzhiyun #define BMA2X2_ORIENT_PARAM_REG 0x2C
123*4882a593Smuzhiyun #define BMA2X2_THETA_BLOCK_REG 0x2D
124*4882a593Smuzhiyun #define BMA2X2_THETA_FLAT_REG 0x2E
125*4882a593Smuzhiyun #define BMA2X2_FLAT_HOLD_TIME_REG 0x2F
126*4882a593Smuzhiyun #define BMA2X2_FIFO_WML_TRIG 0x30
127*4882a593Smuzhiyun #define BMA2X2_SELF_TEST_REG 0x32
128*4882a593Smuzhiyun #define BMA2X2_EEPROM_CTRL_REG 0x33
129*4882a593Smuzhiyun #define BMA2X2_SERIAL_CTRL_REG 0x34
130*4882a593Smuzhiyun #define BMA2X2_EXTMODE_CTRL_REG 0x35
131*4882a593Smuzhiyun #define BMA2X2_OFFSET_CTRL_REG 0x36
132*4882a593Smuzhiyun #define BMA2X2_OFFSET_PARAMS_REG 0x37
133*4882a593Smuzhiyun #define BMA2X2_OFFSET_X_AXIS_REG 0x38
134*4882a593Smuzhiyun #define BMA2X2_OFFSET_Y_AXIS_REG 0x39
135*4882a593Smuzhiyun #define BMA2X2_OFFSET_Z_AXIS_REG 0x3A
136*4882a593Smuzhiyun #define BMA2X2_GP0_REG 0x3B
137*4882a593Smuzhiyun #define BMA2X2_GP1_REG 0x3C
138*4882a593Smuzhiyun #define BMA2X2_FIFO_MODE_REG 0x3E
139*4882a593Smuzhiyun #define BMA2X2_FIFO_DATA_OUTPUT_REG 0x3F
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun #define BMA2X2_CHIP_ID__POS 0
142*4882a593Smuzhiyun #define BMA2X2_CHIP_ID__MSK 0xFF
143*4882a593Smuzhiyun #define BMA2X2_CHIP_ID__LEN 8
144*4882a593Smuzhiyun #define BMA2X2_CHIP_ID__REG BMA2X2_CHIP_ID_REG
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun #define BMA2X2_VERSION__POS 0
147*4882a593Smuzhiyun #define BMA2X2_VERSION__LEN 8
148*4882a593Smuzhiyun #define BMA2X2_VERSION__MSK 0xFF
149*4882a593Smuzhiyun #define BMA2X2_VERSION__REG BMA2X2_VERSION_REG
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun #define BMA2x2_SLO_NO_MOT_DUR__POS 2
152*4882a593Smuzhiyun #define BMA2x2_SLO_NO_MOT_DUR__LEN 6
153*4882a593Smuzhiyun #define BMA2x2_SLO_NO_MOT_DUR__MSK 0xFC
154*4882a593Smuzhiyun #define BMA2x2_SLO_NO_MOT_DUR__REG BMA2X2_SLOPE_DURN_REG
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun #define BMA2X2_NEW_DATA_X__POS 0
157*4882a593Smuzhiyun #define BMA2X2_NEW_DATA_X__LEN 1
158*4882a593Smuzhiyun #define BMA2X2_NEW_DATA_X__MSK 0x01
159*4882a593Smuzhiyun #define BMA2X2_NEW_DATA_X__REG BMA2X2_X_AXIS_LSB_REG
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun #define BMA2X2_ACC_X14_LSB__POS 2
162*4882a593Smuzhiyun #define BMA2X2_ACC_X14_LSB__LEN 6
163*4882a593Smuzhiyun #define BMA2X2_ACC_X14_LSB__MSK 0xFC
164*4882a593Smuzhiyun #define BMA2X2_ACC_X14_LSB__REG BMA2X2_X_AXIS_LSB_REG
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun #define BMA2X2_ACC_X12_LSB__POS 4
167*4882a593Smuzhiyun #define BMA2X2_ACC_X12_LSB__LEN 4
168*4882a593Smuzhiyun #define BMA2X2_ACC_X12_LSB__MSK 0xF0
169*4882a593Smuzhiyun #define BMA2X2_ACC_X12_LSB__REG BMA2X2_X_AXIS_LSB_REG
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun #define BMA2X2_ACC_X10_LSB__POS 6
172*4882a593Smuzhiyun #define BMA2X2_ACC_X10_LSB__LEN 2
173*4882a593Smuzhiyun #define BMA2X2_ACC_X10_LSB__MSK 0xC0
174*4882a593Smuzhiyun #define BMA2X2_ACC_X10_LSB__REG BMA2X2_X_AXIS_LSB_REG
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun #define BMA2X2_ACC_X8_LSB__POS 0
177*4882a593Smuzhiyun #define BMA2X2_ACC_X8_LSB__LEN 0
178*4882a593Smuzhiyun #define BMA2X2_ACC_X8_LSB__MSK 0x00
179*4882a593Smuzhiyun #define BMA2X2_ACC_X8_LSB__REG BMA2X2_X_AXIS_LSB_REG
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun #define BMA2X2_ACC_X_MSB__POS 0
182*4882a593Smuzhiyun #define BMA2X2_ACC_X_MSB__LEN 8
183*4882a593Smuzhiyun #define BMA2X2_ACC_X_MSB__MSK 0xFF
184*4882a593Smuzhiyun #define BMA2X2_ACC_X_MSB__REG BMA2X2_X_AXIS_MSB_REG
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun #define BMA2X2_NEW_DATA_Y__POS 0
187*4882a593Smuzhiyun #define BMA2X2_NEW_DATA_Y__LEN 1
188*4882a593Smuzhiyun #define BMA2X2_NEW_DATA_Y__MSK 0x01
189*4882a593Smuzhiyun #define BMA2X2_NEW_DATA_Y__REG BMA2X2_Y_AXIS_LSB_REG
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun #define BMA2X2_ACC_Y14_LSB__POS 2
192*4882a593Smuzhiyun #define BMA2X2_ACC_Y14_LSB__LEN 6
193*4882a593Smuzhiyun #define BMA2X2_ACC_Y14_LSB__MSK 0xFC
194*4882a593Smuzhiyun #define BMA2X2_ACC_Y14_LSB__REG BMA2X2_Y_AXIS_LSB_REG
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun #define BMA2X2_ACC_Y12_LSB__POS 4
197*4882a593Smuzhiyun #define BMA2X2_ACC_Y12_LSB__LEN 4
198*4882a593Smuzhiyun #define BMA2X2_ACC_Y12_LSB__MSK 0xF0
199*4882a593Smuzhiyun #define BMA2X2_ACC_Y12_LSB__REG BMA2X2_Y_AXIS_LSB_REG
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun #define BMA2X2_ACC_Y10_LSB__POS 6
202*4882a593Smuzhiyun #define BMA2X2_ACC_Y10_LSB__LEN 2
203*4882a593Smuzhiyun #define BMA2X2_ACC_Y10_LSB__MSK 0xC0
204*4882a593Smuzhiyun #define BMA2X2_ACC_Y10_LSB__REG BMA2X2_Y_AXIS_LSB_REG
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun #define BMA2X2_ACC_Y8_LSB__POS 0
207*4882a593Smuzhiyun #define BMA2X2_ACC_Y8_LSB__LEN 0
208*4882a593Smuzhiyun #define BMA2X2_ACC_Y8_LSB__MSK 0x00
209*4882a593Smuzhiyun #define BMA2X2_ACC_Y8_LSB__REG BMA2X2_Y_AXIS_LSB_REG
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun #define BMA2X2_ACC_Y_MSB__POS 0
212*4882a593Smuzhiyun #define BMA2X2_ACC_Y_MSB__LEN 8
213*4882a593Smuzhiyun #define BMA2X2_ACC_Y_MSB__MSK 0xFF
214*4882a593Smuzhiyun #define BMA2X2_ACC_Y_MSB__REG BMA2X2_Y_AXIS_MSB_REG
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun #define BMA2X2_NEW_DATA_Z__POS 0
217*4882a593Smuzhiyun #define BMA2X2_NEW_DATA_Z__LEN 1
218*4882a593Smuzhiyun #define BMA2X2_NEW_DATA_Z__MSK 0x01
219*4882a593Smuzhiyun #define BMA2X2_NEW_DATA_Z__REG BMA2X2_Z_AXIS_LSB_REG
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun #define BMA2X2_ACC_Z14_LSB__POS 2
222*4882a593Smuzhiyun #define BMA2X2_ACC_Z14_LSB__LEN 6
223*4882a593Smuzhiyun #define BMA2X2_ACC_Z14_LSB__MSK 0xFC
224*4882a593Smuzhiyun #define BMA2X2_ACC_Z14_LSB__REG BMA2X2_Z_AXIS_LSB_REG
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun #define BMA2X2_ACC_Z12_LSB__POS 4
227*4882a593Smuzhiyun #define BMA2X2_ACC_Z12_LSB__LEN 4
228*4882a593Smuzhiyun #define BMA2X2_ACC_Z12_LSB__MSK 0xF0
229*4882a593Smuzhiyun #define BMA2X2_ACC_Z12_LSB__REG BMA2X2_Z_AXIS_LSB_REG
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun #define BMA2X2_ACC_Z10_LSB__POS 6
232*4882a593Smuzhiyun #define BMA2X2_ACC_Z10_LSB__LEN 2
233*4882a593Smuzhiyun #define BMA2X2_ACC_Z10_LSB__MSK 0xC0
234*4882a593Smuzhiyun #define BMA2X2_ACC_Z10_LSB__REG BMA2X2_Z_AXIS_LSB_REG
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun #define BMA2X2_ACC_Z8_LSB__POS 0
237*4882a593Smuzhiyun #define BMA2X2_ACC_Z8_LSB__LEN 0
238*4882a593Smuzhiyun #define BMA2X2_ACC_Z8_LSB__MSK 0x00
239*4882a593Smuzhiyun #define BMA2X2_ACC_Z8_LSB__REG BMA2X2_Z_AXIS_LSB_REG
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun #define BMA2X2_ACC_Z_MSB__POS 0
242*4882a593Smuzhiyun #define BMA2X2_ACC_Z_MSB__LEN 8
243*4882a593Smuzhiyun #define BMA2X2_ACC_Z_MSB__MSK 0xFF
244*4882a593Smuzhiyun #define BMA2X2_ACC_Z_MSB__REG BMA2X2_Z_AXIS_MSB_REG
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun #define BMA2X2_TEMPERATURE__POS 0
247*4882a593Smuzhiyun #define BMA2X2_TEMPERATURE__LEN 8
248*4882a593Smuzhiyun #define BMA2X2_TEMPERATURE__MSK 0xFF
249*4882a593Smuzhiyun #define BMA2X2_TEMPERATURE__REG BMA2X2_TEMP_RD_REG
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun #define BMA2X2_LOWG_INT_S__POS 0
252*4882a593Smuzhiyun #define BMA2X2_LOWG_INT_S__LEN 1
253*4882a593Smuzhiyun #define BMA2X2_LOWG_INT_S__MSK 0x01
254*4882a593Smuzhiyun #define BMA2X2_LOWG_INT_S__REG BMA2X2_STATUS1_REG
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun #define BMA2X2_HIGHG_INT_S__POS 1
257*4882a593Smuzhiyun #define BMA2X2_HIGHG_INT_S__LEN 1
258*4882a593Smuzhiyun #define BMA2X2_HIGHG_INT_S__MSK 0x02
259*4882a593Smuzhiyun #define BMA2X2_HIGHG_INT_S__REG BMA2X2_STATUS1_REG
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun #define BMA2X2_SLOPE_INT_S__POS 2
262*4882a593Smuzhiyun #define BMA2X2_SLOPE_INT_S__LEN 1
263*4882a593Smuzhiyun #define BMA2X2_SLOPE_INT_S__MSK 0x04
264*4882a593Smuzhiyun #define BMA2X2_SLOPE_INT_S__REG BMA2X2_STATUS1_REG
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun #define BMA2X2_SLO_NO_MOT_INT_S__POS 3
267*4882a593Smuzhiyun #define BMA2X2_SLO_NO_MOT_INT_S__LEN 1
268*4882a593Smuzhiyun #define BMA2X2_SLO_NO_MOT_INT_S__MSK 0x08
269*4882a593Smuzhiyun #define BMA2X2_SLO_NO_MOT_INT_S__REG BMA2X2_STATUS1_REG
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun #define BMA2X2_DOUBLE_TAP_INT_S__POS 4
272*4882a593Smuzhiyun #define BMA2X2_DOUBLE_TAP_INT_S__LEN 1
273*4882a593Smuzhiyun #define BMA2X2_DOUBLE_TAP_INT_S__MSK 0x10
274*4882a593Smuzhiyun #define BMA2X2_DOUBLE_TAP_INT_S__REG BMA2X2_STATUS1_REG
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun #define BMA2X2_SINGLE_TAP_INT_S__POS 5
277*4882a593Smuzhiyun #define BMA2X2_SINGLE_TAP_INT_S__LEN 1
278*4882a593Smuzhiyun #define BMA2X2_SINGLE_TAP_INT_S__MSK 0x20
279*4882a593Smuzhiyun #define BMA2X2_SINGLE_TAP_INT_S__REG BMA2X2_STATUS1_REG
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun #define BMA2X2_ORIENT_INT_S__POS 6
282*4882a593Smuzhiyun #define BMA2X2_ORIENT_INT_S__LEN 1
283*4882a593Smuzhiyun #define BMA2X2_ORIENT_INT_S__MSK 0x40
284*4882a593Smuzhiyun #define BMA2X2_ORIENT_INT_S__REG BMA2X2_STATUS1_REG
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun #define BMA2X2_FLAT_INT_S__POS 7
287*4882a593Smuzhiyun #define BMA2X2_FLAT_INT_S__LEN 1
288*4882a593Smuzhiyun #define BMA2X2_FLAT_INT_S__MSK 0x80
289*4882a593Smuzhiyun #define BMA2X2_FLAT_INT_S__REG BMA2X2_STATUS1_REG
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun #define BMA2X2_FIFO_FULL_INT_S__POS 5
292*4882a593Smuzhiyun #define BMA2X2_FIFO_FULL_INT_S__LEN 1
293*4882a593Smuzhiyun #define BMA2X2_FIFO_FULL_INT_S__MSK 0x20
294*4882a593Smuzhiyun #define BMA2X2_FIFO_FULL_INT_S__REG BMA2X2_STATUS2_REG
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun #define BMA2X2_FIFO_WM_INT_S__POS 6
297*4882a593Smuzhiyun #define BMA2X2_FIFO_WM_INT_S__LEN 1
298*4882a593Smuzhiyun #define BMA2X2_FIFO_WM_INT_S__MSK 0x40
299*4882a593Smuzhiyun #define BMA2X2_FIFO_WM_INT_S__REG BMA2X2_STATUS2_REG
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun #define BMA2X2_DATA_INT_S__POS 7
302*4882a593Smuzhiyun #define BMA2X2_DATA_INT_S__LEN 1
303*4882a593Smuzhiyun #define BMA2X2_DATA_INT_S__MSK 0x80
304*4882a593Smuzhiyun #define BMA2X2_DATA_INT_S__REG BMA2X2_STATUS2_REG
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun #define BMA2X2_SLOPE_FIRST_X__POS 0
307*4882a593Smuzhiyun #define BMA2X2_SLOPE_FIRST_X__LEN 1
308*4882a593Smuzhiyun #define BMA2X2_SLOPE_FIRST_X__MSK 0x01
309*4882a593Smuzhiyun #define BMA2X2_SLOPE_FIRST_X__REG BMA2X2_STATUS_TAP_SLOPE_REG
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun #define BMA2X2_SLOPE_FIRST_Y__POS 1
312*4882a593Smuzhiyun #define BMA2X2_SLOPE_FIRST_Y__LEN 1
313*4882a593Smuzhiyun #define BMA2X2_SLOPE_FIRST_Y__MSK 0x02
314*4882a593Smuzhiyun #define BMA2X2_SLOPE_FIRST_Y__REG BMA2X2_STATUS_TAP_SLOPE_REG
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun #define BMA2X2_SLOPE_FIRST_Z__POS 2
317*4882a593Smuzhiyun #define BMA2X2_SLOPE_FIRST_Z__LEN 1
318*4882a593Smuzhiyun #define BMA2X2_SLOPE_FIRST_Z__MSK 0x04
319*4882a593Smuzhiyun #define BMA2X2_SLOPE_FIRST_Z__REG BMA2X2_STATUS_TAP_SLOPE_REG
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun #define BMA2X2_SLOPE_SIGN_S__POS 3
322*4882a593Smuzhiyun #define BMA2X2_SLOPE_SIGN_S__LEN 1
323*4882a593Smuzhiyun #define BMA2X2_SLOPE_SIGN_S__MSK 0x08
324*4882a593Smuzhiyun #define BMA2X2_SLOPE_SIGN_S__REG BMA2X2_STATUS_TAP_SLOPE_REG
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun #define BMA2X2_TAP_FIRST_X__POS 4
327*4882a593Smuzhiyun #define BMA2X2_TAP_FIRST_X__LEN 1
328*4882a593Smuzhiyun #define BMA2X2_TAP_FIRST_X__MSK 0x10
329*4882a593Smuzhiyun #define BMA2X2_TAP_FIRST_X__REG BMA2X2_STATUS_TAP_SLOPE_REG
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun #define BMA2X2_TAP_FIRST_Y__POS 5
332*4882a593Smuzhiyun #define BMA2X2_TAP_FIRST_Y__LEN 1
333*4882a593Smuzhiyun #define BMA2X2_TAP_FIRST_Y__MSK 0x20
334*4882a593Smuzhiyun #define BMA2X2_TAP_FIRST_Y__REG BMA2X2_STATUS_TAP_SLOPE_REG
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun #define BMA2X2_TAP_FIRST_Z__POS 6
337*4882a593Smuzhiyun #define BMA2X2_TAP_FIRST_Z__LEN 1
338*4882a593Smuzhiyun #define BMA2X2_TAP_FIRST_Z__MSK 0x40
339*4882a593Smuzhiyun #define BMA2X2_TAP_FIRST_Z__REG BMA2X2_STATUS_TAP_SLOPE_REG
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun #define BMA2X2_TAP_SIGN_S__POS 7
342*4882a593Smuzhiyun #define BMA2X2_TAP_SIGN_S__LEN 1
343*4882a593Smuzhiyun #define BMA2X2_TAP_SIGN_S__MSK 0x80
344*4882a593Smuzhiyun #define BMA2X2_TAP_SIGN_S__REG BMA2X2_STATUS_TAP_SLOPE_REG
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun #define BMA2X2_HIGHG_FIRST_X__POS 0
347*4882a593Smuzhiyun #define BMA2X2_HIGHG_FIRST_X__LEN 1
348*4882a593Smuzhiyun #define BMA2X2_HIGHG_FIRST_X__MSK 0x01
349*4882a593Smuzhiyun #define BMA2X2_HIGHG_FIRST_X__REG BMA2X2_STATUS_ORIENT_HIGH_REG
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun #define BMA2X2_HIGHG_FIRST_Y__POS 1
352*4882a593Smuzhiyun #define BMA2X2_HIGHG_FIRST_Y__LEN 1
353*4882a593Smuzhiyun #define BMA2X2_HIGHG_FIRST_Y__MSK 0x02
354*4882a593Smuzhiyun #define BMA2X2_HIGHG_FIRST_Y__REG BMA2X2_STATUS_ORIENT_HIGH_REG
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun #define BMA2X2_HIGHG_FIRST_Z__POS 2
357*4882a593Smuzhiyun #define BMA2X2_HIGHG_FIRST_Z__LEN 1
358*4882a593Smuzhiyun #define BMA2X2_HIGHG_FIRST_Z__MSK 0x04
359*4882a593Smuzhiyun #define BMA2X2_HIGHG_FIRST_Z__REG BMA2X2_STATUS_ORIENT_HIGH_REG
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun #define BMA2X2_HIGHG_SIGN_S__POS 3
362*4882a593Smuzhiyun #define BMA2X2_HIGHG_SIGN_S__LEN 1
363*4882a593Smuzhiyun #define BMA2X2_HIGHG_SIGN_S__MSK 0x08
364*4882a593Smuzhiyun #define BMA2X2_HIGHG_SIGN_S__REG BMA2X2_STATUS_ORIENT_HIGH_REG
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun #define BMA2X2_ORIENT_S__POS 4
367*4882a593Smuzhiyun #define BMA2X2_ORIENT_S__LEN 3
368*4882a593Smuzhiyun #define BMA2X2_ORIENT_S__MSK 0x70
369*4882a593Smuzhiyun #define BMA2X2_ORIENT_S__REG BMA2X2_STATUS_ORIENT_HIGH_REG
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun #define BMA2X2_FLAT_S__POS 7
372*4882a593Smuzhiyun #define BMA2X2_FLAT_S__LEN 1
373*4882a593Smuzhiyun #define BMA2X2_FLAT_S__MSK 0x80
374*4882a593Smuzhiyun #define BMA2X2_FLAT_S__REG BMA2X2_STATUS_ORIENT_HIGH_REG
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun #define BMA2X2_FIFO_FRAME_COUNTER_S__POS 0
377*4882a593Smuzhiyun #define BMA2X2_FIFO_FRAME_COUNTER_S__LEN 7
378*4882a593Smuzhiyun #define BMA2X2_FIFO_FRAME_COUNTER_S__MSK 0x7F
379*4882a593Smuzhiyun #define BMA2X2_FIFO_FRAME_COUNTER_S__REG BMA2X2_STATUS_FIFO_REG
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun #define BMA2X2_FIFO_OVERRUN_S__POS 7
382*4882a593Smuzhiyun #define BMA2X2_FIFO_OVERRUN_S__LEN 1
383*4882a593Smuzhiyun #define BMA2X2_FIFO_OVERRUN_S__MSK 0x80
384*4882a593Smuzhiyun #define BMA2X2_FIFO_OVERRUN_S__REG BMA2X2_STATUS_FIFO_REG
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun #define BMA2X2_RANGE_SEL__POS 0
387*4882a593Smuzhiyun #define BMA2X2_RANGE_SEL__LEN 4
388*4882a593Smuzhiyun #define BMA2X2_RANGE_SEL__MSK 0x0F
389*4882a593Smuzhiyun #define BMA2X2_RANGE_SEL__REG BMA2X2_RANGE_SEL_REG
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun #define BMA2X2_BANDWIDTH__POS 0
392*4882a593Smuzhiyun #define BMA2X2_BANDWIDTH__LEN 5
393*4882a593Smuzhiyun #define BMA2X2_BANDWIDTH__MSK 0x1F
394*4882a593Smuzhiyun #define BMA2X2_BANDWIDTH__REG BMA2X2_BW_SEL_REG
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun #define BMA2X2_SLEEP_DUR__POS 1
397*4882a593Smuzhiyun #define BMA2X2_SLEEP_DUR__LEN 4
398*4882a593Smuzhiyun #define BMA2X2_SLEEP_DUR__MSK 0x1E
399*4882a593Smuzhiyun #define BMA2X2_SLEEP_DUR__REG BMA2X2_MODE_CTRL_REG
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun #define BMA2X2_MODE_CTRL__POS 5
402*4882a593Smuzhiyun #define BMA2X2_MODE_CTRL__LEN 3
403*4882a593Smuzhiyun #define BMA2X2_MODE_CTRL__MSK 0xE0
404*4882a593Smuzhiyun #define BMA2X2_MODE_CTRL__REG BMA2X2_MODE_CTRL_REG
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun #define BMA2X2_DEEP_SUSPEND__POS 5
407*4882a593Smuzhiyun #define BMA2X2_DEEP_SUSPEND__LEN 1
408*4882a593Smuzhiyun #define BMA2X2_DEEP_SUSPEND__MSK 0x20
409*4882a593Smuzhiyun #define BMA2X2_DEEP_SUSPEND__REG BMA2X2_MODE_CTRL_REG
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun #define BMA2X2_EN_LOW_POWER__POS 6
412*4882a593Smuzhiyun #define BMA2X2_EN_LOW_POWER__LEN 1
413*4882a593Smuzhiyun #define BMA2X2_EN_LOW_POWER__MSK 0x40
414*4882a593Smuzhiyun #define BMA2X2_EN_LOW_POWER__REG BMA2X2_MODE_CTRL_REG
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun #define BMA2X2_EN_SUSPEND__POS 7
417*4882a593Smuzhiyun #define BMA2X2_EN_SUSPEND__LEN 1
418*4882a593Smuzhiyun #define BMA2X2_EN_SUSPEND__MSK 0x80
419*4882a593Smuzhiyun #define BMA2X2_EN_SUSPEND__REG BMA2X2_MODE_CTRL_REG
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun #define BMA2X2_SLEEP_TIMER__POS 5
422*4882a593Smuzhiyun #define BMA2X2_SLEEP_TIMER__LEN 1
423*4882a593Smuzhiyun #define BMA2X2_SLEEP_TIMER__MSK 0x20
424*4882a593Smuzhiyun #define BMA2X2_SLEEP_TIMER__REG BMA2X2_LOW_NOISE_CTRL_REG
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun #define BMA2X2_LOW_POWER_MODE__POS 6
427*4882a593Smuzhiyun #define BMA2X2_LOW_POWER_MODE__LEN 1
428*4882a593Smuzhiyun #define BMA2X2_LOW_POWER_MODE__MSK 0x40
429*4882a593Smuzhiyun #define BMA2X2_LOW_POWER_MODE__REG BMA2X2_LOW_NOISE_CTRL_REG
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun #define BMA2X2_EN_LOW_NOISE__POS 7
432*4882a593Smuzhiyun #define BMA2X2_EN_LOW_NOISE__LEN 1
433*4882a593Smuzhiyun #define BMA2X2_EN_LOW_NOISE__MSK 0x80
434*4882a593Smuzhiyun #define BMA2X2_EN_LOW_NOISE__REG BMA2X2_LOW_NOISE_CTRL_REG
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun #define BMA2X2_DIS_SHADOW_PROC__POS 6
437*4882a593Smuzhiyun #define BMA2X2_DIS_SHADOW_PROC__LEN 1
438*4882a593Smuzhiyun #define BMA2X2_DIS_SHADOW_PROC__MSK 0x40
439*4882a593Smuzhiyun #define BMA2X2_DIS_SHADOW_PROC__REG BMA2X2_DATA_CTRL_REG
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun #define BMA2X2_EN_DATA_HIGH_BW__POS 7
442*4882a593Smuzhiyun #define BMA2X2_EN_DATA_HIGH_BW__LEN 1
443*4882a593Smuzhiyun #define BMA2X2_EN_DATA_HIGH_BW__MSK 0x80
444*4882a593Smuzhiyun #define BMA2X2_EN_DATA_HIGH_BW__REG BMA2X2_DATA_CTRL_REG
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun #define BMA2X2_EN_SOFT_RESET__POS 0
447*4882a593Smuzhiyun #define BMA2X2_EN_SOFT_RESET__LEN 8
448*4882a593Smuzhiyun #define BMA2X2_EN_SOFT_RESET__MSK 0xFF
449*4882a593Smuzhiyun #define BMA2X2_EN_SOFT_RESET__REG BMA2X2_RESET_REG
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun #define BMA2X2_EN_SOFT_RESET_VALUE 0xB6
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun #define BMA2X2_EN_SLOPE_X_INT__POS 0
454*4882a593Smuzhiyun #define BMA2X2_EN_SLOPE_X_INT__LEN 1
455*4882a593Smuzhiyun #define BMA2X2_EN_SLOPE_X_INT__MSK 0x01
456*4882a593Smuzhiyun #define BMA2X2_EN_SLOPE_X_INT__REG BMA2X2_INT_ENABLE1_REG
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun #define BMA2X2_EN_SLOPE_Y_INT__POS 1
459*4882a593Smuzhiyun #define BMA2X2_EN_SLOPE_Y_INT__LEN 1
460*4882a593Smuzhiyun #define BMA2X2_EN_SLOPE_Y_INT__MSK 0x02
461*4882a593Smuzhiyun #define BMA2X2_EN_SLOPE_Y_INT__REG BMA2X2_INT_ENABLE1_REG
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun #define BMA2X2_EN_SLOPE_Z_INT__POS 2
464*4882a593Smuzhiyun #define BMA2X2_EN_SLOPE_Z_INT__LEN 1
465*4882a593Smuzhiyun #define BMA2X2_EN_SLOPE_Z_INT__MSK 0x04
466*4882a593Smuzhiyun #define BMA2X2_EN_SLOPE_Z_INT__REG BMA2X2_INT_ENABLE1_REG
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun #define BMA2X2_EN_DOUBLE_TAP_INT__POS 4
469*4882a593Smuzhiyun #define BMA2X2_EN_DOUBLE_TAP_INT__LEN 1
470*4882a593Smuzhiyun #define BMA2X2_EN_DOUBLE_TAP_INT__MSK 0x10
471*4882a593Smuzhiyun #define BMA2X2_EN_DOUBLE_TAP_INT__REG BMA2X2_INT_ENABLE1_REG
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun #define BMA2X2_EN_SINGLE_TAP_INT__POS 5
474*4882a593Smuzhiyun #define BMA2X2_EN_SINGLE_TAP_INT__LEN 1
475*4882a593Smuzhiyun #define BMA2X2_EN_SINGLE_TAP_INT__MSK 0x20
476*4882a593Smuzhiyun #define BMA2X2_EN_SINGLE_TAP_INT__REG BMA2X2_INT_ENABLE1_REG
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun #define BMA2X2_EN_ORIENT_INT__POS 6
479*4882a593Smuzhiyun #define BMA2X2_EN_ORIENT_INT__LEN 1
480*4882a593Smuzhiyun #define BMA2X2_EN_ORIENT_INT__MSK 0x40
481*4882a593Smuzhiyun #define BMA2X2_EN_ORIENT_INT__REG BMA2X2_INT_ENABLE1_REG
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun #define BMA2X2_EN_FLAT_INT__POS 7
484*4882a593Smuzhiyun #define BMA2X2_EN_FLAT_INT__LEN 1
485*4882a593Smuzhiyun #define BMA2X2_EN_FLAT_INT__MSK 0x80
486*4882a593Smuzhiyun #define BMA2X2_EN_FLAT_INT__REG BMA2X2_INT_ENABLE1_REG
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun #define BMA2X2_EN_HIGHG_X_INT__POS 0
489*4882a593Smuzhiyun #define BMA2X2_EN_HIGHG_X_INT__LEN 1
490*4882a593Smuzhiyun #define BMA2X2_EN_HIGHG_X_INT__MSK 0x01
491*4882a593Smuzhiyun #define BMA2X2_EN_HIGHG_X_INT__REG BMA2X2_INT_ENABLE2_REG
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun #define BMA2X2_EN_HIGHG_Y_INT__POS 1
494*4882a593Smuzhiyun #define BMA2X2_EN_HIGHG_Y_INT__LEN 1
495*4882a593Smuzhiyun #define BMA2X2_EN_HIGHG_Y_INT__MSK 0x02
496*4882a593Smuzhiyun #define BMA2X2_EN_HIGHG_Y_INT__REG BMA2X2_INT_ENABLE2_REG
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun #define BMA2X2_EN_HIGHG_Z_INT__POS 2
499*4882a593Smuzhiyun #define BMA2X2_EN_HIGHG_Z_INT__LEN 1
500*4882a593Smuzhiyun #define BMA2X2_EN_HIGHG_Z_INT__MSK 0x04
501*4882a593Smuzhiyun #define BMA2X2_EN_HIGHG_Z_INT__REG BMA2X2_INT_ENABLE2_REG
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun #define BMA2X2_EN_LOWG_INT__POS 3
504*4882a593Smuzhiyun #define BMA2X2_EN_LOWG_INT__LEN 1
505*4882a593Smuzhiyun #define BMA2X2_EN_LOWG_INT__MSK 0x08
506*4882a593Smuzhiyun #define BMA2X2_EN_LOWG_INT__REG BMA2X2_INT_ENABLE2_REG
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun #define BMA2X2_EN_NEW_DATA_INT__POS 4
509*4882a593Smuzhiyun #define BMA2X2_EN_NEW_DATA_INT__LEN 1
510*4882a593Smuzhiyun #define BMA2X2_EN_NEW_DATA_INT__MSK 0x10
511*4882a593Smuzhiyun #define BMA2X2_EN_NEW_DATA_INT__REG BMA2X2_INT_ENABLE2_REG
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun #define BMA2X2_INT_FFULL_EN_INT__POS 5
514*4882a593Smuzhiyun #define BMA2X2_INT_FFULL_EN_INT__LEN 1
515*4882a593Smuzhiyun #define BMA2X2_INT_FFULL_EN_INT__MSK 0x20
516*4882a593Smuzhiyun #define BMA2X2_INT_FFULL_EN_INT__REG BMA2X2_INT_ENABLE2_REG
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun #define BMA2X2_INT_FWM_EN_INT__POS 6
519*4882a593Smuzhiyun #define BMA2X2_INT_FWM_EN_INT__LEN 1
520*4882a593Smuzhiyun #define BMA2X2_INT_FWM_EN_INT__MSK 0x40
521*4882a593Smuzhiyun #define BMA2X2_INT_FWM_EN_INT__REG BMA2X2_INT_ENABLE2_REG
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun #define BMA2X2_INT_SLO_NO_MOT_EN_X_INT__POS 0
524*4882a593Smuzhiyun #define BMA2X2_INT_SLO_NO_MOT_EN_X_INT__LEN 1
525*4882a593Smuzhiyun #define BMA2X2_INT_SLO_NO_MOT_EN_X_INT__MSK 0x01
526*4882a593Smuzhiyun #define BMA2X2_INT_SLO_NO_MOT_EN_X_INT__REG BMA2X2_INT_SLO_NO_MOT_REG
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun #define BMA2X2_INT_SLO_NO_MOT_EN_Y_INT__POS 1
529*4882a593Smuzhiyun #define BMA2X2_INT_SLO_NO_MOT_EN_Y_INT__LEN 1
530*4882a593Smuzhiyun #define BMA2X2_INT_SLO_NO_MOT_EN_Y_INT__MSK 0x02
531*4882a593Smuzhiyun #define BMA2X2_INT_SLO_NO_MOT_EN_Y_INT__REG BMA2X2_INT_SLO_NO_MOT_REG
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun #define BMA2X2_INT_SLO_NO_MOT_EN_Z_INT__POS 2
534*4882a593Smuzhiyun #define BMA2X2_INT_SLO_NO_MOT_EN_Z_INT__LEN 1
535*4882a593Smuzhiyun #define BMA2X2_INT_SLO_NO_MOT_EN_Z_INT__MSK 0x04
536*4882a593Smuzhiyun #define BMA2X2_INT_SLO_NO_MOT_EN_Z_INT__REG BMA2X2_INT_SLO_NO_MOT_REG
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun #define BMA2X2_INT_SLO_NO_MOT_EN_SEL_INT__POS 3
539*4882a593Smuzhiyun #define BMA2X2_INT_SLO_NO_MOT_EN_SEL_INT__LEN 1
540*4882a593Smuzhiyun #define BMA2X2_INT_SLO_NO_MOT_EN_SEL_INT__MSK 0x08
541*4882a593Smuzhiyun #define BMA2X2_INT_SLO_NO_MOT_EN_SEL_INT__REG BMA2X2_INT_SLO_NO_MOT_REG
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_LOWG__POS 0
544*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_LOWG__LEN 1
545*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_LOWG__MSK 0x01
546*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_LOWG__REG BMA2X2_INT1_PAD_SEL_REG
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_HIGHG__POS 1
549*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_HIGHG__LEN 1
550*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_HIGHG__MSK 0x02
551*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_HIGHG__REG BMA2X2_INT1_PAD_SEL_REG
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_SLOPE__POS 2
554*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_SLOPE__LEN 1
555*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_SLOPE__MSK 0x04
556*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_SLOPE__REG BMA2X2_INT1_PAD_SEL_REG
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_SLO_NO_MOT__POS 3
559*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_SLO_NO_MOT__LEN 1
560*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_SLO_NO_MOT__MSK 0x08
561*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_SLO_NO_MOT__REG BMA2X2_INT1_PAD_SEL_REG
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_DB_TAP__POS 4
564*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_DB_TAP__LEN 1
565*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_DB_TAP__MSK 0x10
566*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_DB_TAP__REG BMA2X2_INT1_PAD_SEL_REG
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_SNG_TAP__POS 5
569*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_SNG_TAP__LEN 1
570*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_SNG_TAP__MSK 0x20
571*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_SNG_TAP__REG BMA2X2_INT1_PAD_SEL_REG
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_ORIENT__POS 6
574*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_ORIENT__LEN 1
575*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_ORIENT__MSK 0x40
576*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_ORIENT__REG BMA2X2_INT1_PAD_SEL_REG
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_FLAT__POS 7
579*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_FLAT__LEN 1
580*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_FLAT__MSK 0x80
581*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_FLAT__REG BMA2X2_INT1_PAD_SEL_REG
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_LOWG__POS 0
584*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_LOWG__LEN 1
585*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_LOWG__MSK 0x01
586*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_LOWG__REG BMA2X2_INT2_PAD_SEL_REG
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_HIGHG__POS 1
589*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_HIGHG__LEN 1
590*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_HIGHG__MSK 0x02
591*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_HIGHG__REG BMA2X2_INT2_PAD_SEL_REG
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_SLOPE__POS 2
594*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_SLOPE__LEN 1
595*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_SLOPE__MSK 0x04
596*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_SLOPE__REG BMA2X2_INT2_PAD_SEL_REG
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_SLO_NO_MOT__POS 3
599*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_SLO_NO_MOT__LEN 1
600*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_SLO_NO_MOT__MSK 0x08
601*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_SLO_NO_MOT__REG BMA2X2_INT2_PAD_SEL_REG
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_DB_TAP__POS 4
604*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_DB_TAP__LEN 1
605*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_DB_TAP__MSK 0x10
606*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_DB_TAP__REG BMA2X2_INT2_PAD_SEL_REG
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_SNG_TAP__POS 5
609*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_SNG_TAP__LEN 1
610*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_SNG_TAP__MSK 0x20
611*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_SNG_TAP__REG BMA2X2_INT2_PAD_SEL_REG
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_ORIENT__POS 6
614*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_ORIENT__LEN 1
615*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_ORIENT__MSK 0x40
616*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_ORIENT__REG BMA2X2_INT2_PAD_SEL_REG
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_FLAT__POS 7
619*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_FLAT__LEN 1
620*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_FLAT__MSK 0x80
621*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_FLAT__REG BMA2X2_INT2_PAD_SEL_REG
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_NEWDATA__POS 0
624*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_NEWDATA__LEN 1
625*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_NEWDATA__MSK 0x01
626*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_NEWDATA__REG BMA2X2_INT_DATA_SEL_REG
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_FWM__POS 1
629*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_FWM__LEN 1
630*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_FWM__MSK 0x02
631*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_FWM__REG BMA2X2_INT_DATA_SEL_REG
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_FFULL__POS 2
634*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_FFULL__LEN 1
635*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_FFULL__MSK 0x04
636*4882a593Smuzhiyun #define BMA2X2_EN_INT1_PAD_FFULL__REG BMA2X2_INT_DATA_SEL_REG
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_FFULL__POS 5
639*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_FFULL__LEN 1
640*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_FFULL__MSK 0x20
641*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_FFULL__REG BMA2X2_INT_DATA_SEL_REG
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_FWM__POS 6
644*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_FWM__LEN 1
645*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_FWM__MSK 0x40
646*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_FWM__REG BMA2X2_INT_DATA_SEL_REG
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_NEWDATA__POS 7
649*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_NEWDATA__LEN 1
650*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_NEWDATA__MSK 0x80
651*4882a593Smuzhiyun #define BMA2X2_EN_INT2_PAD_NEWDATA__REG BMA2X2_INT_DATA_SEL_REG
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_LOWG__POS 0
654*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_LOWG__LEN 1
655*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_LOWG__MSK 0x01
656*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_LOWG__REG BMA2X2_INT_SRC_REG
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_HIGHG__POS 1
659*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_HIGHG__LEN 1
660*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_HIGHG__MSK 0x02
661*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_HIGHG__REG BMA2X2_INT_SRC_REG
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_SLOPE__POS 2
664*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_SLOPE__LEN 1
665*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_SLOPE__MSK 0x04
666*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_SLOPE__REG BMA2X2_INT_SRC_REG
667*4882a593Smuzhiyun
668*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_SLO_NO_MOT__POS 3
669*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_SLO_NO_MOT__LEN 1
670*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_SLO_NO_MOT__MSK 0x08
671*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_SLO_NO_MOT__REG BMA2X2_INT_SRC_REG
672*4882a593Smuzhiyun
673*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_TAP__POS 4
674*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_TAP__LEN 1
675*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_TAP__MSK 0x10
676*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_TAP__REG BMA2X2_INT_SRC_REG
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_DATA__POS 5
679*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_DATA__LEN 1
680*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_DATA__MSK 0x20
681*4882a593Smuzhiyun #define BMA2X2_UNFILT_INT_SRC_DATA__REG BMA2X2_INT_SRC_REG
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun #define BMA2X2_INT1_PAD_ACTIVE_LEVEL__POS 0
684*4882a593Smuzhiyun #define BMA2X2_INT1_PAD_ACTIVE_LEVEL__LEN 1
685*4882a593Smuzhiyun #define BMA2X2_INT1_PAD_ACTIVE_LEVEL__MSK 0x01
686*4882a593Smuzhiyun #define BMA2X2_INT1_PAD_ACTIVE_LEVEL__REG BMA2X2_INT_SET_REG
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun #define BMA2X2_INT2_PAD_ACTIVE_LEVEL__POS 2
689*4882a593Smuzhiyun #define BMA2X2_INT2_PAD_ACTIVE_LEVEL__LEN 1
690*4882a593Smuzhiyun #define BMA2X2_INT2_PAD_ACTIVE_LEVEL__MSK 0x04
691*4882a593Smuzhiyun #define BMA2X2_INT2_PAD_ACTIVE_LEVEL__REG BMA2X2_INT_SET_REG
692*4882a593Smuzhiyun
693*4882a593Smuzhiyun #define BMA2X2_INT1_PAD_OUTPUT_TYPE__POS 1
694*4882a593Smuzhiyun #define BMA2X2_INT1_PAD_OUTPUT_TYPE__LEN 1
695*4882a593Smuzhiyun #define BMA2X2_INT1_PAD_OUTPUT_TYPE__MSK 0x02
696*4882a593Smuzhiyun #define BMA2X2_INT1_PAD_OUTPUT_TYPE__REG BMA2X2_INT_SET_REG
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun #define BMA2X2_INT2_PAD_OUTPUT_TYPE__POS 3
699*4882a593Smuzhiyun #define BMA2X2_INT2_PAD_OUTPUT_TYPE__LEN 1
700*4882a593Smuzhiyun #define BMA2X2_INT2_PAD_OUTPUT_TYPE__MSK 0x08
701*4882a593Smuzhiyun #define BMA2X2_INT2_PAD_OUTPUT_TYPE__REG BMA2X2_INT_SET_REG
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun #define BMA2X2_INT_MODE_SEL__POS 0
704*4882a593Smuzhiyun #define BMA2X2_INT_MODE_SEL__LEN 4
705*4882a593Smuzhiyun #define BMA2X2_INT_MODE_SEL__MSK 0x0F
706*4882a593Smuzhiyun #define BMA2X2_INT_MODE_SEL__REG BMA2X2_INT_CTRL_REG
707*4882a593Smuzhiyun
708*4882a593Smuzhiyun #define BMA2X2_RESET_INT__POS 7
709*4882a593Smuzhiyun #define BMA2X2_RESET_INT__LEN 1
710*4882a593Smuzhiyun #define BMA2X2_RESET_INT__MSK 0x80
711*4882a593Smuzhiyun #define BMA2X2_RESET_INT__REG BMA2X2_INT_CTRL_REG
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun #define BMA2X2_LOWG_DUR__POS 0
714*4882a593Smuzhiyun #define BMA2X2_LOWG_DUR__LEN 8
715*4882a593Smuzhiyun #define BMA2X2_LOWG_DUR__MSK 0xFF
716*4882a593Smuzhiyun #define BMA2X2_LOWG_DUR__REG BMA2X2_LOW_DURN_REG
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun #define BMA2X2_LOWG_THRES__POS 0
719*4882a593Smuzhiyun #define BMA2X2_LOWG_THRES__LEN 8
720*4882a593Smuzhiyun #define BMA2X2_LOWG_THRES__MSK 0xFF
721*4882a593Smuzhiyun #define BMA2X2_LOWG_THRES__REG BMA2X2_LOW_THRES_REG
722*4882a593Smuzhiyun
723*4882a593Smuzhiyun #define BMA2X2_LOWG_HYST__POS 0
724*4882a593Smuzhiyun #define BMA2X2_LOWG_HYST__LEN 2
725*4882a593Smuzhiyun #define BMA2X2_LOWG_HYST__MSK 0x03
726*4882a593Smuzhiyun #define BMA2X2_LOWG_HYST__REG BMA2X2_LOW_HIGH_HYST_REG
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun #define BMA2X2_LOWG_INT_MODE__POS 2
729*4882a593Smuzhiyun #define BMA2X2_LOWG_INT_MODE__LEN 1
730*4882a593Smuzhiyun #define BMA2X2_LOWG_INT_MODE__MSK 0x04
731*4882a593Smuzhiyun #define BMA2X2_LOWG_INT_MODE__REG BMA2X2_LOW_HIGH_HYST_REG
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun #define BMA2X2_HIGHG_DUR__POS 0
734*4882a593Smuzhiyun #define BMA2X2_HIGHG_DUR__LEN 8
735*4882a593Smuzhiyun #define BMA2X2_HIGHG_DUR__MSK 0xFF
736*4882a593Smuzhiyun #define BMA2X2_HIGHG_DUR__REG BMA2X2_HIGH_DURN_REG
737*4882a593Smuzhiyun
738*4882a593Smuzhiyun #define BMA2X2_HIGHG_THRES__POS 0
739*4882a593Smuzhiyun #define BMA2X2_HIGHG_THRES__LEN 8
740*4882a593Smuzhiyun #define BMA2X2_HIGHG_THRES__MSK 0xFF
741*4882a593Smuzhiyun #define BMA2X2_HIGHG_THRES__REG BMA2X2_HIGH_THRES_REG
742*4882a593Smuzhiyun
743*4882a593Smuzhiyun #define BMA2X2_HIGHG_HYST__POS 6
744*4882a593Smuzhiyun #define BMA2X2_HIGHG_HYST__LEN 2
745*4882a593Smuzhiyun #define BMA2X2_HIGHG_HYST__MSK 0xC0
746*4882a593Smuzhiyun #define BMA2X2_HIGHG_HYST__REG BMA2X2_LOW_HIGH_HYST_REG
747*4882a593Smuzhiyun
748*4882a593Smuzhiyun #define BMA2X2_SLOPE_DUR__POS 0
749*4882a593Smuzhiyun #define BMA2X2_SLOPE_DUR__LEN 2
750*4882a593Smuzhiyun #define BMA2X2_SLOPE_DUR__MSK 0x03
751*4882a593Smuzhiyun #define BMA2X2_SLOPE_DUR__REG BMA2X2_SLOPE_DURN_REG
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun #define BMA2X2_SLO_NO_MOT_DUR__POS 2
754*4882a593Smuzhiyun #define BMA2X2_SLO_NO_MOT_DUR__LEN 6
755*4882a593Smuzhiyun #define BMA2X2_SLO_NO_MOT_DUR__MSK 0xFC
756*4882a593Smuzhiyun #define BMA2X2_SLO_NO_MOT_DUR__REG BMA2X2_SLOPE_DURN_REG
757*4882a593Smuzhiyun
758*4882a593Smuzhiyun #define BMA2X2_SLOPE_THRES__POS 0
759*4882a593Smuzhiyun #define BMA2X2_SLOPE_THRES__LEN 8
760*4882a593Smuzhiyun #define BMA2X2_SLOPE_THRES__MSK 0xFF
761*4882a593Smuzhiyun #define BMA2X2_SLOPE_THRES__REG BMA2X2_SLOPE_THRES_REG
762*4882a593Smuzhiyun
763*4882a593Smuzhiyun #define BMA2X2_SLO_NO_MOT_THRES__POS 0
764*4882a593Smuzhiyun #define BMA2X2_SLO_NO_MOT_THRES__LEN 8
765*4882a593Smuzhiyun #define BMA2X2_SLO_NO_MOT_THRES__MSK 0xFF
766*4882a593Smuzhiyun #define BMA2X2_SLO_NO_MOT_THRES__REG BMA2X2_SLO_NO_MOT_THRES_REG
767*4882a593Smuzhiyun
768*4882a593Smuzhiyun #define BMA2X2_TAP_DUR__POS 0
769*4882a593Smuzhiyun #define BMA2X2_TAP_DUR__LEN 3
770*4882a593Smuzhiyun #define BMA2X2_TAP_DUR__MSK 0x07
771*4882a593Smuzhiyun #define BMA2X2_TAP_DUR__REG BMA2X2_TAP_PARAM_REG
772*4882a593Smuzhiyun
773*4882a593Smuzhiyun #define BMA2X2_TAP_SHOCK_DURN__POS 6
774*4882a593Smuzhiyun #define BMA2X2_TAP_SHOCK_DURN__LEN 1
775*4882a593Smuzhiyun #define BMA2X2_TAP_SHOCK_DURN__MSK 0x40
776*4882a593Smuzhiyun #define BMA2X2_TAP_SHOCK_DURN__REG BMA2X2_TAP_PARAM_REG
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun #define BMA2X2_ADV_TAP_INT__POS 5
779*4882a593Smuzhiyun #define BMA2X2_ADV_TAP_INT__LEN 1
780*4882a593Smuzhiyun #define BMA2X2_ADV_TAP_INT__MSK 0x20
781*4882a593Smuzhiyun #define BMA2X2_ADV_TAP_INT__REG BMA2X2_TAP_PARAM_REG
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun #define BMA2X2_TAP_QUIET_DURN__POS 7
784*4882a593Smuzhiyun #define BMA2X2_TAP_QUIET_DURN__LEN 1
785*4882a593Smuzhiyun #define BMA2X2_TAP_QUIET_DURN__MSK 0x80
786*4882a593Smuzhiyun #define BMA2X2_TAP_QUIET_DURN__REG BMA2X2_TAP_PARAM_REG
787*4882a593Smuzhiyun
788*4882a593Smuzhiyun #define BMA2X2_TAP_THRES__POS 0
789*4882a593Smuzhiyun #define BMA2X2_TAP_THRES__LEN 5
790*4882a593Smuzhiyun #define BMA2X2_TAP_THRES__MSK 0x1F
791*4882a593Smuzhiyun #define BMA2X2_TAP_THRES__REG BMA2X2_TAP_THRES_REG
792*4882a593Smuzhiyun
793*4882a593Smuzhiyun #define BMA2X2_TAP_SAMPLES__POS 6
794*4882a593Smuzhiyun #define BMA2X2_TAP_SAMPLES__LEN 2
795*4882a593Smuzhiyun #define BMA2X2_TAP_SAMPLES__MSK 0xC0
796*4882a593Smuzhiyun #define BMA2X2_TAP_SAMPLES__REG BMA2X2_TAP_THRES_REG
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun #define BMA2X2_ORIENT_MODE__POS 0
799*4882a593Smuzhiyun #define BMA2X2_ORIENT_MODE__LEN 2
800*4882a593Smuzhiyun #define BMA2X2_ORIENT_MODE__MSK 0x03
801*4882a593Smuzhiyun #define BMA2X2_ORIENT_MODE__REG BMA2X2_ORIENT_PARAM_REG
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun #define BMA2X2_ORIENT_BLOCK__POS 2
804*4882a593Smuzhiyun #define BMA2X2_ORIENT_BLOCK__LEN 2
805*4882a593Smuzhiyun #define BMA2X2_ORIENT_BLOCK__MSK 0x0C
806*4882a593Smuzhiyun #define BMA2X2_ORIENT_BLOCK__REG BMA2X2_ORIENT_PARAM_REG
807*4882a593Smuzhiyun
808*4882a593Smuzhiyun #define BMA2X2_ORIENT_HYST__POS 4
809*4882a593Smuzhiyun #define BMA2X2_ORIENT_HYST__LEN 3
810*4882a593Smuzhiyun #define BMA2X2_ORIENT_HYST__MSK 0x70
811*4882a593Smuzhiyun #define BMA2X2_ORIENT_HYST__REG BMA2X2_ORIENT_PARAM_REG
812*4882a593Smuzhiyun
813*4882a593Smuzhiyun #define BMA2X2_ORIENT_AXIS__POS 7
814*4882a593Smuzhiyun #define BMA2X2_ORIENT_AXIS__LEN 1
815*4882a593Smuzhiyun #define BMA2X2_ORIENT_AXIS__MSK 0x80
816*4882a593Smuzhiyun #define BMA2X2_ORIENT_AXIS__REG BMA2X2_THETA_BLOCK_REG
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun #define BMA2X2_ORIENT_UD_EN__POS 6
819*4882a593Smuzhiyun #define BMA2X2_ORIENT_UD_EN__LEN 1
820*4882a593Smuzhiyun #define BMA2X2_ORIENT_UD_EN__MSK 0x40
821*4882a593Smuzhiyun #define BMA2X2_ORIENT_UD_EN__REG BMA2X2_THETA_BLOCK_REG
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun #define BMA2X2_THETA_BLOCK__POS 0
824*4882a593Smuzhiyun #define BMA2X2_THETA_BLOCK__LEN 6
825*4882a593Smuzhiyun #define BMA2X2_THETA_BLOCK__MSK 0x3F
826*4882a593Smuzhiyun #define BMA2X2_THETA_BLOCK__REG BMA2X2_THETA_BLOCK_REG
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun #define BMA2X2_THETA_FLAT__POS 0
829*4882a593Smuzhiyun #define BMA2X2_THETA_FLAT__LEN 6
830*4882a593Smuzhiyun #define BMA2X2_THETA_FLAT__MSK 0x3F
831*4882a593Smuzhiyun #define BMA2X2_THETA_FLAT__REG BMA2X2_THETA_FLAT_REG
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun #define BMA2X2_FLAT_HOLD_TIME__POS 4
834*4882a593Smuzhiyun #define BMA2X2_FLAT_HOLD_TIME__LEN 2
835*4882a593Smuzhiyun #define BMA2X2_FLAT_HOLD_TIME__MSK 0x30
836*4882a593Smuzhiyun #define BMA2X2_FLAT_HOLD_TIME__REG BMA2X2_FLAT_HOLD_TIME_REG
837*4882a593Smuzhiyun
838*4882a593Smuzhiyun #define BMA2X2_FLAT_HYS__POS 0
839*4882a593Smuzhiyun #define BMA2X2_FLAT_HYS__LEN 3
840*4882a593Smuzhiyun #define BMA2X2_FLAT_HYS__MSK 0x07
841*4882a593Smuzhiyun #define BMA2X2_FLAT_HYS__REG BMA2X2_FLAT_HOLD_TIME_REG
842*4882a593Smuzhiyun
843*4882a593Smuzhiyun #define BMA2X2_FIFO_WML_TRIG_RETAIN__POS 0
844*4882a593Smuzhiyun #define BMA2X2_FIFO_WML_TRIG_RETAIN__LEN 6
845*4882a593Smuzhiyun #define BMA2X2_FIFO_WML_TRIG_RETAIN__MSK 0x3F
846*4882a593Smuzhiyun #define BMA2X2_FIFO_WML_TRIG_RETAIN__REG BMA2X2_FIFO_WML_TRIG
847*4882a593Smuzhiyun
848*4882a593Smuzhiyun #define BMA2X2_EN_SELF_TEST__POS 0
849*4882a593Smuzhiyun #define BMA2X2_EN_SELF_TEST__LEN 2
850*4882a593Smuzhiyun #define BMA2X2_EN_SELF_TEST__MSK 0x03
851*4882a593Smuzhiyun #define BMA2X2_EN_SELF_TEST__REG BMA2X2_SELF_TEST_REG
852*4882a593Smuzhiyun
853*4882a593Smuzhiyun #define BMA2X2_NEG_SELF_TEST__POS 2
854*4882a593Smuzhiyun #define BMA2X2_NEG_SELF_TEST__LEN 1
855*4882a593Smuzhiyun #define BMA2X2_NEG_SELF_TEST__MSK 0x04
856*4882a593Smuzhiyun #define BMA2X2_NEG_SELF_TEST__REG BMA2X2_SELF_TEST_REG
857*4882a593Smuzhiyun
858*4882a593Smuzhiyun #define BMA2X2_SELF_TEST_AMP__POS 4
859*4882a593Smuzhiyun #define BMA2X2_SELF_TEST_AMP__LEN 1
860*4882a593Smuzhiyun #define BMA2X2_SELF_TEST_AMP__MSK 0x10
861*4882a593Smuzhiyun #define BMA2X2_SELF_TEST_AMP__REG BMA2X2_SELF_TEST_REG
862*4882a593Smuzhiyun
863*4882a593Smuzhiyun #define BMA2X2_UNLOCK_EE_PROG_MODE__POS 0
864*4882a593Smuzhiyun #define BMA2X2_UNLOCK_EE_PROG_MODE__LEN 1
865*4882a593Smuzhiyun #define BMA2X2_UNLOCK_EE_PROG_MODE__MSK 0x01
866*4882a593Smuzhiyun #define BMA2X2_UNLOCK_EE_PROG_MODE__REG BMA2X2_EEPROM_CTRL_REG
867*4882a593Smuzhiyun
868*4882a593Smuzhiyun #define BMA2X2_START_EE_PROG_TRIG__POS 1
869*4882a593Smuzhiyun #define BMA2X2_START_EE_PROG_TRIG__LEN 1
870*4882a593Smuzhiyun #define BMA2X2_START_EE_PROG_TRIG__MSK 0x02
871*4882a593Smuzhiyun #define BMA2X2_START_EE_PROG_TRIG__REG BMA2X2_EEPROM_CTRL_REG
872*4882a593Smuzhiyun
873*4882a593Smuzhiyun #define BMA2X2_EE_PROG_READY__POS 2
874*4882a593Smuzhiyun #define BMA2X2_EE_PROG_READY__LEN 1
875*4882a593Smuzhiyun #define BMA2X2_EE_PROG_READY__MSK 0x04
876*4882a593Smuzhiyun #define BMA2X2_EE_PROG_READY__REG BMA2X2_EEPROM_CTRL_REG
877*4882a593Smuzhiyun
878*4882a593Smuzhiyun #define BMA2X2_UPDATE_IMAGE__POS 3
879*4882a593Smuzhiyun #define BMA2X2_UPDATE_IMAGE__LEN 1
880*4882a593Smuzhiyun #define BMA2X2_UPDATE_IMAGE__MSK 0x08
881*4882a593Smuzhiyun #define BMA2X2_UPDATE_IMAGE__REG BMA2X2_EEPROM_CTRL_REG
882*4882a593Smuzhiyun
883*4882a593Smuzhiyun #define BMA2X2_EE_REMAIN__POS 4
884*4882a593Smuzhiyun #define BMA2X2_EE_REMAIN__LEN 4
885*4882a593Smuzhiyun #define BMA2X2_EE_REMAIN__MSK 0xF0
886*4882a593Smuzhiyun #define BMA2X2_EE_REMAIN__REG BMA2X2_EEPROM_CTRL_REG
887*4882a593Smuzhiyun
888*4882a593Smuzhiyun #define BMA2X2_EN_SPI_MODE_3__POS 0
889*4882a593Smuzhiyun #define BMA2X2_EN_SPI_MODE_3__LEN 1
890*4882a593Smuzhiyun #define BMA2X2_EN_SPI_MODE_3__MSK 0x01
891*4882a593Smuzhiyun #define BMA2X2_EN_SPI_MODE_3__REG BMA2X2_SERIAL_CTRL_REG
892*4882a593Smuzhiyun
893*4882a593Smuzhiyun #define BMA2X2_I2C_WATCHDOG_PERIOD__POS 1
894*4882a593Smuzhiyun #define BMA2X2_I2C_WATCHDOG_PERIOD__LEN 1
895*4882a593Smuzhiyun #define BMA2X2_I2C_WATCHDOG_PERIOD__MSK 0x02
896*4882a593Smuzhiyun #define BMA2X2_I2C_WATCHDOG_PERIOD__REG BMA2X2_SERIAL_CTRL_REG
897*4882a593Smuzhiyun
898*4882a593Smuzhiyun #define BMA2X2_EN_I2C_WATCHDOG__POS 2
899*4882a593Smuzhiyun #define BMA2X2_EN_I2C_WATCHDOG__LEN 1
900*4882a593Smuzhiyun #define BMA2X2_EN_I2C_WATCHDOG__MSK 0x04
901*4882a593Smuzhiyun #define BMA2X2_EN_I2C_WATCHDOG__REG BMA2X2_SERIAL_CTRL_REG
902*4882a593Smuzhiyun
903*4882a593Smuzhiyun #define BMA2X2_EXT_MODE__POS 7
904*4882a593Smuzhiyun #define BMA2X2_EXT_MODE__LEN 1
905*4882a593Smuzhiyun #define BMA2X2_EXT_MODE__MSK 0x80
906*4882a593Smuzhiyun #define BMA2X2_EXT_MODE__REG BMA2X2_EXTMODE_CTRL_REG
907*4882a593Smuzhiyun
908*4882a593Smuzhiyun #define BMA2X2_ALLOW_UPPER__POS 6
909*4882a593Smuzhiyun #define BMA2X2_ALLOW_UPPER__LEN 1
910*4882a593Smuzhiyun #define BMA2X2_ALLOW_UPPER__MSK 0x40
911*4882a593Smuzhiyun #define BMA2X2_ALLOW_UPPER__REG BMA2X2_EXTMODE_CTRL_REG
912*4882a593Smuzhiyun
913*4882a593Smuzhiyun #define BMA2X2_MAP_2_LOWER__POS 5
914*4882a593Smuzhiyun #define BMA2X2_MAP_2_LOWER__LEN 1
915*4882a593Smuzhiyun #define BMA2X2_MAP_2_LOWER__MSK 0x20
916*4882a593Smuzhiyun #define BMA2X2_MAP_2_LOWER__REG BMA2X2_EXTMODE_CTRL_REG
917*4882a593Smuzhiyun
918*4882a593Smuzhiyun #define BMA2X2_MAGIC_NUMBER__POS 0
919*4882a593Smuzhiyun #define BMA2X2_MAGIC_NUMBER__LEN 5
920*4882a593Smuzhiyun #define BMA2X2_MAGIC_NUMBER__MSK 0x1F
921*4882a593Smuzhiyun #define BMA2X2_MAGIC_NUMBER__REG BMA2X2_EXTMODE_CTRL_REG
922*4882a593Smuzhiyun
923*4882a593Smuzhiyun #define BMA2X2_UNLOCK_EE_WRITE_TRIM__POS 4
924*4882a593Smuzhiyun #define BMA2X2_UNLOCK_EE_WRITE_TRIM__LEN 4
925*4882a593Smuzhiyun #define BMA2X2_UNLOCK_EE_WRITE_TRIM__MSK 0xF0
926*4882a593Smuzhiyun #define BMA2X2_UNLOCK_EE_WRITE_TRIM__REG BMA2X2_CTRL_UNLOCK_REG
927*4882a593Smuzhiyun
928*4882a593Smuzhiyun #define BMA2X2_EN_SLOW_COMP_X__POS 0
929*4882a593Smuzhiyun #define BMA2X2_EN_SLOW_COMP_X__LEN 1
930*4882a593Smuzhiyun #define BMA2X2_EN_SLOW_COMP_X__MSK 0x01
931*4882a593Smuzhiyun #define BMA2X2_EN_SLOW_COMP_X__REG BMA2X2_OFFSET_CTRL_REG
932*4882a593Smuzhiyun
933*4882a593Smuzhiyun #define BMA2X2_EN_SLOW_COMP_Y__POS 1
934*4882a593Smuzhiyun #define BMA2X2_EN_SLOW_COMP_Y__LEN 1
935*4882a593Smuzhiyun #define BMA2X2_EN_SLOW_COMP_Y__MSK 0x02
936*4882a593Smuzhiyun #define BMA2X2_EN_SLOW_COMP_Y__REG BMA2X2_OFFSET_CTRL_REG
937*4882a593Smuzhiyun
938*4882a593Smuzhiyun #define BMA2X2_EN_SLOW_COMP_Z__POS 2
939*4882a593Smuzhiyun #define BMA2X2_EN_SLOW_COMP_Z__LEN 1
940*4882a593Smuzhiyun #define BMA2X2_EN_SLOW_COMP_Z__MSK 0x04
941*4882a593Smuzhiyun #define BMA2X2_EN_SLOW_COMP_Z__REG BMA2X2_OFFSET_CTRL_REG
942*4882a593Smuzhiyun
943*4882a593Smuzhiyun #define BMA2X2_FAST_CAL_RDY_S__POS 4
944*4882a593Smuzhiyun #define BMA2X2_FAST_CAL_RDY_S__LEN 1
945*4882a593Smuzhiyun #define BMA2X2_FAST_CAL_RDY_S__MSK 0x10
946*4882a593Smuzhiyun #define BMA2X2_FAST_CAL_RDY_S__REG BMA2X2_OFFSET_CTRL_REG
947*4882a593Smuzhiyun
948*4882a593Smuzhiyun #define BMA2X2_CAL_TRIGGER__POS 5
949*4882a593Smuzhiyun #define BMA2X2_CAL_TRIGGER__LEN 2
950*4882a593Smuzhiyun #define BMA2X2_CAL_TRIGGER__MSK 0x60
951*4882a593Smuzhiyun #define BMA2X2_CAL_TRIGGER__REG BMA2X2_OFFSET_CTRL_REG
952*4882a593Smuzhiyun
953*4882a593Smuzhiyun #define BMA2X2_RESET_OFFSET_REGS__POS 7
954*4882a593Smuzhiyun #define BMA2X2_RESET_OFFSET_REGS__LEN 1
955*4882a593Smuzhiyun #define BMA2X2_RESET_OFFSET_REGS__MSK 0x80
956*4882a593Smuzhiyun #define BMA2X2_RESET_OFFSET_REGS__REG BMA2X2_OFFSET_CTRL_REG
957*4882a593Smuzhiyun
958*4882a593Smuzhiyun #define BMA2X2_COMP_CUTOFF__POS 0
959*4882a593Smuzhiyun #define BMA2X2_COMP_CUTOFF__LEN 1
960*4882a593Smuzhiyun #define BMA2X2_COMP_CUTOFF__MSK 0x01
961*4882a593Smuzhiyun #define BMA2X2_COMP_CUTOFF__REG BMA2X2_OFFSET_PARAMS_REG
962*4882a593Smuzhiyun
963*4882a593Smuzhiyun #define BMA2X2_COMP_TARGET_OFFSET_X__POS 1
964*4882a593Smuzhiyun #define BMA2X2_COMP_TARGET_OFFSET_X__LEN 2
965*4882a593Smuzhiyun #define BMA2X2_COMP_TARGET_OFFSET_X__MSK 0x06
966*4882a593Smuzhiyun #define BMA2X2_COMP_TARGET_OFFSET_X__REG BMA2X2_OFFSET_PARAMS_REG
967*4882a593Smuzhiyun
968*4882a593Smuzhiyun #define BMA2X2_COMP_TARGET_OFFSET_Y__POS 3
969*4882a593Smuzhiyun #define BMA2X2_COMP_TARGET_OFFSET_Y__LEN 2
970*4882a593Smuzhiyun #define BMA2X2_COMP_TARGET_OFFSET_Y__MSK 0x18
971*4882a593Smuzhiyun #define BMA2X2_COMP_TARGET_OFFSET_Y__REG BMA2X2_OFFSET_PARAMS_REG
972*4882a593Smuzhiyun
973*4882a593Smuzhiyun #define BMA2X2_COMP_TARGET_OFFSET_Z__POS 5
974*4882a593Smuzhiyun #define BMA2X2_COMP_TARGET_OFFSET_Z__LEN 2
975*4882a593Smuzhiyun #define BMA2X2_COMP_TARGET_OFFSET_Z__MSK 0x60
976*4882a593Smuzhiyun #define BMA2X2_COMP_TARGET_OFFSET_Z__REG BMA2X2_OFFSET_PARAMS_REG
977*4882a593Smuzhiyun
978*4882a593Smuzhiyun #define BMA2X2_FIFO_DATA_SELECT__POS 0
979*4882a593Smuzhiyun #define BMA2X2_FIFO_DATA_SELECT__LEN 2
980*4882a593Smuzhiyun #define BMA2X2_FIFO_DATA_SELECT__MSK 0x03
981*4882a593Smuzhiyun #define BMA2X2_FIFO_DATA_SELECT__REG BMA2X2_FIFO_MODE_REG
982*4882a593Smuzhiyun
983*4882a593Smuzhiyun #define BMA2X2_FIFO_TRIGGER_SOURCE__POS 2
984*4882a593Smuzhiyun #define BMA2X2_FIFO_TRIGGER_SOURCE__LEN 2
985*4882a593Smuzhiyun #define BMA2X2_FIFO_TRIGGER_SOURCE__MSK 0x0C
986*4882a593Smuzhiyun #define BMA2X2_FIFO_TRIGGER_SOURCE__REG BMA2X2_FIFO_MODE_REG
987*4882a593Smuzhiyun
988*4882a593Smuzhiyun #define BMA2X2_FIFO_TRIGGER_ACTION__POS 4
989*4882a593Smuzhiyun #define BMA2X2_FIFO_TRIGGER_ACTION__LEN 2
990*4882a593Smuzhiyun #define BMA2X2_FIFO_TRIGGER_ACTION__MSK 0x30
991*4882a593Smuzhiyun #define BMA2X2_FIFO_TRIGGER_ACTION__REG BMA2X2_FIFO_MODE_REG
992*4882a593Smuzhiyun
993*4882a593Smuzhiyun #define BMA2X2_FIFO_MODE__POS 6
994*4882a593Smuzhiyun #define BMA2X2_FIFO_MODE__LEN 2
995*4882a593Smuzhiyun #define BMA2X2_FIFO_MODE__MSK 0xC0
996*4882a593Smuzhiyun #define BMA2X2_FIFO_MODE__REG BMA2X2_FIFO_MODE_REG
997*4882a593Smuzhiyun
998*4882a593Smuzhiyun #define BMA2X2_RANGE_2G 3
999*4882a593Smuzhiyun #define BMA2X2_RANGE_4G 5
1000*4882a593Smuzhiyun #define BMA2X2_RANGE_8G 8
1001*4882a593Smuzhiyun #define BMA2X2_RANGE_16G 12
1002*4882a593Smuzhiyun
1003*4882a593Smuzhiyun #define BMA2X2_BW_7_81HZ 0x08
1004*4882a593Smuzhiyun #define BMA2X2_BW_15_63HZ 0x09
1005*4882a593Smuzhiyun #define BMA2X2_BW_31_25HZ 0x0A
1006*4882a593Smuzhiyun #define BMA2X2_BW_62_50HZ 0x0B
1007*4882a593Smuzhiyun #define BMA2X2_BW_125HZ 0x0C
1008*4882a593Smuzhiyun #define BMA2X2_BW_250HZ 0x0D
1009*4882a593Smuzhiyun #define BMA2X2_BW_500HZ 0x0E
1010*4882a593Smuzhiyun #define BMA2X2_BW_1000HZ 0x0F
1011*4882a593Smuzhiyun
1012*4882a593Smuzhiyun #define BMA2X2_SLEEP_DUR_0_5MS 0x05
1013*4882a593Smuzhiyun #define BMA2X2_SLEEP_DUR_1MS 0x06
1014*4882a593Smuzhiyun #define BMA2X2_SLEEP_DUR_2MS 0x07
1015*4882a593Smuzhiyun #define BMA2X2_SLEEP_DUR_4MS 0x08
1016*4882a593Smuzhiyun #define BMA2X2_SLEEP_DUR_6MS 0x09
1017*4882a593Smuzhiyun #define BMA2X2_SLEEP_DUR_10MS 0x0A
1018*4882a593Smuzhiyun #define BMA2X2_SLEEP_DUR_25MS 0x0B
1019*4882a593Smuzhiyun #define BMA2X2_SLEEP_DUR_50MS 0x0C
1020*4882a593Smuzhiyun #define BMA2X2_SLEEP_DUR_100MS 0x0D
1021*4882a593Smuzhiyun #define BMA2X2_SLEEP_DUR_500MS 0x0E
1022*4882a593Smuzhiyun #define BMA2X2_SLEEP_DUR_1S 0x0F
1023*4882a593Smuzhiyun
1024*4882a593Smuzhiyun #define BMA2X2_LATCH_DUR_NON_LATCH 0x00
1025*4882a593Smuzhiyun #define BMA2X2_LATCH_DUR_250MS 0x01
1026*4882a593Smuzhiyun #define BMA2X2_LATCH_DUR_500MS 0x02
1027*4882a593Smuzhiyun #define BMA2X2_LATCH_DUR_1S 0x03
1028*4882a593Smuzhiyun #define BMA2X2_LATCH_DUR_2S 0x04
1029*4882a593Smuzhiyun #define BMA2X2_LATCH_DUR_4S 0x05
1030*4882a593Smuzhiyun #define BMA2X2_LATCH_DUR_8S 0x06
1031*4882a593Smuzhiyun #define BMA2X2_LATCH_DUR_LATCH 0x07
1032*4882a593Smuzhiyun #define BMA2X2_LATCH_DUR_NON_LATCH1 0x08
1033*4882a593Smuzhiyun #define BMA2X2_LATCH_DUR_250US 0x09
1034*4882a593Smuzhiyun #define BMA2X2_LATCH_DUR_500US 0x0A
1035*4882a593Smuzhiyun #define BMA2X2_LATCH_DUR_1MS 0x0B
1036*4882a593Smuzhiyun #define BMA2X2_LATCH_DUR_12_5MS 0x0C
1037*4882a593Smuzhiyun #define BMA2X2_LATCH_DUR_25MS 0x0D
1038*4882a593Smuzhiyun #define BMA2X2_LATCH_DUR_50MS 0x0E
1039*4882a593Smuzhiyun #define BMA2X2_LATCH_DUR_LATCH1 0x0F
1040*4882a593Smuzhiyun
1041*4882a593Smuzhiyun #define BMA2X2_MODE_NORMAL 0
1042*4882a593Smuzhiyun #define BMA2X2_MODE_LOWPOWER1 1
1043*4882a593Smuzhiyun #define BMA2X2_MODE_SUSPEND 2
1044*4882a593Smuzhiyun #define BMA2X2_MODE_DEEP_SUSPEND 3
1045*4882a593Smuzhiyun #define BMA2X2_MODE_LOWPOWER2 4
1046*4882a593Smuzhiyun #define BMA2X2_MODE_STANDBY 5
1047*4882a593Smuzhiyun
1048*4882a593Smuzhiyun #define BMA2X2_LOW_TH_IN_G(gthres, range) ((256 * gthres) / range)
1049*4882a593Smuzhiyun #define BMA2X2_HIGH_TH_IN_G(gthres, range) ((256 * gthres) / range)
1050*4882a593Smuzhiyun #define BMA2X2_LOW_HY_IN_G(ghyst, range) ((32 * ghyst) / range)
1051*4882a593Smuzhiyun #define BMA2X2_HIGH_HY_IN_G(ghyst, range) ((32 * ghyst) / range)
1052*4882a593Smuzhiyun #define BMA2X2_SLOPE_TH_IN_G(gthres, range) ((128 * gthres) / range)
1053*4882a593Smuzhiyun
1054*4882a593Smuzhiyun #define BMA2X2_GET_BITSLICE(regvar, bitname)\
1055*4882a593Smuzhiyun ((regvar & bitname##__MSK) >> bitname##__POS)
1056*4882a593Smuzhiyun #define BMA2X2_SET_BITSLICE(regvar, bitname, val)\
1057*4882a593Smuzhiyun ((regvar & ~bitname##__MSK) | ((val << bitname##__POS) & bitname##__MSK))
1058*4882a593Smuzhiyun
1059*4882a593Smuzhiyun #define BMA255_CHIP_ID 0XFA
1060*4882a593Smuzhiyun #define BMA250_CHIP_ID 0XF9
1061*4882a593Smuzhiyun #define BMA250E_CHIP_ID 0X03
1062*4882a593Smuzhiyun #define BMA222E_CHIP_ID 0XF8
1063*4882a593Smuzhiyun #define BMA280_CHIP_ID 0XFB
1064*4882a593Smuzhiyun
1065*4882a593Smuzhiyun #define BAM2X2_ENABLE 0X80
1066*4882a593Smuzhiyun
1067*4882a593Smuzhiyun #define BMA2XX_RANGE 32768
1068*4882a593Smuzhiyun
1069*4882a593Smuzhiyun #define X_AXIS_COMPEN 0/*X_AXIS not compensation */
1070*4882a593Smuzhiyun /*Y_AXIS offset is caused by screws, there needs to be compensation 3.5*/
1071*4882a593Smuzhiyun #define Y_AXIS_COMPEN 0
1072*4882a593Smuzhiyun #define Z_AXIS_COMPEN 0/*Z_AXIS not compensation*/
1073*4882a593Smuzhiyun
1074*4882a593Smuzhiyun static u8 slope_mode;
1075*4882a593Smuzhiyun static u8 high_g_mode;
1076*4882a593Smuzhiyun static u8 interrupt_dur;
1077*4882a593Smuzhiyun static u8 interrupt_threshold;
1078*4882a593Smuzhiyun
bma2x2_parse_dt(struct i2c_client * client)1079*4882a593Smuzhiyun static int bma2x2_parse_dt(struct i2c_client *client)
1080*4882a593Smuzhiyun {
1081*4882a593Smuzhiyun struct device_node *np = client->dev.of_node;
1082*4882a593Smuzhiyun u32 temp_val;
1083*4882a593Smuzhiyun int rc;
1084*4882a593Smuzhiyun
1085*4882a593Smuzhiyun rc = of_property_read_u32(np, "high_g_mode", &temp_val);
1086*4882a593Smuzhiyun if (!rc)
1087*4882a593Smuzhiyun high_g_mode = (u8)temp_val;
1088*4882a593Smuzhiyun
1089*4882a593Smuzhiyun rc = of_property_read_u32(np, "slope_mode", &temp_val);
1090*4882a593Smuzhiyun if (!rc)
1091*4882a593Smuzhiyun slope_mode = (u8)temp_val;
1092*4882a593Smuzhiyun
1093*4882a593Smuzhiyun rc = of_property_read_u32(np, "interrupt_dur", &temp_val);
1094*4882a593Smuzhiyun if (!rc)
1095*4882a593Smuzhiyun interrupt_dur = (u8)temp_val;
1096*4882a593Smuzhiyun
1097*4882a593Smuzhiyun rc = of_property_read_u32(np, "interrupt_threshold", &temp_val);
1098*4882a593Smuzhiyun if (!rc)
1099*4882a593Smuzhiyun interrupt_threshold = (u8)temp_val;
1100*4882a593Smuzhiyun
1101*4882a593Smuzhiyun DBG("%s: high_g_mode = %d\n", __func__, high_g_mode);
1102*4882a593Smuzhiyun DBG("%s: slope_mode = %d\n", __func__, slope_mode);
1103*4882a593Smuzhiyun DBG("%s: interrupt_dur = %d\n", __func__, interrupt_dur);
1104*4882a593Smuzhiyun DBG("%s: interrupt_threshold = %d\n", __func__, interrupt_threshold);
1105*4882a593Smuzhiyun
1106*4882a593Smuzhiyun return 0;
1107*4882a593Smuzhiyun }
1108*4882a593Smuzhiyun
1109*4882a593Smuzhiyun #ifdef BMA2X2_ENABLE_INT1
bma2x2_set_int1_pad_sel(struct i2c_client * client,unsigned char int1sel)1110*4882a593Smuzhiyun static int bma2x2_set_int1_pad_sel(struct i2c_client *client, unsigned char
1111*4882a593Smuzhiyun int1sel)
1112*4882a593Smuzhiyun {
1113*4882a593Smuzhiyun int comres = 0;
1114*4882a593Smuzhiyun unsigned char data = 0;
1115*4882a593Smuzhiyun unsigned char state;
1116*4882a593Smuzhiyun
1117*4882a593Smuzhiyun state = 0x01;
1118*4882a593Smuzhiyun
1119*4882a593Smuzhiyun switch (int1sel) {
1120*4882a593Smuzhiyun case 0:
1121*4882a593Smuzhiyun data = sensor_read_reg(client, BMA2X2_EN_INT1_PAD_LOWG__REG);
1122*4882a593Smuzhiyun data = BMA2X2_SET_BITSLICE(data, BMA2X2_EN_INT1_PAD_LOWG,
1123*4882a593Smuzhiyun state);
1124*4882a593Smuzhiyun comres = sensor_write_reg(client,
1125*4882a593Smuzhiyun BMA2X2_EN_INT1_PAD_LOWG__REG,
1126*4882a593Smuzhiyun data);
1127*4882a593Smuzhiyun break;
1128*4882a593Smuzhiyun case 1:
1129*4882a593Smuzhiyun data = sensor_read_reg(client, BMA2X2_EN_INT1_PAD_HIGHG__REG);
1130*4882a593Smuzhiyun data = BMA2X2_SET_BITSLICE(data, BMA2X2_EN_INT1_PAD_HIGHG,
1131*4882a593Smuzhiyun state);
1132*4882a593Smuzhiyun comres = sensor_write_reg(client,
1133*4882a593Smuzhiyun BMA2X2_EN_INT1_PAD_HIGHG__REG,
1134*4882a593Smuzhiyun data);
1135*4882a593Smuzhiyun break;
1136*4882a593Smuzhiyun case 2:
1137*4882a593Smuzhiyun data = sensor_read_reg(client, BMA2X2_EN_INT1_PAD_SLOPE__REG);
1138*4882a593Smuzhiyun data = BMA2X2_SET_BITSLICE(data, BMA2X2_EN_INT1_PAD_SLOPE,
1139*4882a593Smuzhiyun state);
1140*4882a593Smuzhiyun comres = sensor_write_reg(client,
1141*4882a593Smuzhiyun BMA2X2_EN_INT1_PAD_SLOPE__REG,
1142*4882a593Smuzhiyun data);
1143*4882a593Smuzhiyun break;
1144*4882a593Smuzhiyun case 3:
1145*4882a593Smuzhiyun data = sensor_read_reg(client, BMA2X2_EN_INT1_PAD_DB_TAP__REG);
1146*4882a593Smuzhiyun data = BMA2X2_SET_BITSLICE(data, BMA2X2_EN_INT1_PAD_DB_TAP,
1147*4882a593Smuzhiyun state);
1148*4882a593Smuzhiyun comres = sensor_write_reg(client,
1149*4882a593Smuzhiyun BMA2X2_EN_INT1_PAD_DB_TAP__REG,
1150*4882a593Smuzhiyun data);
1151*4882a593Smuzhiyun break;
1152*4882a593Smuzhiyun case 4:
1153*4882a593Smuzhiyun data = sensor_read_reg(client, BMA2X2_EN_INT1_PAD_SNG_TAP__REG);
1154*4882a593Smuzhiyun data = BMA2X2_SET_BITSLICE(data, BMA2X2_EN_INT1_PAD_SNG_TAP,
1155*4882a593Smuzhiyun state);
1156*4882a593Smuzhiyun comres = sensor_write_reg(client,
1157*4882a593Smuzhiyun BMA2X2_EN_INT1_PAD_SNG_TAP__REG,
1158*4882a593Smuzhiyun data);
1159*4882a593Smuzhiyun break;
1160*4882a593Smuzhiyun case 5:
1161*4882a593Smuzhiyun data = sensor_read_reg(client, BMA2X2_EN_INT1_PAD_ORIENT__REG);
1162*4882a593Smuzhiyun data = BMA2X2_SET_BITSLICE(data, BMA2X2_EN_INT1_PAD_ORIENT,
1163*4882a593Smuzhiyun state);
1164*4882a593Smuzhiyun comres = sensor_write_reg(client,
1165*4882a593Smuzhiyun BMA2X2_EN_INT1_PAD_ORIENT__REG,
1166*4882a593Smuzhiyun data);
1167*4882a593Smuzhiyun break;
1168*4882a593Smuzhiyun case 6:
1169*4882a593Smuzhiyun data = sensor_read_reg(client, BMA2X2_EN_INT1_PAD_FLAT__REG);
1170*4882a593Smuzhiyun data = BMA2X2_SET_BITSLICE(data, BMA2X2_EN_INT1_PAD_FLAT,
1171*4882a593Smuzhiyun state);
1172*4882a593Smuzhiyun comres = sensor_write_reg(client,
1173*4882a593Smuzhiyun BMA2X2_EN_INT1_PAD_FLAT__REG,
1174*4882a593Smuzhiyun data);
1175*4882a593Smuzhiyun break;
1176*4882a593Smuzhiyun case 7:
1177*4882a593Smuzhiyun comres = sensor_read_reg(client,
1178*4882a593Smuzhiyun BMA2X2_EN_INT1_PAD_SLO_NO_MOT__REG);
1179*4882a593Smuzhiyun data = BMA2X2_SET_BITSLICE(data, BMA2X2_EN_INT1_PAD_SLO_NO_MOT,
1180*4882a593Smuzhiyun state);
1181*4882a593Smuzhiyun comres = sensor_write_reg(client,
1182*4882a593Smuzhiyun BMA2X2_EN_INT1_PAD_SLO_NO_MOT__REG,
1183*4882a593Smuzhiyun data);
1184*4882a593Smuzhiyun break;
1185*4882a593Smuzhiyun default:
1186*4882a593Smuzhiyun break;
1187*4882a593Smuzhiyun }
1188*4882a593Smuzhiyun
1189*4882a593Smuzhiyun return comres;
1190*4882a593Smuzhiyun }
1191*4882a593Smuzhiyun #endif /* BMA2X2_ENABLE_INT1 */
1192*4882a593Smuzhiyun
1193*4882a593Smuzhiyun #ifdef BMA2X2_ENABLE_INT2
bma2x2_set_int2_pad_sel(struct i2c_client * client,unsigned char int2sel)1194*4882a593Smuzhiyun static int bma2x2_set_int2_pad_sel(struct i2c_client *client, unsigned char
1195*4882a593Smuzhiyun int2sel)
1196*4882a593Smuzhiyun {
1197*4882a593Smuzhiyun int comres = 0;
1198*4882a593Smuzhiyun unsigned char data = 0;
1199*4882a593Smuzhiyun unsigned char state;
1200*4882a593Smuzhiyun
1201*4882a593Smuzhiyun state = 0x01;
1202*4882a593Smuzhiyun
1203*4882a593Smuzhiyun switch (int2sel) {
1204*4882a593Smuzhiyun case 0:
1205*4882a593Smuzhiyun comres = sensor_read_reg(client, BMA2X2_EN_INT2_PAD_LOWG__REG);
1206*4882a593Smuzhiyun data = BMA2X2_SET_BITSLICE(data, BMA2X2_EN_INT2_PAD_LOWG,
1207*4882a593Smuzhiyun state);
1208*4882a593Smuzhiyun comres = sensor_write_reg(client,
1209*4882a593Smuzhiyun BMA2X2_EN_INT2_PAD_LOWG__REG,
1210*4882a593Smuzhiyun data);
1211*4882a593Smuzhiyun break;
1212*4882a593Smuzhiyun case 1:
1213*4882a593Smuzhiyun comres = sensor_read_reg(client, BMA2X2_EN_INT2_PAD_HIGHG__REG);
1214*4882a593Smuzhiyun data = BMA2X2_SET_BITSLICE(data, BMA2X2_EN_INT2_PAD_HIGHG,
1215*4882a593Smuzhiyun state);
1216*4882a593Smuzhiyun comres = sensor_write_reg(client,
1217*4882a593Smuzhiyun BMA2X2_EN_INT2_PAD_HIGHG__REG,
1218*4882a593Smuzhiyun data);
1219*4882a593Smuzhiyun break;
1220*4882a593Smuzhiyun case 2:
1221*4882a593Smuzhiyun comres = sensor_read_reg(client, BMA2X2_EN_INT2_PAD_SLOPE__REG);
1222*4882a593Smuzhiyun data = BMA2X2_SET_BITSLICE(data, BMA2X2_EN_INT2_PAD_SLOPE,
1223*4882a593Smuzhiyun state);
1224*4882a593Smuzhiyun comres = sensor_write_reg(client,
1225*4882a593Smuzhiyun BMA2X2_EN_INT2_PAD_SLOPE__REG,
1226*4882a593Smuzhiyun data);
1227*4882a593Smuzhiyun break;
1228*4882a593Smuzhiyun case 3:
1229*4882a593Smuzhiyun comres = sensor_read_reg(client,
1230*4882a593Smuzhiyun BMA2X2_EN_INT2_PAD_DB_TAP__REG);
1231*4882a593Smuzhiyun data = BMA2X2_SET_BITSLICE(data, BMA2X2_EN_INT2_PAD_DB_TAP,
1232*4882a593Smuzhiyun state);
1233*4882a593Smuzhiyun comres = sensor_write_reg(client,
1234*4882a593Smuzhiyun BMA2X2_EN_INT2_PAD_DB_TAP__REG,
1235*4882a593Smuzhiyun data);
1236*4882a593Smuzhiyun break;
1237*4882a593Smuzhiyun case 4:
1238*4882a593Smuzhiyun comres = sensor_read_reg(client,
1239*4882a593Smuzhiyun BMA2X2_EN_INT2_PAD_SNG_TAP__REG);
1240*4882a593Smuzhiyun data = BMA2X2_SET_BITSLICE(data, BMA2X2_EN_INT2_PAD_SNG_TAP,
1241*4882a593Smuzhiyun state);
1242*4882a593Smuzhiyun comres = sensor_write_reg(client,
1243*4882a593Smuzhiyun BMA2X2_EN_INT2_PAD_SNG_TAP__REG,
1244*4882a593Smuzhiyun data);
1245*4882a593Smuzhiyun break;
1246*4882a593Smuzhiyun case 5:
1247*4882a593Smuzhiyun comres = sensor_read_reg(client,
1248*4882a593Smuzhiyun BMA2X2_EN_INT2_PAD_ORIENT__REG);
1249*4882a593Smuzhiyun data = BMA2X2_SET_BITSLICE(data, BMA2X2_EN_INT2_PAD_ORIENT,
1250*4882a593Smuzhiyun state);
1251*4882a593Smuzhiyun comres = sensor_write_reg(client,
1252*4882a593Smuzhiyun BMA2X2_EN_INT2_PAD_ORIENT__REG,
1253*4882a593Smuzhiyun data);
1254*4882a593Smuzhiyun break;
1255*4882a593Smuzhiyun case 6:
1256*4882a593Smuzhiyun comres = sensor_read_reg(client,
1257*4882a593Smuzhiyun BMA2X2_EN_INT2_PAD_FLAT__REG);
1258*4882a593Smuzhiyun data = BMA2X2_SET_BITSLICE(data, BMA2X2_EN_INT2_PAD_FLAT,
1259*4882a593Smuzhiyun state);
1260*4882a593Smuzhiyun comres = sensor_write_reg(client,
1261*4882a593Smuzhiyun BMA2X2_EN_INT2_PAD_FLAT__REG,
1262*4882a593Smuzhiyun data);
1263*4882a593Smuzhiyun break;
1264*4882a593Smuzhiyun case 7:
1265*4882a593Smuzhiyun comres = sensor_read_reg(client,
1266*4882a593Smuzhiyun BMA2X2_EN_INT2_PAD_SLO_NO_MOT__REG);
1267*4882a593Smuzhiyun data = BMA2X2_SET_BITSLICE(data, BMA2X2_EN_INT2_PAD_SLO_NO_MOT,
1268*4882a593Smuzhiyun state);
1269*4882a593Smuzhiyun comres = sensor_write_reg(client,
1270*4882a593Smuzhiyun BMA2X2_EN_INT2_PAD_SLO_NO_MOT__REG,
1271*4882a593Smuzhiyun data);
1272*4882a593Smuzhiyun break;
1273*4882a593Smuzhiyun default:
1274*4882a593Smuzhiyun break;
1275*4882a593Smuzhiyun }
1276*4882a593Smuzhiyun
1277*4882a593Smuzhiyun return comres;
1278*4882a593Smuzhiyun }
1279*4882a593Smuzhiyun #endif /* BMA2X2_ENABLE_INT2 */
1280*4882a593Smuzhiyun
1281*4882a593Smuzhiyun #if defined(BMA2X2_ENABLE_INT1) || defined(BMA2X2_ENABLE_INT2)
bma2x2_get_interruptstatus1(struct i2c_client * client,unsigned char * intstatus)1282*4882a593Smuzhiyun static int bma2x2_get_interruptstatus1(struct i2c_client *client, unsigned char
1283*4882a593Smuzhiyun *intstatus)
1284*4882a593Smuzhiyun {
1285*4882a593Smuzhiyun unsigned char data;
1286*4882a593Smuzhiyun
1287*4882a593Smuzhiyun data = sensor_read_reg(client, BMA2X2_STATUS1_REG);
1288*4882a593Smuzhiyun *intstatus = data;
1289*4882a593Smuzhiyun return 0;
1290*4882a593Smuzhiyun }
1291*4882a593Smuzhiyun
bma2x2_get_HIGH_first(struct i2c_client * client,unsigned char param,unsigned char * intstatus)1292*4882a593Smuzhiyun static int bma2x2_get_HIGH_first(struct i2c_client *client, unsigned char
1293*4882a593Smuzhiyun param,
1294*4882a593Smuzhiyun unsigned char *intstatus)
1295*4882a593Smuzhiyun {
1296*4882a593Smuzhiyun unsigned char data;
1297*4882a593Smuzhiyun
1298*4882a593Smuzhiyun switch (param) {
1299*4882a593Smuzhiyun case 0:
1300*4882a593Smuzhiyun data = sensor_read_reg(client, BMA2X2_STATUS_ORIENT_HIGH_REG);
1301*4882a593Smuzhiyun data = BMA2X2_GET_BITSLICE(data, BMA2X2_HIGHG_FIRST_X);
1302*4882a593Smuzhiyun *intstatus = data;
1303*4882a593Smuzhiyun break;
1304*4882a593Smuzhiyun case 1:
1305*4882a593Smuzhiyun data = sensor_read_reg(client, BMA2X2_STATUS_ORIENT_HIGH_REG);
1306*4882a593Smuzhiyun data = BMA2X2_GET_BITSLICE(data, BMA2X2_HIGHG_FIRST_Y);
1307*4882a593Smuzhiyun *intstatus = data;
1308*4882a593Smuzhiyun break;
1309*4882a593Smuzhiyun case 2:
1310*4882a593Smuzhiyun data = sensor_read_reg(client, BMA2X2_STATUS_ORIENT_HIGH_REG);
1311*4882a593Smuzhiyun data = BMA2X2_GET_BITSLICE(data, BMA2X2_HIGHG_FIRST_Z);
1312*4882a593Smuzhiyun *intstatus = data;
1313*4882a593Smuzhiyun break;
1314*4882a593Smuzhiyun default:
1315*4882a593Smuzhiyun break;
1316*4882a593Smuzhiyun }
1317*4882a593Smuzhiyun
1318*4882a593Smuzhiyun return 0;
1319*4882a593Smuzhiyun }
1320*4882a593Smuzhiyun
bma2x2_get_HIGH_sign(struct i2c_client * client,unsigned char * intstatus)1321*4882a593Smuzhiyun static int bma2x2_get_HIGH_sign(struct i2c_client *client, unsigned char
1322*4882a593Smuzhiyun *intstatus)
1323*4882a593Smuzhiyun {
1324*4882a593Smuzhiyun unsigned char data;
1325*4882a593Smuzhiyun
1326*4882a593Smuzhiyun data = sensor_read_reg(client, BMA2X2_STATUS_ORIENT_HIGH_REG);
1327*4882a593Smuzhiyun data = BMA2X2_GET_BITSLICE(data, BMA2X2_HIGHG_SIGN_S);
1328*4882a593Smuzhiyun *intstatus = data;
1329*4882a593Smuzhiyun
1330*4882a593Smuzhiyun return 0;
1331*4882a593Smuzhiyun }
1332*4882a593Smuzhiyun
bma2x2_get_slope_first(struct i2c_client * client,unsigned char param,unsigned char * intstatus)1333*4882a593Smuzhiyun static int bma2x2_get_slope_first(struct i2c_client *client, unsigned char
1334*4882a593Smuzhiyun param, unsigned char *intstatus)
1335*4882a593Smuzhiyun {
1336*4882a593Smuzhiyun unsigned char data;
1337*4882a593Smuzhiyun
1338*4882a593Smuzhiyun switch (param) {
1339*4882a593Smuzhiyun case 0:
1340*4882a593Smuzhiyun data = sensor_read_reg(client, BMA2X2_STATUS_TAP_SLOPE_REG);
1341*4882a593Smuzhiyun data = BMA2X2_GET_BITSLICE(data, BMA2X2_SLOPE_FIRST_X);
1342*4882a593Smuzhiyun *intstatus = data;
1343*4882a593Smuzhiyun break;
1344*4882a593Smuzhiyun case 1:
1345*4882a593Smuzhiyun data = sensor_read_reg(client, BMA2X2_STATUS_TAP_SLOPE_REG);
1346*4882a593Smuzhiyun data = BMA2X2_GET_BITSLICE(data, BMA2X2_SLOPE_FIRST_Y);
1347*4882a593Smuzhiyun *intstatus = data;
1348*4882a593Smuzhiyun break;
1349*4882a593Smuzhiyun case 2:
1350*4882a593Smuzhiyun data = sensor_read_reg(client, BMA2X2_STATUS_TAP_SLOPE_REG);
1351*4882a593Smuzhiyun data = BMA2X2_GET_BITSLICE(data, BMA2X2_SLOPE_FIRST_Z);
1352*4882a593Smuzhiyun *intstatus = data;
1353*4882a593Smuzhiyun break;
1354*4882a593Smuzhiyun default:
1355*4882a593Smuzhiyun break;
1356*4882a593Smuzhiyun }
1357*4882a593Smuzhiyun
1358*4882a593Smuzhiyun return 0;
1359*4882a593Smuzhiyun }
1360*4882a593Smuzhiyun
bma2x2_get_slope_sign(struct i2c_client * client,unsigned char * intstatus)1361*4882a593Smuzhiyun static int bma2x2_get_slope_sign(struct i2c_client *client, unsigned char
1362*4882a593Smuzhiyun *intstatus)
1363*4882a593Smuzhiyun {
1364*4882a593Smuzhiyun unsigned char data;
1365*4882a593Smuzhiyun
1366*4882a593Smuzhiyun data = sensor_read_reg(client, BMA2X2_STATUS_TAP_SLOPE_REG);
1367*4882a593Smuzhiyun data = BMA2X2_GET_BITSLICE(data, BMA2X2_SLOPE_SIGN_S);
1368*4882a593Smuzhiyun *intstatus = data;
1369*4882a593Smuzhiyun
1370*4882a593Smuzhiyun return 0;
1371*4882a593Smuzhiyun }
1372*4882a593Smuzhiyun
bma2x2_get_orient_status(struct i2c_client * client,unsigned char * intstatus)1373*4882a593Smuzhiyun static int bma2x2_get_orient_status(struct i2c_client *client, unsigned char
1374*4882a593Smuzhiyun *intstatus)
1375*4882a593Smuzhiyun {
1376*4882a593Smuzhiyun unsigned char data;
1377*4882a593Smuzhiyun
1378*4882a593Smuzhiyun data = sensor_read_reg(client, BMA2X2_STATUS_ORIENT_HIGH_REG);
1379*4882a593Smuzhiyun data = BMA2X2_GET_BITSLICE(data, BMA2X2_ORIENT_S);
1380*4882a593Smuzhiyun *intstatus = data;
1381*4882a593Smuzhiyun
1382*4882a593Smuzhiyun return 0;
1383*4882a593Smuzhiyun }
1384*4882a593Smuzhiyun
bma2x2_get_orient_flat_status(struct i2c_client * client,unsigned char * intstatus)1385*4882a593Smuzhiyun static int bma2x2_get_orient_flat_status(struct i2c_client *client, unsigned
1386*4882a593Smuzhiyun char *intstatus)
1387*4882a593Smuzhiyun {
1388*4882a593Smuzhiyun unsigned char data;
1389*4882a593Smuzhiyun
1390*4882a593Smuzhiyun data = sensor_read_reg(client, BMA2X2_STATUS_ORIENT_HIGH_REG);
1391*4882a593Smuzhiyun data = BMA2X2_GET_BITSLICE(data, BMA2X2_FLAT_S);
1392*4882a593Smuzhiyun *intstatus = data;
1393*4882a593Smuzhiyun
1394*4882a593Smuzhiyun return 0;
1395*4882a593Smuzhiyun }
1396*4882a593Smuzhiyun
bma2x2_set_int_mode(struct i2c_client * client,unsigned char mode)1397*4882a593Smuzhiyun static int bma2x2_set_int_mode(struct i2c_client *client, unsigned char mode)
1398*4882a593Smuzhiyun {
1399*4882a593Smuzhiyun unsigned char data;
1400*4882a593Smuzhiyun int comres = 0;
1401*4882a593Smuzhiyun
1402*4882a593Smuzhiyun data = sensor_read_reg(client, BMA2X2_INT_MODE_SEL__REG);
1403*4882a593Smuzhiyun data = BMA2X2_SET_BITSLICE(data, BMA2X2_INT_MODE_SEL, mode);
1404*4882a593Smuzhiyun comres = sensor_write_reg(client,
1405*4882a593Smuzhiyun BMA2X2_INT_MODE_SEL__REG, data);
1406*4882a593Smuzhiyun
1407*4882a593Smuzhiyun return comres;
1408*4882a593Smuzhiyun }
1409*4882a593Smuzhiyun #endif /* defined(BMA2X2_ENABLE_INT1) || defined(BMA2X2_ENABLE_INT2) */
1410*4882a593Smuzhiyun
bma2x2_set_mode(struct i2c_client * client,unsigned char mode)1411*4882a593Smuzhiyun static int bma2x2_set_mode(struct i2c_client *client, unsigned char mode)
1412*4882a593Smuzhiyun {
1413*4882a593Smuzhiyun int comres = 0;
1414*4882a593Smuzhiyun unsigned char data1, data2;
1415*4882a593Smuzhiyun
1416*4882a593Smuzhiyun if (mode < 6) {
1417*4882a593Smuzhiyun data1 = sensor_read_reg(client, BMA2X2_MODE_CTRL_REG);
1418*4882a593Smuzhiyun data2 = sensor_read_reg(client, BMA2X2_LOW_NOISE_CTRL_REG);
1419*4882a593Smuzhiyun switch (mode) {
1420*4882a593Smuzhiyun case BMA2X2_MODE_NORMAL:
1421*4882a593Smuzhiyun data1 = BMA2X2_SET_BITSLICE(data1,
1422*4882a593Smuzhiyun BMA2X2_MODE_CTRL,
1423*4882a593Smuzhiyun 0);
1424*4882a593Smuzhiyun data2 = BMA2X2_SET_BITSLICE
1425*4882a593Smuzhiyun (data2,
1426*4882a593Smuzhiyun BMA2X2_LOW_POWER_MODE,
1427*4882a593Smuzhiyun 0);
1428*4882a593Smuzhiyun sensor_write_reg
1429*4882a593Smuzhiyun (client,
1430*4882a593Smuzhiyun BMA2X2_MODE_CTRL_REG,
1431*4882a593Smuzhiyun data1);
1432*4882a593Smuzhiyun mdelay(1);
1433*4882a593Smuzhiyun sensor_write_reg(client,
1434*4882a593Smuzhiyun BMA2X2_LOW_NOISE_CTRL_REG,
1435*4882a593Smuzhiyun data2);
1436*4882a593Smuzhiyun break;
1437*4882a593Smuzhiyun case BMA2X2_MODE_LOWPOWER1:
1438*4882a593Smuzhiyun data1 = BMA2X2_SET_BITSLICE
1439*4882a593Smuzhiyun (data1,
1440*4882a593Smuzhiyun BMA2X2_MODE_CTRL,
1441*4882a593Smuzhiyun 2);
1442*4882a593Smuzhiyun data2 = BMA2X2_SET_BITSLICE
1443*4882a593Smuzhiyun (data2,
1444*4882a593Smuzhiyun BMA2X2_LOW_POWER_MODE,
1445*4882a593Smuzhiyun 0);
1446*4882a593Smuzhiyun sensor_write_reg
1447*4882a593Smuzhiyun (client,
1448*4882a593Smuzhiyun BMA2X2_MODE_CTRL_REG,
1449*4882a593Smuzhiyun data1);
1450*4882a593Smuzhiyun mdelay(1);
1451*4882a593Smuzhiyun sensor_write_reg
1452*4882a593Smuzhiyun (client,
1453*4882a593Smuzhiyun BMA2X2_LOW_NOISE_CTRL_REG,
1454*4882a593Smuzhiyun data2);
1455*4882a593Smuzhiyun break;
1456*4882a593Smuzhiyun case BMA2X2_MODE_SUSPEND:
1457*4882a593Smuzhiyun data1 = BMA2X2_SET_BITSLICE(data1,
1458*4882a593Smuzhiyun BMA2X2_MODE_CTRL,
1459*4882a593Smuzhiyun 4);
1460*4882a593Smuzhiyun data2 = BMA2X2_SET_BITSLICE
1461*4882a593Smuzhiyun (data2,
1462*4882a593Smuzhiyun BMA2X2_LOW_POWER_MODE,
1463*4882a593Smuzhiyun 0);
1464*4882a593Smuzhiyun sensor_write_reg(client,
1465*4882a593Smuzhiyun BMA2X2_LOW_NOISE_CTRL_REG,
1466*4882a593Smuzhiyun data2);
1467*4882a593Smuzhiyun mdelay(1);
1468*4882a593Smuzhiyun sensor_write_reg(client,
1469*4882a593Smuzhiyun BMA2X2_MODE_CTRL_REG,
1470*4882a593Smuzhiyun data1);
1471*4882a593Smuzhiyun break;
1472*4882a593Smuzhiyun case BMA2X2_MODE_DEEP_SUSPEND:
1473*4882a593Smuzhiyun data1 = BMA2X2_SET_BITSLICE
1474*4882a593Smuzhiyun (data1,
1475*4882a593Smuzhiyun BMA2X2_MODE_CTRL,
1476*4882a593Smuzhiyun 1);
1477*4882a593Smuzhiyun data2 = BMA2X2_SET_BITSLICE
1478*4882a593Smuzhiyun (data2,
1479*4882a593Smuzhiyun BMA2X2_LOW_POWER_MODE,
1480*4882a593Smuzhiyun 1);
1481*4882a593Smuzhiyun sensor_write_reg
1482*4882a593Smuzhiyun (client,
1483*4882a593Smuzhiyun BMA2X2_MODE_CTRL_REG,
1484*4882a593Smuzhiyun data1);
1485*4882a593Smuzhiyun mdelay(1);
1486*4882a593Smuzhiyun sensor_write_reg(client,
1487*4882a593Smuzhiyun BMA2X2_LOW_NOISE_CTRL_REG,
1488*4882a593Smuzhiyun data2);
1489*4882a593Smuzhiyun break;
1490*4882a593Smuzhiyun case BMA2X2_MODE_LOWPOWER2:
1491*4882a593Smuzhiyun data1 = BMA2X2_SET_BITSLICE
1492*4882a593Smuzhiyun (data1,
1493*4882a593Smuzhiyun BMA2X2_MODE_CTRL,
1494*4882a593Smuzhiyun 2);
1495*4882a593Smuzhiyun data2 = BMA2X2_SET_BITSLICE
1496*4882a593Smuzhiyun (data2,
1497*4882a593Smuzhiyun BMA2X2_LOW_POWER_MODE,
1498*4882a593Smuzhiyun 1);
1499*4882a593Smuzhiyun sensor_write_reg(client,
1500*4882a593Smuzhiyun BMA2X2_MODE_CTRL_REG,
1501*4882a593Smuzhiyun data1);
1502*4882a593Smuzhiyun mdelay(1);
1503*4882a593Smuzhiyun sensor_write_reg(client,
1504*4882a593Smuzhiyun BMA2X2_LOW_NOISE_CTRL_REG,
1505*4882a593Smuzhiyun data2);
1506*4882a593Smuzhiyun break;
1507*4882a593Smuzhiyun case BMA2X2_MODE_STANDBY:
1508*4882a593Smuzhiyun data1 = BMA2X2_SET_BITSLICE(data1,
1509*4882a593Smuzhiyun BMA2X2_MODE_CTRL,
1510*4882a593Smuzhiyun 4);
1511*4882a593Smuzhiyun data2 = BMA2X2_SET_BITSLICE
1512*4882a593Smuzhiyun (data2,
1513*4882a593Smuzhiyun BMA2X2_LOW_POWER_MODE,
1514*4882a593Smuzhiyun 1);
1515*4882a593Smuzhiyun sensor_write_reg(client,
1516*4882a593Smuzhiyun BMA2X2_LOW_NOISE_CTRL_REG,
1517*4882a593Smuzhiyun data2);
1518*4882a593Smuzhiyun mdelay(1);
1519*4882a593Smuzhiyun sensor_write_reg(client,
1520*4882a593Smuzhiyun BMA2X2_MODE_CTRL_REG,
1521*4882a593Smuzhiyun data1);
1522*4882a593Smuzhiyun break;
1523*4882a593Smuzhiyun }
1524*4882a593Smuzhiyun } else {
1525*4882a593Smuzhiyun comres = -1;
1526*4882a593Smuzhiyun }
1527*4882a593Smuzhiyun
1528*4882a593Smuzhiyun return comres;
1529*4882a593Smuzhiyun }
1530*4882a593Smuzhiyun
bma2x2_set_range(struct i2c_client * client,unsigned char range)1531*4882a593Smuzhiyun static int bma2x2_set_range(struct i2c_client *client, unsigned char range)
1532*4882a593Smuzhiyun {
1533*4882a593Smuzhiyun int comres = 0;
1534*4882a593Smuzhiyun unsigned char data1;
1535*4882a593Smuzhiyun
1536*4882a593Smuzhiyun if ((range == 3) || (range == 5) || (range == 8) || (range == 12)) {
1537*4882a593Smuzhiyun data1 = sensor_read_reg(client, BMA2X2_RANGE_SEL_REG);
1538*4882a593Smuzhiyun switch (range) {
1539*4882a593Smuzhiyun case BMA2X2_RANGE_2G:
1540*4882a593Smuzhiyun data1 = BMA2X2_SET_BITSLICE(data1,
1541*4882a593Smuzhiyun BMA2X2_RANGE_SEL, 3);
1542*4882a593Smuzhiyun break;
1543*4882a593Smuzhiyun case BMA2X2_RANGE_4G:
1544*4882a593Smuzhiyun data1 = BMA2X2_SET_BITSLICE(data1,
1545*4882a593Smuzhiyun BMA2X2_RANGE_SEL, 5);
1546*4882a593Smuzhiyun break;
1547*4882a593Smuzhiyun case BMA2X2_RANGE_8G:
1548*4882a593Smuzhiyun data1 = BMA2X2_SET_BITSLICE(data1,
1549*4882a593Smuzhiyun BMA2X2_RANGE_SEL, 8);
1550*4882a593Smuzhiyun break;
1551*4882a593Smuzhiyun case BMA2X2_RANGE_16G:
1552*4882a593Smuzhiyun data1 = BMA2X2_SET_BITSLICE(data1,
1553*4882a593Smuzhiyun BMA2X2_RANGE_SEL, 12);
1554*4882a593Smuzhiyun break;
1555*4882a593Smuzhiyun }
1556*4882a593Smuzhiyun comres += sensor_write_reg(client, BMA2X2_RANGE_SEL_REG,
1557*4882a593Smuzhiyun data1);
1558*4882a593Smuzhiyun } else {
1559*4882a593Smuzhiyun comres = -1;
1560*4882a593Smuzhiyun }
1561*4882a593Smuzhiyun
1562*4882a593Smuzhiyun return comres;
1563*4882a593Smuzhiyun }
1564*4882a593Smuzhiyun
bma2x2_set_bandwidth(struct i2c_client * client,unsigned char BW)1565*4882a593Smuzhiyun static int bma2x2_set_bandwidth(struct i2c_client *client, unsigned char BW)
1566*4882a593Smuzhiyun {
1567*4882a593Smuzhiyun int comres = 0;
1568*4882a593Smuzhiyun unsigned char data;
1569*4882a593Smuzhiyun int bandwidth = 0;
1570*4882a593Smuzhiyun
1571*4882a593Smuzhiyun if (BW > 7 && BW < 16) {
1572*4882a593Smuzhiyun switch (BW) {
1573*4882a593Smuzhiyun case BMA2X2_BW_7_81HZ:
1574*4882a593Smuzhiyun bandwidth = BMA2X2_BW_7_81HZ;
1575*4882a593Smuzhiyun
1576*4882a593Smuzhiyun /* 7.81 Hz 64000 uS */
1577*4882a593Smuzhiyun break;
1578*4882a593Smuzhiyun case BMA2X2_BW_15_63HZ:
1579*4882a593Smuzhiyun bandwidth = BMA2X2_BW_15_63HZ;
1580*4882a593Smuzhiyun
1581*4882a593Smuzhiyun /* 15.63 Hz 32000 uS */
1582*4882a593Smuzhiyun break;
1583*4882a593Smuzhiyun case BMA2X2_BW_31_25HZ:
1584*4882a593Smuzhiyun bandwidth = BMA2X2_BW_31_25HZ;
1585*4882a593Smuzhiyun
1586*4882a593Smuzhiyun /* 31.25 Hz 16000 uS */
1587*4882a593Smuzhiyun break;
1588*4882a593Smuzhiyun case BMA2X2_BW_62_50HZ:
1589*4882a593Smuzhiyun bandwidth = BMA2X2_BW_62_50HZ;
1590*4882a593Smuzhiyun
1591*4882a593Smuzhiyun /* 62.50 Hz 8000 uS */
1592*4882a593Smuzhiyun break;
1593*4882a593Smuzhiyun case BMA2X2_BW_125HZ:
1594*4882a593Smuzhiyun bandwidth = BMA2X2_BW_125HZ;
1595*4882a593Smuzhiyun
1596*4882a593Smuzhiyun /* 125 Hz 4000 uS */
1597*4882a593Smuzhiyun break;
1598*4882a593Smuzhiyun case BMA2X2_BW_250HZ:
1599*4882a593Smuzhiyun bandwidth = BMA2X2_BW_250HZ;
1600*4882a593Smuzhiyun
1601*4882a593Smuzhiyun /* 250 Hz 2000 uS */
1602*4882a593Smuzhiyun break;
1603*4882a593Smuzhiyun case BMA2X2_BW_500HZ:
1604*4882a593Smuzhiyun bandwidth = BMA2X2_BW_500HZ;
1605*4882a593Smuzhiyun
1606*4882a593Smuzhiyun /* 500 Hz 1000 uS */
1607*4882a593Smuzhiyun break;
1608*4882a593Smuzhiyun case BMA2X2_BW_1000HZ:
1609*4882a593Smuzhiyun bandwidth = BMA2X2_BW_1000HZ;
1610*4882a593Smuzhiyun
1611*4882a593Smuzhiyun /* 1000 Hz 500 uS */
1612*4882a593Smuzhiyun break;
1613*4882a593Smuzhiyun }
1614*4882a593Smuzhiyun data = sensor_read_reg(client, BMA2X2_BANDWIDTH__REG);
1615*4882a593Smuzhiyun data = BMA2X2_SET_BITSLICE(data, BMA2X2_BANDWIDTH, bandwidth);
1616*4882a593Smuzhiyun comres += sensor_write_reg(client, BMA2X2_BANDWIDTH__REG,
1617*4882a593Smuzhiyun data);
1618*4882a593Smuzhiyun } else {
1619*4882a593Smuzhiyun comres = -1;
1620*4882a593Smuzhiyun }
1621*4882a593Smuzhiyun
1622*4882a593Smuzhiyun return comres;
1623*4882a593Smuzhiyun }
1624*4882a593Smuzhiyun
1625*4882a593Smuzhiyun #if defined(BMA2X2_ENABLE_INT1) || defined(BMA2X2_ENABLE_INT2)
1626*4882a593Smuzhiyun unsigned char *orient[] = {"upward looking portrait upright",
1627*4882a593Smuzhiyun "upward looking portrait upside - down",
1628*4882a593Smuzhiyun "upward looking landscape left",
1629*4882a593Smuzhiyun "upward looking landscape right",
1630*4882a593Smuzhiyun "downward looking portrait upright",
1631*4882a593Smuzhiyun "downward looking portrait upside - down",
1632*4882a593Smuzhiyun "downward looking landscape left",
1633*4882a593Smuzhiyun "downward looking landscape right"};
1634*4882a593Smuzhiyun
sensor_report_value(struct i2c_client * client)1635*4882a593Smuzhiyun static int sensor_report_value(struct i2c_client *client)
1636*4882a593Smuzhiyun {
1637*4882a593Smuzhiyun struct sensor_private_data *sensor =
1638*4882a593Smuzhiyun (struct sensor_private_data *)i2c_get_clientdata(client);
1639*4882a593Smuzhiyun
1640*4882a593Smuzhiyun unsigned char status = 0;
1641*4882a593Smuzhiyun unsigned char i;
1642*4882a593Smuzhiyun unsigned char first_value = 0;
1643*4882a593Smuzhiyun unsigned char sign_value = 0;
1644*4882a593Smuzhiyun
1645*4882a593Smuzhiyun bma2x2_get_interruptstatus1(client, &status);
1646*4882a593Smuzhiyun
1647*4882a593Smuzhiyun switch (status) {
1648*4882a593Smuzhiyun case 0x01:
1649*4882a593Smuzhiyun DBG("Low G interrupt happened\n");
1650*4882a593Smuzhiyun input_report_rel(sensor->input_dev, LOW_G_INTERRUPT,
1651*4882a593Smuzhiyun LOW_G_INTERRUPT_HAPPENED);
1652*4882a593Smuzhiyun break;
1653*4882a593Smuzhiyun case 0x02:
1654*4882a593Smuzhiyun for (i = 0; i < 3; i++) {
1655*4882a593Smuzhiyun bma2x2_get_HIGH_first(client, i,
1656*4882a593Smuzhiyun &first_value);
1657*4882a593Smuzhiyun if (first_value == 1) {
1658*4882a593Smuzhiyun bma2x2_get_HIGH_sign(client,
1659*4882a593Smuzhiyun &sign_value);
1660*4882a593Smuzhiyun
1661*4882a593Smuzhiyun if (sign_value == 1) {
1662*4882a593Smuzhiyun if (i == 0)
1663*4882a593Smuzhiyun input_report_rel
1664*4882a593Smuzhiyun (sensor->input_dev,
1665*4882a593Smuzhiyun HIGH_G_INTERRUPT,
1666*4882a593Smuzhiyun HIGH_G_INTERRUPT_X_NEGATIVE_HAPPENED);
1667*4882a593Smuzhiyun if (i == 1)
1668*4882a593Smuzhiyun input_report_rel
1669*4882a593Smuzhiyun (sensor->input_dev,
1670*4882a593Smuzhiyun HIGH_G_INTERRUPT,
1671*4882a593Smuzhiyun HIGH_G_INTERRUPT_Y_NEGATIVE_HAPPENED);
1672*4882a593Smuzhiyun if (i == 2)
1673*4882a593Smuzhiyun input_report_rel
1674*4882a593Smuzhiyun (sensor->input_dev,
1675*4882a593Smuzhiyun HIGH_G_INTERRUPT,
1676*4882a593Smuzhiyun HIGH_G_INTERRUPT_Z_NEGATIVE_HAPPENED);
1677*4882a593Smuzhiyun } else {
1678*4882a593Smuzhiyun if (i == 0)
1679*4882a593Smuzhiyun input_report_rel
1680*4882a593Smuzhiyun (sensor->input_dev,
1681*4882a593Smuzhiyun HIGH_G_INTERRUPT,
1682*4882a593Smuzhiyun HIGH_G_INTERRUPT_X_HAPPENED);
1683*4882a593Smuzhiyun if (i == 1)
1684*4882a593Smuzhiyun input_report_rel
1685*4882a593Smuzhiyun (sensor->input_dev,
1686*4882a593Smuzhiyun HIGH_G_INTERRUPT,
1687*4882a593Smuzhiyun HIGH_G_INTERRUPT_Y_HAPPENED);
1688*4882a593Smuzhiyun if (i == 2)
1689*4882a593Smuzhiyun input_report_rel
1690*4882a593Smuzhiyun (sensor->input_dev,
1691*4882a593Smuzhiyun HIGH_G_INTERRUPT,
1692*4882a593Smuzhiyun HIGH_G_INTERRUPT_Z_HAPPENED);
1693*4882a593Smuzhiyun }
1694*4882a593Smuzhiyun }
1695*4882a593Smuzhiyun DBG
1696*4882a593Smuzhiyun ("High G interrupt happened,exis is %d,first is %d,sign is %d\n",
1697*4882a593Smuzhiyun i, first_value, sign_value);
1698*4882a593Smuzhiyun }
1699*4882a593Smuzhiyun break;
1700*4882a593Smuzhiyun case 0x04:
1701*4882a593Smuzhiyun for (i = 0; i < 3; i++) {
1702*4882a593Smuzhiyun bma2x2_get_slope_first(client, i,
1703*4882a593Smuzhiyun &first_value);
1704*4882a593Smuzhiyun if (first_value == 1) {
1705*4882a593Smuzhiyun bma2x2_get_slope_sign(client,
1706*4882a593Smuzhiyun &sign_value);
1707*4882a593Smuzhiyun
1708*4882a593Smuzhiyun if (sign_value == 1) {
1709*4882a593Smuzhiyun if (i == 0)
1710*4882a593Smuzhiyun input_report_rel
1711*4882a593Smuzhiyun (sensor->input_dev,
1712*4882a593Smuzhiyun SLOP_INTERRUPT,
1713*4882a593Smuzhiyun SLOPE_INTERRUPT_X_NEGATIVE_HAPPENED);
1714*4882a593Smuzhiyun else if (i == 1)
1715*4882a593Smuzhiyun input_report_rel
1716*4882a593Smuzhiyun (sensor->input_dev,
1717*4882a593Smuzhiyun SLOP_INTERRUPT,
1718*4882a593Smuzhiyun SLOPE_INTERRUPT_Y_NEGATIVE_HAPPENED);
1719*4882a593Smuzhiyun else if (i == 2)
1720*4882a593Smuzhiyun input_report_rel
1721*4882a593Smuzhiyun (sensor->input_dev,
1722*4882a593Smuzhiyun SLOP_INTERRUPT,
1723*4882a593Smuzhiyun SLOPE_INTERRUPT_Z_NEGATIVE_HAPPENED);
1724*4882a593Smuzhiyun } else {
1725*4882a593Smuzhiyun if (i == 0)
1726*4882a593Smuzhiyun input_report_rel
1727*4882a593Smuzhiyun (sensor->input_dev,
1728*4882a593Smuzhiyun SLOP_INTERRUPT,
1729*4882a593Smuzhiyun SLOPE_INTERRUPT_X_HAPPENED);
1730*4882a593Smuzhiyun else if (i == 1)
1731*4882a593Smuzhiyun input_report_rel
1732*4882a593Smuzhiyun (sensor->input_dev,
1733*4882a593Smuzhiyun SLOP_INTERRUPT,
1734*4882a593Smuzhiyun SLOPE_INTERRUPT_Y_HAPPENED);
1735*4882a593Smuzhiyun else if (i == 2)
1736*4882a593Smuzhiyun input_report_rel
1737*4882a593Smuzhiyun (sensor->input_dev,
1738*4882a593Smuzhiyun SLOP_INTERRUPT,
1739*4882a593Smuzhiyun SLOPE_INTERRUPT_Z_HAPPENED);
1740*4882a593Smuzhiyun }
1741*4882a593Smuzhiyun }
1742*4882a593Smuzhiyun
1743*4882a593Smuzhiyun DBG("Slop interrupt happened,exis is %d,first is %d,sign is %d\n",
1744*4882a593Smuzhiyun i, first_value, sign_value);
1745*4882a593Smuzhiyun }
1746*4882a593Smuzhiyun break;
1747*4882a593Smuzhiyun
1748*4882a593Smuzhiyun case 0x08:
1749*4882a593Smuzhiyun DBG("slow/ no motion interrupt happened\n");
1750*4882a593Smuzhiyun input_report_rel(sensor->input_dev, SLOW_NO_MOTION_INTERRUPT,
1751*4882a593Smuzhiyun SLOW_NO_MOTION_INTERRUPT_HAPPENED);
1752*4882a593Smuzhiyun break;
1753*4882a593Smuzhiyun
1754*4882a593Smuzhiyun case 0x10:
1755*4882a593Smuzhiyun DBG("double tap interrupt happened\n");
1756*4882a593Smuzhiyun input_report_rel(sensor->input_dev, DOUBLE_TAP_INTERRUPT,
1757*4882a593Smuzhiyun DOUBLE_TAP_INTERRUPT_HAPPENED);
1758*4882a593Smuzhiyun break;
1759*4882a593Smuzhiyun case 0x20:
1760*4882a593Smuzhiyun DBG("single tap interrupt happened\n");
1761*4882a593Smuzhiyun input_report_rel(sensor->input_dev, SINGLE_TAP_INTERRUPT,
1762*4882a593Smuzhiyun SINGLE_TAP_INTERRUPT_HAPPENED);
1763*4882a593Smuzhiyun break;
1764*4882a593Smuzhiyun case 0x40:
1765*4882a593Smuzhiyun bma2x2_get_orient_status(client,
1766*4882a593Smuzhiyun &first_value);
1767*4882a593Smuzhiyun DBG
1768*4882a593Smuzhiyun ("orient interrupt happened,%s\n", orient[first_value]);
1769*4882a593Smuzhiyun if (first_value == 0)
1770*4882a593Smuzhiyun input_report_abs
1771*4882a593Smuzhiyun (sensor->input_dev, ORIENT_INTERRUPT,
1772*4882a593Smuzhiyun UPWARD_PORTRAIT_UP_INTERRUPT_HAPPENED);
1773*4882a593Smuzhiyun else if (first_value == 1)
1774*4882a593Smuzhiyun input_report_abs
1775*4882a593Smuzhiyun (sensor->input_dev, ORIENT_INTERRUPT,
1776*4882a593Smuzhiyun UPWARD_PORTRAIT_DOWN_INTERRUPT_HAPPENED);
1777*4882a593Smuzhiyun else if (first_value == 2)
1778*4882a593Smuzhiyun input_report_abs
1779*4882a593Smuzhiyun (sensor->input_dev, ORIENT_INTERRUPT,
1780*4882a593Smuzhiyun UPWARD_LANDSCAPE_LEFT_INTERRUPT_HAPPENED);
1781*4882a593Smuzhiyun else if (first_value == 3)
1782*4882a593Smuzhiyun input_report_abs
1783*4882a593Smuzhiyun (sensor->input_dev, ORIENT_INTERRUPT,
1784*4882a593Smuzhiyun UPWARD_LANDSCAPE_RIGHT_INTERRUPT_HAPPENED);
1785*4882a593Smuzhiyun else if (first_value == 4)
1786*4882a593Smuzhiyun input_report_abs
1787*4882a593Smuzhiyun (sensor->input_dev, ORIENT_INTERRUPT,
1788*4882a593Smuzhiyun DOWNWARD_PORTRAIT_UP_INTERRUPT_HAPPENED);
1789*4882a593Smuzhiyun else if (first_value == 5)
1790*4882a593Smuzhiyun input_report_abs
1791*4882a593Smuzhiyun (sensor->input_dev, ORIENT_INTERRUPT,
1792*4882a593Smuzhiyun DOWNWARD_PORTRAIT_DOWN_INTERRUPT_HAPPENED);
1793*4882a593Smuzhiyun else if (first_value == 6)
1794*4882a593Smuzhiyun input_report_abs
1795*4882a593Smuzhiyun (sensor->input_dev, ORIENT_INTERRUPT,
1796*4882a593Smuzhiyun DOWNWARD_LANDSCAPE_LEFT_INTERRUPT_HAPPENED);
1797*4882a593Smuzhiyun else if (first_value == 7)
1798*4882a593Smuzhiyun input_report_abs
1799*4882a593Smuzhiyun (sensor->input_dev, ORIENT_INTERRUPT,
1800*4882a593Smuzhiyun DOWNWARD_LANDSCAPE_RIGHT_INTERRUPT_HAPPENED);
1801*4882a593Smuzhiyun break;
1802*4882a593Smuzhiyun case 0x80:
1803*4882a593Smuzhiyun bma2x2_get_orient_flat_status(client,
1804*4882a593Smuzhiyun &sign_value);
1805*4882a593Smuzhiyun DBG
1806*4882a593Smuzhiyun ("flat interrupt happened,flat status is %d\n",
1807*4882a593Smuzhiyun sign_value);
1808*4882a593Smuzhiyun if (sign_value == 1) {
1809*4882a593Smuzhiyun input_report_abs(sensor->input_dev, FLAT_INTERRUPT,
1810*4882a593Smuzhiyun FLAT_INTERRUPT_TRUE_HAPPENED);
1811*4882a593Smuzhiyun } else {
1812*4882a593Smuzhiyun input_report_abs(sensor->input_dev, FLAT_INTERRUPT,
1813*4882a593Smuzhiyun FLAT_INTERRUPT_FALSE_HAPPENED);
1814*4882a593Smuzhiyun }
1815*4882a593Smuzhiyun break;
1816*4882a593Smuzhiyun default:
1817*4882a593Smuzhiyun break;
1818*4882a593Smuzhiyun }
1819*4882a593Smuzhiyun return 0;
1820*4882a593Smuzhiyun }
1821*4882a593Smuzhiyun #else
1822*4882a593Smuzhiyun
bma2x2_remap_sensor_data(struct i2c_client * client,struct sensor_axis * axis)1823*4882a593Smuzhiyun static void bma2x2_remap_sensor_data(struct i2c_client *client,
1824*4882a593Smuzhiyun struct sensor_axis *axis)
1825*4882a593Smuzhiyun {
1826*4882a593Smuzhiyun #ifdef CONFIG_BMA_USE_PLATFORM_DATA
1827*4882a593Smuzhiyun struct bosch_sensor_data bsd;
1828*4882a593Smuzhiyun
1829*4882a593Smuzhiyun if (!client->bst_pd)
1830*4882a593Smuzhiyun return;
1831*4882a593Smuzhiyun
1832*4882a593Smuzhiyun bsd.x = axis->x;
1833*4882a593Smuzhiyun bsd.y = axis->y;
1834*4882a593Smuzhiyun bsd.z = axis->z;
1835*4882a593Smuzhiyun
1836*4882a593Smuzhiyun bst_remap_sensor_data_dft_tab(&bsd,
1837*4882a593Smuzhiyun client_data->bst_pd->place);
1838*4882a593Smuzhiyun
1839*4882a593Smuzhiyun axis->x = bsd.x;
1840*4882a593Smuzhiyun axis->y = bsd.y;
1841*4882a593Smuzhiyun axis->z = bsd.z;
1842*4882a593Smuzhiyun #else
1843*4882a593Smuzhiyun (void)axis;
1844*4882a593Smuzhiyun (void)client;
1845*4882a593Smuzhiyun #endif
1846*4882a593Smuzhiyun }
1847*4882a593Smuzhiyun
gsensor_report_value(struct i2c_client * client,struct sensor_axis * axis)1848*4882a593Smuzhiyun static int gsensor_report_value
1849*4882a593Smuzhiyun (struct i2c_client *client, struct sensor_axis *axis)
1850*4882a593Smuzhiyun {
1851*4882a593Smuzhiyun struct sensor_private_data *sensor =
1852*4882a593Smuzhiyun (struct sensor_private_data *)i2c_get_clientdata(client);
1853*4882a593Smuzhiyun
1854*4882a593Smuzhiyun if (sensor->status_cur == SENSOR_ON) {
1855*4882a593Smuzhiyun /* Report acceleration sensor information */
1856*4882a593Smuzhiyun input_report_abs(sensor->input_dev, ABS_X, axis->x);
1857*4882a593Smuzhiyun input_report_abs(sensor->input_dev, ABS_Y, axis->y);
1858*4882a593Smuzhiyun input_report_abs(sensor->input_dev, ABS_Z, axis->z);
1859*4882a593Smuzhiyun input_sync(sensor->input_dev);
1860*4882a593Smuzhiyun }
1861*4882a593Smuzhiyun
1862*4882a593Smuzhiyun return 0;
1863*4882a593Smuzhiyun }
1864*4882a593Smuzhiyun
sensor_report_value(struct i2c_client * client)1865*4882a593Smuzhiyun static int sensor_report_value(struct i2c_client *client)
1866*4882a593Smuzhiyun {
1867*4882a593Smuzhiyun int comres = 0;
1868*4882a593Smuzhiyun unsigned char data[6];
1869*4882a593Smuzhiyun short x, y, z;
1870*4882a593Smuzhiyun unsigned int xyz_adc_rang = 0;
1871*4882a593Smuzhiyun char value = 0;
1872*4882a593Smuzhiyun struct sensor_axis axis;
1873*4882a593Smuzhiyun struct sensor_private_data *sensor =
1874*4882a593Smuzhiyun (struct sensor_private_data *)i2c_get_clientdata(client);
1875*4882a593Smuzhiyun struct sensor_platform_data *pdata = sensor->pdata;
1876*4882a593Smuzhiyun
1877*4882a593Smuzhiyun /*sensor->ops->read_len = 6*/
1878*4882a593Smuzhiyun if (sensor->ops->read_len < 6) {
1879*4882a593Smuzhiyun DBG
1880*4882a593Smuzhiyun ("%s:len is error,len=%d\n", __func__, sensor->ops->read_len);
1881*4882a593Smuzhiyun return -1;
1882*4882a593Smuzhiyun }
1883*4882a593Smuzhiyun memset(data, 0, 6);
1884*4882a593Smuzhiyun
1885*4882a593Smuzhiyun *data = sensor->ops->read_reg;
1886*4882a593Smuzhiyun #ifdef BMA2X2_SENSOR_IDENTIFICATION_ENABLE
1887*4882a593Smuzhiyun comres = sensor_rx_data(client, data, sensor->ops->read_len);
1888*4882a593Smuzhiyun x = (data[1] << 8) | data[0];
1889*4882a593Smuzhiyun y = (data[3] << 8) | data[2];
1890*4882a593Smuzhiyun z = (data[5] << 8) | data[4];
1891*4882a593Smuzhiyun #else
1892*4882a593Smuzhiyun switch (sensor->devid) {
1893*4882a593Smuzhiyun case BMA255_CHIP_ID:
1894*4882a593Smuzhiyun comres = sensor_rx_data(client, data, sensor->ops->read_len);
1895*4882a593Smuzhiyun
1896*4882a593Smuzhiyun x = BMA2X2_GET_BITSLICE(data[0], BMA2X2_ACC_X12_LSB) |
1897*4882a593Smuzhiyun (BMA2X2_GET_BITSLICE(data[1],
1898*4882a593Smuzhiyun BMA2X2_ACC_X_MSB) <<
1899*4882a593Smuzhiyun (BMA2X2_ACC_X12_LSB__LEN));
1900*4882a593Smuzhiyun x = x << (sizeof(short) * 8 - (BMA2X2_ACC_X12_LSB__LEN +
1901*4882a593Smuzhiyun BMA2X2_ACC_X_MSB__LEN));
1902*4882a593Smuzhiyun x = x >> (sizeof(short) * 8 - (BMA2X2_ACC_X12_LSB__LEN +
1903*4882a593Smuzhiyun BMA2X2_ACC_X_MSB__LEN));
1904*4882a593Smuzhiyun
1905*4882a593Smuzhiyun y = BMA2X2_GET_BITSLICE(data[2], BMA2X2_ACC_Y12_LSB) |
1906*4882a593Smuzhiyun (BMA2X2_GET_BITSLICE(data[3],
1907*4882a593Smuzhiyun BMA2X2_ACC_Y_MSB) <<
1908*4882a593Smuzhiyun (BMA2X2_ACC_Y12_LSB__LEN));
1909*4882a593Smuzhiyun y = y << (sizeof(short) * 8 - (BMA2X2_ACC_Y12_LSB__LEN +
1910*4882a593Smuzhiyun BMA2X2_ACC_Y_MSB__LEN));
1911*4882a593Smuzhiyun y = y >> (sizeof(short) * 8 - (BMA2X2_ACC_Y12_LSB__LEN +
1912*4882a593Smuzhiyun BMA2X2_ACC_Y_MSB__LEN));
1913*4882a593Smuzhiyun
1914*4882a593Smuzhiyun z = BMA2X2_GET_BITSLICE(data[4], BMA2X2_ACC_Z12_LSB) |
1915*4882a593Smuzhiyun (BMA2X2_GET_BITSLICE(data[5],
1916*4882a593Smuzhiyun BMA2X2_ACC_Z_MSB) <<
1917*4882a593Smuzhiyun (BMA2X2_ACC_Z12_LSB__LEN));
1918*4882a593Smuzhiyun z = z << (sizeof(short) * 8 - (BMA2X2_ACC_Z12_LSB__LEN +
1919*4882a593Smuzhiyun BMA2X2_ACC_Z_MSB__LEN));
1920*4882a593Smuzhiyun z = z >> (sizeof(short) * 8 - (BMA2X2_ACC_Z12_LSB__LEN +
1921*4882a593Smuzhiyun BMA2X2_ACC_Z_MSB__LEN));
1922*4882a593Smuzhiyun xyz_adc_rang = 0x800;
1923*4882a593Smuzhiyun break;
1924*4882a593Smuzhiyun case BMA250E_CHIP_ID:
1925*4882a593Smuzhiyun case BMA250_CHIP_ID:
1926*4882a593Smuzhiyun comres = sensor_rx_data(client, data, sensor->ops->read_len);
1927*4882a593Smuzhiyun
1928*4882a593Smuzhiyun x = BMA2X2_GET_BITSLICE(data[0], BMA2X2_ACC_X10_LSB) |
1929*4882a593Smuzhiyun (BMA2X2_GET_BITSLICE(data[1],
1930*4882a593Smuzhiyun BMA2X2_ACC_X_MSB) <<
1931*4882a593Smuzhiyun (BMA2X2_ACC_X10_LSB__LEN));
1932*4882a593Smuzhiyun x = x << (sizeof(short) * 8 - (BMA2X2_ACC_X10_LSB__LEN +
1933*4882a593Smuzhiyun BMA2X2_ACC_X_MSB__LEN));
1934*4882a593Smuzhiyun x = x >> (sizeof(short) * 8 - (BMA2X2_ACC_X10_LSB__LEN +
1935*4882a593Smuzhiyun BMA2X2_ACC_X_MSB__LEN));
1936*4882a593Smuzhiyun
1937*4882a593Smuzhiyun y = BMA2X2_GET_BITSLICE(data[2], BMA2X2_ACC_Y10_LSB) |
1938*4882a593Smuzhiyun (BMA2X2_GET_BITSLICE(data[3],
1939*4882a593Smuzhiyun BMA2X2_ACC_Y_MSB) << (BMA2X2_ACC_Y10_LSB__LEN
1940*4882a593Smuzhiyun ));
1941*4882a593Smuzhiyun y = y << (sizeof(short) * 8 - (BMA2X2_ACC_Y10_LSB__LEN +
1942*4882a593Smuzhiyun BMA2X2_ACC_Y_MSB__LEN));
1943*4882a593Smuzhiyun y = y >> (sizeof(short) * 8 - (BMA2X2_ACC_Y10_LSB__LEN +
1944*4882a593Smuzhiyun BMA2X2_ACC_Y_MSB__LEN));
1945*4882a593Smuzhiyun
1946*4882a593Smuzhiyun z = BMA2X2_GET_BITSLICE(data[4], BMA2X2_ACC_Z10_LSB) |
1947*4882a593Smuzhiyun (BMA2X2_GET_BITSLICE(data[5],
1948*4882a593Smuzhiyun BMA2X2_ACC_Z_MSB) <<
1949*4882a593Smuzhiyun (BMA2X2_ACC_Z10_LSB__LEN));
1950*4882a593Smuzhiyun z = z << (sizeof(short) * 8 - (BMA2X2_ACC_Z10_LSB__LEN +
1951*4882a593Smuzhiyun BMA2X2_ACC_Z_MSB__LEN));
1952*4882a593Smuzhiyun z = z >> (sizeof(short) * 8 - (BMA2X2_ACC_Z10_LSB__LEN +
1953*4882a593Smuzhiyun BMA2X2_ACC_Z_MSB__LEN));
1954*4882a593Smuzhiyun xyz_adc_rang = 0x200;
1955*4882a593Smuzhiyun /* compensation y axis*/
1956*4882a593Smuzhiyun x = x + (X_AXIS_COMPEN * xyz_adc_rang) / BMA2XX_RANGE;
1957*4882a593Smuzhiyun y = y + (Y_AXIS_COMPEN * xyz_adc_rang) / BMA2XX_RANGE;
1958*4882a593Smuzhiyun z = z + (Z_AXIS_COMPEN * xyz_adc_rang) / BMA2XX_RANGE;
1959*4882a593Smuzhiyun break;
1960*4882a593Smuzhiyun case BMA222E_CHIP_ID:
1961*4882a593Smuzhiyun comres = sensor_rx_data(client, data, sensor->ops->read_len);
1962*4882a593Smuzhiyun x = BMA2X2_GET_BITSLICE(data[0], BMA2X2_ACC_X8_LSB) |
1963*4882a593Smuzhiyun (BMA2X2_GET_BITSLICE(data[1],
1964*4882a593Smuzhiyun BMA2X2_ACC_X_MSB) << (BMA2X2_ACC_X8_LSB__LEN));
1965*4882a593Smuzhiyun x = x << (sizeof(short) * 8 - (BMA2X2_ACC_X8_LSB__LEN +
1966*4882a593Smuzhiyun BMA2X2_ACC_X_MSB__LEN));
1967*4882a593Smuzhiyun x = x >> (sizeof(short) * 8 - (BMA2X2_ACC_X8_LSB__LEN +
1968*4882a593Smuzhiyun BMA2X2_ACC_X_MSB__LEN));
1969*4882a593Smuzhiyun
1970*4882a593Smuzhiyun y = BMA2X2_GET_BITSLICE(data[2], BMA2X2_ACC_Y8_LSB) |
1971*4882a593Smuzhiyun (BMA2X2_GET_BITSLICE(data[3],
1972*4882a593Smuzhiyun BMA2X2_ACC_Y_MSB) << (BMA2X2_ACC_Y8_LSB__LEN
1973*4882a593Smuzhiyun ));
1974*4882a593Smuzhiyun y = y << (sizeof(short) * 8 - (BMA2X2_ACC_Y8_LSB__LEN +
1975*4882a593Smuzhiyun BMA2X2_ACC_Y_MSB__LEN));
1976*4882a593Smuzhiyun y = y >> (sizeof(short) * 8 - (BMA2X2_ACC_Y8_LSB__LEN +
1977*4882a593Smuzhiyun BMA2X2_ACC_Y_MSB__LEN));
1978*4882a593Smuzhiyun
1979*4882a593Smuzhiyun z = BMA2X2_GET_BITSLICE(data[4], BMA2X2_ACC_Z8_LSB) |
1980*4882a593Smuzhiyun (BMA2X2_GET_BITSLICE(data[5],
1981*4882a593Smuzhiyun BMA2X2_ACC_Z_MSB) << (BMA2X2_ACC_Z8_LSB__LEN));
1982*4882a593Smuzhiyun z = z << (sizeof(short) * 8 - (BMA2X2_ACC_Z8_LSB__LEN +
1983*4882a593Smuzhiyun BMA2X2_ACC_Z_MSB__LEN));
1984*4882a593Smuzhiyun z = z >> (sizeof(short) * 8 - (BMA2X2_ACC_Z8_LSB__LEN +
1985*4882a593Smuzhiyun BMA2X2_ACC_Z_MSB__LEN));
1986*4882a593Smuzhiyun xyz_adc_rang = 0x80;
1987*4882a593Smuzhiyun break;
1988*4882a593Smuzhiyun case BMA280_CHIP_ID:
1989*4882a593Smuzhiyun comres = sensor_rx_data(client, data, sensor->ops->read_len);
1990*4882a593Smuzhiyun
1991*4882a593Smuzhiyun x = BMA2X2_GET_BITSLICE(data[0], BMA2X2_ACC_X14_LSB) |
1992*4882a593Smuzhiyun (BMA2X2_GET_BITSLICE(data[1],
1993*4882a593Smuzhiyun BMA2X2_ACC_X_MSB) << (BMA2X2_ACC_X14_LSB__LEN));
1994*4882a593Smuzhiyun x = x << (sizeof(short) * 8 - (BMA2X2_ACC_X14_LSB__LEN +
1995*4882a593Smuzhiyun BMA2X2_ACC_X_MSB__LEN));
1996*4882a593Smuzhiyun x = x >> (sizeof(short) * 8 - (BMA2X2_ACC_X14_LSB__LEN +
1997*4882a593Smuzhiyun BMA2X2_ACC_X_MSB__LEN));
1998*4882a593Smuzhiyun
1999*4882a593Smuzhiyun y = BMA2X2_GET_BITSLICE(data[2], BMA2X2_ACC_Y14_LSB) |
2000*4882a593Smuzhiyun (BMA2X2_GET_BITSLICE(data[3],
2001*4882a593Smuzhiyun BMA2X2_ACC_Y_MSB) << (BMA2X2_ACC_Y14_LSB__LEN));
2002*4882a593Smuzhiyun y = y << (sizeof(short) * 8 - (BMA2X2_ACC_Y14_LSB__LEN +
2003*4882a593Smuzhiyun BMA2X2_ACC_Y_MSB__LEN));
2004*4882a593Smuzhiyun y = y >> (sizeof(short) * 8 - (BMA2X2_ACC_Y14_LSB__LEN +
2005*4882a593Smuzhiyun BMA2X2_ACC_Y_MSB__LEN));
2006*4882a593Smuzhiyun
2007*4882a593Smuzhiyun z = BMA2X2_GET_BITSLICE(data[4], BMA2X2_ACC_Z14_LSB) |
2008*4882a593Smuzhiyun (BMA2X2_GET_BITSLICE(data[5],
2009*4882a593Smuzhiyun BMA2X2_ACC_Z_MSB) << (BMA2X2_ACC_Z14_LSB__LEN));
2010*4882a593Smuzhiyun z = z << (sizeof(short) * 8 - (BMA2X2_ACC_Z14_LSB__LEN +
2011*4882a593Smuzhiyun BMA2X2_ACC_Z_MSB__LEN));
2012*4882a593Smuzhiyun z = z >> (sizeof(short) * 8 - (BMA2X2_ACC_Z14_LSB__LEN +
2013*4882a593Smuzhiyun BMA2X2_ACC_Z_MSB__LEN));
2014*4882a593Smuzhiyun xyz_adc_rang = 0x2000;
2015*4882a593Smuzhiyun break;
2016*4882a593Smuzhiyun default:
2017*4882a593Smuzhiyun return -1;
2018*4882a593Smuzhiyun }
2019*4882a593Smuzhiyun #endif
2020*4882a593Smuzhiyun
2021*4882a593Smuzhiyun axis.x = (pdata->orientation[0]) * x +
2022*4882a593Smuzhiyun (pdata->orientation[1]) * y +
2023*4882a593Smuzhiyun (pdata->orientation[2]) * z;
2024*4882a593Smuzhiyun axis.y = (pdata->orientation[3]) * x +
2025*4882a593Smuzhiyun (pdata->orientation[4]) * y +
2026*4882a593Smuzhiyun (pdata->orientation[5]) * z;
2027*4882a593Smuzhiyun axis.z = (pdata->orientation[6]) * x +
2028*4882a593Smuzhiyun (pdata->orientation[7]) * y +
2029*4882a593Smuzhiyun (pdata->orientation[8]) * z;
2030*4882a593Smuzhiyun
2031*4882a593Smuzhiyun axis.x = axis.x * (BMA2XX_RANGE / xyz_adc_rang);
2032*4882a593Smuzhiyun axis.y = axis.y * (BMA2XX_RANGE / xyz_adc_rang);
2033*4882a593Smuzhiyun axis.z = axis.z * (BMA2XX_RANGE / xyz_adc_rang);
2034*4882a593Smuzhiyun
2035*4882a593Smuzhiyun bma2x2_remap_sensor_data(client, &axis);
2036*4882a593Smuzhiyun
2037*4882a593Smuzhiyun gsensor_report_value(client, &axis);
2038*4882a593Smuzhiyun mutex_lock(&sensor->data_mutex);
2039*4882a593Smuzhiyun sensor->axis = axis;
2040*4882a593Smuzhiyun mutex_unlock(&sensor->data_mutex);
2041*4882a593Smuzhiyun
2042*4882a593Smuzhiyun if ((sensor->pdata->irq_enable) && (sensor->ops->int_status_reg >= 0)) {
2043*4882a593Smuzhiyun value = sensor_read_reg(client, sensor->ops->int_status_reg);
2044*4882a593Smuzhiyun DBG("%s:sensor int status :0x%x\n", __func__, value);
2045*4882a593Smuzhiyun }
2046*4882a593Smuzhiyun
2047*4882a593Smuzhiyun return comres;
2048*4882a593Smuzhiyun }
2049*4882a593Smuzhiyun #endif /* defined(BMA2X2_ENABLE_INT1) | | defined(BMA2X2_ENABLE_INT2) */
2050*4882a593Smuzhiyun
2051*4882a593Smuzhiyun /****************operate according to sensor chip:start************/
sensor_active(struct i2c_client * client,int enable,int rate)2052*4882a593Smuzhiyun static int sensor_active(struct i2c_client *client, int enable, int rate)
2053*4882a593Smuzhiyun {
2054*4882a593Smuzhiyun if (enable)
2055*4882a593Smuzhiyun bma2x2_set_mode(client, BMA2X2_MODE_NORMAL);
2056*4882a593Smuzhiyun else
2057*4882a593Smuzhiyun bma2x2_set_mode(client, BMA2X2_MODE_SUSPEND);
2058*4882a593Smuzhiyun
2059*4882a593Smuzhiyun return 0;
2060*4882a593Smuzhiyun }
2061*4882a593Smuzhiyun
sensor_init(struct i2c_client * client)2062*4882a593Smuzhiyun static int sensor_init(struct i2c_client *client)
2063*4882a593Smuzhiyun {
2064*4882a593Smuzhiyun int ret = 0;
2065*4882a593Smuzhiyun int i = 0;
2066*4882a593Smuzhiyun unsigned char id_reg;
2067*4882a593Smuzhiyun unsigned char id_data = 0;
2068*4882a593Smuzhiyun struct sensor_private_data *sensor =
2069*4882a593Smuzhiyun (struct sensor_private_data *)i2c_get_clientdata(client);
2070*4882a593Smuzhiyun
2071*4882a593Smuzhiyun ret = sensor->ops->active(client, 0, 0);
2072*4882a593Smuzhiyun if (ret) {
2073*4882a593Smuzhiyun DBG("%s:line=%d,error\n", __func__, __LINE__);
2074*4882a593Smuzhiyun return ret;
2075*4882a593Smuzhiyun }
2076*4882a593Smuzhiyun sensor->status_cur = SENSOR_OFF;
2077*4882a593Smuzhiyun /* read chip id */
2078*4882a593Smuzhiyun id_reg = sensor->ops->id_reg;
2079*4882a593Smuzhiyun for (i = 0; i < 3; i++) {
2080*4882a593Smuzhiyun ret = sensor_rx_data(client, &id_reg, 1);
2081*4882a593Smuzhiyun id_data = id_reg;
2082*4882a593Smuzhiyun if (!ret)
2083*4882a593Smuzhiyun break;
2084*4882a593Smuzhiyun }
2085*4882a593Smuzhiyun if (ret) {
2086*4882a593Smuzhiyun DBG("%s:fail to read id,ret=%d\n", __func__, ret);
2087*4882a593Smuzhiyun return ret;
2088*4882a593Smuzhiyun }
2089*4882a593Smuzhiyun sensor->devid = id_data;
2090*4882a593Smuzhiyun
2091*4882a593Smuzhiyun ret = bma2x2_set_bandwidth(client, BMA2X2_BW_SET);
2092*4882a593Smuzhiyun if (ret < 0)
2093*4882a593Smuzhiyun DBG("set bandwidth failed!\n");
2094*4882a593Smuzhiyun
2095*4882a593Smuzhiyun ret = bma2x2_set_range(client, BMA2X2_RANGE_SET);
2096*4882a593Smuzhiyun if (ret < 0)
2097*4882a593Smuzhiyun DBG("set g - range failed!\n");
2098*4882a593Smuzhiyun
2099*4882a593Smuzhiyun #if defined(BMA2X2_ENABLE_INT1) || defined(BMA2X2_ENABLE_INT2)
2100*4882a593Smuzhiyun bma2x2_set_int_mode(client, 1);/*latch interrupt 250ms*/
2101*4882a593Smuzhiyun #endif
2102*4882a593Smuzhiyun
2103*4882a593Smuzhiyun #ifdef BMA2X2_ENABLE_INT1
2104*4882a593Smuzhiyun /* maps interrupt to INT1 pin */
2105*4882a593Smuzhiyun bma2x2_set_int1_pad_sel(client, PAD_LOWG);
2106*4882a593Smuzhiyun bma2x2_set_int1_pad_sel(client, PAD_HIGHG);
2107*4882a593Smuzhiyun bma2x2_set_int1_pad_sel(client, PAD_SLOP);
2108*4882a593Smuzhiyun bma2x2_set_int1_pad_sel(client, PAD_DOUBLE_TAP);
2109*4882a593Smuzhiyun bma2x2_set_int1_pad_sel(client, PAD_SINGLE_TAP);
2110*4882a593Smuzhiyun bma2x2_set_int1_pad_sel(client, PAD_ORIENT);
2111*4882a593Smuzhiyun bma2x2_set_int1_pad_sel(client, PAD_FLAT);
2112*4882a593Smuzhiyun bma2x2_set_int1_pad_sel(client, PAD_SLOW_NO_MOTION);
2113*4882a593Smuzhiyun #endif
2114*4882a593Smuzhiyun
2115*4882a593Smuzhiyun #ifdef BMA2X2_ENABLE_INT2
2116*4882a593Smuzhiyun /* maps interrupt to INT2 pin */
2117*4882a593Smuzhiyun bma2x2_set_int2_pad_sel(client, PAD_LOWG);
2118*4882a593Smuzhiyun bma2x2_set_int2_pad_sel(client, PAD_HIGHG);
2119*4882a593Smuzhiyun bma2x2_set_int2_pad_sel(client, PAD_SLOP);
2120*4882a593Smuzhiyun bma2x2_set_int2_pad_sel(client, PAD_DOUBLE_TAP);
2121*4882a593Smuzhiyun bma2x2_set_int2_pad_sel(client, PAD_SINGLE_TAP);
2122*4882a593Smuzhiyun bma2x2_set_int2_pad_sel(client, PAD_ORIENT);
2123*4882a593Smuzhiyun bma2x2_set_int2_pad_sel(client, PAD_FLAT);
2124*4882a593Smuzhiyun bma2x2_set_int2_pad_sel(client, PAD_SLOW_NO_MOTION);
2125*4882a593Smuzhiyun #endif
2126*4882a593Smuzhiyun
2127*4882a593Smuzhiyun bma2x2_parse_dt(client);
2128*4882a593Smuzhiyun if (sensor->pdata->irq_enable) {
2129*4882a593Smuzhiyun ret = sensor_write_reg(client, BMA2X2_INT_CTRL_REG, 0x01);
2130*4882a593Smuzhiyun if (ret) {
2131*4882a593Smuzhiyun dev_err(&client->dev, "interrupt register setting failed!\n");
2132*4882a593Smuzhiyun return ret;
2133*4882a593Smuzhiyun }
2134*4882a593Smuzhiyun if (slope_mode) {
2135*4882a593Smuzhiyun ret = sensor_write_reg(client,
2136*4882a593Smuzhiyun BMA2X2_INT1_PAD_SEL_REG,
2137*4882a593Smuzhiyun 0x04);
2138*4882a593Smuzhiyun if (ret) {
2139*4882a593Smuzhiyun dev_err(&client->dev, "interrupt map register setting failed!\n");
2140*4882a593Smuzhiyun return ret;
2141*4882a593Smuzhiyun }
2142*4882a593Smuzhiyun ret = sensor_write_reg(client,
2143*4882a593Smuzhiyun BMA2X2_SLOPE_DURN_REG,
2144*4882a593Smuzhiyun interrupt_dur);
2145*4882a593Smuzhiyun if (ret) {
2146*4882a593Smuzhiyun dev_err(&client->dev, "interrupt delay time register setting failed!\n");
2147*4882a593Smuzhiyun return ret;
2148*4882a593Smuzhiyun }
2149*4882a593Smuzhiyun ret = sensor_write_reg(client,
2150*4882a593Smuzhiyun BMA2X2_SLOPE_THRES_REG,
2151*4882a593Smuzhiyun interrupt_threshold);
2152*4882a593Smuzhiyun if (ret) {
2153*4882a593Smuzhiyun dev_err(&client->dev, "high - g interrupt threshold setting failed!\n");
2154*4882a593Smuzhiyun return ret;
2155*4882a593Smuzhiyun }
2156*4882a593Smuzhiyun ret = sensor_write_reg(client,
2157*4882a593Smuzhiyun BMA2X2_INT_ENABLE1_REG,
2158*4882a593Smuzhiyun 0x07);
2159*4882a593Smuzhiyun if (ret) {
2160*4882a593Smuzhiyun dev_err(&client->dev, "interrupt engines register setting failed!\n");
2161*4882a593Smuzhiyun return ret;
2162*4882a593Smuzhiyun }
2163*4882a593Smuzhiyun } else if (high_g_mode) {
2164*4882a593Smuzhiyun ret = sensor_write_reg(client,
2165*4882a593Smuzhiyun BMA2X2_INT1_PAD_SEL_REG,
2166*4882a593Smuzhiyun 0x02);
2167*4882a593Smuzhiyun if (ret) {
2168*4882a593Smuzhiyun dev_err(&client->dev, "interrupt map register setting failed!\n");
2169*4882a593Smuzhiyun return ret;
2170*4882a593Smuzhiyun }
2171*4882a593Smuzhiyun ret = sensor_write_reg(client,
2172*4882a593Smuzhiyun BMA2X2_HIGH_DURN_REG,
2173*4882a593Smuzhiyun interrupt_dur);
2174*4882a593Smuzhiyun if (ret) {
2175*4882a593Smuzhiyun dev_err(&client->dev, "interrupt delay time register setting failed!\n");
2176*4882a593Smuzhiyun return ret;
2177*4882a593Smuzhiyun }
2178*4882a593Smuzhiyun ret = sensor_write_reg(client,
2179*4882a593Smuzhiyun BMA2X2_HIGH_THRES_REG,
2180*4882a593Smuzhiyun interrupt_threshold);
2181*4882a593Smuzhiyun if (ret) {
2182*4882a593Smuzhiyun dev_err(&client->dev, "high - g interrupt threshold setting failed!\n");
2183*4882a593Smuzhiyun return ret;
2184*4882a593Smuzhiyun }
2185*4882a593Smuzhiyun ret = sensor_write_reg(client,
2186*4882a593Smuzhiyun BMA2X2_INT_ENABLE2_REG,
2187*4882a593Smuzhiyun 0x03);
2188*4882a593Smuzhiyun if (ret) {
2189*4882a593Smuzhiyun dev_err(&client->dev, "interrupt engines register setting failed!\n");
2190*4882a593Smuzhiyun return ret;
2191*4882a593Smuzhiyun }
2192*4882a593Smuzhiyun } else {
2193*4882a593Smuzhiyun ret = sensor_write_reg(client,
2194*4882a593Smuzhiyun BMA2X2_INT_DATA_SEL_REG,
2195*4882a593Smuzhiyun 0x01);
2196*4882a593Smuzhiyun if (ret) {
2197*4882a593Smuzhiyun dev_err(&client->dev, "interrupt map register setting failed!\n");
2198*4882a593Smuzhiyun return ret;
2199*4882a593Smuzhiyun }
2200*4882a593Smuzhiyun ret = sensor_write_reg(client,
2201*4882a593Smuzhiyun BMA2X2_INT_ENABLE2_REG,
2202*4882a593Smuzhiyun 0x10);
2203*4882a593Smuzhiyun if (ret) {
2204*4882a593Smuzhiyun dev_err(&client->dev, "interrupt engines register setting failed!\n");
2205*4882a593Smuzhiyun return ret;
2206*4882a593Smuzhiyun }
2207*4882a593Smuzhiyun }
2208*4882a593Smuzhiyun }
2209*4882a593Smuzhiyun
2210*4882a593Smuzhiyun return ret;
2211*4882a593Smuzhiyun }
2212*4882a593Smuzhiyun
2213*4882a593Smuzhiyun static struct sensor_operate gsensor_bma2x2_ops = {
2214*4882a593Smuzhiyun .name = "bma2xx_acc",
2215*4882a593Smuzhiyun /*sensor type and it should be correct*/
2216*4882a593Smuzhiyun .type = SENSOR_TYPE_ACCEL,
2217*4882a593Smuzhiyun .id_i2c = ACCEL_ID_BMA2XX, /*i2c id number*/
2218*4882a593Smuzhiyun .read_reg = BMA2X2_X_AXIS_LSB_REG,/*read data*/
2219*4882a593Smuzhiyun .read_len = 6, /*data length*/
2220*4882a593Smuzhiyun /* read device id from this register */
2221*4882a593Smuzhiyun .id_reg = BMA2X2_CHIP_ID_REG,
2222*4882a593Smuzhiyun .id_data = BMA250_CHIP_ID, /* device id */
2223*4882a593Smuzhiyun .precision = SENSOR_UNKNOW_DATA, /*12 bit*/
2224*4882a593Smuzhiyun .ctrl_reg = BMA2X2_MODE_CTRL_REG, /*enable or disable*/
2225*4882a593Smuzhiyun /*intterupt status register*/
2226*4882a593Smuzhiyun .int_status_reg = BMA2X2_STATUS2_REG,
2227*4882a593Smuzhiyun .range = {-BMA2XX_RANGE, BMA2XX_RANGE},/*range*/
2228*4882a593Smuzhiyun .trig = IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
2229*4882a593Smuzhiyun .active = sensor_active,
2230*4882a593Smuzhiyun .init = sensor_init,
2231*4882a593Smuzhiyun .report = sensor_report_value,
2232*4882a593Smuzhiyun };
2233*4882a593Smuzhiyun
2234*4882a593Smuzhiyun /****************operate according to sensor chip:end************/
gsensor_bma2x2_probe(struct i2c_client * client,const struct i2c_device_id * devid)2235*4882a593Smuzhiyun static int gsensor_bma2x2_probe(struct i2c_client *client,
2236*4882a593Smuzhiyun const struct i2c_device_id *devid)
2237*4882a593Smuzhiyun {
2238*4882a593Smuzhiyun return sensor_register_device(client, NULL, devid, &gsensor_bma2x2_ops);
2239*4882a593Smuzhiyun }
2240*4882a593Smuzhiyun
gsensor_bma2x2_remove(struct i2c_client * client)2241*4882a593Smuzhiyun static int gsensor_bma2x2_remove(struct i2c_client *client)
2242*4882a593Smuzhiyun {
2243*4882a593Smuzhiyun return sensor_unregister_device(client, NULL, &gsensor_bma2x2_ops);
2244*4882a593Smuzhiyun }
2245*4882a593Smuzhiyun
2246*4882a593Smuzhiyun static const struct i2c_device_id gsensor_bma2x2_id[] = {
2247*4882a593Smuzhiyun {"bma2xx_acc", ACCEL_ID_BMA2XX},
2248*4882a593Smuzhiyun {}
2249*4882a593Smuzhiyun };
2250*4882a593Smuzhiyun
2251*4882a593Smuzhiyun static struct i2c_driver gsensor_bma2x2_driver = {
2252*4882a593Smuzhiyun .probe = gsensor_bma2x2_probe,
2253*4882a593Smuzhiyun .remove = gsensor_bma2x2_remove,
2254*4882a593Smuzhiyun .shutdown = sensor_shutdown,
2255*4882a593Smuzhiyun .id_table = gsensor_bma2x2_id,
2256*4882a593Smuzhiyun .driver = {
2257*4882a593Smuzhiyun .name = "gsensor_bma2x2",
2258*4882a593Smuzhiyun #ifdef CONFIG_PM
2259*4882a593Smuzhiyun .pm = &sensor_pm_ops,
2260*4882a593Smuzhiyun #endif
2261*4882a593Smuzhiyun },
2262*4882a593Smuzhiyun };
2263*4882a593Smuzhiyun
2264*4882a593Smuzhiyun module_i2c_driver(gsensor_bma2x2_driver);
2265*4882a593Smuzhiyun
2266*4882a593Smuzhiyun MODULE_AUTHOR("Bin Yang <yangbin@rock - chips.com>");
2267*4882a593Smuzhiyun MODULE_DESCRIPTION("bma2x2 3-Axis accelerometer driver");
2268*4882a593Smuzhiyun MODULE_LICENSE("GPL");
2269