1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Microchip AT42QT1050 QTouch Sensor Controller
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2019 Pengutronix, Marco Felsch <kernel@pengutronix.de>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Base on AT42QT1070 driver by:
8*4882a593Smuzhiyun * Bo Shen <voice.shen@atmel.com>
9*4882a593Smuzhiyun * Copyright (C) 2011 Atmel
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/delay.h>
13*4882a593Smuzhiyun #include <linux/i2c.h>
14*4882a593Smuzhiyun #include <linux/input.h>
15*4882a593Smuzhiyun #include <linux/interrupt.h>
16*4882a593Smuzhiyun #include <linux/kernel.h>
17*4882a593Smuzhiyun #include <linux/log2.h>
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/of.h>
20*4882a593Smuzhiyun #include <linux/regmap.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /* Chip ID */
23*4882a593Smuzhiyun #define QT1050_CHIP_ID 0x00
24*4882a593Smuzhiyun #define QT1050_CHIP_ID_VER 0x46
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /* Firmware version */
27*4882a593Smuzhiyun #define QT1050_FW_VERSION 0x01
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /* Detection status */
30*4882a593Smuzhiyun #define QT1050_DET_STATUS 0x02
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun /* Key status */
33*4882a593Smuzhiyun #define QT1050_KEY_STATUS 0x03
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /* Key Signals */
36*4882a593Smuzhiyun #define QT1050_KEY_SIGNAL_0_MSB 0x06
37*4882a593Smuzhiyun #define QT1050_KEY_SIGNAL_0_LSB 0x07
38*4882a593Smuzhiyun #define QT1050_KEY_SIGNAL_1_MSB 0x08
39*4882a593Smuzhiyun #define QT1050_KEY_SIGNAL_1_LSB 0x09
40*4882a593Smuzhiyun #define QT1050_KEY_SIGNAL_2_MSB 0x0c
41*4882a593Smuzhiyun #define QT1050_KEY_SIGNAL_2_LSB 0x0d
42*4882a593Smuzhiyun #define QT1050_KEY_SIGNAL_3_MSB 0x0e
43*4882a593Smuzhiyun #define QT1050_KEY_SIGNAL_3_LSB 0x0f
44*4882a593Smuzhiyun #define QT1050_KEY_SIGNAL_4_MSB 0x10
45*4882a593Smuzhiyun #define QT1050_KEY_SIGNAL_4_LSB 0x11
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun /* Reference data */
48*4882a593Smuzhiyun #define QT1050_REF_DATA_0_MSB 0x14
49*4882a593Smuzhiyun #define QT1050_REF_DATA_0_LSB 0x15
50*4882a593Smuzhiyun #define QT1050_REF_DATA_1_MSB 0x16
51*4882a593Smuzhiyun #define QT1050_REF_DATA_1_LSB 0x17
52*4882a593Smuzhiyun #define QT1050_REF_DATA_2_MSB 0x1a
53*4882a593Smuzhiyun #define QT1050_REF_DATA_2_LSB 0x1b
54*4882a593Smuzhiyun #define QT1050_REF_DATA_3_MSB 0x1c
55*4882a593Smuzhiyun #define QT1050_REF_DATA_3_LSB 0x1d
56*4882a593Smuzhiyun #define QT1050_REF_DATA_4_MSB 0x1e
57*4882a593Smuzhiyun #define QT1050_REF_DATA_4_LSB 0x1f
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun /* Negative threshold level */
60*4882a593Smuzhiyun #define QT1050_NTHR_0 0x21
61*4882a593Smuzhiyun #define QT1050_NTHR_1 0x22
62*4882a593Smuzhiyun #define QT1050_NTHR_2 0x24
63*4882a593Smuzhiyun #define QT1050_NTHR_3 0x25
64*4882a593Smuzhiyun #define QT1050_NTHR_4 0x26
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun /* Pulse / Scale */
67*4882a593Smuzhiyun #define QT1050_PULSE_SCALE_0 0x28
68*4882a593Smuzhiyun #define QT1050_PULSE_SCALE_1 0x29
69*4882a593Smuzhiyun #define QT1050_PULSE_SCALE_2 0x2b
70*4882a593Smuzhiyun #define QT1050_PULSE_SCALE_3 0x2c
71*4882a593Smuzhiyun #define QT1050_PULSE_SCALE_4 0x2d
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun /* Detection integrator counter / AKS */
74*4882a593Smuzhiyun #define QT1050_DI_AKS_0 0x2f
75*4882a593Smuzhiyun #define QT1050_DI_AKS_1 0x30
76*4882a593Smuzhiyun #define QT1050_DI_AKS_2 0x32
77*4882a593Smuzhiyun #define QT1050_DI_AKS_3 0x33
78*4882a593Smuzhiyun #define QT1050_DI_AKS_4 0x34
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun /* Charge Share Delay */
81*4882a593Smuzhiyun #define QT1050_CSD_0 0x36
82*4882a593Smuzhiyun #define QT1050_CSD_1 0x37
83*4882a593Smuzhiyun #define QT1050_CSD_2 0x39
84*4882a593Smuzhiyun #define QT1050_CSD_3 0x3a
85*4882a593Smuzhiyun #define QT1050_CSD_4 0x3b
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /* Low Power Mode */
88*4882a593Smuzhiyun #define QT1050_LPMODE 0x3d
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun /* Calibration and Reset */
91*4882a593Smuzhiyun #define QT1050_RES_CAL 0x3f
92*4882a593Smuzhiyun #define QT1050_RES_CAL_RESET BIT(7)
93*4882a593Smuzhiyun #define QT1050_RES_CAL_CALIBRATE BIT(1)
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun #define QT1050_MAX_KEYS 5
96*4882a593Smuzhiyun #define QT1050_RESET_TIME 255
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun struct qt1050_key_regs {
99*4882a593Smuzhiyun unsigned int nthr;
100*4882a593Smuzhiyun unsigned int pulse_scale;
101*4882a593Smuzhiyun unsigned int di_aks;
102*4882a593Smuzhiyun unsigned int csd;
103*4882a593Smuzhiyun };
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun struct qt1050_key {
106*4882a593Smuzhiyun u32 num;
107*4882a593Smuzhiyun u32 charge_delay;
108*4882a593Smuzhiyun u32 thr_cnt;
109*4882a593Smuzhiyun u32 samples;
110*4882a593Smuzhiyun u32 scale;
111*4882a593Smuzhiyun u32 keycode;
112*4882a593Smuzhiyun };
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun struct qt1050_priv {
115*4882a593Smuzhiyun struct i2c_client *client;
116*4882a593Smuzhiyun struct input_dev *input;
117*4882a593Smuzhiyun struct regmap *regmap;
118*4882a593Smuzhiyun struct qt1050_key keys[QT1050_MAX_KEYS];
119*4882a593Smuzhiyun unsigned short keycodes[QT1050_MAX_KEYS];
120*4882a593Smuzhiyun u8 reg_keys;
121*4882a593Smuzhiyun u8 last_keys;
122*4882a593Smuzhiyun };
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun static const struct qt1050_key_regs qt1050_key_regs_data[] = {
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun .nthr = QT1050_NTHR_0,
127*4882a593Smuzhiyun .pulse_scale = QT1050_PULSE_SCALE_0,
128*4882a593Smuzhiyun .di_aks = QT1050_DI_AKS_0,
129*4882a593Smuzhiyun .csd = QT1050_CSD_0,
130*4882a593Smuzhiyun }, {
131*4882a593Smuzhiyun .nthr = QT1050_NTHR_1,
132*4882a593Smuzhiyun .pulse_scale = QT1050_PULSE_SCALE_1,
133*4882a593Smuzhiyun .di_aks = QT1050_DI_AKS_1,
134*4882a593Smuzhiyun .csd = QT1050_CSD_1,
135*4882a593Smuzhiyun }, {
136*4882a593Smuzhiyun .nthr = QT1050_NTHR_2,
137*4882a593Smuzhiyun .pulse_scale = QT1050_PULSE_SCALE_2,
138*4882a593Smuzhiyun .di_aks = QT1050_DI_AKS_2,
139*4882a593Smuzhiyun .csd = QT1050_CSD_2,
140*4882a593Smuzhiyun }, {
141*4882a593Smuzhiyun .nthr = QT1050_NTHR_3,
142*4882a593Smuzhiyun .pulse_scale = QT1050_PULSE_SCALE_3,
143*4882a593Smuzhiyun .di_aks = QT1050_DI_AKS_3,
144*4882a593Smuzhiyun .csd = QT1050_CSD_3,
145*4882a593Smuzhiyun }, {
146*4882a593Smuzhiyun .nthr = QT1050_NTHR_4,
147*4882a593Smuzhiyun .pulse_scale = QT1050_PULSE_SCALE_4,
148*4882a593Smuzhiyun .di_aks = QT1050_DI_AKS_4,
149*4882a593Smuzhiyun .csd = QT1050_CSD_4,
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun };
152*4882a593Smuzhiyun
qt1050_volatile_reg(struct device * dev,unsigned int reg)153*4882a593Smuzhiyun static bool qt1050_volatile_reg(struct device *dev, unsigned int reg)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun switch (reg) {
156*4882a593Smuzhiyun case QT1050_DET_STATUS:
157*4882a593Smuzhiyun case QT1050_KEY_STATUS:
158*4882a593Smuzhiyun case QT1050_KEY_SIGNAL_0_MSB:
159*4882a593Smuzhiyun case QT1050_KEY_SIGNAL_0_LSB:
160*4882a593Smuzhiyun case QT1050_KEY_SIGNAL_1_MSB:
161*4882a593Smuzhiyun case QT1050_KEY_SIGNAL_1_LSB:
162*4882a593Smuzhiyun case QT1050_KEY_SIGNAL_2_MSB:
163*4882a593Smuzhiyun case QT1050_KEY_SIGNAL_2_LSB:
164*4882a593Smuzhiyun case QT1050_KEY_SIGNAL_3_MSB:
165*4882a593Smuzhiyun case QT1050_KEY_SIGNAL_3_LSB:
166*4882a593Smuzhiyun case QT1050_KEY_SIGNAL_4_MSB:
167*4882a593Smuzhiyun case QT1050_KEY_SIGNAL_4_LSB:
168*4882a593Smuzhiyun return true;
169*4882a593Smuzhiyun default:
170*4882a593Smuzhiyun return false;
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun static const struct regmap_range qt1050_readable_ranges[] = {
175*4882a593Smuzhiyun regmap_reg_range(QT1050_CHIP_ID, QT1050_KEY_STATUS),
176*4882a593Smuzhiyun regmap_reg_range(QT1050_KEY_SIGNAL_0_MSB, QT1050_KEY_SIGNAL_1_LSB),
177*4882a593Smuzhiyun regmap_reg_range(QT1050_KEY_SIGNAL_2_MSB, QT1050_KEY_SIGNAL_4_LSB),
178*4882a593Smuzhiyun regmap_reg_range(QT1050_REF_DATA_0_MSB, QT1050_REF_DATA_1_LSB),
179*4882a593Smuzhiyun regmap_reg_range(QT1050_REF_DATA_2_MSB, QT1050_REF_DATA_4_LSB),
180*4882a593Smuzhiyun regmap_reg_range(QT1050_NTHR_0, QT1050_NTHR_1),
181*4882a593Smuzhiyun regmap_reg_range(QT1050_NTHR_2, QT1050_NTHR_4),
182*4882a593Smuzhiyun regmap_reg_range(QT1050_PULSE_SCALE_0, QT1050_PULSE_SCALE_1),
183*4882a593Smuzhiyun regmap_reg_range(QT1050_PULSE_SCALE_2, QT1050_PULSE_SCALE_4),
184*4882a593Smuzhiyun regmap_reg_range(QT1050_DI_AKS_0, QT1050_DI_AKS_1),
185*4882a593Smuzhiyun regmap_reg_range(QT1050_DI_AKS_2, QT1050_DI_AKS_4),
186*4882a593Smuzhiyun regmap_reg_range(QT1050_CSD_0, QT1050_CSD_1),
187*4882a593Smuzhiyun regmap_reg_range(QT1050_CSD_2, QT1050_RES_CAL),
188*4882a593Smuzhiyun };
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun static const struct regmap_access_table qt1050_readable_table = {
191*4882a593Smuzhiyun .yes_ranges = qt1050_readable_ranges,
192*4882a593Smuzhiyun .n_yes_ranges = ARRAY_SIZE(qt1050_readable_ranges),
193*4882a593Smuzhiyun };
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun static const struct regmap_range qt1050_writeable_ranges[] = {
196*4882a593Smuzhiyun regmap_reg_range(QT1050_NTHR_0, QT1050_NTHR_1),
197*4882a593Smuzhiyun regmap_reg_range(QT1050_NTHR_2, QT1050_NTHR_4),
198*4882a593Smuzhiyun regmap_reg_range(QT1050_PULSE_SCALE_0, QT1050_PULSE_SCALE_1),
199*4882a593Smuzhiyun regmap_reg_range(QT1050_PULSE_SCALE_2, QT1050_PULSE_SCALE_4),
200*4882a593Smuzhiyun regmap_reg_range(QT1050_DI_AKS_0, QT1050_DI_AKS_1),
201*4882a593Smuzhiyun regmap_reg_range(QT1050_DI_AKS_2, QT1050_DI_AKS_4),
202*4882a593Smuzhiyun regmap_reg_range(QT1050_CSD_0, QT1050_CSD_1),
203*4882a593Smuzhiyun regmap_reg_range(QT1050_CSD_2, QT1050_RES_CAL),
204*4882a593Smuzhiyun };
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun static const struct regmap_access_table qt1050_writeable_table = {
207*4882a593Smuzhiyun .yes_ranges = qt1050_writeable_ranges,
208*4882a593Smuzhiyun .n_yes_ranges = ARRAY_SIZE(qt1050_writeable_ranges),
209*4882a593Smuzhiyun };
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun static struct regmap_config qt1050_regmap_config = {
212*4882a593Smuzhiyun .reg_bits = 8,
213*4882a593Smuzhiyun .val_bits = 8,
214*4882a593Smuzhiyun .max_register = QT1050_RES_CAL,
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun .wr_table = &qt1050_writeable_table,
219*4882a593Smuzhiyun .rd_table = &qt1050_readable_table,
220*4882a593Smuzhiyun .volatile_reg = qt1050_volatile_reg,
221*4882a593Smuzhiyun };
222*4882a593Smuzhiyun
qt1050_identify(struct qt1050_priv * ts)223*4882a593Smuzhiyun static bool qt1050_identify(struct qt1050_priv *ts)
224*4882a593Smuzhiyun {
225*4882a593Smuzhiyun unsigned int val;
226*4882a593Smuzhiyun int err;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun /* Read Chip ID */
229*4882a593Smuzhiyun regmap_read(ts->regmap, QT1050_CHIP_ID, &val);
230*4882a593Smuzhiyun if (val != QT1050_CHIP_ID_VER) {
231*4882a593Smuzhiyun dev_err(&ts->client->dev, "ID %d not supported\n", val);
232*4882a593Smuzhiyun return false;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun /* Read firmware version */
236*4882a593Smuzhiyun err = regmap_read(ts->regmap, QT1050_FW_VERSION, &val);
237*4882a593Smuzhiyun if (err) {
238*4882a593Smuzhiyun dev_err(&ts->client->dev, "could not read the firmware version\n");
239*4882a593Smuzhiyun return false;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun dev_info(&ts->client->dev, "AT42QT1050 firmware version %1d.%1d\n",
243*4882a593Smuzhiyun val >> 4, val & 0xf);
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun return true;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun
qt1050_irq_threaded(int irq,void * dev_id)248*4882a593Smuzhiyun static irqreturn_t qt1050_irq_threaded(int irq, void *dev_id)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun struct qt1050_priv *ts = dev_id;
251*4882a593Smuzhiyun struct input_dev *input = ts->input;
252*4882a593Smuzhiyun unsigned long new_keys, changed;
253*4882a593Smuzhiyun unsigned int val;
254*4882a593Smuzhiyun int i, err;
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun /* Read the detected status register, thus clearing interrupt */
257*4882a593Smuzhiyun err = regmap_read(ts->regmap, QT1050_DET_STATUS, &val);
258*4882a593Smuzhiyun if (err) {
259*4882a593Smuzhiyun dev_err(&ts->client->dev, "Fail to read detection status: %d\n",
260*4882a593Smuzhiyun err);
261*4882a593Smuzhiyun return IRQ_NONE;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun /* Read which key changed, keys are not continuous */
265*4882a593Smuzhiyun err = regmap_read(ts->regmap, QT1050_KEY_STATUS, &val);
266*4882a593Smuzhiyun if (err) {
267*4882a593Smuzhiyun dev_err(&ts->client->dev,
268*4882a593Smuzhiyun "Fail to determine the key status: %d\n", err);
269*4882a593Smuzhiyun return IRQ_NONE;
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun new_keys = (val & 0x70) >> 2 | (val & 0x6) >> 1;
272*4882a593Smuzhiyun changed = ts->last_keys ^ new_keys;
273*4882a593Smuzhiyun /* Report registered keys only */
274*4882a593Smuzhiyun changed &= ts->reg_keys;
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun for_each_set_bit(i, &changed, QT1050_MAX_KEYS)
277*4882a593Smuzhiyun input_report_key(input, ts->keys[i].keycode,
278*4882a593Smuzhiyun test_bit(i, &new_keys));
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun ts->last_keys = new_keys;
281*4882a593Smuzhiyun input_sync(input);
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun return IRQ_HANDLED;
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun
qt1050_get_key_regs(int key_num)286*4882a593Smuzhiyun static const struct qt1050_key_regs *qt1050_get_key_regs(int key_num)
287*4882a593Smuzhiyun {
288*4882a593Smuzhiyun return &qt1050_key_regs_data[key_num];
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun
qt1050_set_key(struct regmap * map,int number,int on)291*4882a593Smuzhiyun static int qt1050_set_key(struct regmap *map, int number, int on)
292*4882a593Smuzhiyun {
293*4882a593Smuzhiyun const struct qt1050_key_regs *key_regs;
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun key_regs = qt1050_get_key_regs(number);
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun return regmap_update_bits(map, key_regs->di_aks, 0xfc,
298*4882a593Smuzhiyun on ? BIT(4) : 0x00);
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun
qt1050_apply_fw_data(struct qt1050_priv * ts)301*4882a593Smuzhiyun static int qt1050_apply_fw_data(struct qt1050_priv *ts)
302*4882a593Smuzhiyun {
303*4882a593Smuzhiyun struct regmap *map = ts->regmap;
304*4882a593Smuzhiyun struct qt1050_key *button = &ts->keys[0];
305*4882a593Smuzhiyun const struct qt1050_key_regs *key_regs;
306*4882a593Smuzhiyun int i, err;
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun /* Disable all keys and enable only the specified ones */
309*4882a593Smuzhiyun for (i = 0; i < QT1050_MAX_KEYS; i++) {
310*4882a593Smuzhiyun err = qt1050_set_key(map, i, 0);
311*4882a593Smuzhiyun if (err)
312*4882a593Smuzhiyun return err;
313*4882a593Smuzhiyun }
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun for (i = 0; i < QT1050_MAX_KEYS; i++, button++) {
316*4882a593Smuzhiyun /* Keep KEY_RESERVED keys off */
317*4882a593Smuzhiyun if (button->keycode == KEY_RESERVED)
318*4882a593Smuzhiyun continue;
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun err = qt1050_set_key(map, button->num, 1);
321*4882a593Smuzhiyun if (err)
322*4882a593Smuzhiyun return err;
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun key_regs = qt1050_get_key_regs(button->num);
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun err = regmap_write(map, key_regs->pulse_scale,
327*4882a593Smuzhiyun (button->samples << 4) | (button->scale));
328*4882a593Smuzhiyun if (err)
329*4882a593Smuzhiyun return err;
330*4882a593Smuzhiyun err = regmap_write(map, key_regs->csd, button->charge_delay);
331*4882a593Smuzhiyun if (err)
332*4882a593Smuzhiyun return err;
333*4882a593Smuzhiyun err = regmap_write(map, key_regs->nthr, button->thr_cnt);
334*4882a593Smuzhiyun if (err)
335*4882a593Smuzhiyun return err;
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun return 0;
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun
qt1050_parse_fw(struct qt1050_priv * ts)341*4882a593Smuzhiyun static int qt1050_parse_fw(struct qt1050_priv *ts)
342*4882a593Smuzhiyun {
343*4882a593Smuzhiyun struct device *dev = &ts->client->dev;
344*4882a593Smuzhiyun struct fwnode_handle *child;
345*4882a593Smuzhiyun int nbuttons;
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun nbuttons = device_get_child_node_count(dev);
348*4882a593Smuzhiyun if (nbuttons == 0 || nbuttons > QT1050_MAX_KEYS)
349*4882a593Smuzhiyun return -ENODEV;
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun device_for_each_child_node(dev, child) {
352*4882a593Smuzhiyun struct qt1050_key button;
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun /* Required properties */
355*4882a593Smuzhiyun if (fwnode_property_read_u32(child, "linux,code",
356*4882a593Smuzhiyun &button.keycode)) {
357*4882a593Smuzhiyun dev_err(dev, "Button without keycode\n");
358*4882a593Smuzhiyun goto err;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun if (button.keycode >= KEY_MAX) {
361*4882a593Smuzhiyun dev_err(dev, "Invalid keycode 0x%x\n",
362*4882a593Smuzhiyun button.keycode);
363*4882a593Smuzhiyun goto err;
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun if (fwnode_property_read_u32(child, "reg",
367*4882a593Smuzhiyun &button.num)) {
368*4882a593Smuzhiyun dev_err(dev, "Button without pad number\n");
369*4882a593Smuzhiyun goto err;
370*4882a593Smuzhiyun }
371*4882a593Smuzhiyun if (button.num < 0 || button.num > QT1050_MAX_KEYS - 1)
372*4882a593Smuzhiyun goto err;
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun ts->reg_keys |= BIT(button.num);
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun /* Optional properties */
377*4882a593Smuzhiyun if (fwnode_property_read_u32(child,
378*4882a593Smuzhiyun "microchip,pre-charge-time-ns",
379*4882a593Smuzhiyun &button.charge_delay)) {
380*4882a593Smuzhiyun button.charge_delay = 0;
381*4882a593Smuzhiyun } else {
382*4882a593Smuzhiyun if (button.charge_delay % 2500 == 0)
383*4882a593Smuzhiyun button.charge_delay =
384*4882a593Smuzhiyun button.charge_delay / 2500;
385*4882a593Smuzhiyun else
386*4882a593Smuzhiyun button.charge_delay = 0;
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun if (fwnode_property_read_u32(child, "microchip,average-samples",
390*4882a593Smuzhiyun &button.samples)) {
391*4882a593Smuzhiyun button.samples = 0;
392*4882a593Smuzhiyun } else {
393*4882a593Smuzhiyun if (is_power_of_2(button.samples))
394*4882a593Smuzhiyun button.samples = ilog2(button.samples);
395*4882a593Smuzhiyun else
396*4882a593Smuzhiyun button.samples = 0;
397*4882a593Smuzhiyun }
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun if (fwnode_property_read_u32(child, "microchip,average-scaling",
400*4882a593Smuzhiyun &button.scale)) {
401*4882a593Smuzhiyun button.scale = 0;
402*4882a593Smuzhiyun } else {
403*4882a593Smuzhiyun if (is_power_of_2(button.scale))
404*4882a593Smuzhiyun button.scale = ilog2(button.scale);
405*4882a593Smuzhiyun else
406*4882a593Smuzhiyun button.scale = 0;
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun if (fwnode_property_read_u32(child, "microchip,threshold",
411*4882a593Smuzhiyun &button.thr_cnt)) {
412*4882a593Smuzhiyun button.thr_cnt = 20;
413*4882a593Smuzhiyun } else {
414*4882a593Smuzhiyun if (button.thr_cnt > 255)
415*4882a593Smuzhiyun button.thr_cnt = 20;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun ts->keys[button.num] = button;
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun return 0;
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun err:
424*4882a593Smuzhiyun fwnode_handle_put(child);
425*4882a593Smuzhiyun return -EINVAL;
426*4882a593Smuzhiyun }
427*4882a593Smuzhiyun
qt1050_probe(struct i2c_client * client)428*4882a593Smuzhiyun static int qt1050_probe(struct i2c_client *client)
429*4882a593Smuzhiyun {
430*4882a593Smuzhiyun struct qt1050_priv *ts;
431*4882a593Smuzhiyun struct input_dev *input;
432*4882a593Smuzhiyun struct device *dev = &client->dev;
433*4882a593Smuzhiyun struct regmap *map;
434*4882a593Smuzhiyun unsigned int status, i;
435*4882a593Smuzhiyun int err;
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun /* Check basic functionality */
438*4882a593Smuzhiyun err = i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE);
439*4882a593Smuzhiyun if (!err) {
440*4882a593Smuzhiyun dev_err(&client->dev, "%s adapter not supported\n",
441*4882a593Smuzhiyun dev_driver_string(&client->adapter->dev));
442*4882a593Smuzhiyun return -ENODEV;
443*4882a593Smuzhiyun }
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun if (!client->irq) {
446*4882a593Smuzhiyun dev_err(dev, "assign a irq line to this device\n");
447*4882a593Smuzhiyun return -EINVAL;
448*4882a593Smuzhiyun }
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun ts = devm_kzalloc(dev, sizeof(*ts), GFP_KERNEL);
451*4882a593Smuzhiyun if (!ts)
452*4882a593Smuzhiyun return -ENOMEM;
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun input = devm_input_allocate_device(dev);
455*4882a593Smuzhiyun if (!input)
456*4882a593Smuzhiyun return -ENOMEM;
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun map = devm_regmap_init_i2c(client, &qt1050_regmap_config);
459*4882a593Smuzhiyun if (IS_ERR(map))
460*4882a593Smuzhiyun return PTR_ERR(map);
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun ts->client = client;
463*4882a593Smuzhiyun ts->input = input;
464*4882a593Smuzhiyun ts->regmap = map;
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun i2c_set_clientdata(client, ts);
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun /* Identify the qt1050 chip */
469*4882a593Smuzhiyun if (!qt1050_identify(ts))
470*4882a593Smuzhiyun return -ENODEV;
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun /* Get pdata */
473*4882a593Smuzhiyun err = qt1050_parse_fw(ts);
474*4882a593Smuzhiyun if (err) {
475*4882a593Smuzhiyun dev_err(dev, "Failed to parse firmware: %d\n", err);
476*4882a593Smuzhiyun return err;
477*4882a593Smuzhiyun }
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun input->name = "AT42QT1050 QTouch Sensor";
480*4882a593Smuzhiyun input->dev.parent = &client->dev;
481*4882a593Smuzhiyun input->id.bustype = BUS_I2C;
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun /* Add the keycode */
484*4882a593Smuzhiyun input->keycode = ts->keycodes;
485*4882a593Smuzhiyun input->keycodesize = sizeof(ts->keycodes[0]);
486*4882a593Smuzhiyun input->keycodemax = QT1050_MAX_KEYS;
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun __set_bit(EV_KEY, input->evbit);
489*4882a593Smuzhiyun for (i = 0; i < QT1050_MAX_KEYS; i++) {
490*4882a593Smuzhiyun ts->keycodes[i] = ts->keys[i].keycode;
491*4882a593Smuzhiyun __set_bit(ts->keycodes[i], input->keybit);
492*4882a593Smuzhiyun }
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun /* Trigger re-calibration */
495*4882a593Smuzhiyun err = regmap_update_bits(ts->regmap, QT1050_RES_CAL, 0x7f,
496*4882a593Smuzhiyun QT1050_RES_CAL_CALIBRATE);
497*4882a593Smuzhiyun if (err) {
498*4882a593Smuzhiyun dev_err(dev, "Trigger calibration failed: %d\n", err);
499*4882a593Smuzhiyun return err;
500*4882a593Smuzhiyun }
501*4882a593Smuzhiyun err = regmap_read_poll_timeout(ts->regmap, QT1050_DET_STATUS, status,
502*4882a593Smuzhiyun status >> 7 == 1, 10000, 200000);
503*4882a593Smuzhiyun if (err) {
504*4882a593Smuzhiyun dev_err(dev, "Calibration failed: %d\n", err);
505*4882a593Smuzhiyun return err;
506*4882a593Smuzhiyun }
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun /* Soft reset to set defaults */
509*4882a593Smuzhiyun err = regmap_update_bits(ts->regmap, QT1050_RES_CAL,
510*4882a593Smuzhiyun QT1050_RES_CAL_RESET, QT1050_RES_CAL_RESET);
511*4882a593Smuzhiyun if (err) {
512*4882a593Smuzhiyun dev_err(dev, "Trigger soft reset failed: %d\n", err);
513*4882a593Smuzhiyun return err;
514*4882a593Smuzhiyun }
515*4882a593Smuzhiyun msleep(QT1050_RESET_TIME);
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun /* Set pdata */
518*4882a593Smuzhiyun err = qt1050_apply_fw_data(ts);
519*4882a593Smuzhiyun if (err) {
520*4882a593Smuzhiyun dev_err(dev, "Failed to set firmware data: %d\n", err);
521*4882a593Smuzhiyun return err;
522*4882a593Smuzhiyun }
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun err = devm_request_threaded_irq(dev, client->irq, NULL,
525*4882a593Smuzhiyun qt1050_irq_threaded, IRQF_ONESHOT,
526*4882a593Smuzhiyun "qt1050", ts);
527*4882a593Smuzhiyun if (err) {
528*4882a593Smuzhiyun dev_err(&client->dev, "Failed to request irq: %d\n", err);
529*4882a593Smuzhiyun return err;
530*4882a593Smuzhiyun }
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun /* Clear #CHANGE line */
533*4882a593Smuzhiyun err = regmap_read(ts->regmap, QT1050_DET_STATUS, &status);
534*4882a593Smuzhiyun if (err) {
535*4882a593Smuzhiyun dev_err(dev, "Failed to clear #CHANGE line level: %d\n", err);
536*4882a593Smuzhiyun return err;
537*4882a593Smuzhiyun }
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun /* Register the input device */
540*4882a593Smuzhiyun err = input_register_device(ts->input);
541*4882a593Smuzhiyun if (err) {
542*4882a593Smuzhiyun dev_err(&client->dev, "Failed to register input device: %d\n",
543*4882a593Smuzhiyun err);
544*4882a593Smuzhiyun return err;
545*4882a593Smuzhiyun }
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun return 0;
548*4882a593Smuzhiyun }
549*4882a593Smuzhiyun
qt1050_suspend(struct device * dev)550*4882a593Smuzhiyun static int __maybe_unused qt1050_suspend(struct device *dev)
551*4882a593Smuzhiyun {
552*4882a593Smuzhiyun struct i2c_client *client = to_i2c_client(dev);
553*4882a593Smuzhiyun struct qt1050_priv *ts = i2c_get_clientdata(client);
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun disable_irq(client->irq);
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun /*
558*4882a593Smuzhiyun * Set measurement interval to 1s (125 x 8ms) if wakeup is allowed
559*4882a593Smuzhiyun * else turn off. The 1s interval seems to be a good compromise between
560*4882a593Smuzhiyun * low power and response time.
561*4882a593Smuzhiyun */
562*4882a593Smuzhiyun return regmap_write(ts->regmap, QT1050_LPMODE,
563*4882a593Smuzhiyun device_may_wakeup(dev) ? 125 : 0);
564*4882a593Smuzhiyun }
565*4882a593Smuzhiyun
qt1050_resume(struct device * dev)566*4882a593Smuzhiyun static int __maybe_unused qt1050_resume(struct device *dev)
567*4882a593Smuzhiyun {
568*4882a593Smuzhiyun struct i2c_client *client = to_i2c_client(dev);
569*4882a593Smuzhiyun struct qt1050_priv *ts = i2c_get_clientdata(client);
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun enable_irq(client->irq);
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun /* Set measurement interval back to 16ms (2 x 8ms) */
574*4882a593Smuzhiyun return regmap_write(ts->regmap, QT1050_LPMODE, 2);
575*4882a593Smuzhiyun }
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(qt1050_pm_ops, qt1050_suspend, qt1050_resume);
578*4882a593Smuzhiyun
579*4882a593Smuzhiyun static const struct of_device_id __maybe_unused qt1050_of_match[] = {
580*4882a593Smuzhiyun { .compatible = "microchip,qt1050", },
581*4882a593Smuzhiyun { },
582*4882a593Smuzhiyun };
583*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, qt1050_of_match);
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun static struct i2c_driver qt1050_driver = {
586*4882a593Smuzhiyun .driver = {
587*4882a593Smuzhiyun .name = "qt1050",
588*4882a593Smuzhiyun .of_match_table = of_match_ptr(qt1050_of_match),
589*4882a593Smuzhiyun .pm = &qt1050_pm_ops,
590*4882a593Smuzhiyun },
591*4882a593Smuzhiyun .probe_new = qt1050_probe,
592*4882a593Smuzhiyun };
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun module_i2c_driver(qt1050_driver);
595*4882a593Smuzhiyun
596*4882a593Smuzhiyun MODULE_AUTHOR("Marco Felsch <kernel@pengutronix.de");
597*4882a593Smuzhiyun MODULE_DESCRIPTION("Driver for AT42QT1050 QTouch sensor");
598*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
599