1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Input driver for Microchip CAP11xx based capacitive touch sensors
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * (c) 2014 Daniel Mack <linux@zonque.org>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/interrupt.h>
11*4882a593Smuzhiyun #include <linux/input.h>
12*4882a593Smuzhiyun #include <linux/leds.h>
13*4882a593Smuzhiyun #include <linux/of_irq.h>
14*4882a593Smuzhiyun #include <linux/regmap.h>
15*4882a593Smuzhiyun #include <linux/i2c.h>
16*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #define CAP11XX_REG_MAIN_CONTROL 0x00
19*4882a593Smuzhiyun #define CAP11XX_REG_MAIN_CONTROL_GAIN_SHIFT (6)
20*4882a593Smuzhiyun #define CAP11XX_REG_MAIN_CONTROL_GAIN_MASK (0xc0)
21*4882a593Smuzhiyun #define CAP11XX_REG_MAIN_CONTROL_DLSEEP BIT(4)
22*4882a593Smuzhiyun #define CAP11XX_REG_GENERAL_STATUS 0x02
23*4882a593Smuzhiyun #define CAP11XX_REG_SENSOR_INPUT 0x03
24*4882a593Smuzhiyun #define CAP11XX_REG_NOISE_FLAG_STATUS 0x0a
25*4882a593Smuzhiyun #define CAP11XX_REG_SENOR_DELTA(X) (0x10 + (X))
26*4882a593Smuzhiyun #define CAP11XX_REG_SENSITIVITY_CONTROL 0x1f
27*4882a593Smuzhiyun #define CAP11XX_REG_CONFIG 0x20
28*4882a593Smuzhiyun #define CAP11XX_REG_SENSOR_ENABLE 0x21
29*4882a593Smuzhiyun #define CAP11XX_REG_SENSOR_CONFIG 0x22
30*4882a593Smuzhiyun #define CAP11XX_REG_SENSOR_CONFIG2 0x23
31*4882a593Smuzhiyun #define CAP11XX_REG_SAMPLING_CONFIG 0x24
32*4882a593Smuzhiyun #define CAP11XX_REG_CALIBRATION 0x26
33*4882a593Smuzhiyun #define CAP11XX_REG_INT_ENABLE 0x27
34*4882a593Smuzhiyun #define CAP11XX_REG_REPEAT_RATE 0x28
35*4882a593Smuzhiyun #define CAP11XX_REG_MT_CONFIG 0x2a
36*4882a593Smuzhiyun #define CAP11XX_REG_MT_PATTERN_CONFIG 0x2b
37*4882a593Smuzhiyun #define CAP11XX_REG_MT_PATTERN 0x2d
38*4882a593Smuzhiyun #define CAP11XX_REG_RECALIB_CONFIG 0x2f
39*4882a593Smuzhiyun #define CAP11XX_REG_SENSOR_THRESH(X) (0x30 + (X))
40*4882a593Smuzhiyun #define CAP11XX_REG_SENSOR_NOISE_THRESH 0x38
41*4882a593Smuzhiyun #define CAP11XX_REG_STANDBY_CHANNEL 0x40
42*4882a593Smuzhiyun #define CAP11XX_REG_STANDBY_CONFIG 0x41
43*4882a593Smuzhiyun #define CAP11XX_REG_STANDBY_SENSITIVITY 0x42
44*4882a593Smuzhiyun #define CAP11XX_REG_STANDBY_THRESH 0x43
45*4882a593Smuzhiyun #define CAP11XX_REG_CONFIG2 0x44
46*4882a593Smuzhiyun #define CAP11XX_REG_CONFIG2_ALT_POL BIT(6)
47*4882a593Smuzhiyun #define CAP11XX_REG_SENSOR_BASE_CNT(X) (0x50 + (X))
48*4882a593Smuzhiyun #define CAP11XX_REG_LED_POLARITY 0x73
49*4882a593Smuzhiyun #define CAP11XX_REG_LED_OUTPUT_CONTROL 0x74
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #define CAP11XX_REG_LED_DUTY_CYCLE_1 0x90
52*4882a593Smuzhiyun #define CAP11XX_REG_LED_DUTY_CYCLE_2 0x91
53*4882a593Smuzhiyun #define CAP11XX_REG_LED_DUTY_CYCLE_3 0x92
54*4882a593Smuzhiyun #define CAP11XX_REG_LED_DUTY_CYCLE_4 0x93
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun #define CAP11XX_REG_LED_DUTY_MIN_MASK (0x0f)
57*4882a593Smuzhiyun #define CAP11XX_REG_LED_DUTY_MIN_MASK_SHIFT (0)
58*4882a593Smuzhiyun #define CAP11XX_REG_LED_DUTY_MAX_MASK (0xf0)
59*4882a593Smuzhiyun #define CAP11XX_REG_LED_DUTY_MAX_MASK_SHIFT (4)
60*4882a593Smuzhiyun #define CAP11XX_REG_LED_DUTY_MAX_VALUE (15)
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun #define CAP11XX_REG_SENSOR_CALIB (0xb1 + (X))
63*4882a593Smuzhiyun #define CAP11XX_REG_SENSOR_CALIB_LSB1 0xb9
64*4882a593Smuzhiyun #define CAP11XX_REG_SENSOR_CALIB_LSB2 0xba
65*4882a593Smuzhiyun #define CAP11XX_REG_PRODUCT_ID 0xfd
66*4882a593Smuzhiyun #define CAP11XX_REG_MANUFACTURER_ID 0xfe
67*4882a593Smuzhiyun #define CAP11XX_REG_REVISION 0xff
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun #define CAP11XX_MANUFACTURER_ID 0x5d
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun #ifdef CONFIG_LEDS_CLASS
72*4882a593Smuzhiyun struct cap11xx_led {
73*4882a593Smuzhiyun struct cap11xx_priv *priv;
74*4882a593Smuzhiyun struct led_classdev cdev;
75*4882a593Smuzhiyun u32 reg;
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun #endif
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun struct cap11xx_priv {
80*4882a593Smuzhiyun struct regmap *regmap;
81*4882a593Smuzhiyun struct input_dev *idev;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun struct cap11xx_led *leds;
84*4882a593Smuzhiyun int num_leds;
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun /* config */
87*4882a593Smuzhiyun u32 keycodes[];
88*4882a593Smuzhiyun };
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun struct cap11xx_hw_model {
91*4882a593Smuzhiyun u8 product_id;
92*4882a593Smuzhiyun unsigned int num_channels;
93*4882a593Smuzhiyun unsigned int num_leds;
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun enum {
97*4882a593Smuzhiyun CAP1106,
98*4882a593Smuzhiyun CAP1126,
99*4882a593Smuzhiyun CAP1188,
100*4882a593Smuzhiyun };
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun static const struct cap11xx_hw_model cap11xx_devices[] = {
103*4882a593Smuzhiyun [CAP1106] = { .product_id = 0x55, .num_channels = 6, .num_leds = 0 },
104*4882a593Smuzhiyun [CAP1126] = { .product_id = 0x53, .num_channels = 6, .num_leds = 2 },
105*4882a593Smuzhiyun [CAP1188] = { .product_id = 0x50, .num_channels = 8, .num_leds = 8 },
106*4882a593Smuzhiyun };
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun static const struct reg_default cap11xx_reg_defaults[] = {
109*4882a593Smuzhiyun { CAP11XX_REG_MAIN_CONTROL, 0x00 },
110*4882a593Smuzhiyun { CAP11XX_REG_GENERAL_STATUS, 0x00 },
111*4882a593Smuzhiyun { CAP11XX_REG_SENSOR_INPUT, 0x00 },
112*4882a593Smuzhiyun { CAP11XX_REG_NOISE_FLAG_STATUS, 0x00 },
113*4882a593Smuzhiyun { CAP11XX_REG_SENSITIVITY_CONTROL, 0x2f },
114*4882a593Smuzhiyun { CAP11XX_REG_CONFIG, 0x20 },
115*4882a593Smuzhiyun { CAP11XX_REG_SENSOR_ENABLE, 0x3f },
116*4882a593Smuzhiyun { CAP11XX_REG_SENSOR_CONFIG, 0xa4 },
117*4882a593Smuzhiyun { CAP11XX_REG_SENSOR_CONFIG2, 0x07 },
118*4882a593Smuzhiyun { CAP11XX_REG_SAMPLING_CONFIG, 0x39 },
119*4882a593Smuzhiyun { CAP11XX_REG_CALIBRATION, 0x00 },
120*4882a593Smuzhiyun { CAP11XX_REG_INT_ENABLE, 0x3f },
121*4882a593Smuzhiyun { CAP11XX_REG_REPEAT_RATE, 0x3f },
122*4882a593Smuzhiyun { CAP11XX_REG_MT_CONFIG, 0x80 },
123*4882a593Smuzhiyun { CAP11XX_REG_MT_PATTERN_CONFIG, 0x00 },
124*4882a593Smuzhiyun { CAP11XX_REG_MT_PATTERN, 0x3f },
125*4882a593Smuzhiyun { CAP11XX_REG_RECALIB_CONFIG, 0x8a },
126*4882a593Smuzhiyun { CAP11XX_REG_SENSOR_THRESH(0), 0x40 },
127*4882a593Smuzhiyun { CAP11XX_REG_SENSOR_THRESH(1), 0x40 },
128*4882a593Smuzhiyun { CAP11XX_REG_SENSOR_THRESH(2), 0x40 },
129*4882a593Smuzhiyun { CAP11XX_REG_SENSOR_THRESH(3), 0x40 },
130*4882a593Smuzhiyun { CAP11XX_REG_SENSOR_THRESH(4), 0x40 },
131*4882a593Smuzhiyun { CAP11XX_REG_SENSOR_THRESH(5), 0x40 },
132*4882a593Smuzhiyun { CAP11XX_REG_SENSOR_NOISE_THRESH, 0x01 },
133*4882a593Smuzhiyun { CAP11XX_REG_STANDBY_CHANNEL, 0x00 },
134*4882a593Smuzhiyun { CAP11XX_REG_STANDBY_CONFIG, 0x39 },
135*4882a593Smuzhiyun { CAP11XX_REG_STANDBY_SENSITIVITY, 0x02 },
136*4882a593Smuzhiyun { CAP11XX_REG_STANDBY_THRESH, 0x40 },
137*4882a593Smuzhiyun { CAP11XX_REG_CONFIG2, 0x40 },
138*4882a593Smuzhiyun { CAP11XX_REG_LED_POLARITY, 0x00 },
139*4882a593Smuzhiyun { CAP11XX_REG_SENSOR_CALIB_LSB1, 0x00 },
140*4882a593Smuzhiyun { CAP11XX_REG_SENSOR_CALIB_LSB2, 0x00 },
141*4882a593Smuzhiyun };
142*4882a593Smuzhiyun
cap11xx_volatile_reg(struct device * dev,unsigned int reg)143*4882a593Smuzhiyun static bool cap11xx_volatile_reg(struct device *dev, unsigned int reg)
144*4882a593Smuzhiyun {
145*4882a593Smuzhiyun switch (reg) {
146*4882a593Smuzhiyun case CAP11XX_REG_MAIN_CONTROL:
147*4882a593Smuzhiyun case CAP11XX_REG_SENSOR_INPUT:
148*4882a593Smuzhiyun case CAP11XX_REG_SENOR_DELTA(0):
149*4882a593Smuzhiyun case CAP11XX_REG_SENOR_DELTA(1):
150*4882a593Smuzhiyun case CAP11XX_REG_SENOR_DELTA(2):
151*4882a593Smuzhiyun case CAP11XX_REG_SENOR_DELTA(3):
152*4882a593Smuzhiyun case CAP11XX_REG_SENOR_DELTA(4):
153*4882a593Smuzhiyun case CAP11XX_REG_SENOR_DELTA(5):
154*4882a593Smuzhiyun case CAP11XX_REG_PRODUCT_ID:
155*4882a593Smuzhiyun case CAP11XX_REG_MANUFACTURER_ID:
156*4882a593Smuzhiyun case CAP11XX_REG_REVISION:
157*4882a593Smuzhiyun return true;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun return false;
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun static const struct regmap_config cap11xx_regmap_config = {
164*4882a593Smuzhiyun .reg_bits = 8,
165*4882a593Smuzhiyun .val_bits = 8,
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun .max_register = CAP11XX_REG_REVISION,
168*4882a593Smuzhiyun .reg_defaults = cap11xx_reg_defaults,
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun .num_reg_defaults = ARRAY_SIZE(cap11xx_reg_defaults),
171*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
172*4882a593Smuzhiyun .volatile_reg = cap11xx_volatile_reg,
173*4882a593Smuzhiyun };
174*4882a593Smuzhiyun
cap11xx_thread_func(int irq_num,void * data)175*4882a593Smuzhiyun static irqreturn_t cap11xx_thread_func(int irq_num, void *data)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun struct cap11xx_priv *priv = data;
178*4882a593Smuzhiyun unsigned int status;
179*4882a593Smuzhiyun int ret, i;
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun /*
182*4882a593Smuzhiyun * Deassert interrupt. This needs to be done before reading the status
183*4882a593Smuzhiyun * registers, which will not carry valid values otherwise.
184*4882a593Smuzhiyun */
185*4882a593Smuzhiyun ret = regmap_update_bits(priv->regmap, CAP11XX_REG_MAIN_CONTROL, 1, 0);
186*4882a593Smuzhiyun if (ret < 0)
187*4882a593Smuzhiyun goto out;
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun ret = regmap_read(priv->regmap, CAP11XX_REG_SENSOR_INPUT, &status);
190*4882a593Smuzhiyun if (ret < 0)
191*4882a593Smuzhiyun goto out;
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun for (i = 0; i < priv->idev->keycodemax; i++)
194*4882a593Smuzhiyun input_report_key(priv->idev, priv->keycodes[i],
195*4882a593Smuzhiyun status & (1 << i));
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun input_sync(priv->idev);
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun out:
200*4882a593Smuzhiyun return IRQ_HANDLED;
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun
cap11xx_set_sleep(struct cap11xx_priv * priv,bool sleep)203*4882a593Smuzhiyun static int cap11xx_set_sleep(struct cap11xx_priv *priv, bool sleep)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun /*
206*4882a593Smuzhiyun * DLSEEP mode will turn off all LEDS, prevent this
207*4882a593Smuzhiyun */
208*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_LEDS_CLASS) && priv->num_leds)
209*4882a593Smuzhiyun return 0;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun return regmap_update_bits(priv->regmap, CAP11XX_REG_MAIN_CONTROL,
212*4882a593Smuzhiyun CAP11XX_REG_MAIN_CONTROL_DLSEEP,
213*4882a593Smuzhiyun sleep ? CAP11XX_REG_MAIN_CONTROL_DLSEEP : 0);
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
cap11xx_input_open(struct input_dev * idev)216*4882a593Smuzhiyun static int cap11xx_input_open(struct input_dev *idev)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun struct cap11xx_priv *priv = input_get_drvdata(idev);
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun return cap11xx_set_sleep(priv, false);
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
cap11xx_input_close(struct input_dev * idev)223*4882a593Smuzhiyun static void cap11xx_input_close(struct input_dev *idev)
224*4882a593Smuzhiyun {
225*4882a593Smuzhiyun struct cap11xx_priv *priv = input_get_drvdata(idev);
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun cap11xx_set_sleep(priv, true);
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun #ifdef CONFIG_LEDS_CLASS
cap11xx_led_set(struct led_classdev * cdev,enum led_brightness value)231*4882a593Smuzhiyun static int cap11xx_led_set(struct led_classdev *cdev,
232*4882a593Smuzhiyun enum led_brightness value)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun struct cap11xx_led *led = container_of(cdev, struct cap11xx_led, cdev);
235*4882a593Smuzhiyun struct cap11xx_priv *priv = led->priv;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun /*
238*4882a593Smuzhiyun * All LEDs share the same duty cycle as this is a HW
239*4882a593Smuzhiyun * limitation. Brightness levels per LED are either
240*4882a593Smuzhiyun * 0 (OFF) and 1 (ON).
241*4882a593Smuzhiyun */
242*4882a593Smuzhiyun return regmap_update_bits(priv->regmap,
243*4882a593Smuzhiyun CAP11XX_REG_LED_OUTPUT_CONTROL,
244*4882a593Smuzhiyun BIT(led->reg),
245*4882a593Smuzhiyun value ? BIT(led->reg) : 0);
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun
cap11xx_init_leds(struct device * dev,struct cap11xx_priv * priv,int num_leds)248*4882a593Smuzhiyun static int cap11xx_init_leds(struct device *dev,
249*4882a593Smuzhiyun struct cap11xx_priv *priv, int num_leds)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun struct device_node *node = dev->of_node, *child;
252*4882a593Smuzhiyun struct cap11xx_led *led;
253*4882a593Smuzhiyun int cnt = of_get_child_count(node);
254*4882a593Smuzhiyun int error;
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun if (!num_leds || !cnt)
257*4882a593Smuzhiyun return 0;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun if (cnt > num_leds)
260*4882a593Smuzhiyun return -EINVAL;
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun led = devm_kcalloc(dev, cnt, sizeof(struct cap11xx_led), GFP_KERNEL);
263*4882a593Smuzhiyun if (!led)
264*4882a593Smuzhiyun return -ENOMEM;
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun priv->leds = led;
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun error = regmap_update_bits(priv->regmap,
269*4882a593Smuzhiyun CAP11XX_REG_LED_OUTPUT_CONTROL, 0xff, 0);
270*4882a593Smuzhiyun if (error)
271*4882a593Smuzhiyun return error;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun error = regmap_update_bits(priv->regmap, CAP11XX_REG_LED_DUTY_CYCLE_4,
274*4882a593Smuzhiyun CAP11XX_REG_LED_DUTY_MAX_MASK,
275*4882a593Smuzhiyun CAP11XX_REG_LED_DUTY_MAX_VALUE <<
276*4882a593Smuzhiyun CAP11XX_REG_LED_DUTY_MAX_MASK_SHIFT);
277*4882a593Smuzhiyun if (error)
278*4882a593Smuzhiyun return error;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun for_each_child_of_node(node, child) {
281*4882a593Smuzhiyun u32 reg;
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun led->cdev.name =
284*4882a593Smuzhiyun of_get_property(child, "label", NULL) ? : child->name;
285*4882a593Smuzhiyun led->cdev.default_trigger =
286*4882a593Smuzhiyun of_get_property(child, "linux,default-trigger", NULL);
287*4882a593Smuzhiyun led->cdev.flags = 0;
288*4882a593Smuzhiyun led->cdev.brightness_set_blocking = cap11xx_led_set;
289*4882a593Smuzhiyun led->cdev.max_brightness = 1;
290*4882a593Smuzhiyun led->cdev.brightness = LED_OFF;
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun error = of_property_read_u32(child, "reg", ®);
293*4882a593Smuzhiyun if (error != 0 || reg >= num_leds) {
294*4882a593Smuzhiyun of_node_put(child);
295*4882a593Smuzhiyun return -EINVAL;
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun led->reg = reg;
299*4882a593Smuzhiyun led->priv = priv;
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun error = devm_led_classdev_register(dev, &led->cdev);
302*4882a593Smuzhiyun if (error) {
303*4882a593Smuzhiyun of_node_put(child);
304*4882a593Smuzhiyun return error;
305*4882a593Smuzhiyun }
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun priv->num_leds++;
308*4882a593Smuzhiyun led++;
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun return 0;
312*4882a593Smuzhiyun }
313*4882a593Smuzhiyun #else
cap11xx_init_leds(struct device * dev,struct cap11xx_priv * priv,int num_leds)314*4882a593Smuzhiyun static int cap11xx_init_leds(struct device *dev,
315*4882a593Smuzhiyun struct cap11xx_priv *priv, int num_leds)
316*4882a593Smuzhiyun {
317*4882a593Smuzhiyun return 0;
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun #endif
320*4882a593Smuzhiyun
cap11xx_i2c_probe(struct i2c_client * i2c_client,const struct i2c_device_id * id)321*4882a593Smuzhiyun static int cap11xx_i2c_probe(struct i2c_client *i2c_client,
322*4882a593Smuzhiyun const struct i2c_device_id *id)
323*4882a593Smuzhiyun {
324*4882a593Smuzhiyun struct device *dev = &i2c_client->dev;
325*4882a593Smuzhiyun struct cap11xx_priv *priv;
326*4882a593Smuzhiyun struct device_node *node;
327*4882a593Smuzhiyun const struct cap11xx_hw_model *cap;
328*4882a593Smuzhiyun int i, error, irq, gain = 0;
329*4882a593Smuzhiyun unsigned int val, rev;
330*4882a593Smuzhiyun u32 gain32;
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun if (id->driver_data >= ARRAY_SIZE(cap11xx_devices)) {
333*4882a593Smuzhiyun dev_err(dev, "Invalid device ID %lu\n", id->driver_data);
334*4882a593Smuzhiyun return -EINVAL;
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun cap = &cap11xx_devices[id->driver_data];
338*4882a593Smuzhiyun if (!cap || !cap->num_channels) {
339*4882a593Smuzhiyun dev_err(dev, "Invalid device configuration\n");
340*4882a593Smuzhiyun return -EINVAL;
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun priv = devm_kzalloc(dev,
344*4882a593Smuzhiyun struct_size(priv, keycodes, cap->num_channels),
345*4882a593Smuzhiyun GFP_KERNEL);
346*4882a593Smuzhiyun if (!priv)
347*4882a593Smuzhiyun return -ENOMEM;
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun priv->regmap = devm_regmap_init_i2c(i2c_client, &cap11xx_regmap_config);
350*4882a593Smuzhiyun if (IS_ERR(priv->regmap))
351*4882a593Smuzhiyun return PTR_ERR(priv->regmap);
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun error = regmap_read(priv->regmap, CAP11XX_REG_PRODUCT_ID, &val);
354*4882a593Smuzhiyun if (error)
355*4882a593Smuzhiyun return error;
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun if (val != cap->product_id) {
358*4882a593Smuzhiyun dev_err(dev, "Product ID: Got 0x%02x, expected 0x%02x\n",
359*4882a593Smuzhiyun val, cap->product_id);
360*4882a593Smuzhiyun return -ENXIO;
361*4882a593Smuzhiyun }
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun error = regmap_read(priv->regmap, CAP11XX_REG_MANUFACTURER_ID, &val);
364*4882a593Smuzhiyun if (error)
365*4882a593Smuzhiyun return error;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun if (val != CAP11XX_MANUFACTURER_ID) {
368*4882a593Smuzhiyun dev_err(dev, "Manufacturer ID: Got 0x%02x, expected 0x%02x\n",
369*4882a593Smuzhiyun val, CAP11XX_MANUFACTURER_ID);
370*4882a593Smuzhiyun return -ENXIO;
371*4882a593Smuzhiyun }
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun error = regmap_read(priv->regmap, CAP11XX_REG_REVISION, &rev);
374*4882a593Smuzhiyun if (error < 0)
375*4882a593Smuzhiyun return error;
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun dev_info(dev, "CAP11XX detected, revision 0x%02x\n", rev);
378*4882a593Smuzhiyun node = dev->of_node;
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun if (!of_property_read_u32(node, "microchip,sensor-gain", &gain32)) {
381*4882a593Smuzhiyun if (is_power_of_2(gain32) && gain32 <= 8)
382*4882a593Smuzhiyun gain = ilog2(gain32);
383*4882a593Smuzhiyun else
384*4882a593Smuzhiyun dev_err(dev, "Invalid sensor-gain value %d\n", gain32);
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun if (of_property_read_bool(node, "microchip,irq-active-high")) {
388*4882a593Smuzhiyun error = regmap_update_bits(priv->regmap, CAP11XX_REG_CONFIG2,
389*4882a593Smuzhiyun CAP11XX_REG_CONFIG2_ALT_POL, 0);
390*4882a593Smuzhiyun if (error)
391*4882a593Smuzhiyun return error;
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun /* Provide some useful defaults */
395*4882a593Smuzhiyun for (i = 0; i < cap->num_channels; i++)
396*4882a593Smuzhiyun priv->keycodes[i] = KEY_A + i;
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun of_property_read_u32_array(node, "linux,keycodes",
399*4882a593Smuzhiyun priv->keycodes, cap->num_channels);
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun error = regmap_update_bits(priv->regmap, CAP11XX_REG_MAIN_CONTROL,
402*4882a593Smuzhiyun CAP11XX_REG_MAIN_CONTROL_GAIN_MASK,
403*4882a593Smuzhiyun gain << CAP11XX_REG_MAIN_CONTROL_GAIN_SHIFT);
404*4882a593Smuzhiyun if (error)
405*4882a593Smuzhiyun return error;
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun /* Disable autorepeat. The Linux input system has its own handling. */
408*4882a593Smuzhiyun error = regmap_write(priv->regmap, CAP11XX_REG_REPEAT_RATE, 0);
409*4882a593Smuzhiyun if (error)
410*4882a593Smuzhiyun return error;
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun priv->idev = devm_input_allocate_device(dev);
413*4882a593Smuzhiyun if (!priv->idev)
414*4882a593Smuzhiyun return -ENOMEM;
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun priv->idev->name = "CAP11XX capacitive touch sensor";
417*4882a593Smuzhiyun priv->idev->id.bustype = BUS_I2C;
418*4882a593Smuzhiyun priv->idev->evbit[0] = BIT_MASK(EV_KEY);
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun if (of_property_read_bool(node, "autorepeat"))
421*4882a593Smuzhiyun __set_bit(EV_REP, priv->idev->evbit);
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun for (i = 0; i < cap->num_channels; i++)
424*4882a593Smuzhiyun __set_bit(priv->keycodes[i], priv->idev->keybit);
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun __clear_bit(KEY_RESERVED, priv->idev->keybit);
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun priv->idev->keycode = priv->keycodes;
429*4882a593Smuzhiyun priv->idev->keycodesize = sizeof(priv->keycodes[0]);
430*4882a593Smuzhiyun priv->idev->keycodemax = cap->num_channels;
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun priv->idev->id.vendor = CAP11XX_MANUFACTURER_ID;
433*4882a593Smuzhiyun priv->idev->id.product = cap->product_id;
434*4882a593Smuzhiyun priv->idev->id.version = rev;
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun priv->idev->open = cap11xx_input_open;
437*4882a593Smuzhiyun priv->idev->close = cap11xx_input_close;
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun error = cap11xx_init_leds(dev, priv, cap->num_leds);
440*4882a593Smuzhiyun if (error)
441*4882a593Smuzhiyun return error;
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun input_set_drvdata(priv->idev, priv);
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun /*
446*4882a593Smuzhiyun * Put the device in deep sleep mode for now.
447*4882a593Smuzhiyun * ->open() will bring it back once the it is actually needed.
448*4882a593Smuzhiyun */
449*4882a593Smuzhiyun cap11xx_set_sleep(priv, true);
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun error = input_register_device(priv->idev);
452*4882a593Smuzhiyun if (error)
453*4882a593Smuzhiyun return error;
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun irq = irq_of_parse_and_map(node, 0);
456*4882a593Smuzhiyun if (!irq) {
457*4882a593Smuzhiyun dev_err(dev, "Unable to parse or map IRQ\n");
458*4882a593Smuzhiyun return -ENXIO;
459*4882a593Smuzhiyun }
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun error = devm_request_threaded_irq(dev, irq, NULL, cap11xx_thread_func,
462*4882a593Smuzhiyun IRQF_ONESHOT, dev_name(dev), priv);
463*4882a593Smuzhiyun if (error)
464*4882a593Smuzhiyun return error;
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun return 0;
467*4882a593Smuzhiyun }
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun static const struct of_device_id cap11xx_dt_ids[] = {
470*4882a593Smuzhiyun { .compatible = "microchip,cap1106", },
471*4882a593Smuzhiyun { .compatible = "microchip,cap1126", },
472*4882a593Smuzhiyun { .compatible = "microchip,cap1188", },
473*4882a593Smuzhiyun {}
474*4882a593Smuzhiyun };
475*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, cap11xx_dt_ids);
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun static const struct i2c_device_id cap11xx_i2c_ids[] = {
478*4882a593Smuzhiyun { "cap1106", CAP1106 },
479*4882a593Smuzhiyun { "cap1126", CAP1126 },
480*4882a593Smuzhiyun { "cap1188", CAP1188 },
481*4882a593Smuzhiyun {}
482*4882a593Smuzhiyun };
483*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, cap11xx_i2c_ids);
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun static struct i2c_driver cap11xx_i2c_driver = {
486*4882a593Smuzhiyun .driver = {
487*4882a593Smuzhiyun .name = "cap11xx",
488*4882a593Smuzhiyun .of_match_table = cap11xx_dt_ids,
489*4882a593Smuzhiyun },
490*4882a593Smuzhiyun .id_table = cap11xx_i2c_ids,
491*4882a593Smuzhiyun .probe = cap11xx_i2c_probe,
492*4882a593Smuzhiyun };
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun module_i2c_driver(cap11xx_i2c_driver);
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun MODULE_DESCRIPTION("Microchip CAP11XX driver");
497*4882a593Smuzhiyun MODULE_AUTHOR("Daniel Mack <linux@zonque.org>");
498*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
499