1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2012-2016 VMware, Inc. All rights reserved.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or
5*4882a593Smuzhiyun * modify it under the terms of EITHER the GNU General Public License
6*4882a593Smuzhiyun * version 2 as published by the Free Software Foundation or the BSD
7*4882a593Smuzhiyun * 2-Clause License. This program is distributed in the hope that it
8*4882a593Smuzhiyun * will be useful, but WITHOUT ANY WARRANTY; WITHOUT EVEN THE IMPLIED
9*4882a593Smuzhiyun * WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
10*4882a593Smuzhiyun * See the GNU General Public License version 2 for more details at
11*4882a593Smuzhiyun * http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html.
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun * You should have received a copy of the GNU General Public License
14*4882a593Smuzhiyun * along with this program available in the file COPYING in the main
15*4882a593Smuzhiyun * directory of this source tree.
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun * The BSD 2-Clause License
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or
20*4882a593Smuzhiyun * without modification, are permitted provided that the following
21*4882a593Smuzhiyun * conditions are met:
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * - Redistributions of source code must retain the above
24*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
25*4882a593Smuzhiyun * disclaimer.
26*4882a593Smuzhiyun *
27*4882a593Smuzhiyun * - Redistributions in binary form must reproduce the above
28*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
29*4882a593Smuzhiyun * disclaimer in the documentation and/or other materials
30*4882a593Smuzhiyun * provided with the distribution.
31*4882a593Smuzhiyun *
32*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
33*4882a593Smuzhiyun * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
34*4882a593Smuzhiyun * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
35*4882a593Smuzhiyun * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
36*4882a593Smuzhiyun * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
37*4882a593Smuzhiyun * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
38*4882a593Smuzhiyun * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
39*4882a593Smuzhiyun * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40*4882a593Smuzhiyun * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
41*4882a593Smuzhiyun * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
42*4882a593Smuzhiyun * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
43*4882a593Smuzhiyun * OF THE POSSIBILITY OF SUCH DAMAGE.
44*4882a593Smuzhiyun */
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun #include <asm/page.h>
47*4882a593Smuzhiyun #include <linux/io.h>
48*4882a593Smuzhiyun #include <linux/wait.h>
49*4882a593Smuzhiyun #include <rdma/ib_addr.h>
50*4882a593Smuzhiyun #include <rdma/ib_smi.h>
51*4882a593Smuzhiyun #include <rdma/ib_user_verbs.h>
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun #include "pvrdma.h"
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun static void __pvrdma_destroy_qp(struct pvrdma_dev *dev,
56*4882a593Smuzhiyun struct pvrdma_qp *qp);
57*4882a593Smuzhiyun
get_cqs(struct pvrdma_qp * qp,struct pvrdma_cq ** send_cq,struct pvrdma_cq ** recv_cq)58*4882a593Smuzhiyun static inline void get_cqs(struct pvrdma_qp *qp, struct pvrdma_cq **send_cq,
59*4882a593Smuzhiyun struct pvrdma_cq **recv_cq)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun *send_cq = to_vcq(qp->ibqp.send_cq);
62*4882a593Smuzhiyun *recv_cq = to_vcq(qp->ibqp.recv_cq);
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
pvrdma_lock_cqs(struct pvrdma_cq * scq,struct pvrdma_cq * rcq,unsigned long * scq_flags,unsigned long * rcq_flags)65*4882a593Smuzhiyun static void pvrdma_lock_cqs(struct pvrdma_cq *scq, struct pvrdma_cq *rcq,
66*4882a593Smuzhiyun unsigned long *scq_flags,
67*4882a593Smuzhiyun unsigned long *rcq_flags)
68*4882a593Smuzhiyun __acquires(scq->cq_lock) __acquires(rcq->cq_lock)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun if (scq == rcq) {
71*4882a593Smuzhiyun spin_lock_irqsave(&scq->cq_lock, *scq_flags);
72*4882a593Smuzhiyun __acquire(rcq->cq_lock);
73*4882a593Smuzhiyun } else if (scq->cq_handle < rcq->cq_handle) {
74*4882a593Smuzhiyun spin_lock_irqsave(&scq->cq_lock, *scq_flags);
75*4882a593Smuzhiyun spin_lock_irqsave_nested(&rcq->cq_lock, *rcq_flags,
76*4882a593Smuzhiyun SINGLE_DEPTH_NESTING);
77*4882a593Smuzhiyun } else {
78*4882a593Smuzhiyun spin_lock_irqsave(&rcq->cq_lock, *rcq_flags);
79*4882a593Smuzhiyun spin_lock_irqsave_nested(&scq->cq_lock, *scq_flags,
80*4882a593Smuzhiyun SINGLE_DEPTH_NESTING);
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
pvrdma_unlock_cqs(struct pvrdma_cq * scq,struct pvrdma_cq * rcq,unsigned long * scq_flags,unsigned long * rcq_flags)84*4882a593Smuzhiyun static void pvrdma_unlock_cqs(struct pvrdma_cq *scq, struct pvrdma_cq *rcq,
85*4882a593Smuzhiyun unsigned long *scq_flags,
86*4882a593Smuzhiyun unsigned long *rcq_flags)
87*4882a593Smuzhiyun __releases(scq->cq_lock) __releases(rcq->cq_lock)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun if (scq == rcq) {
90*4882a593Smuzhiyun __release(rcq->cq_lock);
91*4882a593Smuzhiyun spin_unlock_irqrestore(&scq->cq_lock, *scq_flags);
92*4882a593Smuzhiyun } else if (scq->cq_handle < rcq->cq_handle) {
93*4882a593Smuzhiyun spin_unlock_irqrestore(&rcq->cq_lock, *rcq_flags);
94*4882a593Smuzhiyun spin_unlock_irqrestore(&scq->cq_lock, *scq_flags);
95*4882a593Smuzhiyun } else {
96*4882a593Smuzhiyun spin_unlock_irqrestore(&scq->cq_lock, *scq_flags);
97*4882a593Smuzhiyun spin_unlock_irqrestore(&rcq->cq_lock, *rcq_flags);
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
pvrdma_reset_qp(struct pvrdma_qp * qp)101*4882a593Smuzhiyun static void pvrdma_reset_qp(struct pvrdma_qp *qp)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun struct pvrdma_cq *scq, *rcq;
104*4882a593Smuzhiyun unsigned long scq_flags, rcq_flags;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun /* Clean up cqes */
107*4882a593Smuzhiyun get_cqs(qp, &scq, &rcq);
108*4882a593Smuzhiyun pvrdma_lock_cqs(scq, rcq, &scq_flags, &rcq_flags);
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun _pvrdma_flush_cqe(qp, scq);
111*4882a593Smuzhiyun if (scq != rcq)
112*4882a593Smuzhiyun _pvrdma_flush_cqe(qp, rcq);
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun pvrdma_unlock_cqs(scq, rcq, &scq_flags, &rcq_flags);
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun /*
117*4882a593Smuzhiyun * Reset queuepair. The checks are because usermode queuepairs won't
118*4882a593Smuzhiyun * have kernel ringstates.
119*4882a593Smuzhiyun */
120*4882a593Smuzhiyun if (qp->rq.ring) {
121*4882a593Smuzhiyun atomic_set(&qp->rq.ring->cons_head, 0);
122*4882a593Smuzhiyun atomic_set(&qp->rq.ring->prod_tail, 0);
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun if (qp->sq.ring) {
125*4882a593Smuzhiyun atomic_set(&qp->sq.ring->cons_head, 0);
126*4882a593Smuzhiyun atomic_set(&qp->sq.ring->prod_tail, 0);
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun
pvrdma_set_rq_size(struct pvrdma_dev * dev,struct ib_qp_cap * req_cap,struct pvrdma_qp * qp)130*4882a593Smuzhiyun static int pvrdma_set_rq_size(struct pvrdma_dev *dev,
131*4882a593Smuzhiyun struct ib_qp_cap *req_cap,
132*4882a593Smuzhiyun struct pvrdma_qp *qp)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun if (req_cap->max_recv_wr > dev->dsr->caps.max_qp_wr ||
135*4882a593Smuzhiyun req_cap->max_recv_sge > dev->dsr->caps.max_sge) {
136*4882a593Smuzhiyun dev_warn(&dev->pdev->dev, "recv queue size invalid\n");
137*4882a593Smuzhiyun return -EINVAL;
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun qp->rq.wqe_cnt = roundup_pow_of_two(max(1U, req_cap->max_recv_wr));
141*4882a593Smuzhiyun qp->rq.max_sg = roundup_pow_of_two(max(1U, req_cap->max_recv_sge));
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun /* Write back */
144*4882a593Smuzhiyun req_cap->max_recv_wr = qp->rq.wqe_cnt;
145*4882a593Smuzhiyun req_cap->max_recv_sge = qp->rq.max_sg;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun qp->rq.wqe_size = roundup_pow_of_two(sizeof(struct pvrdma_rq_wqe_hdr) +
148*4882a593Smuzhiyun sizeof(struct pvrdma_sge) *
149*4882a593Smuzhiyun qp->rq.max_sg);
150*4882a593Smuzhiyun qp->npages_recv = (qp->rq.wqe_cnt * qp->rq.wqe_size + PAGE_SIZE - 1) /
151*4882a593Smuzhiyun PAGE_SIZE;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun return 0;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
pvrdma_set_sq_size(struct pvrdma_dev * dev,struct ib_qp_cap * req_cap,struct pvrdma_qp * qp)156*4882a593Smuzhiyun static int pvrdma_set_sq_size(struct pvrdma_dev *dev, struct ib_qp_cap *req_cap,
157*4882a593Smuzhiyun struct pvrdma_qp *qp)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun if (req_cap->max_send_wr > dev->dsr->caps.max_qp_wr ||
160*4882a593Smuzhiyun req_cap->max_send_sge > dev->dsr->caps.max_sge) {
161*4882a593Smuzhiyun dev_warn(&dev->pdev->dev, "send queue size invalid\n");
162*4882a593Smuzhiyun return -EINVAL;
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun qp->sq.wqe_cnt = roundup_pow_of_two(max(1U, req_cap->max_send_wr));
166*4882a593Smuzhiyun qp->sq.max_sg = roundup_pow_of_two(max(1U, req_cap->max_send_sge));
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun /* Write back */
169*4882a593Smuzhiyun req_cap->max_send_wr = qp->sq.wqe_cnt;
170*4882a593Smuzhiyun req_cap->max_send_sge = qp->sq.max_sg;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun qp->sq.wqe_size = roundup_pow_of_two(sizeof(struct pvrdma_sq_wqe_hdr) +
173*4882a593Smuzhiyun sizeof(struct pvrdma_sge) *
174*4882a593Smuzhiyun qp->sq.max_sg);
175*4882a593Smuzhiyun /* Note: one extra page for the header. */
176*4882a593Smuzhiyun qp->npages_send = PVRDMA_QP_NUM_HEADER_PAGES +
177*4882a593Smuzhiyun (qp->sq.wqe_cnt * qp->sq.wqe_size + PAGE_SIZE - 1) /
178*4882a593Smuzhiyun PAGE_SIZE;
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun return 0;
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun /**
184*4882a593Smuzhiyun * pvrdma_create_qp - create queue pair
185*4882a593Smuzhiyun * @pd: protection domain
186*4882a593Smuzhiyun * @init_attr: queue pair attributes
187*4882a593Smuzhiyun * @udata: user data
188*4882a593Smuzhiyun *
189*4882a593Smuzhiyun * @return: the ib_qp pointer on success, otherwise returns an errno.
190*4882a593Smuzhiyun */
pvrdma_create_qp(struct ib_pd * pd,struct ib_qp_init_attr * init_attr,struct ib_udata * udata)191*4882a593Smuzhiyun struct ib_qp *pvrdma_create_qp(struct ib_pd *pd,
192*4882a593Smuzhiyun struct ib_qp_init_attr *init_attr,
193*4882a593Smuzhiyun struct ib_udata *udata)
194*4882a593Smuzhiyun {
195*4882a593Smuzhiyun struct pvrdma_qp *qp = NULL;
196*4882a593Smuzhiyun struct pvrdma_dev *dev = to_vdev(pd->device);
197*4882a593Smuzhiyun union pvrdma_cmd_req req;
198*4882a593Smuzhiyun union pvrdma_cmd_resp rsp;
199*4882a593Smuzhiyun struct pvrdma_cmd_create_qp *cmd = &req.create_qp;
200*4882a593Smuzhiyun struct pvrdma_cmd_create_qp_resp *resp = &rsp.create_qp_resp;
201*4882a593Smuzhiyun struct pvrdma_cmd_create_qp_resp_v2 *resp_v2 = &rsp.create_qp_resp_v2;
202*4882a593Smuzhiyun struct pvrdma_create_qp ucmd;
203*4882a593Smuzhiyun struct pvrdma_create_qp_resp qp_resp = {};
204*4882a593Smuzhiyun unsigned long flags;
205*4882a593Smuzhiyun int ret;
206*4882a593Smuzhiyun bool is_srq = !!init_attr->srq;
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun if (init_attr->create_flags) {
209*4882a593Smuzhiyun dev_warn(&dev->pdev->dev,
210*4882a593Smuzhiyun "invalid create queuepair flags %#x\n",
211*4882a593Smuzhiyun init_attr->create_flags);
212*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun if (init_attr->qp_type != IB_QPT_RC &&
216*4882a593Smuzhiyun init_attr->qp_type != IB_QPT_UD &&
217*4882a593Smuzhiyun init_attr->qp_type != IB_QPT_GSI) {
218*4882a593Smuzhiyun dev_warn(&dev->pdev->dev, "queuepair type %d not supported\n",
219*4882a593Smuzhiyun init_attr->qp_type);
220*4882a593Smuzhiyun return ERR_PTR(-EOPNOTSUPP);
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun if (is_srq && !dev->dsr->caps.max_srq) {
224*4882a593Smuzhiyun dev_warn(&dev->pdev->dev,
225*4882a593Smuzhiyun "SRQs not supported by device\n");
226*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun if (!atomic_add_unless(&dev->num_qps, 1, dev->dsr->caps.max_qp))
230*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun switch (init_attr->qp_type) {
233*4882a593Smuzhiyun case IB_QPT_GSI:
234*4882a593Smuzhiyun if (init_attr->port_num == 0 ||
235*4882a593Smuzhiyun init_attr->port_num > pd->device->phys_port_cnt) {
236*4882a593Smuzhiyun dev_warn(&dev->pdev->dev, "invalid queuepair attrs\n");
237*4882a593Smuzhiyun ret = -EINVAL;
238*4882a593Smuzhiyun goto err_qp;
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun fallthrough;
241*4882a593Smuzhiyun case IB_QPT_RC:
242*4882a593Smuzhiyun case IB_QPT_UD:
243*4882a593Smuzhiyun qp = kzalloc(sizeof(*qp), GFP_KERNEL);
244*4882a593Smuzhiyun if (!qp) {
245*4882a593Smuzhiyun ret = -ENOMEM;
246*4882a593Smuzhiyun goto err_qp;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun spin_lock_init(&qp->sq.lock);
250*4882a593Smuzhiyun spin_lock_init(&qp->rq.lock);
251*4882a593Smuzhiyun mutex_init(&qp->mutex);
252*4882a593Smuzhiyun refcount_set(&qp->refcnt, 1);
253*4882a593Smuzhiyun init_completion(&qp->free);
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun qp->state = IB_QPS_RESET;
256*4882a593Smuzhiyun qp->is_kernel = !udata;
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun if (!qp->is_kernel) {
259*4882a593Smuzhiyun dev_dbg(&dev->pdev->dev,
260*4882a593Smuzhiyun "create queuepair from user space\n");
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) {
263*4882a593Smuzhiyun ret = -EFAULT;
264*4882a593Smuzhiyun goto err_qp;
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun /* Userspace supports qpn and qp handles? */
268*4882a593Smuzhiyun if (dev->dsr_version >= PVRDMA_QPHANDLE_VERSION &&
269*4882a593Smuzhiyun udata->outlen < sizeof(qp_resp)) {
270*4882a593Smuzhiyun dev_warn(&dev->pdev->dev,
271*4882a593Smuzhiyun "create queuepair not supported\n");
272*4882a593Smuzhiyun ret = -EOPNOTSUPP;
273*4882a593Smuzhiyun goto err_qp;
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun if (!is_srq) {
277*4882a593Smuzhiyun /* set qp->sq.wqe_cnt, shift, buf_size.. */
278*4882a593Smuzhiyun qp->rumem =
279*4882a593Smuzhiyun ib_umem_get(pd->device, ucmd.rbuf_addr,
280*4882a593Smuzhiyun ucmd.rbuf_size, 0);
281*4882a593Smuzhiyun if (IS_ERR(qp->rumem)) {
282*4882a593Smuzhiyun ret = PTR_ERR(qp->rumem);
283*4882a593Smuzhiyun goto err_qp;
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun qp->srq = NULL;
286*4882a593Smuzhiyun } else {
287*4882a593Smuzhiyun qp->rumem = NULL;
288*4882a593Smuzhiyun qp->srq = to_vsrq(init_attr->srq);
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun qp->sumem = ib_umem_get(pd->device, ucmd.sbuf_addr,
292*4882a593Smuzhiyun ucmd.sbuf_size, 0);
293*4882a593Smuzhiyun if (IS_ERR(qp->sumem)) {
294*4882a593Smuzhiyun if (!is_srq)
295*4882a593Smuzhiyun ib_umem_release(qp->rumem);
296*4882a593Smuzhiyun ret = PTR_ERR(qp->sumem);
297*4882a593Smuzhiyun goto err_qp;
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun qp->npages_send =
301*4882a593Smuzhiyun ib_umem_num_dma_blocks(qp->sumem, PAGE_SIZE);
302*4882a593Smuzhiyun if (!is_srq)
303*4882a593Smuzhiyun qp->npages_recv = ib_umem_num_dma_blocks(
304*4882a593Smuzhiyun qp->rumem, PAGE_SIZE);
305*4882a593Smuzhiyun else
306*4882a593Smuzhiyun qp->npages_recv = 0;
307*4882a593Smuzhiyun qp->npages = qp->npages_send + qp->npages_recv;
308*4882a593Smuzhiyun } else {
309*4882a593Smuzhiyun ret = pvrdma_set_sq_size(to_vdev(pd->device),
310*4882a593Smuzhiyun &init_attr->cap, qp);
311*4882a593Smuzhiyun if (ret)
312*4882a593Smuzhiyun goto err_qp;
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun ret = pvrdma_set_rq_size(to_vdev(pd->device),
315*4882a593Smuzhiyun &init_attr->cap, qp);
316*4882a593Smuzhiyun if (ret)
317*4882a593Smuzhiyun goto err_qp;
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun qp->npages = qp->npages_send + qp->npages_recv;
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun /* Skip header page. */
322*4882a593Smuzhiyun qp->sq.offset = PVRDMA_QP_NUM_HEADER_PAGES * PAGE_SIZE;
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun /* Recv queue pages are after send pages. */
325*4882a593Smuzhiyun qp->rq.offset = qp->npages_send * PAGE_SIZE;
326*4882a593Smuzhiyun }
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun if (qp->npages < 0 || qp->npages > PVRDMA_PAGE_DIR_MAX_PAGES) {
329*4882a593Smuzhiyun dev_warn(&dev->pdev->dev,
330*4882a593Smuzhiyun "overflow pages in queuepair\n");
331*4882a593Smuzhiyun ret = -EINVAL;
332*4882a593Smuzhiyun goto err_umem;
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun ret = pvrdma_page_dir_init(dev, &qp->pdir, qp->npages,
336*4882a593Smuzhiyun qp->is_kernel);
337*4882a593Smuzhiyun if (ret) {
338*4882a593Smuzhiyun dev_warn(&dev->pdev->dev,
339*4882a593Smuzhiyun "could not allocate page directory\n");
340*4882a593Smuzhiyun goto err_umem;
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun if (!qp->is_kernel) {
344*4882a593Smuzhiyun pvrdma_page_dir_insert_umem(&qp->pdir, qp->sumem, 0);
345*4882a593Smuzhiyun if (!is_srq)
346*4882a593Smuzhiyun pvrdma_page_dir_insert_umem(&qp->pdir,
347*4882a593Smuzhiyun qp->rumem,
348*4882a593Smuzhiyun qp->npages_send);
349*4882a593Smuzhiyun } else {
350*4882a593Smuzhiyun /* Ring state is always the first page. */
351*4882a593Smuzhiyun qp->sq.ring = qp->pdir.pages[0];
352*4882a593Smuzhiyun qp->rq.ring = is_srq ? NULL : &qp->sq.ring[1];
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun break;
355*4882a593Smuzhiyun default:
356*4882a593Smuzhiyun ret = -EINVAL;
357*4882a593Smuzhiyun goto err_qp;
358*4882a593Smuzhiyun }
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun /* Not supported */
361*4882a593Smuzhiyun init_attr->cap.max_inline_data = 0;
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun memset(cmd, 0, sizeof(*cmd));
364*4882a593Smuzhiyun cmd->hdr.cmd = PVRDMA_CMD_CREATE_QP;
365*4882a593Smuzhiyun cmd->pd_handle = to_vpd(pd)->pd_handle;
366*4882a593Smuzhiyun cmd->send_cq_handle = to_vcq(init_attr->send_cq)->cq_handle;
367*4882a593Smuzhiyun cmd->recv_cq_handle = to_vcq(init_attr->recv_cq)->cq_handle;
368*4882a593Smuzhiyun if (is_srq)
369*4882a593Smuzhiyun cmd->srq_handle = to_vsrq(init_attr->srq)->srq_handle;
370*4882a593Smuzhiyun else
371*4882a593Smuzhiyun cmd->srq_handle = 0;
372*4882a593Smuzhiyun cmd->max_send_wr = init_attr->cap.max_send_wr;
373*4882a593Smuzhiyun cmd->max_recv_wr = init_attr->cap.max_recv_wr;
374*4882a593Smuzhiyun cmd->max_send_sge = init_attr->cap.max_send_sge;
375*4882a593Smuzhiyun cmd->max_recv_sge = init_attr->cap.max_recv_sge;
376*4882a593Smuzhiyun cmd->max_inline_data = init_attr->cap.max_inline_data;
377*4882a593Smuzhiyun cmd->sq_sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0;
378*4882a593Smuzhiyun cmd->qp_type = ib_qp_type_to_pvrdma(init_attr->qp_type);
379*4882a593Smuzhiyun cmd->is_srq = is_srq;
380*4882a593Smuzhiyun cmd->lkey = 0;
381*4882a593Smuzhiyun cmd->access_flags = IB_ACCESS_LOCAL_WRITE;
382*4882a593Smuzhiyun cmd->total_chunks = qp->npages;
383*4882a593Smuzhiyun cmd->send_chunks = qp->npages_send - PVRDMA_QP_NUM_HEADER_PAGES;
384*4882a593Smuzhiyun cmd->pdir_dma = qp->pdir.dir_dma;
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun dev_dbg(&dev->pdev->dev, "create queuepair with %d, %d, %d, %d\n",
387*4882a593Smuzhiyun cmd->max_send_wr, cmd->max_recv_wr, cmd->max_send_sge,
388*4882a593Smuzhiyun cmd->max_recv_sge);
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun ret = pvrdma_cmd_post(dev, &req, &rsp, PVRDMA_CMD_CREATE_QP_RESP);
391*4882a593Smuzhiyun if (ret < 0) {
392*4882a593Smuzhiyun dev_warn(&dev->pdev->dev,
393*4882a593Smuzhiyun "could not create queuepair, error: %d\n", ret);
394*4882a593Smuzhiyun goto err_pdir;
395*4882a593Smuzhiyun }
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun /* max_send_wr/_recv_wr/_send_sge/_recv_sge/_inline_data */
398*4882a593Smuzhiyun qp->port = init_attr->port_num;
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun if (dev->dsr_version >= PVRDMA_QPHANDLE_VERSION) {
401*4882a593Smuzhiyun qp->ibqp.qp_num = resp_v2->qpn;
402*4882a593Smuzhiyun qp->qp_handle = resp_v2->qp_handle;
403*4882a593Smuzhiyun } else {
404*4882a593Smuzhiyun qp->ibqp.qp_num = resp->qpn;
405*4882a593Smuzhiyun qp->qp_handle = resp->qpn;
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun spin_lock_irqsave(&dev->qp_tbl_lock, flags);
409*4882a593Smuzhiyun dev->qp_tbl[qp->qp_handle % dev->dsr->caps.max_qp] = qp;
410*4882a593Smuzhiyun spin_unlock_irqrestore(&dev->qp_tbl_lock, flags);
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun if (udata) {
413*4882a593Smuzhiyun qp_resp.qpn = qp->ibqp.qp_num;
414*4882a593Smuzhiyun qp_resp.qp_handle = qp->qp_handle;
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun if (ib_copy_to_udata(udata, &qp_resp,
417*4882a593Smuzhiyun min(udata->outlen, sizeof(qp_resp)))) {
418*4882a593Smuzhiyun dev_warn(&dev->pdev->dev,
419*4882a593Smuzhiyun "failed to copy back udata\n");
420*4882a593Smuzhiyun __pvrdma_destroy_qp(dev, qp);
421*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun }
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun return &qp->ibqp;
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun err_pdir:
428*4882a593Smuzhiyun pvrdma_page_dir_cleanup(dev, &qp->pdir);
429*4882a593Smuzhiyun err_umem:
430*4882a593Smuzhiyun ib_umem_release(qp->rumem);
431*4882a593Smuzhiyun ib_umem_release(qp->sumem);
432*4882a593Smuzhiyun err_qp:
433*4882a593Smuzhiyun kfree(qp);
434*4882a593Smuzhiyun atomic_dec(&dev->num_qps);
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun return ERR_PTR(ret);
437*4882a593Smuzhiyun }
438*4882a593Smuzhiyun
_pvrdma_free_qp(struct pvrdma_qp * qp)439*4882a593Smuzhiyun static void _pvrdma_free_qp(struct pvrdma_qp *qp)
440*4882a593Smuzhiyun {
441*4882a593Smuzhiyun unsigned long flags;
442*4882a593Smuzhiyun struct pvrdma_dev *dev = to_vdev(qp->ibqp.device);
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun spin_lock_irqsave(&dev->qp_tbl_lock, flags);
445*4882a593Smuzhiyun dev->qp_tbl[qp->qp_handle] = NULL;
446*4882a593Smuzhiyun spin_unlock_irqrestore(&dev->qp_tbl_lock, flags);
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun if (refcount_dec_and_test(&qp->refcnt))
449*4882a593Smuzhiyun complete(&qp->free);
450*4882a593Smuzhiyun wait_for_completion(&qp->free);
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun ib_umem_release(qp->rumem);
453*4882a593Smuzhiyun ib_umem_release(qp->sumem);
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun pvrdma_page_dir_cleanup(dev, &qp->pdir);
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun kfree(qp);
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun atomic_dec(&dev->num_qps);
460*4882a593Smuzhiyun }
461*4882a593Smuzhiyun
pvrdma_free_qp(struct pvrdma_qp * qp)462*4882a593Smuzhiyun static void pvrdma_free_qp(struct pvrdma_qp *qp)
463*4882a593Smuzhiyun {
464*4882a593Smuzhiyun struct pvrdma_cq *scq;
465*4882a593Smuzhiyun struct pvrdma_cq *rcq;
466*4882a593Smuzhiyun unsigned long scq_flags, rcq_flags;
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun /* In case cq is polling */
469*4882a593Smuzhiyun get_cqs(qp, &scq, &rcq);
470*4882a593Smuzhiyun pvrdma_lock_cqs(scq, rcq, &scq_flags, &rcq_flags);
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun _pvrdma_flush_cqe(qp, scq);
473*4882a593Smuzhiyun if (scq != rcq)
474*4882a593Smuzhiyun _pvrdma_flush_cqe(qp, rcq);
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun /*
477*4882a593Smuzhiyun * We're now unlocking the CQs before clearing out the qp handle this
478*4882a593Smuzhiyun * should still be safe. We have destroyed the backend QP and flushed
479*4882a593Smuzhiyun * the CQEs so there should be no other completions for this QP.
480*4882a593Smuzhiyun */
481*4882a593Smuzhiyun pvrdma_unlock_cqs(scq, rcq, &scq_flags, &rcq_flags);
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun _pvrdma_free_qp(qp);
484*4882a593Smuzhiyun }
485*4882a593Smuzhiyun
_pvrdma_destroy_qp_work(struct pvrdma_dev * dev,u32 qp_handle)486*4882a593Smuzhiyun static inline void _pvrdma_destroy_qp_work(struct pvrdma_dev *dev,
487*4882a593Smuzhiyun u32 qp_handle)
488*4882a593Smuzhiyun {
489*4882a593Smuzhiyun union pvrdma_cmd_req req;
490*4882a593Smuzhiyun struct pvrdma_cmd_destroy_qp *cmd = &req.destroy_qp;
491*4882a593Smuzhiyun int ret;
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun memset(cmd, 0, sizeof(*cmd));
494*4882a593Smuzhiyun cmd->hdr.cmd = PVRDMA_CMD_DESTROY_QP;
495*4882a593Smuzhiyun cmd->qp_handle = qp_handle;
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun ret = pvrdma_cmd_post(dev, &req, NULL, 0);
498*4882a593Smuzhiyun if (ret < 0)
499*4882a593Smuzhiyun dev_warn(&dev->pdev->dev,
500*4882a593Smuzhiyun "destroy queuepair failed, error: %d\n", ret);
501*4882a593Smuzhiyun }
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun /**
504*4882a593Smuzhiyun * pvrdma_destroy_qp - destroy a queue pair
505*4882a593Smuzhiyun * @qp: the queue pair to destroy
506*4882a593Smuzhiyun * @udata: user data or null for kernel object
507*4882a593Smuzhiyun *
508*4882a593Smuzhiyun * @return: always 0.
509*4882a593Smuzhiyun */
pvrdma_destroy_qp(struct ib_qp * qp,struct ib_udata * udata)510*4882a593Smuzhiyun int pvrdma_destroy_qp(struct ib_qp *qp, struct ib_udata *udata)
511*4882a593Smuzhiyun {
512*4882a593Smuzhiyun struct pvrdma_qp *vqp = to_vqp(qp);
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun _pvrdma_destroy_qp_work(to_vdev(qp->device), vqp->qp_handle);
515*4882a593Smuzhiyun pvrdma_free_qp(vqp);
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun return 0;
518*4882a593Smuzhiyun }
519*4882a593Smuzhiyun
__pvrdma_destroy_qp(struct pvrdma_dev * dev,struct pvrdma_qp * qp)520*4882a593Smuzhiyun static void __pvrdma_destroy_qp(struct pvrdma_dev *dev,
521*4882a593Smuzhiyun struct pvrdma_qp *qp)
522*4882a593Smuzhiyun {
523*4882a593Smuzhiyun _pvrdma_destroy_qp_work(dev, qp->qp_handle);
524*4882a593Smuzhiyun _pvrdma_free_qp(qp);
525*4882a593Smuzhiyun }
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun /**
528*4882a593Smuzhiyun * pvrdma_modify_qp - modify queue pair attributes
529*4882a593Smuzhiyun * @ibqp: the queue pair
530*4882a593Smuzhiyun * @attr: the new queue pair's attributes
531*4882a593Smuzhiyun * @attr_mask: attributes mask
532*4882a593Smuzhiyun * @udata: user data
533*4882a593Smuzhiyun *
534*4882a593Smuzhiyun * @returns 0 on success, otherwise returns an errno.
535*4882a593Smuzhiyun */
pvrdma_modify_qp(struct ib_qp * ibqp,struct ib_qp_attr * attr,int attr_mask,struct ib_udata * udata)536*4882a593Smuzhiyun int pvrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
537*4882a593Smuzhiyun int attr_mask, struct ib_udata *udata)
538*4882a593Smuzhiyun {
539*4882a593Smuzhiyun struct pvrdma_dev *dev = to_vdev(ibqp->device);
540*4882a593Smuzhiyun struct pvrdma_qp *qp = to_vqp(ibqp);
541*4882a593Smuzhiyun union pvrdma_cmd_req req;
542*4882a593Smuzhiyun union pvrdma_cmd_resp rsp;
543*4882a593Smuzhiyun struct pvrdma_cmd_modify_qp *cmd = &req.modify_qp;
544*4882a593Smuzhiyun enum ib_qp_state cur_state, next_state;
545*4882a593Smuzhiyun int ret;
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun /* Sanity checking. Should need lock here */
548*4882a593Smuzhiyun mutex_lock(&qp->mutex);
549*4882a593Smuzhiyun cur_state = (attr_mask & IB_QP_CUR_STATE) ? attr->cur_qp_state :
550*4882a593Smuzhiyun qp->state;
551*4882a593Smuzhiyun next_state = (attr_mask & IB_QP_STATE) ? attr->qp_state : cur_state;
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun if (!ib_modify_qp_is_ok(cur_state, next_state, ibqp->qp_type,
554*4882a593Smuzhiyun attr_mask)) {
555*4882a593Smuzhiyun ret = -EINVAL;
556*4882a593Smuzhiyun goto out;
557*4882a593Smuzhiyun }
558*4882a593Smuzhiyun
559*4882a593Smuzhiyun if (attr_mask & IB_QP_PORT) {
560*4882a593Smuzhiyun if (attr->port_num == 0 ||
561*4882a593Smuzhiyun attr->port_num > ibqp->device->phys_port_cnt) {
562*4882a593Smuzhiyun ret = -EINVAL;
563*4882a593Smuzhiyun goto out;
564*4882a593Smuzhiyun }
565*4882a593Smuzhiyun }
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun if (attr_mask & IB_QP_MIN_RNR_TIMER) {
568*4882a593Smuzhiyun if (attr->min_rnr_timer > 31) {
569*4882a593Smuzhiyun ret = -EINVAL;
570*4882a593Smuzhiyun goto out;
571*4882a593Smuzhiyun }
572*4882a593Smuzhiyun }
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun if (attr_mask & IB_QP_PKEY_INDEX) {
575*4882a593Smuzhiyun if (attr->pkey_index >= dev->dsr->caps.max_pkeys) {
576*4882a593Smuzhiyun ret = -EINVAL;
577*4882a593Smuzhiyun goto out;
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun if (attr_mask & IB_QP_QKEY)
582*4882a593Smuzhiyun qp->qkey = attr->qkey;
583*4882a593Smuzhiyun
584*4882a593Smuzhiyun if (cur_state == next_state && cur_state == IB_QPS_RESET) {
585*4882a593Smuzhiyun ret = 0;
586*4882a593Smuzhiyun goto out;
587*4882a593Smuzhiyun }
588*4882a593Smuzhiyun
589*4882a593Smuzhiyun qp->state = next_state;
590*4882a593Smuzhiyun memset(cmd, 0, sizeof(*cmd));
591*4882a593Smuzhiyun cmd->hdr.cmd = PVRDMA_CMD_MODIFY_QP;
592*4882a593Smuzhiyun cmd->qp_handle = qp->qp_handle;
593*4882a593Smuzhiyun cmd->attr_mask = ib_qp_attr_mask_to_pvrdma(attr_mask);
594*4882a593Smuzhiyun cmd->attrs.qp_state = ib_qp_state_to_pvrdma(attr->qp_state);
595*4882a593Smuzhiyun cmd->attrs.cur_qp_state =
596*4882a593Smuzhiyun ib_qp_state_to_pvrdma(attr->cur_qp_state);
597*4882a593Smuzhiyun cmd->attrs.path_mtu = ib_mtu_to_pvrdma(attr->path_mtu);
598*4882a593Smuzhiyun cmd->attrs.path_mig_state =
599*4882a593Smuzhiyun ib_mig_state_to_pvrdma(attr->path_mig_state);
600*4882a593Smuzhiyun cmd->attrs.qkey = attr->qkey;
601*4882a593Smuzhiyun cmd->attrs.rq_psn = attr->rq_psn;
602*4882a593Smuzhiyun cmd->attrs.sq_psn = attr->sq_psn;
603*4882a593Smuzhiyun cmd->attrs.dest_qp_num = attr->dest_qp_num;
604*4882a593Smuzhiyun cmd->attrs.qp_access_flags =
605*4882a593Smuzhiyun ib_access_flags_to_pvrdma(attr->qp_access_flags);
606*4882a593Smuzhiyun cmd->attrs.pkey_index = attr->pkey_index;
607*4882a593Smuzhiyun cmd->attrs.alt_pkey_index = attr->alt_pkey_index;
608*4882a593Smuzhiyun cmd->attrs.en_sqd_async_notify = attr->en_sqd_async_notify;
609*4882a593Smuzhiyun cmd->attrs.sq_draining = attr->sq_draining;
610*4882a593Smuzhiyun cmd->attrs.max_rd_atomic = attr->max_rd_atomic;
611*4882a593Smuzhiyun cmd->attrs.max_dest_rd_atomic = attr->max_dest_rd_atomic;
612*4882a593Smuzhiyun cmd->attrs.min_rnr_timer = attr->min_rnr_timer;
613*4882a593Smuzhiyun cmd->attrs.port_num = attr->port_num;
614*4882a593Smuzhiyun cmd->attrs.timeout = attr->timeout;
615*4882a593Smuzhiyun cmd->attrs.retry_cnt = attr->retry_cnt;
616*4882a593Smuzhiyun cmd->attrs.rnr_retry = attr->rnr_retry;
617*4882a593Smuzhiyun cmd->attrs.alt_port_num = attr->alt_port_num;
618*4882a593Smuzhiyun cmd->attrs.alt_timeout = attr->alt_timeout;
619*4882a593Smuzhiyun ib_qp_cap_to_pvrdma(&cmd->attrs.cap, &attr->cap);
620*4882a593Smuzhiyun rdma_ah_attr_to_pvrdma(&cmd->attrs.ah_attr, &attr->ah_attr);
621*4882a593Smuzhiyun rdma_ah_attr_to_pvrdma(&cmd->attrs.alt_ah_attr, &attr->alt_ah_attr);
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun ret = pvrdma_cmd_post(dev, &req, &rsp, PVRDMA_CMD_MODIFY_QP_RESP);
624*4882a593Smuzhiyun if (ret < 0) {
625*4882a593Smuzhiyun dev_warn(&dev->pdev->dev,
626*4882a593Smuzhiyun "could not modify queuepair, error: %d\n", ret);
627*4882a593Smuzhiyun } else if (rsp.hdr.err > 0) {
628*4882a593Smuzhiyun dev_warn(&dev->pdev->dev,
629*4882a593Smuzhiyun "cannot modify queuepair, error: %d\n", rsp.hdr.err);
630*4882a593Smuzhiyun ret = -EINVAL;
631*4882a593Smuzhiyun }
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun if (ret == 0 && next_state == IB_QPS_RESET)
634*4882a593Smuzhiyun pvrdma_reset_qp(qp);
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun out:
637*4882a593Smuzhiyun mutex_unlock(&qp->mutex);
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun return ret;
640*4882a593Smuzhiyun }
641*4882a593Smuzhiyun
get_sq_wqe(struct pvrdma_qp * qp,unsigned int n)642*4882a593Smuzhiyun static inline void *get_sq_wqe(struct pvrdma_qp *qp, unsigned int n)
643*4882a593Smuzhiyun {
644*4882a593Smuzhiyun return pvrdma_page_dir_get_ptr(&qp->pdir,
645*4882a593Smuzhiyun qp->sq.offset + n * qp->sq.wqe_size);
646*4882a593Smuzhiyun }
647*4882a593Smuzhiyun
get_rq_wqe(struct pvrdma_qp * qp,unsigned int n)648*4882a593Smuzhiyun static inline void *get_rq_wqe(struct pvrdma_qp *qp, unsigned int n)
649*4882a593Smuzhiyun {
650*4882a593Smuzhiyun return pvrdma_page_dir_get_ptr(&qp->pdir,
651*4882a593Smuzhiyun qp->rq.offset + n * qp->rq.wqe_size);
652*4882a593Smuzhiyun }
653*4882a593Smuzhiyun
set_reg_seg(struct pvrdma_sq_wqe_hdr * wqe_hdr,const struct ib_reg_wr * wr)654*4882a593Smuzhiyun static int set_reg_seg(struct pvrdma_sq_wqe_hdr *wqe_hdr,
655*4882a593Smuzhiyun const struct ib_reg_wr *wr)
656*4882a593Smuzhiyun {
657*4882a593Smuzhiyun struct pvrdma_user_mr *mr = to_vmr(wr->mr);
658*4882a593Smuzhiyun
659*4882a593Smuzhiyun wqe_hdr->wr.fast_reg.iova_start = mr->ibmr.iova;
660*4882a593Smuzhiyun wqe_hdr->wr.fast_reg.pl_pdir_dma = mr->pdir.dir_dma;
661*4882a593Smuzhiyun wqe_hdr->wr.fast_reg.page_shift = mr->page_shift;
662*4882a593Smuzhiyun wqe_hdr->wr.fast_reg.page_list_len = mr->npages;
663*4882a593Smuzhiyun wqe_hdr->wr.fast_reg.length = mr->ibmr.length;
664*4882a593Smuzhiyun wqe_hdr->wr.fast_reg.access_flags = wr->access;
665*4882a593Smuzhiyun wqe_hdr->wr.fast_reg.rkey = wr->key;
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun return pvrdma_page_dir_insert_page_list(&mr->pdir, mr->pages,
668*4882a593Smuzhiyun mr->npages);
669*4882a593Smuzhiyun }
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun /**
672*4882a593Smuzhiyun * pvrdma_post_send - post send work request entries on a QP
673*4882a593Smuzhiyun * @ibqp: the QP
674*4882a593Smuzhiyun * @wr: work request list to post
675*4882a593Smuzhiyun * @bad_wr: the first bad WR returned
676*4882a593Smuzhiyun *
677*4882a593Smuzhiyun * @return: 0 on success, otherwise errno returned.
678*4882a593Smuzhiyun */
pvrdma_post_send(struct ib_qp * ibqp,const struct ib_send_wr * wr,const struct ib_send_wr ** bad_wr)679*4882a593Smuzhiyun int pvrdma_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr,
680*4882a593Smuzhiyun const struct ib_send_wr **bad_wr)
681*4882a593Smuzhiyun {
682*4882a593Smuzhiyun struct pvrdma_qp *qp = to_vqp(ibqp);
683*4882a593Smuzhiyun struct pvrdma_dev *dev = to_vdev(ibqp->device);
684*4882a593Smuzhiyun unsigned long flags;
685*4882a593Smuzhiyun struct pvrdma_sq_wqe_hdr *wqe_hdr;
686*4882a593Smuzhiyun struct pvrdma_sge *sge;
687*4882a593Smuzhiyun int i, ret;
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun /*
690*4882a593Smuzhiyun * In states lower than RTS, we can fail immediately. In other states,
691*4882a593Smuzhiyun * just post and let the device figure it out.
692*4882a593Smuzhiyun */
693*4882a593Smuzhiyun if (qp->state < IB_QPS_RTS) {
694*4882a593Smuzhiyun *bad_wr = wr;
695*4882a593Smuzhiyun return -EINVAL;
696*4882a593Smuzhiyun }
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun spin_lock_irqsave(&qp->sq.lock, flags);
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun while (wr) {
701*4882a593Smuzhiyun unsigned int tail = 0;
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun if (unlikely(!pvrdma_idx_ring_has_space(
704*4882a593Smuzhiyun qp->sq.ring, qp->sq.wqe_cnt, &tail))) {
705*4882a593Smuzhiyun dev_warn_ratelimited(&dev->pdev->dev,
706*4882a593Smuzhiyun "send queue is full\n");
707*4882a593Smuzhiyun *bad_wr = wr;
708*4882a593Smuzhiyun ret = -ENOMEM;
709*4882a593Smuzhiyun goto out;
710*4882a593Smuzhiyun }
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun if (unlikely(wr->num_sge > qp->sq.max_sg || wr->num_sge < 0)) {
713*4882a593Smuzhiyun dev_warn_ratelimited(&dev->pdev->dev,
714*4882a593Smuzhiyun "send SGE overflow\n");
715*4882a593Smuzhiyun *bad_wr = wr;
716*4882a593Smuzhiyun ret = -EINVAL;
717*4882a593Smuzhiyun goto out;
718*4882a593Smuzhiyun }
719*4882a593Smuzhiyun
720*4882a593Smuzhiyun if (unlikely(wr->opcode < 0)) {
721*4882a593Smuzhiyun dev_warn_ratelimited(&dev->pdev->dev,
722*4882a593Smuzhiyun "invalid send opcode\n");
723*4882a593Smuzhiyun *bad_wr = wr;
724*4882a593Smuzhiyun ret = -EINVAL;
725*4882a593Smuzhiyun goto out;
726*4882a593Smuzhiyun }
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun /*
729*4882a593Smuzhiyun * Only support UD, RC.
730*4882a593Smuzhiyun * Need to check opcode table for thorough checking.
731*4882a593Smuzhiyun * opcode _UD _UC _RC
732*4882a593Smuzhiyun * _SEND x x x
733*4882a593Smuzhiyun * _SEND_WITH_IMM x x x
734*4882a593Smuzhiyun * _RDMA_WRITE x x
735*4882a593Smuzhiyun * _RDMA_WRITE_WITH_IMM x x
736*4882a593Smuzhiyun * _LOCAL_INV x x
737*4882a593Smuzhiyun * _SEND_WITH_INV x x
738*4882a593Smuzhiyun * _RDMA_READ x
739*4882a593Smuzhiyun * _ATOMIC_CMP_AND_SWP x
740*4882a593Smuzhiyun * _ATOMIC_FETCH_AND_ADD x
741*4882a593Smuzhiyun * _MASK_ATOMIC_CMP_AND_SWP x
742*4882a593Smuzhiyun * _MASK_ATOMIC_FETCH_AND_ADD x
743*4882a593Smuzhiyun * _REG_MR x
744*4882a593Smuzhiyun *
745*4882a593Smuzhiyun */
746*4882a593Smuzhiyun if (qp->ibqp.qp_type != IB_QPT_UD &&
747*4882a593Smuzhiyun qp->ibqp.qp_type != IB_QPT_RC &&
748*4882a593Smuzhiyun wr->opcode != IB_WR_SEND) {
749*4882a593Smuzhiyun dev_warn_ratelimited(&dev->pdev->dev,
750*4882a593Smuzhiyun "unsupported queuepair type\n");
751*4882a593Smuzhiyun *bad_wr = wr;
752*4882a593Smuzhiyun ret = -EINVAL;
753*4882a593Smuzhiyun goto out;
754*4882a593Smuzhiyun } else if (qp->ibqp.qp_type == IB_QPT_UD ||
755*4882a593Smuzhiyun qp->ibqp.qp_type == IB_QPT_GSI) {
756*4882a593Smuzhiyun if (wr->opcode != IB_WR_SEND &&
757*4882a593Smuzhiyun wr->opcode != IB_WR_SEND_WITH_IMM) {
758*4882a593Smuzhiyun dev_warn_ratelimited(&dev->pdev->dev,
759*4882a593Smuzhiyun "invalid send opcode\n");
760*4882a593Smuzhiyun *bad_wr = wr;
761*4882a593Smuzhiyun ret = -EINVAL;
762*4882a593Smuzhiyun goto out;
763*4882a593Smuzhiyun }
764*4882a593Smuzhiyun }
765*4882a593Smuzhiyun
766*4882a593Smuzhiyun wqe_hdr = (struct pvrdma_sq_wqe_hdr *)get_sq_wqe(qp, tail);
767*4882a593Smuzhiyun memset(wqe_hdr, 0, sizeof(*wqe_hdr));
768*4882a593Smuzhiyun wqe_hdr->wr_id = wr->wr_id;
769*4882a593Smuzhiyun wqe_hdr->num_sge = wr->num_sge;
770*4882a593Smuzhiyun wqe_hdr->opcode = ib_wr_opcode_to_pvrdma(wr->opcode);
771*4882a593Smuzhiyun wqe_hdr->send_flags = ib_send_flags_to_pvrdma(wr->send_flags);
772*4882a593Smuzhiyun if (wr->opcode == IB_WR_SEND_WITH_IMM ||
773*4882a593Smuzhiyun wr->opcode == IB_WR_RDMA_WRITE_WITH_IMM)
774*4882a593Smuzhiyun wqe_hdr->ex.imm_data = wr->ex.imm_data;
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun if (unlikely(wqe_hdr->opcode == PVRDMA_WR_ERROR)) {
777*4882a593Smuzhiyun *bad_wr = wr;
778*4882a593Smuzhiyun ret = -EINVAL;
779*4882a593Smuzhiyun goto out;
780*4882a593Smuzhiyun }
781*4882a593Smuzhiyun
782*4882a593Smuzhiyun switch (qp->ibqp.qp_type) {
783*4882a593Smuzhiyun case IB_QPT_GSI:
784*4882a593Smuzhiyun case IB_QPT_UD:
785*4882a593Smuzhiyun if (unlikely(!ud_wr(wr)->ah)) {
786*4882a593Smuzhiyun dev_warn_ratelimited(&dev->pdev->dev,
787*4882a593Smuzhiyun "invalid address handle\n");
788*4882a593Smuzhiyun *bad_wr = wr;
789*4882a593Smuzhiyun ret = -EINVAL;
790*4882a593Smuzhiyun goto out;
791*4882a593Smuzhiyun }
792*4882a593Smuzhiyun
793*4882a593Smuzhiyun /*
794*4882a593Smuzhiyun * Use qkey from qp context if high order bit set,
795*4882a593Smuzhiyun * otherwise from work request.
796*4882a593Smuzhiyun */
797*4882a593Smuzhiyun wqe_hdr->wr.ud.remote_qpn = ud_wr(wr)->remote_qpn;
798*4882a593Smuzhiyun wqe_hdr->wr.ud.remote_qkey =
799*4882a593Smuzhiyun ud_wr(wr)->remote_qkey & 0x80000000 ?
800*4882a593Smuzhiyun qp->qkey : ud_wr(wr)->remote_qkey;
801*4882a593Smuzhiyun wqe_hdr->wr.ud.av = to_vah(ud_wr(wr)->ah)->av;
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun break;
804*4882a593Smuzhiyun case IB_QPT_RC:
805*4882a593Smuzhiyun switch (wr->opcode) {
806*4882a593Smuzhiyun case IB_WR_RDMA_READ:
807*4882a593Smuzhiyun case IB_WR_RDMA_WRITE:
808*4882a593Smuzhiyun case IB_WR_RDMA_WRITE_WITH_IMM:
809*4882a593Smuzhiyun wqe_hdr->wr.rdma.remote_addr =
810*4882a593Smuzhiyun rdma_wr(wr)->remote_addr;
811*4882a593Smuzhiyun wqe_hdr->wr.rdma.rkey = rdma_wr(wr)->rkey;
812*4882a593Smuzhiyun break;
813*4882a593Smuzhiyun case IB_WR_LOCAL_INV:
814*4882a593Smuzhiyun case IB_WR_SEND_WITH_INV:
815*4882a593Smuzhiyun wqe_hdr->ex.invalidate_rkey =
816*4882a593Smuzhiyun wr->ex.invalidate_rkey;
817*4882a593Smuzhiyun break;
818*4882a593Smuzhiyun case IB_WR_ATOMIC_CMP_AND_SWP:
819*4882a593Smuzhiyun case IB_WR_ATOMIC_FETCH_AND_ADD:
820*4882a593Smuzhiyun wqe_hdr->wr.atomic.remote_addr =
821*4882a593Smuzhiyun atomic_wr(wr)->remote_addr;
822*4882a593Smuzhiyun wqe_hdr->wr.atomic.rkey = atomic_wr(wr)->rkey;
823*4882a593Smuzhiyun wqe_hdr->wr.atomic.compare_add =
824*4882a593Smuzhiyun atomic_wr(wr)->compare_add;
825*4882a593Smuzhiyun if (wr->opcode == IB_WR_ATOMIC_CMP_AND_SWP)
826*4882a593Smuzhiyun wqe_hdr->wr.atomic.swap =
827*4882a593Smuzhiyun atomic_wr(wr)->swap;
828*4882a593Smuzhiyun break;
829*4882a593Smuzhiyun case IB_WR_REG_MR:
830*4882a593Smuzhiyun ret = set_reg_seg(wqe_hdr, reg_wr(wr));
831*4882a593Smuzhiyun if (ret < 0) {
832*4882a593Smuzhiyun dev_warn_ratelimited(&dev->pdev->dev,
833*4882a593Smuzhiyun "Failed to set fast register work request\n");
834*4882a593Smuzhiyun *bad_wr = wr;
835*4882a593Smuzhiyun goto out;
836*4882a593Smuzhiyun }
837*4882a593Smuzhiyun break;
838*4882a593Smuzhiyun default:
839*4882a593Smuzhiyun break;
840*4882a593Smuzhiyun }
841*4882a593Smuzhiyun
842*4882a593Smuzhiyun break;
843*4882a593Smuzhiyun default:
844*4882a593Smuzhiyun dev_warn_ratelimited(&dev->pdev->dev,
845*4882a593Smuzhiyun "invalid queuepair type\n");
846*4882a593Smuzhiyun ret = -EINVAL;
847*4882a593Smuzhiyun *bad_wr = wr;
848*4882a593Smuzhiyun goto out;
849*4882a593Smuzhiyun }
850*4882a593Smuzhiyun
851*4882a593Smuzhiyun sge = (struct pvrdma_sge *)(wqe_hdr + 1);
852*4882a593Smuzhiyun for (i = 0; i < wr->num_sge; i++) {
853*4882a593Smuzhiyun /* Need to check wqe_size 0 or max size */
854*4882a593Smuzhiyun sge->addr = wr->sg_list[i].addr;
855*4882a593Smuzhiyun sge->length = wr->sg_list[i].length;
856*4882a593Smuzhiyun sge->lkey = wr->sg_list[i].lkey;
857*4882a593Smuzhiyun sge++;
858*4882a593Smuzhiyun }
859*4882a593Smuzhiyun
860*4882a593Smuzhiyun /* Make sure wqe is written before index update */
861*4882a593Smuzhiyun smp_wmb();
862*4882a593Smuzhiyun
863*4882a593Smuzhiyun /* Update shared sq ring */
864*4882a593Smuzhiyun pvrdma_idx_ring_inc(&qp->sq.ring->prod_tail,
865*4882a593Smuzhiyun qp->sq.wqe_cnt);
866*4882a593Smuzhiyun
867*4882a593Smuzhiyun wr = wr->next;
868*4882a593Smuzhiyun }
869*4882a593Smuzhiyun
870*4882a593Smuzhiyun ret = 0;
871*4882a593Smuzhiyun
872*4882a593Smuzhiyun out:
873*4882a593Smuzhiyun spin_unlock_irqrestore(&qp->sq.lock, flags);
874*4882a593Smuzhiyun
875*4882a593Smuzhiyun if (!ret)
876*4882a593Smuzhiyun pvrdma_write_uar_qp(dev, PVRDMA_UAR_QP_SEND | qp->qp_handle);
877*4882a593Smuzhiyun
878*4882a593Smuzhiyun return ret;
879*4882a593Smuzhiyun }
880*4882a593Smuzhiyun
881*4882a593Smuzhiyun /**
882*4882a593Smuzhiyun * pvrdma_post_receive - post receive work request entries on a QP
883*4882a593Smuzhiyun * @ibqp: the QP
884*4882a593Smuzhiyun * @wr: the work request list to post
885*4882a593Smuzhiyun * @bad_wr: the first bad WR returned
886*4882a593Smuzhiyun *
887*4882a593Smuzhiyun * @return: 0 on success, otherwise errno returned.
888*4882a593Smuzhiyun */
pvrdma_post_recv(struct ib_qp * ibqp,const struct ib_recv_wr * wr,const struct ib_recv_wr ** bad_wr)889*4882a593Smuzhiyun int pvrdma_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr,
890*4882a593Smuzhiyun const struct ib_recv_wr **bad_wr)
891*4882a593Smuzhiyun {
892*4882a593Smuzhiyun struct pvrdma_dev *dev = to_vdev(ibqp->device);
893*4882a593Smuzhiyun unsigned long flags;
894*4882a593Smuzhiyun struct pvrdma_qp *qp = to_vqp(ibqp);
895*4882a593Smuzhiyun struct pvrdma_rq_wqe_hdr *wqe_hdr;
896*4882a593Smuzhiyun struct pvrdma_sge *sge;
897*4882a593Smuzhiyun int ret = 0;
898*4882a593Smuzhiyun int i;
899*4882a593Smuzhiyun
900*4882a593Smuzhiyun /*
901*4882a593Smuzhiyun * In the RESET state, we can fail immediately. For other states,
902*4882a593Smuzhiyun * just post and let the device figure it out.
903*4882a593Smuzhiyun */
904*4882a593Smuzhiyun if (qp->state == IB_QPS_RESET) {
905*4882a593Smuzhiyun *bad_wr = wr;
906*4882a593Smuzhiyun return -EINVAL;
907*4882a593Smuzhiyun }
908*4882a593Smuzhiyun
909*4882a593Smuzhiyun if (qp->srq) {
910*4882a593Smuzhiyun dev_warn(&dev->pdev->dev, "QP associated with SRQ\n");
911*4882a593Smuzhiyun *bad_wr = wr;
912*4882a593Smuzhiyun return -EINVAL;
913*4882a593Smuzhiyun }
914*4882a593Smuzhiyun
915*4882a593Smuzhiyun spin_lock_irqsave(&qp->rq.lock, flags);
916*4882a593Smuzhiyun
917*4882a593Smuzhiyun while (wr) {
918*4882a593Smuzhiyun unsigned int tail = 0;
919*4882a593Smuzhiyun
920*4882a593Smuzhiyun if (unlikely(wr->num_sge > qp->rq.max_sg ||
921*4882a593Smuzhiyun wr->num_sge < 0)) {
922*4882a593Smuzhiyun ret = -EINVAL;
923*4882a593Smuzhiyun *bad_wr = wr;
924*4882a593Smuzhiyun dev_warn_ratelimited(&dev->pdev->dev,
925*4882a593Smuzhiyun "recv SGE overflow\n");
926*4882a593Smuzhiyun goto out;
927*4882a593Smuzhiyun }
928*4882a593Smuzhiyun
929*4882a593Smuzhiyun if (unlikely(!pvrdma_idx_ring_has_space(
930*4882a593Smuzhiyun qp->rq.ring, qp->rq.wqe_cnt, &tail))) {
931*4882a593Smuzhiyun ret = -ENOMEM;
932*4882a593Smuzhiyun *bad_wr = wr;
933*4882a593Smuzhiyun dev_warn_ratelimited(&dev->pdev->dev,
934*4882a593Smuzhiyun "recv queue full\n");
935*4882a593Smuzhiyun goto out;
936*4882a593Smuzhiyun }
937*4882a593Smuzhiyun
938*4882a593Smuzhiyun wqe_hdr = (struct pvrdma_rq_wqe_hdr *)get_rq_wqe(qp, tail);
939*4882a593Smuzhiyun wqe_hdr->wr_id = wr->wr_id;
940*4882a593Smuzhiyun wqe_hdr->num_sge = wr->num_sge;
941*4882a593Smuzhiyun wqe_hdr->total_len = 0;
942*4882a593Smuzhiyun
943*4882a593Smuzhiyun sge = (struct pvrdma_sge *)(wqe_hdr + 1);
944*4882a593Smuzhiyun for (i = 0; i < wr->num_sge; i++) {
945*4882a593Smuzhiyun sge->addr = wr->sg_list[i].addr;
946*4882a593Smuzhiyun sge->length = wr->sg_list[i].length;
947*4882a593Smuzhiyun sge->lkey = wr->sg_list[i].lkey;
948*4882a593Smuzhiyun sge++;
949*4882a593Smuzhiyun }
950*4882a593Smuzhiyun
951*4882a593Smuzhiyun /* Make sure wqe is written before index update */
952*4882a593Smuzhiyun smp_wmb();
953*4882a593Smuzhiyun
954*4882a593Smuzhiyun /* Update shared rq ring */
955*4882a593Smuzhiyun pvrdma_idx_ring_inc(&qp->rq.ring->prod_tail,
956*4882a593Smuzhiyun qp->rq.wqe_cnt);
957*4882a593Smuzhiyun
958*4882a593Smuzhiyun wr = wr->next;
959*4882a593Smuzhiyun }
960*4882a593Smuzhiyun
961*4882a593Smuzhiyun spin_unlock_irqrestore(&qp->rq.lock, flags);
962*4882a593Smuzhiyun
963*4882a593Smuzhiyun pvrdma_write_uar_qp(dev, PVRDMA_UAR_QP_RECV | qp->qp_handle);
964*4882a593Smuzhiyun
965*4882a593Smuzhiyun return ret;
966*4882a593Smuzhiyun
967*4882a593Smuzhiyun out:
968*4882a593Smuzhiyun spin_unlock_irqrestore(&qp->rq.lock, flags);
969*4882a593Smuzhiyun
970*4882a593Smuzhiyun return ret;
971*4882a593Smuzhiyun }
972*4882a593Smuzhiyun
973*4882a593Smuzhiyun /**
974*4882a593Smuzhiyun * pvrdma_query_qp - query a queue pair's attributes
975*4882a593Smuzhiyun * @ibqp: the queue pair to query
976*4882a593Smuzhiyun * @attr: the queue pair's attributes
977*4882a593Smuzhiyun * @attr_mask: attributes mask
978*4882a593Smuzhiyun * @init_attr: initial queue pair attributes
979*4882a593Smuzhiyun *
980*4882a593Smuzhiyun * @returns 0 on success, otherwise returns an errno.
981*4882a593Smuzhiyun */
pvrdma_query_qp(struct ib_qp * ibqp,struct ib_qp_attr * attr,int attr_mask,struct ib_qp_init_attr * init_attr)982*4882a593Smuzhiyun int pvrdma_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
983*4882a593Smuzhiyun int attr_mask, struct ib_qp_init_attr *init_attr)
984*4882a593Smuzhiyun {
985*4882a593Smuzhiyun struct pvrdma_dev *dev = to_vdev(ibqp->device);
986*4882a593Smuzhiyun struct pvrdma_qp *qp = to_vqp(ibqp);
987*4882a593Smuzhiyun union pvrdma_cmd_req req;
988*4882a593Smuzhiyun union pvrdma_cmd_resp rsp;
989*4882a593Smuzhiyun struct pvrdma_cmd_query_qp *cmd = &req.query_qp;
990*4882a593Smuzhiyun struct pvrdma_cmd_query_qp_resp *resp = &rsp.query_qp_resp;
991*4882a593Smuzhiyun int ret = 0;
992*4882a593Smuzhiyun
993*4882a593Smuzhiyun mutex_lock(&qp->mutex);
994*4882a593Smuzhiyun
995*4882a593Smuzhiyun if (qp->state == IB_QPS_RESET) {
996*4882a593Smuzhiyun attr->qp_state = IB_QPS_RESET;
997*4882a593Smuzhiyun goto out;
998*4882a593Smuzhiyun }
999*4882a593Smuzhiyun
1000*4882a593Smuzhiyun memset(cmd, 0, sizeof(*cmd));
1001*4882a593Smuzhiyun cmd->hdr.cmd = PVRDMA_CMD_QUERY_QP;
1002*4882a593Smuzhiyun cmd->qp_handle = qp->qp_handle;
1003*4882a593Smuzhiyun cmd->attr_mask = ib_qp_attr_mask_to_pvrdma(attr_mask);
1004*4882a593Smuzhiyun
1005*4882a593Smuzhiyun ret = pvrdma_cmd_post(dev, &req, &rsp, PVRDMA_CMD_QUERY_QP_RESP);
1006*4882a593Smuzhiyun if (ret < 0) {
1007*4882a593Smuzhiyun dev_warn(&dev->pdev->dev,
1008*4882a593Smuzhiyun "could not query queuepair, error: %d\n", ret);
1009*4882a593Smuzhiyun goto out;
1010*4882a593Smuzhiyun }
1011*4882a593Smuzhiyun
1012*4882a593Smuzhiyun attr->qp_state = pvrdma_qp_state_to_ib(resp->attrs.qp_state);
1013*4882a593Smuzhiyun attr->cur_qp_state =
1014*4882a593Smuzhiyun pvrdma_qp_state_to_ib(resp->attrs.cur_qp_state);
1015*4882a593Smuzhiyun attr->path_mtu = pvrdma_mtu_to_ib(resp->attrs.path_mtu);
1016*4882a593Smuzhiyun attr->path_mig_state =
1017*4882a593Smuzhiyun pvrdma_mig_state_to_ib(resp->attrs.path_mig_state);
1018*4882a593Smuzhiyun attr->qkey = resp->attrs.qkey;
1019*4882a593Smuzhiyun attr->rq_psn = resp->attrs.rq_psn;
1020*4882a593Smuzhiyun attr->sq_psn = resp->attrs.sq_psn;
1021*4882a593Smuzhiyun attr->dest_qp_num = resp->attrs.dest_qp_num;
1022*4882a593Smuzhiyun attr->qp_access_flags =
1023*4882a593Smuzhiyun pvrdma_access_flags_to_ib(resp->attrs.qp_access_flags);
1024*4882a593Smuzhiyun attr->pkey_index = resp->attrs.pkey_index;
1025*4882a593Smuzhiyun attr->alt_pkey_index = resp->attrs.alt_pkey_index;
1026*4882a593Smuzhiyun attr->en_sqd_async_notify = resp->attrs.en_sqd_async_notify;
1027*4882a593Smuzhiyun attr->sq_draining = resp->attrs.sq_draining;
1028*4882a593Smuzhiyun attr->max_rd_atomic = resp->attrs.max_rd_atomic;
1029*4882a593Smuzhiyun attr->max_dest_rd_atomic = resp->attrs.max_dest_rd_atomic;
1030*4882a593Smuzhiyun attr->min_rnr_timer = resp->attrs.min_rnr_timer;
1031*4882a593Smuzhiyun attr->port_num = resp->attrs.port_num;
1032*4882a593Smuzhiyun attr->timeout = resp->attrs.timeout;
1033*4882a593Smuzhiyun attr->retry_cnt = resp->attrs.retry_cnt;
1034*4882a593Smuzhiyun attr->rnr_retry = resp->attrs.rnr_retry;
1035*4882a593Smuzhiyun attr->alt_port_num = resp->attrs.alt_port_num;
1036*4882a593Smuzhiyun attr->alt_timeout = resp->attrs.alt_timeout;
1037*4882a593Smuzhiyun pvrdma_qp_cap_to_ib(&attr->cap, &resp->attrs.cap);
1038*4882a593Smuzhiyun pvrdma_ah_attr_to_rdma(&attr->ah_attr, &resp->attrs.ah_attr);
1039*4882a593Smuzhiyun pvrdma_ah_attr_to_rdma(&attr->alt_ah_attr, &resp->attrs.alt_ah_attr);
1040*4882a593Smuzhiyun
1041*4882a593Smuzhiyun qp->state = attr->qp_state;
1042*4882a593Smuzhiyun
1043*4882a593Smuzhiyun ret = 0;
1044*4882a593Smuzhiyun
1045*4882a593Smuzhiyun out:
1046*4882a593Smuzhiyun attr->cur_qp_state = attr->qp_state;
1047*4882a593Smuzhiyun
1048*4882a593Smuzhiyun init_attr->event_handler = qp->ibqp.event_handler;
1049*4882a593Smuzhiyun init_attr->qp_context = qp->ibqp.qp_context;
1050*4882a593Smuzhiyun init_attr->send_cq = qp->ibqp.send_cq;
1051*4882a593Smuzhiyun init_attr->recv_cq = qp->ibqp.recv_cq;
1052*4882a593Smuzhiyun init_attr->srq = qp->ibqp.srq;
1053*4882a593Smuzhiyun init_attr->xrcd = NULL;
1054*4882a593Smuzhiyun init_attr->cap = attr->cap;
1055*4882a593Smuzhiyun init_attr->sq_sig_type = 0;
1056*4882a593Smuzhiyun init_attr->qp_type = qp->ibqp.qp_type;
1057*4882a593Smuzhiyun init_attr->create_flags = 0;
1058*4882a593Smuzhiyun init_attr->port_num = qp->port;
1059*4882a593Smuzhiyun
1060*4882a593Smuzhiyun mutex_unlock(&qp->mutex);
1061*4882a593Smuzhiyun return ret;
1062*4882a593Smuzhiyun }
1063