1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2012-2016 VMware, Inc. All rights reserved.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or
5*4882a593Smuzhiyun * modify it under the terms of EITHER the GNU General Public License
6*4882a593Smuzhiyun * version 2 as published by the Free Software Foundation or the BSD
7*4882a593Smuzhiyun * 2-Clause License. This program is distributed in the hope that it
8*4882a593Smuzhiyun * will be useful, but WITHOUT ANY WARRANTY; WITHOUT EVEN THE IMPLIED
9*4882a593Smuzhiyun * WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
10*4882a593Smuzhiyun * See the GNU General Public License version 2 for more details at
11*4882a593Smuzhiyun * http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html.
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun * You should have received a copy of the GNU General Public License
14*4882a593Smuzhiyun * along with this program available in the file COPYING in the main
15*4882a593Smuzhiyun * directory of this source tree.
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun * The BSD 2-Clause License
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or
20*4882a593Smuzhiyun * without modification, are permitted provided that the following
21*4882a593Smuzhiyun * conditions are met:
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * - Redistributions of source code must retain the above
24*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
25*4882a593Smuzhiyun * disclaimer.
26*4882a593Smuzhiyun *
27*4882a593Smuzhiyun * - Redistributions in binary form must reproduce the above
28*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
29*4882a593Smuzhiyun * disclaimer in the documentation and/or other materials
30*4882a593Smuzhiyun * provided with the distribution.
31*4882a593Smuzhiyun *
32*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
33*4882a593Smuzhiyun * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
34*4882a593Smuzhiyun * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
35*4882a593Smuzhiyun * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
36*4882a593Smuzhiyun * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
37*4882a593Smuzhiyun * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
38*4882a593Smuzhiyun * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
39*4882a593Smuzhiyun * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40*4882a593Smuzhiyun * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
41*4882a593Smuzhiyun * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
42*4882a593Smuzhiyun * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
43*4882a593Smuzhiyun * OF THE POSSIBILITY OF SUCH DAMAGE.
44*4882a593Smuzhiyun */
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun #include <asm/page.h>
47*4882a593Smuzhiyun #include <linux/io.h>
48*4882a593Smuzhiyun #include <linux/wait.h>
49*4882a593Smuzhiyun #include <rdma/ib_addr.h>
50*4882a593Smuzhiyun #include <rdma/ib_smi.h>
51*4882a593Smuzhiyun #include <rdma/ib_user_verbs.h>
52*4882a593Smuzhiyun #include <rdma/uverbs_ioctl.h>
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #include "pvrdma.h"
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun /**
57*4882a593Smuzhiyun * pvrdma_req_notify_cq - request notification for a completion queue
58*4882a593Smuzhiyun * @ibcq: the completion queue
59*4882a593Smuzhiyun * @notify_flags: notification flags
60*4882a593Smuzhiyun *
61*4882a593Smuzhiyun * @return: 0 for success.
62*4882a593Smuzhiyun */
pvrdma_req_notify_cq(struct ib_cq * ibcq,enum ib_cq_notify_flags notify_flags)63*4882a593Smuzhiyun int pvrdma_req_notify_cq(struct ib_cq *ibcq,
64*4882a593Smuzhiyun enum ib_cq_notify_flags notify_flags)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun struct pvrdma_dev *dev = to_vdev(ibcq->device);
67*4882a593Smuzhiyun struct pvrdma_cq *cq = to_vcq(ibcq);
68*4882a593Smuzhiyun u32 val = cq->cq_handle;
69*4882a593Smuzhiyun unsigned long flags;
70*4882a593Smuzhiyun int has_data = 0;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun val |= (notify_flags & IB_CQ_SOLICITED_MASK) == IB_CQ_SOLICITED ?
73*4882a593Smuzhiyun PVRDMA_UAR_CQ_ARM_SOL : PVRDMA_UAR_CQ_ARM;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun spin_lock_irqsave(&cq->cq_lock, flags);
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun pvrdma_write_uar_cq(dev, val);
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun if (notify_flags & IB_CQ_REPORT_MISSED_EVENTS) {
80*4882a593Smuzhiyun unsigned int head;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun has_data = pvrdma_idx_ring_has_data(&cq->ring_state->rx,
83*4882a593Smuzhiyun cq->ibcq.cqe, &head);
84*4882a593Smuzhiyun if (unlikely(has_data == PVRDMA_INVALID_IDX))
85*4882a593Smuzhiyun dev_err(&dev->pdev->dev, "CQ ring state invalid\n");
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun spin_unlock_irqrestore(&cq->cq_lock, flags);
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun return has_data;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun /**
94*4882a593Smuzhiyun * pvrdma_create_cq - create completion queue
95*4882a593Smuzhiyun * @ibcq: Allocated CQ
96*4882a593Smuzhiyun * @attr: completion queue attributes
97*4882a593Smuzhiyun * @udata: user data
98*4882a593Smuzhiyun *
99*4882a593Smuzhiyun * @return: 0 on success
100*4882a593Smuzhiyun */
pvrdma_create_cq(struct ib_cq * ibcq,const struct ib_cq_init_attr * attr,struct ib_udata * udata)101*4882a593Smuzhiyun int pvrdma_create_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr,
102*4882a593Smuzhiyun struct ib_udata *udata)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun struct ib_device *ibdev = ibcq->device;
105*4882a593Smuzhiyun int entries = attr->cqe;
106*4882a593Smuzhiyun struct pvrdma_dev *dev = to_vdev(ibdev);
107*4882a593Smuzhiyun struct pvrdma_cq *cq = to_vcq(ibcq);
108*4882a593Smuzhiyun int ret;
109*4882a593Smuzhiyun int npages;
110*4882a593Smuzhiyun unsigned long flags;
111*4882a593Smuzhiyun union pvrdma_cmd_req req;
112*4882a593Smuzhiyun union pvrdma_cmd_resp rsp;
113*4882a593Smuzhiyun struct pvrdma_cmd_create_cq *cmd = &req.create_cq;
114*4882a593Smuzhiyun struct pvrdma_cmd_create_cq_resp *resp = &rsp.create_cq_resp;
115*4882a593Smuzhiyun struct pvrdma_create_cq_resp cq_resp = {};
116*4882a593Smuzhiyun struct pvrdma_create_cq ucmd;
117*4882a593Smuzhiyun struct pvrdma_ucontext *context = rdma_udata_to_drv_context(
118*4882a593Smuzhiyun udata, struct pvrdma_ucontext, ibucontext);
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(struct pvrdma_cqe) != 64);
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun entries = roundup_pow_of_two(entries);
123*4882a593Smuzhiyun if (entries < 1 || entries > dev->dsr->caps.max_cqe)
124*4882a593Smuzhiyun return -EINVAL;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun if (!atomic_add_unless(&dev->num_cqs, 1, dev->dsr->caps.max_cq))
127*4882a593Smuzhiyun return -ENOMEM;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun cq->ibcq.cqe = entries;
130*4882a593Smuzhiyun cq->is_kernel = !udata;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun if (!cq->is_kernel) {
133*4882a593Smuzhiyun if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) {
134*4882a593Smuzhiyun ret = -EFAULT;
135*4882a593Smuzhiyun goto err_cq;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun cq->umem = ib_umem_get(ibdev, ucmd.buf_addr, ucmd.buf_size,
139*4882a593Smuzhiyun IB_ACCESS_LOCAL_WRITE);
140*4882a593Smuzhiyun if (IS_ERR(cq->umem)) {
141*4882a593Smuzhiyun ret = PTR_ERR(cq->umem);
142*4882a593Smuzhiyun goto err_cq;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun npages = ib_umem_num_dma_blocks(cq->umem, PAGE_SIZE);
146*4882a593Smuzhiyun } else {
147*4882a593Smuzhiyun /* One extra page for shared ring state */
148*4882a593Smuzhiyun npages = 1 + (entries * sizeof(struct pvrdma_cqe) +
149*4882a593Smuzhiyun PAGE_SIZE - 1) / PAGE_SIZE;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun /* Skip header page. */
152*4882a593Smuzhiyun cq->offset = PAGE_SIZE;
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun if (npages < 0 || npages > PVRDMA_PAGE_DIR_MAX_PAGES) {
156*4882a593Smuzhiyun dev_warn(&dev->pdev->dev,
157*4882a593Smuzhiyun "overflow pages in completion queue\n");
158*4882a593Smuzhiyun ret = -EINVAL;
159*4882a593Smuzhiyun goto err_umem;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun ret = pvrdma_page_dir_init(dev, &cq->pdir, npages, cq->is_kernel);
163*4882a593Smuzhiyun if (ret) {
164*4882a593Smuzhiyun dev_warn(&dev->pdev->dev,
165*4882a593Smuzhiyun "could not allocate page directory\n");
166*4882a593Smuzhiyun goto err_umem;
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun /* Ring state is always the first page. Set in library for user cq. */
170*4882a593Smuzhiyun if (cq->is_kernel)
171*4882a593Smuzhiyun cq->ring_state = cq->pdir.pages[0];
172*4882a593Smuzhiyun else
173*4882a593Smuzhiyun pvrdma_page_dir_insert_umem(&cq->pdir, cq->umem, 0);
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun refcount_set(&cq->refcnt, 1);
176*4882a593Smuzhiyun init_completion(&cq->free);
177*4882a593Smuzhiyun spin_lock_init(&cq->cq_lock);
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun memset(cmd, 0, sizeof(*cmd));
180*4882a593Smuzhiyun cmd->hdr.cmd = PVRDMA_CMD_CREATE_CQ;
181*4882a593Smuzhiyun cmd->nchunks = npages;
182*4882a593Smuzhiyun cmd->ctx_handle = context ? context->ctx_handle : 0;
183*4882a593Smuzhiyun cmd->cqe = entries;
184*4882a593Smuzhiyun cmd->pdir_dma = cq->pdir.dir_dma;
185*4882a593Smuzhiyun ret = pvrdma_cmd_post(dev, &req, &rsp, PVRDMA_CMD_CREATE_CQ_RESP);
186*4882a593Smuzhiyun if (ret < 0) {
187*4882a593Smuzhiyun dev_warn(&dev->pdev->dev,
188*4882a593Smuzhiyun "could not create completion queue, error: %d\n", ret);
189*4882a593Smuzhiyun goto err_page_dir;
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun cq->ibcq.cqe = resp->cqe;
193*4882a593Smuzhiyun cq->cq_handle = resp->cq_handle;
194*4882a593Smuzhiyun cq_resp.cqn = resp->cq_handle;
195*4882a593Smuzhiyun spin_lock_irqsave(&dev->cq_tbl_lock, flags);
196*4882a593Smuzhiyun dev->cq_tbl[cq->cq_handle % dev->dsr->caps.max_cq] = cq;
197*4882a593Smuzhiyun spin_unlock_irqrestore(&dev->cq_tbl_lock, flags);
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun if (!cq->is_kernel) {
200*4882a593Smuzhiyun cq->uar = &context->uar;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun /* Copy udata back. */
203*4882a593Smuzhiyun if (ib_copy_to_udata(udata, &cq_resp, sizeof(cq_resp))) {
204*4882a593Smuzhiyun dev_warn(&dev->pdev->dev,
205*4882a593Smuzhiyun "failed to copy back udata\n");
206*4882a593Smuzhiyun pvrdma_destroy_cq(&cq->ibcq, udata);
207*4882a593Smuzhiyun return -EINVAL;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun return 0;
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun err_page_dir:
214*4882a593Smuzhiyun pvrdma_page_dir_cleanup(dev, &cq->pdir);
215*4882a593Smuzhiyun err_umem:
216*4882a593Smuzhiyun ib_umem_release(cq->umem);
217*4882a593Smuzhiyun err_cq:
218*4882a593Smuzhiyun atomic_dec(&dev->num_cqs);
219*4882a593Smuzhiyun return ret;
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun
pvrdma_free_cq(struct pvrdma_dev * dev,struct pvrdma_cq * cq)222*4882a593Smuzhiyun static void pvrdma_free_cq(struct pvrdma_dev *dev, struct pvrdma_cq *cq)
223*4882a593Smuzhiyun {
224*4882a593Smuzhiyun if (refcount_dec_and_test(&cq->refcnt))
225*4882a593Smuzhiyun complete(&cq->free);
226*4882a593Smuzhiyun wait_for_completion(&cq->free);
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun ib_umem_release(cq->umem);
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun pvrdma_page_dir_cleanup(dev, &cq->pdir);
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun /**
234*4882a593Smuzhiyun * pvrdma_destroy_cq - destroy completion queue
235*4882a593Smuzhiyun * @cq: the completion queue to destroy.
236*4882a593Smuzhiyun * @udata: user data or null for kernel object
237*4882a593Smuzhiyun */
pvrdma_destroy_cq(struct ib_cq * cq,struct ib_udata * udata)238*4882a593Smuzhiyun int pvrdma_destroy_cq(struct ib_cq *cq, struct ib_udata *udata)
239*4882a593Smuzhiyun {
240*4882a593Smuzhiyun struct pvrdma_cq *vcq = to_vcq(cq);
241*4882a593Smuzhiyun union pvrdma_cmd_req req;
242*4882a593Smuzhiyun struct pvrdma_cmd_destroy_cq *cmd = &req.destroy_cq;
243*4882a593Smuzhiyun struct pvrdma_dev *dev = to_vdev(cq->device);
244*4882a593Smuzhiyun unsigned long flags;
245*4882a593Smuzhiyun int ret;
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun memset(cmd, 0, sizeof(*cmd));
248*4882a593Smuzhiyun cmd->hdr.cmd = PVRDMA_CMD_DESTROY_CQ;
249*4882a593Smuzhiyun cmd->cq_handle = vcq->cq_handle;
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun ret = pvrdma_cmd_post(dev, &req, NULL, 0);
252*4882a593Smuzhiyun if (ret < 0)
253*4882a593Smuzhiyun dev_warn(&dev->pdev->dev,
254*4882a593Smuzhiyun "could not destroy completion queue, error: %d\n",
255*4882a593Smuzhiyun ret);
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun /* free cq's resources */
258*4882a593Smuzhiyun spin_lock_irqsave(&dev->cq_tbl_lock, flags);
259*4882a593Smuzhiyun dev->cq_tbl[vcq->cq_handle] = NULL;
260*4882a593Smuzhiyun spin_unlock_irqrestore(&dev->cq_tbl_lock, flags);
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun pvrdma_free_cq(dev, vcq);
263*4882a593Smuzhiyun atomic_dec(&dev->num_cqs);
264*4882a593Smuzhiyun return 0;
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun
get_cqe(struct pvrdma_cq * cq,int i)267*4882a593Smuzhiyun static inline struct pvrdma_cqe *get_cqe(struct pvrdma_cq *cq, int i)
268*4882a593Smuzhiyun {
269*4882a593Smuzhiyun return (struct pvrdma_cqe *)pvrdma_page_dir_get_ptr(
270*4882a593Smuzhiyun &cq->pdir,
271*4882a593Smuzhiyun cq->offset +
272*4882a593Smuzhiyun sizeof(struct pvrdma_cqe) * i);
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun
_pvrdma_flush_cqe(struct pvrdma_qp * qp,struct pvrdma_cq * cq)275*4882a593Smuzhiyun void _pvrdma_flush_cqe(struct pvrdma_qp *qp, struct pvrdma_cq *cq)
276*4882a593Smuzhiyun {
277*4882a593Smuzhiyun unsigned int head;
278*4882a593Smuzhiyun int has_data;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun if (!cq->is_kernel)
281*4882a593Smuzhiyun return;
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun /* Lock held */
284*4882a593Smuzhiyun has_data = pvrdma_idx_ring_has_data(&cq->ring_state->rx,
285*4882a593Smuzhiyun cq->ibcq.cqe, &head);
286*4882a593Smuzhiyun if (unlikely(has_data > 0)) {
287*4882a593Smuzhiyun int items;
288*4882a593Smuzhiyun int curr;
289*4882a593Smuzhiyun int tail = pvrdma_idx(&cq->ring_state->rx.prod_tail,
290*4882a593Smuzhiyun cq->ibcq.cqe);
291*4882a593Smuzhiyun struct pvrdma_cqe *cqe;
292*4882a593Smuzhiyun struct pvrdma_cqe *curr_cqe;
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun items = (tail > head) ? (tail - head) :
295*4882a593Smuzhiyun (cq->ibcq.cqe - head + tail);
296*4882a593Smuzhiyun curr = --tail;
297*4882a593Smuzhiyun while (items-- > 0) {
298*4882a593Smuzhiyun if (curr < 0)
299*4882a593Smuzhiyun curr = cq->ibcq.cqe - 1;
300*4882a593Smuzhiyun if (tail < 0)
301*4882a593Smuzhiyun tail = cq->ibcq.cqe - 1;
302*4882a593Smuzhiyun curr_cqe = get_cqe(cq, curr);
303*4882a593Smuzhiyun if ((curr_cqe->qp & 0xFFFF) != qp->qp_handle) {
304*4882a593Smuzhiyun if (curr != tail) {
305*4882a593Smuzhiyun cqe = get_cqe(cq, tail);
306*4882a593Smuzhiyun *cqe = *curr_cqe;
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun tail--;
309*4882a593Smuzhiyun } else {
310*4882a593Smuzhiyun pvrdma_idx_ring_inc(
311*4882a593Smuzhiyun &cq->ring_state->rx.cons_head,
312*4882a593Smuzhiyun cq->ibcq.cqe);
313*4882a593Smuzhiyun }
314*4882a593Smuzhiyun curr--;
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun
pvrdma_poll_one(struct pvrdma_cq * cq,struct pvrdma_qp ** cur_qp,struct ib_wc * wc)319*4882a593Smuzhiyun static int pvrdma_poll_one(struct pvrdma_cq *cq, struct pvrdma_qp **cur_qp,
320*4882a593Smuzhiyun struct ib_wc *wc)
321*4882a593Smuzhiyun {
322*4882a593Smuzhiyun struct pvrdma_dev *dev = to_vdev(cq->ibcq.device);
323*4882a593Smuzhiyun int has_data;
324*4882a593Smuzhiyun unsigned int head;
325*4882a593Smuzhiyun bool tried = false;
326*4882a593Smuzhiyun struct pvrdma_cqe *cqe;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun retry:
329*4882a593Smuzhiyun has_data = pvrdma_idx_ring_has_data(&cq->ring_state->rx,
330*4882a593Smuzhiyun cq->ibcq.cqe, &head);
331*4882a593Smuzhiyun if (has_data == 0) {
332*4882a593Smuzhiyun if (tried)
333*4882a593Smuzhiyun return -EAGAIN;
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun pvrdma_write_uar_cq(dev, cq->cq_handle | PVRDMA_UAR_CQ_POLL);
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun tried = true;
338*4882a593Smuzhiyun goto retry;
339*4882a593Smuzhiyun } else if (has_data == PVRDMA_INVALID_IDX) {
340*4882a593Smuzhiyun dev_err(&dev->pdev->dev, "CQ ring state invalid\n");
341*4882a593Smuzhiyun return -EAGAIN;
342*4882a593Smuzhiyun }
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun cqe = get_cqe(cq, head);
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun /* Ensure cqe is valid. */
347*4882a593Smuzhiyun rmb();
348*4882a593Smuzhiyun if (dev->qp_tbl[cqe->qp & 0xffff])
349*4882a593Smuzhiyun *cur_qp = (struct pvrdma_qp *)dev->qp_tbl[cqe->qp & 0xffff];
350*4882a593Smuzhiyun else
351*4882a593Smuzhiyun return -EAGAIN;
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun wc->opcode = pvrdma_wc_opcode_to_ib(cqe->opcode);
354*4882a593Smuzhiyun wc->status = pvrdma_wc_status_to_ib(cqe->status);
355*4882a593Smuzhiyun wc->wr_id = cqe->wr_id;
356*4882a593Smuzhiyun wc->qp = &(*cur_qp)->ibqp;
357*4882a593Smuzhiyun wc->byte_len = cqe->byte_len;
358*4882a593Smuzhiyun wc->ex.imm_data = cqe->imm_data;
359*4882a593Smuzhiyun wc->src_qp = cqe->src_qp;
360*4882a593Smuzhiyun wc->wc_flags = pvrdma_wc_flags_to_ib(cqe->wc_flags);
361*4882a593Smuzhiyun wc->pkey_index = cqe->pkey_index;
362*4882a593Smuzhiyun wc->slid = cqe->slid;
363*4882a593Smuzhiyun wc->sl = cqe->sl;
364*4882a593Smuzhiyun wc->dlid_path_bits = cqe->dlid_path_bits;
365*4882a593Smuzhiyun wc->port_num = cqe->port_num;
366*4882a593Smuzhiyun wc->vendor_err = cqe->vendor_err;
367*4882a593Smuzhiyun wc->network_hdr_type = pvrdma_network_type_to_ib(cqe->network_hdr_type);
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun /* Update shared ring state */
370*4882a593Smuzhiyun pvrdma_idx_ring_inc(&cq->ring_state->rx.cons_head, cq->ibcq.cqe);
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun return 0;
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun /**
376*4882a593Smuzhiyun * pvrdma_poll_cq - poll for work completion queue entries
377*4882a593Smuzhiyun * @ibcq: completion queue
378*4882a593Smuzhiyun * @num_entries: the maximum number of entries
379*4882a593Smuzhiyun * @wc: pointer to work completion array
380*4882a593Smuzhiyun *
381*4882a593Smuzhiyun * @return: number of polled completion entries
382*4882a593Smuzhiyun */
pvrdma_poll_cq(struct ib_cq * ibcq,int num_entries,struct ib_wc * wc)383*4882a593Smuzhiyun int pvrdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc)
384*4882a593Smuzhiyun {
385*4882a593Smuzhiyun struct pvrdma_cq *cq = to_vcq(ibcq);
386*4882a593Smuzhiyun struct pvrdma_qp *cur_qp = NULL;
387*4882a593Smuzhiyun unsigned long flags;
388*4882a593Smuzhiyun int npolled;
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun if (num_entries < 1 || wc == NULL)
391*4882a593Smuzhiyun return 0;
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun spin_lock_irqsave(&cq->cq_lock, flags);
394*4882a593Smuzhiyun for (npolled = 0; npolled < num_entries; ++npolled) {
395*4882a593Smuzhiyun if (pvrdma_poll_one(cq, &cur_qp, wc + npolled))
396*4882a593Smuzhiyun break;
397*4882a593Smuzhiyun }
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun spin_unlock_irqrestore(&cq->cq_lock, flags);
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun /* Ensure we do not return errors from poll_cq */
402*4882a593Smuzhiyun return npolled;
403*4882a593Smuzhiyun }
404