1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved.
3*4882a593Smuzhiyun * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This software is available to you under a choice of one of two
6*4882a593Smuzhiyun * licenses. You may choose to be licensed under the terms of the GNU
7*4882a593Smuzhiyun * General Public License (GPL) Version 2, available from the file
8*4882a593Smuzhiyun * COPYING in the main directory of this source tree, or the
9*4882a593Smuzhiyun * OpenIB.org BSD license below:
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or
12*4882a593Smuzhiyun * without modification, are permitted provided that the following
13*4882a593Smuzhiyun * conditions are met:
14*4882a593Smuzhiyun *
15*4882a593Smuzhiyun * - Redistributions of source code must retain the above
16*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
17*4882a593Smuzhiyun * disclaimer.
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun * - Redistributions in binary form must reproduce the above
20*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
21*4882a593Smuzhiyun * disclaimer in the documentation and/or other materials
22*4882a593Smuzhiyun * provided with the distribution.
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26*4882a593Smuzhiyun * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28*4882a593Smuzhiyun * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29*4882a593Smuzhiyun * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30*4882a593Smuzhiyun * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31*4882a593Smuzhiyun * SOFTWARE.
32*4882a593Smuzhiyun */
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #include <linux/mm.h>
35*4882a593Smuzhiyun #include <linux/sched/signal.h>
36*4882a593Smuzhiyun #include <linux/device.h>
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun #include "qib.h"
39*4882a593Smuzhiyun
__qib_release_user_pages(struct page ** p,size_t num_pages,int dirty)40*4882a593Smuzhiyun static void __qib_release_user_pages(struct page **p, size_t num_pages,
41*4882a593Smuzhiyun int dirty)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun unpin_user_pages_dirty_lock(p, num_pages, dirty);
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun /**
47*4882a593Smuzhiyun * qib_map_page - a safety wrapper around pci_map_page()
48*4882a593Smuzhiyun *
49*4882a593Smuzhiyun * A dma_addr of all 0's is interpreted by the chip as "disabled".
50*4882a593Smuzhiyun * Unfortunately, it can also be a valid dma_addr returned on some
51*4882a593Smuzhiyun * architectures.
52*4882a593Smuzhiyun *
53*4882a593Smuzhiyun * The powerpc iommu assigns dma_addrs in ascending order, so we don't
54*4882a593Smuzhiyun * have to bother with retries or mapping a dummy page to insure we
55*4882a593Smuzhiyun * don't just get the same mapping again.
56*4882a593Smuzhiyun *
57*4882a593Smuzhiyun * I'm sure we won't be so lucky with other iommu's, so FIXME.
58*4882a593Smuzhiyun */
qib_map_page(struct pci_dev * hwdev,struct page * page,dma_addr_t * daddr)59*4882a593Smuzhiyun int qib_map_page(struct pci_dev *hwdev, struct page *page, dma_addr_t *daddr)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun dma_addr_t phys;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun phys = pci_map_page(hwdev, page, 0, PAGE_SIZE, PCI_DMA_FROMDEVICE);
64*4882a593Smuzhiyun if (pci_dma_mapping_error(hwdev, phys))
65*4882a593Smuzhiyun return -ENOMEM;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun if (!phys) {
68*4882a593Smuzhiyun pci_unmap_page(hwdev, phys, PAGE_SIZE, PCI_DMA_FROMDEVICE);
69*4882a593Smuzhiyun phys = pci_map_page(hwdev, page, 0, PAGE_SIZE,
70*4882a593Smuzhiyun PCI_DMA_FROMDEVICE);
71*4882a593Smuzhiyun if (pci_dma_mapping_error(hwdev, phys))
72*4882a593Smuzhiyun return -ENOMEM;
73*4882a593Smuzhiyun /*
74*4882a593Smuzhiyun * FIXME: If we get 0 again, we should keep this page,
75*4882a593Smuzhiyun * map another, then free the 0 page.
76*4882a593Smuzhiyun */
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun *daddr = phys;
79*4882a593Smuzhiyun return 0;
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun /**
83*4882a593Smuzhiyun * qib_get_user_pages - lock user pages into memory
84*4882a593Smuzhiyun * @start_page: the start page
85*4882a593Smuzhiyun * @num_pages: the number of pages
86*4882a593Smuzhiyun * @p: the output page structures
87*4882a593Smuzhiyun *
88*4882a593Smuzhiyun * This function takes a given start page (page aligned user virtual
89*4882a593Smuzhiyun * address) and pins it and the following specified number of pages. For
90*4882a593Smuzhiyun * now, num_pages is always 1, but that will probably change at some point
91*4882a593Smuzhiyun * (because caller is doing expected sends on a single virtually contiguous
92*4882a593Smuzhiyun * buffer, so we can do all pages at once).
93*4882a593Smuzhiyun */
qib_get_user_pages(unsigned long start_page,size_t num_pages,struct page ** p)94*4882a593Smuzhiyun int qib_get_user_pages(unsigned long start_page, size_t num_pages,
95*4882a593Smuzhiyun struct page **p)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun unsigned long locked, lock_limit;
98*4882a593Smuzhiyun size_t got;
99*4882a593Smuzhiyun int ret;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun lock_limit = rlimit(RLIMIT_MEMLOCK) >> PAGE_SHIFT;
102*4882a593Smuzhiyun locked = atomic64_add_return(num_pages, ¤t->mm->pinned_vm);
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun if (locked > lock_limit && !capable(CAP_IPC_LOCK)) {
105*4882a593Smuzhiyun ret = -ENOMEM;
106*4882a593Smuzhiyun goto bail;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun mmap_read_lock(current->mm);
110*4882a593Smuzhiyun for (got = 0; got < num_pages; got += ret) {
111*4882a593Smuzhiyun ret = pin_user_pages(start_page + got * PAGE_SIZE,
112*4882a593Smuzhiyun num_pages - got,
113*4882a593Smuzhiyun FOLL_LONGTERM | FOLL_WRITE | FOLL_FORCE,
114*4882a593Smuzhiyun p + got, NULL);
115*4882a593Smuzhiyun if (ret < 0) {
116*4882a593Smuzhiyun mmap_read_unlock(current->mm);
117*4882a593Smuzhiyun goto bail_release;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun mmap_read_unlock(current->mm);
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun return 0;
123*4882a593Smuzhiyun bail_release:
124*4882a593Smuzhiyun __qib_release_user_pages(p, got, 0);
125*4882a593Smuzhiyun bail:
126*4882a593Smuzhiyun atomic64_sub(num_pages, ¤t->mm->pinned_vm);
127*4882a593Smuzhiyun return ret;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun
qib_release_user_pages(struct page ** p,size_t num_pages)130*4882a593Smuzhiyun void qib_release_user_pages(struct page **p, size_t num_pages)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun __qib_release_user_pages(p, num_pages, 1);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun /* during close after signal, mm can be NULL */
135*4882a593Smuzhiyun if (current->mm)
136*4882a593Smuzhiyun atomic64_sub(num_pages, ¤t->mm->pinned_vm);
137*4882a593Smuzhiyun }
138