xref: /OK3568_Linux_fs/kernel/drivers/infiniband/hw/qib/qib_mad.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (c) 2012 Intel Corporation.  All rights reserved.
3*4882a593Smuzhiyun  * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
4*4882a593Smuzhiyun  * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * This software is available to you under a choice of one of two
7*4882a593Smuzhiyun  * licenses.  You may choose to be licensed under the terms of the GNU
8*4882a593Smuzhiyun  * General Public License (GPL) Version 2, available from the file
9*4882a593Smuzhiyun  * COPYING in the main directory of this source tree, or the
10*4882a593Smuzhiyun  * OpenIB.org BSD license below:
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  *     Redistribution and use in source and binary forms, with or
13*4882a593Smuzhiyun  *     without modification, are permitted provided that the following
14*4882a593Smuzhiyun  *     conditions are met:
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  *      - Redistributions of source code must retain the above
17*4882a593Smuzhiyun  *        copyright notice, this list of conditions and the following
18*4882a593Smuzhiyun  *        disclaimer.
19*4882a593Smuzhiyun  *
20*4882a593Smuzhiyun  *      - Redistributions in binary form must reproduce the above
21*4882a593Smuzhiyun  *        copyright notice, this list of conditions and the following
22*4882a593Smuzhiyun  *        disclaimer in the documentation and/or other materials
23*4882a593Smuzhiyun  *        provided with the distribution.
24*4882a593Smuzhiyun  *
25*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26*4882a593Smuzhiyun  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27*4882a593Smuzhiyun  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28*4882a593Smuzhiyun  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29*4882a593Smuzhiyun  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30*4882a593Smuzhiyun  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31*4882a593Smuzhiyun  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32*4882a593Smuzhiyun  * SOFTWARE.
33*4882a593Smuzhiyun  */
34*4882a593Smuzhiyun #ifndef _QIB_MAD_H
35*4882a593Smuzhiyun #define _QIB_MAD_H
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #include <rdma/ib_pma.h>
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun #define IB_SMP_UNSUP_VERSION \
40*4882a593Smuzhiyun cpu_to_be16(IB_MGMT_MAD_STATUS_BAD_VERSION)
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #define IB_SMP_UNSUP_METHOD \
43*4882a593Smuzhiyun cpu_to_be16(IB_MGMT_MAD_STATUS_UNSUPPORTED_METHOD)
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun #define IB_SMP_UNSUP_METH_ATTR \
46*4882a593Smuzhiyun cpu_to_be16(IB_MGMT_MAD_STATUS_UNSUPPORTED_METHOD_ATTRIB)
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun #define IB_SMP_INVALID_FIELD \
49*4882a593Smuzhiyun cpu_to_be16(IB_MGMT_MAD_STATUS_INVALID_ATTRIB_VALUE)
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun #define IB_VLARB_LOWPRI_0_31    1
52*4882a593Smuzhiyun #define IB_VLARB_LOWPRI_32_63   2
53*4882a593Smuzhiyun #define IB_VLARB_HIGHPRI_0_31   3
54*4882a593Smuzhiyun #define IB_VLARB_HIGHPRI_32_63  4
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun #define IB_PMA_PORT_COUNTERS_CONG       cpu_to_be16(0xFF00)
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun struct ib_pma_portcounters_cong {
59*4882a593Smuzhiyun 	u8 reserved;
60*4882a593Smuzhiyun 	u8 reserved1;
61*4882a593Smuzhiyun 	__be16 port_check_rate;
62*4882a593Smuzhiyun 	__be16 symbol_error_counter;
63*4882a593Smuzhiyun 	u8 link_error_recovery_counter;
64*4882a593Smuzhiyun 	u8 link_downed_counter;
65*4882a593Smuzhiyun 	__be16 port_rcv_errors;
66*4882a593Smuzhiyun 	__be16 port_rcv_remphys_errors;
67*4882a593Smuzhiyun 	__be16 port_rcv_switch_relay_errors;
68*4882a593Smuzhiyun 	__be16 port_xmit_discards;
69*4882a593Smuzhiyun 	u8 port_xmit_constraint_errors;
70*4882a593Smuzhiyun 	u8 port_rcv_constraint_errors;
71*4882a593Smuzhiyun 	u8 reserved2;
72*4882a593Smuzhiyun 	u8 link_overrun_errors; /* LocalLink: 7:4, BufferOverrun: 3:0 */
73*4882a593Smuzhiyun 	__be16 reserved3;
74*4882a593Smuzhiyun 	__be16 vl15_dropped;
75*4882a593Smuzhiyun 	__be64 port_xmit_data;
76*4882a593Smuzhiyun 	__be64 port_rcv_data;
77*4882a593Smuzhiyun 	__be64 port_xmit_packets;
78*4882a593Smuzhiyun 	__be64 port_rcv_packets;
79*4882a593Smuzhiyun 	__be64 port_xmit_wait;
80*4882a593Smuzhiyun 	__be64 port_adr_events;
81*4882a593Smuzhiyun } __packed;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun #define IB_PMA_CONG_HW_CONTROL_TIMER            0x00
84*4882a593Smuzhiyun #define IB_PMA_CONG_HW_CONTROL_SAMPLE           0x01
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun #define QIB_XMIT_RATE_UNSUPPORTED               0x0
87*4882a593Smuzhiyun #define QIB_XMIT_RATE_PICO                      0x7
88*4882a593Smuzhiyun /* number of 4nsec cycles equaling 2secs */
89*4882a593Smuzhiyun #define QIB_CONG_TIMER_PSINTERVAL               0x1DCD64EC
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun #define IB_PMA_SEL_CONG_ALL                     0x01
92*4882a593Smuzhiyun #define IB_PMA_SEL_CONG_PORT_DATA               0x02
93*4882a593Smuzhiyun #define IB_PMA_SEL_CONG_XMIT                    0x04
94*4882a593Smuzhiyun #define IB_PMA_SEL_CONG_ROUTING                 0x08
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun /*
97*4882a593Smuzhiyun  * Congestion control class attributes
98*4882a593Smuzhiyun  */
99*4882a593Smuzhiyun #define IB_CC_ATTR_CLASSPORTINFO			cpu_to_be16(0x0001)
100*4882a593Smuzhiyun #define IB_CC_ATTR_NOTICE				cpu_to_be16(0x0002)
101*4882a593Smuzhiyun #define IB_CC_ATTR_CONGESTION_INFO			cpu_to_be16(0x0011)
102*4882a593Smuzhiyun #define IB_CC_ATTR_CONGESTION_KEY_INFO			cpu_to_be16(0x0012)
103*4882a593Smuzhiyun #define IB_CC_ATTR_CONGESTION_LOG			cpu_to_be16(0x0013)
104*4882a593Smuzhiyun #define IB_CC_ATTR_SWITCH_CONGESTION_SETTING		cpu_to_be16(0x0014)
105*4882a593Smuzhiyun #define IB_CC_ATTR_SWITCH_PORT_CONGESTION_SETTING	cpu_to_be16(0x0015)
106*4882a593Smuzhiyun #define IB_CC_ATTR_CA_CONGESTION_SETTING		cpu_to_be16(0x0016)
107*4882a593Smuzhiyun #define IB_CC_ATTR_CONGESTION_CONTROL_TABLE		cpu_to_be16(0x0017)
108*4882a593Smuzhiyun #define IB_CC_ATTR_TIME_STAMP				cpu_to_be16(0x0018)
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun /* generalizations for threshold values */
111*4882a593Smuzhiyun #define IB_CC_THRESHOLD_NONE 0x0
112*4882a593Smuzhiyun #define IB_CC_THRESHOLD_MIN  0x1
113*4882a593Smuzhiyun #define IB_CC_THRESHOLD_MAX  0xf
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun /* CCA MAD header constants */
116*4882a593Smuzhiyun #define IB_CC_MAD_LOGDATA_LEN 32
117*4882a593Smuzhiyun #define IB_CC_MAD_MGMTDATA_LEN 192
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun struct ib_cc_mad {
120*4882a593Smuzhiyun 	u8	base_version;
121*4882a593Smuzhiyun 	u8	mgmt_class;
122*4882a593Smuzhiyun 	u8	class_version;
123*4882a593Smuzhiyun 	u8	method;
124*4882a593Smuzhiyun 	__be16	status;
125*4882a593Smuzhiyun 	__be16	class_specific;
126*4882a593Smuzhiyun 	__be64	tid;
127*4882a593Smuzhiyun 	__be16	attr_id;
128*4882a593Smuzhiyun 	__be16	resv;
129*4882a593Smuzhiyun 	__be32	attr_mod;
130*4882a593Smuzhiyun 	__be64 cckey;
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	/* For CongestionLog attribute only */
133*4882a593Smuzhiyun 	u8 log_data[IB_CC_MAD_LOGDATA_LEN];
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	u8 mgmt_data[IB_CC_MAD_MGMTDATA_LEN];
136*4882a593Smuzhiyun } __packed;
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun /*
139*4882a593Smuzhiyun  * Congestion Control class portinfo capability mask bits
140*4882a593Smuzhiyun  */
141*4882a593Smuzhiyun #define IB_CC_CPI_CM_TRAP_GEN		cpu_to_be16(1 << 0)
142*4882a593Smuzhiyun #define IB_CC_CPI_CM_GET_SET_NOTICE	cpu_to_be16(1 << 1)
143*4882a593Smuzhiyun #define IB_CC_CPI_CM_CAP2		cpu_to_be16(1 << 2)
144*4882a593Smuzhiyun #define IB_CC_CPI_CM_ENHANCEDPORT0_CC	cpu_to_be16(1 << 8)
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun struct ib_cc_classportinfo_attr {
147*4882a593Smuzhiyun 	u8 base_version;
148*4882a593Smuzhiyun 	u8 class_version;
149*4882a593Smuzhiyun 	__be16 cap_mask;
150*4882a593Smuzhiyun 	u8 reserved[3];
151*4882a593Smuzhiyun 	u8 resp_time_value;     /* only lower 5 bits */
152*4882a593Smuzhiyun 	union ib_gid redirect_gid;
153*4882a593Smuzhiyun 	__be32 redirect_tc_sl_fl;       /* 8, 4, 20 bits respectively */
154*4882a593Smuzhiyun 	__be16 redirect_lid;
155*4882a593Smuzhiyun 	__be16 redirect_pkey;
156*4882a593Smuzhiyun 	__be32 redirect_qp;     /* only lower 24 bits */
157*4882a593Smuzhiyun 	__be32 redirect_qkey;
158*4882a593Smuzhiyun 	union ib_gid trap_gid;
159*4882a593Smuzhiyun 	__be32 trap_tc_sl_fl;   /* 8, 4, 20 bits respectively */
160*4882a593Smuzhiyun 	__be16 trap_lid;
161*4882a593Smuzhiyun 	__be16 trap_pkey;
162*4882a593Smuzhiyun 	__be32 trap_hl_qp;      /* 8, 24 bits respectively */
163*4882a593Smuzhiyun 	__be32 trap_qkey;
164*4882a593Smuzhiyun } __packed;
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun /* Congestion control traps */
167*4882a593Smuzhiyun #define IB_CC_TRAP_KEY_VIOLATION 0x0000
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun struct ib_cc_trap_key_violation_attr {
170*4882a593Smuzhiyun 	__be16 source_lid;
171*4882a593Smuzhiyun 	u8 method;
172*4882a593Smuzhiyun 	u8 reserved1;
173*4882a593Smuzhiyun 	__be16 attrib_id;
174*4882a593Smuzhiyun 	__be32 attrib_mod;
175*4882a593Smuzhiyun 	__be32 qp;
176*4882a593Smuzhiyun 	__be64 cckey;
177*4882a593Smuzhiyun 	u8 sgid[16];
178*4882a593Smuzhiyun 	u8 padding[24];
179*4882a593Smuzhiyun } __packed;
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun /* Congestion info flags */
182*4882a593Smuzhiyun #define IB_CC_CI_FLAGS_CREDIT_STARVATION 0x1
183*4882a593Smuzhiyun #define IB_CC_TABLE_CAP_DEFAULT 31
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun struct ib_cc_info_attr {
186*4882a593Smuzhiyun 	__be16 congestion_info;
187*4882a593Smuzhiyun 	u8  control_table_cap; /* Multiple of 64 entry unit CCTs */
188*4882a593Smuzhiyun } __packed;
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun struct ib_cc_key_info_attr {
191*4882a593Smuzhiyun 	__be64 cckey;
192*4882a593Smuzhiyun 	u8  protect;
193*4882a593Smuzhiyun 	__be16 lease_period;
194*4882a593Smuzhiyun 	__be16 violations;
195*4882a593Smuzhiyun } __packed;
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun #define IB_CC_CL_CA_LOGEVENTS_LEN 208
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun struct ib_cc_log_attr {
200*4882a593Smuzhiyun 	u8 log_type;
201*4882a593Smuzhiyun 	u8 congestion_flags;
202*4882a593Smuzhiyun 	__be16 threshold_event_counter;
203*4882a593Smuzhiyun 	__be16 threshold_congestion_event_map;
204*4882a593Smuzhiyun 	__be16 current_time_stamp;
205*4882a593Smuzhiyun 	u8 log_events[IB_CC_CL_CA_LOGEVENTS_LEN];
206*4882a593Smuzhiyun } __packed;
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun #define IB_CC_CLEC_SERVICETYPE_RC 0x0
209*4882a593Smuzhiyun #define IB_CC_CLEC_SERVICETYPE_UC 0x1
210*4882a593Smuzhiyun #define IB_CC_CLEC_SERVICETYPE_RD 0x2
211*4882a593Smuzhiyun #define IB_CC_CLEC_SERVICETYPE_UD 0x3
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun struct ib_cc_log_event {
214*4882a593Smuzhiyun 	u8 local_qp_cn_entry;
215*4882a593Smuzhiyun 	u8 remote_qp_number_cn_entry[3];
216*4882a593Smuzhiyun 	u8  sl_cn_entry:4;
217*4882a593Smuzhiyun 	u8  service_type_cn_entry:4;
218*4882a593Smuzhiyun 	__be32 remote_lid_cn_entry;
219*4882a593Smuzhiyun 	__be32 timestamp_cn_entry;
220*4882a593Smuzhiyun } __packed;
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun /* Sixteen congestion entries */
223*4882a593Smuzhiyun #define IB_CC_CCS_ENTRIES 16
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun /* Port control flags */
226*4882a593Smuzhiyun #define IB_CC_CCS_PC_SL_BASED 0x01
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun struct ib_cc_congestion_entry {
229*4882a593Smuzhiyun 	u8 ccti_increase;
230*4882a593Smuzhiyun 	__be16 ccti_timer;
231*4882a593Smuzhiyun 	u8 trigger_threshold;
232*4882a593Smuzhiyun 	u8 ccti_min; /* min CCTI for cc table */
233*4882a593Smuzhiyun } __packed;
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun struct ib_cc_congestion_entry_shadow {
236*4882a593Smuzhiyun 	u8 ccti_increase;
237*4882a593Smuzhiyun 	u16 ccti_timer;
238*4882a593Smuzhiyun 	u8 trigger_threshold;
239*4882a593Smuzhiyun 	u8 ccti_min; /* min CCTI for cc table */
240*4882a593Smuzhiyun } __packed;
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun struct ib_cc_congestion_setting_attr {
243*4882a593Smuzhiyun 	__be16 port_control;
244*4882a593Smuzhiyun 	__be16 control_map;
245*4882a593Smuzhiyun 	struct ib_cc_congestion_entry entries[IB_CC_CCS_ENTRIES];
246*4882a593Smuzhiyun } __packed;
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun struct ib_cc_congestion_setting_attr_shadow {
249*4882a593Smuzhiyun 	u16 port_control;
250*4882a593Smuzhiyun 	u16 control_map;
251*4882a593Smuzhiyun 	struct ib_cc_congestion_entry_shadow entries[IB_CC_CCS_ENTRIES];
252*4882a593Smuzhiyun } __packed;
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun #define IB_CC_TABLE_ENTRY_INCREASE_DEFAULT 1
255*4882a593Smuzhiyun #define IB_CC_TABLE_ENTRY_TIMER_DEFAULT 1
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun /* 64 Congestion Control table entries in a single MAD */
258*4882a593Smuzhiyun #define IB_CCT_ENTRIES 64
259*4882a593Smuzhiyun #define IB_CCT_MIN_ENTRIES (IB_CCT_ENTRIES * 2)
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun struct ib_cc_table_entry {
262*4882a593Smuzhiyun 	__be16 entry; /* shift:2, multiplier:14 */
263*4882a593Smuzhiyun };
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun struct ib_cc_table_entry_shadow {
266*4882a593Smuzhiyun 	u16 entry; /* shift:2, multiplier:14 */
267*4882a593Smuzhiyun };
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun struct ib_cc_table_attr {
270*4882a593Smuzhiyun 	__be16 ccti_limit; /* max CCTI for cc table */
271*4882a593Smuzhiyun 	struct ib_cc_table_entry ccti_entries[IB_CCT_ENTRIES];
272*4882a593Smuzhiyun } __packed;
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun struct ib_cc_table_attr_shadow {
275*4882a593Smuzhiyun 	u16 ccti_limit; /* max CCTI for cc table */
276*4882a593Smuzhiyun 	struct ib_cc_table_entry_shadow ccti_entries[IB_CCT_ENTRIES];
277*4882a593Smuzhiyun } __packed;
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun #define CC_TABLE_SHADOW_MAX \
280*4882a593Smuzhiyun 	(IB_CC_TABLE_CAP_DEFAULT * IB_CCT_ENTRIES)
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun struct cc_table_shadow {
283*4882a593Smuzhiyun 	u16 ccti_last_entry;
284*4882a593Smuzhiyun 	struct ib_cc_table_entry_shadow entries[CC_TABLE_SHADOW_MAX];
285*4882a593Smuzhiyun } __packed;
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun /*
288*4882a593Smuzhiyun  * The PortSamplesControl.CounterMasks field is an array of 3 bit fields
289*4882a593Smuzhiyun  * which specify the N'th counter's capabilities. See ch. 16.1.3.2.
290*4882a593Smuzhiyun  * We support 5 counters which only count the mandatory quantities.
291*4882a593Smuzhiyun  */
292*4882a593Smuzhiyun #define COUNTER_MASK(q, n) (q << ((9 - n) * 3))
293*4882a593Smuzhiyun #define COUNTER_MASK0_9 \
294*4882a593Smuzhiyun 	cpu_to_be32(COUNTER_MASK(1, 0) | \
295*4882a593Smuzhiyun 		    COUNTER_MASK(1, 1) | \
296*4882a593Smuzhiyun 		    COUNTER_MASK(1, 2) | \
297*4882a593Smuzhiyun 		    COUNTER_MASK(1, 3) | \
298*4882a593Smuzhiyun 		    COUNTER_MASK(1, 4))
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun #endif				/* _QIB_MAD_H */
301