xref: /OK3568_Linux_fs/kernel/drivers/infiniband/hw/qib/qib_intr.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (c) 2006, 2007, 2008, 2009, 2010 QLogic Corporation.
3*4882a593Smuzhiyun  * All rights reserved.
4*4882a593Smuzhiyun  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * This software is available to you under a choice of one of two
7*4882a593Smuzhiyun  * licenses.  You may choose to be licensed under the terms of the GNU
8*4882a593Smuzhiyun  * General Public License (GPL) Version 2, available from the file
9*4882a593Smuzhiyun  * COPYING in the main directory of this source tree, or the
10*4882a593Smuzhiyun  * OpenIB.org BSD license below:
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  *     Redistribution and use in source and binary forms, with or
13*4882a593Smuzhiyun  *     without modification, are permitted provided that the following
14*4882a593Smuzhiyun  *     conditions are met:
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  *      - Redistributions of source code must retain the above
17*4882a593Smuzhiyun  *        copyright notice, this list of conditions and the following
18*4882a593Smuzhiyun  *        disclaimer.
19*4882a593Smuzhiyun  *
20*4882a593Smuzhiyun  *      - Redistributions in binary form must reproduce the above
21*4882a593Smuzhiyun  *        copyright notice, this list of conditions and the following
22*4882a593Smuzhiyun  *        disclaimer in the documentation and/or other materials
23*4882a593Smuzhiyun  *        provided with the distribution.
24*4882a593Smuzhiyun  *
25*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26*4882a593Smuzhiyun  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27*4882a593Smuzhiyun  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28*4882a593Smuzhiyun  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29*4882a593Smuzhiyun  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30*4882a593Smuzhiyun  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31*4882a593Smuzhiyun  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32*4882a593Smuzhiyun  * SOFTWARE.
33*4882a593Smuzhiyun  */
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #include <linux/pci.h>
36*4882a593Smuzhiyun #include <linux/delay.h>
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #include "qib.h"
39*4882a593Smuzhiyun #include "qib_common.h"
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun /**
42*4882a593Smuzhiyun  * qib_format_hwmsg - format a single hwerror message
43*4882a593Smuzhiyun  * @msg message buffer
44*4882a593Smuzhiyun  * @msgl length of message buffer
45*4882a593Smuzhiyun  * @hwmsg message to add to message buffer
46*4882a593Smuzhiyun  */
qib_format_hwmsg(char * msg,size_t msgl,const char * hwmsg)47*4882a593Smuzhiyun static void qib_format_hwmsg(char *msg, size_t msgl, const char *hwmsg)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun 	strlcat(msg, "[", msgl);
50*4882a593Smuzhiyun 	strlcat(msg, hwmsg, msgl);
51*4882a593Smuzhiyun 	strlcat(msg, "]", msgl);
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun /**
55*4882a593Smuzhiyun  * qib_format_hwerrors - format hardware error messages for display
56*4882a593Smuzhiyun  * @hwerrs hardware errors bit vector
57*4882a593Smuzhiyun  * @hwerrmsgs hardware error descriptions
58*4882a593Smuzhiyun  * @nhwerrmsgs number of hwerrmsgs
59*4882a593Smuzhiyun  * @msg message buffer
60*4882a593Smuzhiyun  * @msgl message buffer length
61*4882a593Smuzhiyun  */
qib_format_hwerrors(u64 hwerrs,const struct qib_hwerror_msgs * hwerrmsgs,size_t nhwerrmsgs,char * msg,size_t msgl)62*4882a593Smuzhiyun void qib_format_hwerrors(u64 hwerrs, const struct qib_hwerror_msgs *hwerrmsgs,
63*4882a593Smuzhiyun 			 size_t nhwerrmsgs, char *msg, size_t msgl)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun 	int i;
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	for (i = 0; i < nhwerrmsgs; i++)
68*4882a593Smuzhiyun 		if (hwerrs & hwerrmsgs[i].mask)
69*4882a593Smuzhiyun 			qib_format_hwmsg(msg, msgl, hwerrmsgs[i].msg);
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun 
signal_ib_event(struct qib_pportdata * ppd,enum ib_event_type ev)72*4882a593Smuzhiyun static void signal_ib_event(struct qib_pportdata *ppd, enum ib_event_type ev)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun 	struct ib_event event;
75*4882a593Smuzhiyun 	struct qib_devdata *dd = ppd->dd;
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	event.device = &dd->verbs_dev.rdi.ibdev;
78*4882a593Smuzhiyun 	event.element.port_num = ppd->port;
79*4882a593Smuzhiyun 	event.event = ev;
80*4882a593Smuzhiyun 	ib_dispatch_event(&event);
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun 
qib_handle_e_ibstatuschanged(struct qib_pportdata * ppd,u64 ibcs)83*4882a593Smuzhiyun void qib_handle_e_ibstatuschanged(struct qib_pportdata *ppd, u64 ibcs)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun 	struct qib_devdata *dd = ppd->dd;
86*4882a593Smuzhiyun 	unsigned long flags;
87*4882a593Smuzhiyun 	u32 lstate;
88*4882a593Smuzhiyun 	u8 ltstate;
89*4882a593Smuzhiyun 	enum ib_event_type ev = 0;
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 	lstate = dd->f_iblink_state(ibcs); /* linkstate */
92*4882a593Smuzhiyun 	ltstate = dd->f_ibphys_portstate(ibcs);
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	/*
95*4882a593Smuzhiyun 	 * If linkstate transitions into INIT from any of the various down
96*4882a593Smuzhiyun 	 * states, or if it transitions from any of the up (INIT or better)
97*4882a593Smuzhiyun 	 * states into any of the down states (except link recovery), then
98*4882a593Smuzhiyun 	 * call the chip-specific code to take appropriate actions.
99*4882a593Smuzhiyun 	 *
100*4882a593Smuzhiyun 	 * ppd->lflags could be 0 if this is the first time the interrupt
101*4882a593Smuzhiyun 	 * handlers has been called but the link is already up.
102*4882a593Smuzhiyun 	 */
103*4882a593Smuzhiyun 	if (lstate >= IB_PORT_INIT &&
104*4882a593Smuzhiyun 	    (!ppd->lflags || (ppd->lflags & QIBL_LINKDOWN)) &&
105*4882a593Smuzhiyun 	    ltstate == IB_PHYSPORTSTATE_LINKUP) {
106*4882a593Smuzhiyun 		/* transitioned to UP */
107*4882a593Smuzhiyun 		if (dd->f_ib_updown(ppd, 1, ibcs))
108*4882a593Smuzhiyun 			goto skip_ibchange; /* chip-code handled */
109*4882a593Smuzhiyun 	} else if (ppd->lflags & (QIBL_LINKINIT | QIBL_LINKARMED |
110*4882a593Smuzhiyun 		   QIBL_LINKACTIVE | QIBL_IB_FORCE_NOTIFY)) {
111*4882a593Smuzhiyun 		if (ltstate != IB_PHYSPORTSTATE_LINKUP &&
112*4882a593Smuzhiyun 		    ltstate <= IB_PHYSPORTSTATE_CFG_TRAIN &&
113*4882a593Smuzhiyun 		    dd->f_ib_updown(ppd, 0, ibcs))
114*4882a593Smuzhiyun 			goto skip_ibchange; /* chip-code handled */
115*4882a593Smuzhiyun 		qib_set_uevent_bits(ppd, _QIB_EVENT_LINKDOWN_BIT);
116*4882a593Smuzhiyun 	}
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	if (lstate != IB_PORT_DOWN) {
119*4882a593Smuzhiyun 		/* lstate is INIT, ARMED, or ACTIVE */
120*4882a593Smuzhiyun 		if (lstate != IB_PORT_ACTIVE) {
121*4882a593Smuzhiyun 			*ppd->statusp &= ~QIB_STATUS_IB_READY;
122*4882a593Smuzhiyun 			if (ppd->lflags & QIBL_LINKACTIVE)
123*4882a593Smuzhiyun 				ev = IB_EVENT_PORT_ERR;
124*4882a593Smuzhiyun 			spin_lock_irqsave(&ppd->lflags_lock, flags);
125*4882a593Smuzhiyun 			if (lstate == IB_PORT_ARMED) {
126*4882a593Smuzhiyun 				ppd->lflags |= QIBL_LINKARMED | QIBL_LINKV;
127*4882a593Smuzhiyun 				ppd->lflags &= ~(QIBL_LINKINIT |
128*4882a593Smuzhiyun 					QIBL_LINKDOWN | QIBL_LINKACTIVE);
129*4882a593Smuzhiyun 			} else {
130*4882a593Smuzhiyun 				ppd->lflags |= QIBL_LINKINIT | QIBL_LINKV;
131*4882a593Smuzhiyun 				ppd->lflags &= ~(QIBL_LINKARMED |
132*4882a593Smuzhiyun 					QIBL_LINKDOWN | QIBL_LINKACTIVE);
133*4882a593Smuzhiyun 			}
134*4882a593Smuzhiyun 			spin_unlock_irqrestore(&ppd->lflags_lock, flags);
135*4882a593Smuzhiyun 			/* start a 75msec timer to clear symbol errors */
136*4882a593Smuzhiyun 			mod_timer(&ppd->symerr_clear_timer,
137*4882a593Smuzhiyun 				  msecs_to_jiffies(75));
138*4882a593Smuzhiyun 		} else if (ltstate == IB_PHYSPORTSTATE_LINKUP &&
139*4882a593Smuzhiyun 			   !(ppd->lflags & QIBL_LINKACTIVE)) {
140*4882a593Smuzhiyun 			/* active, but not active defered */
141*4882a593Smuzhiyun 			qib_hol_up(ppd); /* useful only for 6120 now */
142*4882a593Smuzhiyun 			*ppd->statusp |=
143*4882a593Smuzhiyun 				QIB_STATUS_IB_READY | QIB_STATUS_IB_CONF;
144*4882a593Smuzhiyun 			qib_clear_symerror_on_linkup(&ppd->symerr_clear_timer);
145*4882a593Smuzhiyun 			spin_lock_irqsave(&ppd->lflags_lock, flags);
146*4882a593Smuzhiyun 			ppd->lflags |= QIBL_LINKACTIVE | QIBL_LINKV;
147*4882a593Smuzhiyun 			ppd->lflags &= ~(QIBL_LINKINIT |
148*4882a593Smuzhiyun 				QIBL_LINKDOWN | QIBL_LINKARMED);
149*4882a593Smuzhiyun 			spin_unlock_irqrestore(&ppd->lflags_lock, flags);
150*4882a593Smuzhiyun 			if (dd->flags & QIB_HAS_SEND_DMA)
151*4882a593Smuzhiyun 				qib_sdma_process_event(ppd,
152*4882a593Smuzhiyun 					qib_sdma_event_e30_go_running);
153*4882a593Smuzhiyun 			ev = IB_EVENT_PORT_ACTIVE;
154*4882a593Smuzhiyun 			dd->f_setextled(ppd, 1);
155*4882a593Smuzhiyun 		}
156*4882a593Smuzhiyun 	} else { /* down */
157*4882a593Smuzhiyun 		if (ppd->lflags & QIBL_LINKACTIVE)
158*4882a593Smuzhiyun 			ev = IB_EVENT_PORT_ERR;
159*4882a593Smuzhiyun 		spin_lock_irqsave(&ppd->lflags_lock, flags);
160*4882a593Smuzhiyun 		ppd->lflags |= QIBL_LINKDOWN | QIBL_LINKV;
161*4882a593Smuzhiyun 		ppd->lflags &= ~(QIBL_LINKINIT |
162*4882a593Smuzhiyun 				 QIBL_LINKACTIVE | QIBL_LINKARMED);
163*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ppd->lflags_lock, flags);
164*4882a593Smuzhiyun 		*ppd->statusp &= ~QIB_STATUS_IB_READY;
165*4882a593Smuzhiyun 	}
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun skip_ibchange:
168*4882a593Smuzhiyun 	ppd->lastibcstat = ibcs;
169*4882a593Smuzhiyun 	if (ev)
170*4882a593Smuzhiyun 		signal_ib_event(ppd, ev);
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun 
qib_clear_symerror_on_linkup(struct timer_list * t)173*4882a593Smuzhiyun void qib_clear_symerror_on_linkup(struct timer_list *t)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun 	struct qib_pportdata *ppd = from_timer(ppd, t, symerr_clear_timer);
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	if (ppd->lflags & QIBL_LINKACTIVE)
178*4882a593Smuzhiyun 		return;
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	ppd->ibport_data.z_symbol_error_counter =
181*4882a593Smuzhiyun 		ppd->dd->f_portcntr(ppd, QIBPORTCNTR_IBSYMBOLERR);
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun /*
185*4882a593Smuzhiyun  * Handle receive interrupts for user ctxts; this means a user
186*4882a593Smuzhiyun  * process was waiting for a packet to arrive, and didn't want
187*4882a593Smuzhiyun  * to poll.
188*4882a593Smuzhiyun  */
qib_handle_urcv(struct qib_devdata * dd,u64 ctxtr)189*4882a593Smuzhiyun void qib_handle_urcv(struct qib_devdata *dd, u64 ctxtr)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun 	struct qib_ctxtdata *rcd;
192*4882a593Smuzhiyun 	unsigned long flags;
193*4882a593Smuzhiyun 	int i;
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	spin_lock_irqsave(&dd->uctxt_lock, flags);
196*4882a593Smuzhiyun 	for (i = dd->first_user_ctxt; dd->rcd && i < dd->cfgctxts; i++) {
197*4882a593Smuzhiyun 		if (!(ctxtr & (1ULL << i)))
198*4882a593Smuzhiyun 			continue;
199*4882a593Smuzhiyun 		rcd = dd->rcd[i];
200*4882a593Smuzhiyun 		if (!rcd || !rcd->cnt)
201*4882a593Smuzhiyun 			continue;
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 		if (test_and_clear_bit(QIB_CTXT_WAITING_RCV, &rcd->flag)) {
204*4882a593Smuzhiyun 			wake_up_interruptible(&rcd->wait);
205*4882a593Smuzhiyun 			dd->f_rcvctrl(rcd->ppd, QIB_RCVCTRL_INTRAVAIL_DIS,
206*4882a593Smuzhiyun 				      rcd->ctxt);
207*4882a593Smuzhiyun 		} else if (test_and_clear_bit(QIB_CTXT_WAITING_URG,
208*4882a593Smuzhiyun 					      &rcd->flag)) {
209*4882a593Smuzhiyun 			rcd->urgent++;
210*4882a593Smuzhiyun 			wake_up_interruptible(&rcd->wait);
211*4882a593Smuzhiyun 		}
212*4882a593Smuzhiyun 	}
213*4882a593Smuzhiyun 	spin_unlock_irqrestore(&dd->uctxt_lock, flags);
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun 
qib_bad_intrstatus(struct qib_devdata * dd)216*4882a593Smuzhiyun void qib_bad_intrstatus(struct qib_devdata *dd)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun 	static int allbits;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	/* separate routine, for better optimization of qib_intr() */
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	/*
223*4882a593Smuzhiyun 	 * We print the message and disable interrupts, in hope of
224*4882a593Smuzhiyun 	 * having a better chance of debugging the problem.
225*4882a593Smuzhiyun 	 */
226*4882a593Smuzhiyun 	qib_dev_err(dd,
227*4882a593Smuzhiyun 		"Read of chip interrupt status failed disabling interrupts\n");
228*4882a593Smuzhiyun 	if (allbits++) {
229*4882a593Smuzhiyun 		/* disable interrupt delivery, something is very wrong */
230*4882a593Smuzhiyun 		if (allbits == 2)
231*4882a593Smuzhiyun 			dd->f_set_intr_state(dd, 0);
232*4882a593Smuzhiyun 		if (allbits == 3) {
233*4882a593Smuzhiyun 			qib_dev_err(dd,
234*4882a593Smuzhiyun 				"2nd bad interrupt status, unregistering interrupts\n");
235*4882a593Smuzhiyun 			dd->flags |= QIB_BADINTR;
236*4882a593Smuzhiyun 			dd->flags &= ~QIB_INITTED;
237*4882a593Smuzhiyun 			dd->f_free_irq(dd);
238*4882a593Smuzhiyun 		}
239*4882a593Smuzhiyun 	}
240*4882a593Smuzhiyun }
241