1*4882a593Smuzhiyun /* This file is part of the Emulex RoCE Device Driver for
2*4882a593Smuzhiyun * RoCE (RDMA over Converged Ethernet) adapters.
3*4882a593Smuzhiyun * Copyright (C) 2012-2015 Emulex. All rights reserved.
4*4882a593Smuzhiyun * EMULEX and SLI are trademarks of Emulex.
5*4882a593Smuzhiyun * www.emulex.com
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * This software is available to you under a choice of one of two licenses.
8*4882a593Smuzhiyun * You may choose to be licensed under the terms of the GNU General Public
9*4882a593Smuzhiyun * License (GPL) Version 2, available from the file COPYING in the main
10*4882a593Smuzhiyun * directory of this source tree, or the BSD license below:
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or without
13*4882a593Smuzhiyun * modification, are permitted provided that the following conditions
14*4882a593Smuzhiyun * are met:
15*4882a593Smuzhiyun *
16*4882a593Smuzhiyun * - Redistributions of source code must retain the above copyright notice,
17*4882a593Smuzhiyun * this list of conditions and the following disclaimer.
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun * - Redistributions in binary form must reproduce the above copyright
20*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer in
21*4882a593Smuzhiyun * the documentation and/or other materials provided with the distribution.
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24*4882a593Smuzhiyun * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE
25*4882a593Smuzhiyun * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26*4882a593Smuzhiyun * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
27*4882a593Smuzhiyun * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28*4882a593Smuzhiyun * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29*4882a593Smuzhiyun * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
30*4882a593Smuzhiyun * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31*4882a593Smuzhiyun * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
32*4882a593Smuzhiyun * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
33*4882a593Smuzhiyun * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34*4882a593Smuzhiyun *
35*4882a593Smuzhiyun * Contact Information:
36*4882a593Smuzhiyun * linux-drivers@emulex.com
37*4882a593Smuzhiyun *
38*4882a593Smuzhiyun * Emulex
39*4882a593Smuzhiyun * 3333 Susan Street
40*4882a593Smuzhiyun * Costa Mesa, CA 92626
41*4882a593Smuzhiyun */
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun #include <linux/module.h>
44*4882a593Smuzhiyun #include <linux/idr.h>
45*4882a593Smuzhiyun #include <rdma/ib_verbs.h>
46*4882a593Smuzhiyun #include <rdma/ib_user_verbs.h>
47*4882a593Smuzhiyun #include <rdma/ib_addr.h>
48*4882a593Smuzhiyun #include <rdma/ib_mad.h>
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun #include <linux/netdevice.h>
51*4882a593Smuzhiyun #include <net/addrconf.h>
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun #include "ocrdma.h"
54*4882a593Smuzhiyun #include "ocrdma_verbs.h"
55*4882a593Smuzhiyun #include "ocrdma_ah.h"
56*4882a593Smuzhiyun #include "be_roce.h"
57*4882a593Smuzhiyun #include "ocrdma_hw.h"
58*4882a593Smuzhiyun #include "ocrdma_stats.h"
59*4882a593Smuzhiyun #include <rdma/ocrdma-abi.h>
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun MODULE_DESCRIPTION(OCRDMA_ROCE_DRV_DESC " " OCRDMA_ROCE_DRV_VERSION);
62*4882a593Smuzhiyun MODULE_AUTHOR("Emulex Corporation");
63*4882a593Smuzhiyun MODULE_LICENSE("Dual BSD/GPL");
64*4882a593Smuzhiyun
ocrdma_get_guid(struct ocrdma_dev * dev,u8 * guid)65*4882a593Smuzhiyun void ocrdma_get_guid(struct ocrdma_dev *dev, u8 *guid)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun u8 mac_addr[6];
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun memcpy(&mac_addr[0], &dev->nic_info.mac_addr[0], ETH_ALEN);
70*4882a593Smuzhiyun guid[0] = mac_addr[0] ^ 2;
71*4882a593Smuzhiyun guid[1] = mac_addr[1];
72*4882a593Smuzhiyun guid[2] = mac_addr[2];
73*4882a593Smuzhiyun guid[3] = 0xff;
74*4882a593Smuzhiyun guid[4] = 0xfe;
75*4882a593Smuzhiyun guid[5] = mac_addr[3];
76*4882a593Smuzhiyun guid[6] = mac_addr[4];
77*4882a593Smuzhiyun guid[7] = mac_addr[5];
78*4882a593Smuzhiyun }
ocrdma_link_layer(struct ib_device * device,u8 port_num)79*4882a593Smuzhiyun static enum rdma_link_layer ocrdma_link_layer(struct ib_device *device,
80*4882a593Smuzhiyun u8 port_num)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun return IB_LINK_LAYER_ETHERNET;
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
ocrdma_port_immutable(struct ib_device * ibdev,u8 port_num,struct ib_port_immutable * immutable)85*4882a593Smuzhiyun static int ocrdma_port_immutable(struct ib_device *ibdev, u8 port_num,
86*4882a593Smuzhiyun struct ib_port_immutable *immutable)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun struct ib_port_attr attr;
89*4882a593Smuzhiyun struct ocrdma_dev *dev;
90*4882a593Smuzhiyun int err;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun dev = get_ocrdma_dev(ibdev);
93*4882a593Smuzhiyun immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
94*4882a593Smuzhiyun if (ocrdma_is_udp_encap_supported(dev))
95*4882a593Smuzhiyun immutable->core_cap_flags |= RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun err = ib_query_port(ibdev, port_num, &attr);
98*4882a593Smuzhiyun if (err)
99*4882a593Smuzhiyun return err;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun immutable->pkey_tbl_len = attr.pkey_tbl_len;
102*4882a593Smuzhiyun immutable->gid_tbl_len = attr.gid_tbl_len;
103*4882a593Smuzhiyun immutable->max_mad_size = IB_MGMT_MAD_SIZE;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun return 0;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
get_dev_fw_str(struct ib_device * device,char * str)108*4882a593Smuzhiyun static void get_dev_fw_str(struct ib_device *device, char *str)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun struct ocrdma_dev *dev = get_ocrdma_dev(device);
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun snprintf(str, IB_FW_VERSION_NAME_MAX, "%s", &dev->attr.fw_ver[0]);
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun /* OCRDMA sysfs interface */
hw_rev_show(struct device * device,struct device_attribute * attr,char * buf)116*4882a593Smuzhiyun static ssize_t hw_rev_show(struct device *device,
117*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun struct ocrdma_dev *dev =
120*4882a593Smuzhiyun rdma_device_to_drv_device(device, struct ocrdma_dev, ibdev);
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun return scnprintf(buf, PAGE_SIZE, "0x%x\n", dev->nic_info.pdev->vendor);
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun static DEVICE_ATTR_RO(hw_rev);
125*4882a593Smuzhiyun
hca_type_show(struct device * device,struct device_attribute * attr,char * buf)126*4882a593Smuzhiyun static ssize_t hca_type_show(struct device *device,
127*4882a593Smuzhiyun struct device_attribute *attr, char *buf)
128*4882a593Smuzhiyun {
129*4882a593Smuzhiyun struct ocrdma_dev *dev =
130*4882a593Smuzhiyun rdma_device_to_drv_device(device, struct ocrdma_dev, ibdev);
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun return scnprintf(buf, PAGE_SIZE, "%s\n", &dev->model_number[0]);
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun static DEVICE_ATTR_RO(hca_type);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun static struct attribute *ocrdma_attributes[] = {
137*4882a593Smuzhiyun &dev_attr_hw_rev.attr,
138*4882a593Smuzhiyun &dev_attr_hca_type.attr,
139*4882a593Smuzhiyun NULL
140*4882a593Smuzhiyun };
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun static const struct attribute_group ocrdma_attr_group = {
143*4882a593Smuzhiyun .attrs = ocrdma_attributes,
144*4882a593Smuzhiyun };
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun static const struct ib_device_ops ocrdma_dev_ops = {
147*4882a593Smuzhiyun .owner = THIS_MODULE,
148*4882a593Smuzhiyun .driver_id = RDMA_DRIVER_OCRDMA,
149*4882a593Smuzhiyun .uverbs_abi_ver = OCRDMA_ABI_VERSION,
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun .alloc_mr = ocrdma_alloc_mr,
152*4882a593Smuzhiyun .alloc_pd = ocrdma_alloc_pd,
153*4882a593Smuzhiyun .alloc_ucontext = ocrdma_alloc_ucontext,
154*4882a593Smuzhiyun .create_ah = ocrdma_create_ah,
155*4882a593Smuzhiyun .create_cq = ocrdma_create_cq,
156*4882a593Smuzhiyun .create_qp = ocrdma_create_qp,
157*4882a593Smuzhiyun .dealloc_pd = ocrdma_dealloc_pd,
158*4882a593Smuzhiyun .dealloc_ucontext = ocrdma_dealloc_ucontext,
159*4882a593Smuzhiyun .dereg_mr = ocrdma_dereg_mr,
160*4882a593Smuzhiyun .destroy_ah = ocrdma_destroy_ah,
161*4882a593Smuzhiyun .destroy_cq = ocrdma_destroy_cq,
162*4882a593Smuzhiyun .destroy_qp = ocrdma_destroy_qp,
163*4882a593Smuzhiyun .get_dev_fw_str = get_dev_fw_str,
164*4882a593Smuzhiyun .get_dma_mr = ocrdma_get_dma_mr,
165*4882a593Smuzhiyun .get_link_layer = ocrdma_link_layer,
166*4882a593Smuzhiyun .get_port_immutable = ocrdma_port_immutable,
167*4882a593Smuzhiyun .map_mr_sg = ocrdma_map_mr_sg,
168*4882a593Smuzhiyun .mmap = ocrdma_mmap,
169*4882a593Smuzhiyun .modify_qp = ocrdma_modify_qp,
170*4882a593Smuzhiyun .poll_cq = ocrdma_poll_cq,
171*4882a593Smuzhiyun .post_recv = ocrdma_post_recv,
172*4882a593Smuzhiyun .post_send = ocrdma_post_send,
173*4882a593Smuzhiyun .process_mad = ocrdma_process_mad,
174*4882a593Smuzhiyun .query_ah = ocrdma_query_ah,
175*4882a593Smuzhiyun .query_device = ocrdma_query_device,
176*4882a593Smuzhiyun .query_pkey = ocrdma_query_pkey,
177*4882a593Smuzhiyun .query_port = ocrdma_query_port,
178*4882a593Smuzhiyun .query_qp = ocrdma_query_qp,
179*4882a593Smuzhiyun .reg_user_mr = ocrdma_reg_user_mr,
180*4882a593Smuzhiyun .req_notify_cq = ocrdma_arm_cq,
181*4882a593Smuzhiyun .resize_cq = ocrdma_resize_cq,
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun INIT_RDMA_OBJ_SIZE(ib_ah, ocrdma_ah, ibah),
184*4882a593Smuzhiyun INIT_RDMA_OBJ_SIZE(ib_cq, ocrdma_cq, ibcq),
185*4882a593Smuzhiyun INIT_RDMA_OBJ_SIZE(ib_pd, ocrdma_pd, ibpd),
186*4882a593Smuzhiyun INIT_RDMA_OBJ_SIZE(ib_ucontext, ocrdma_ucontext, ibucontext),
187*4882a593Smuzhiyun };
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun static const struct ib_device_ops ocrdma_dev_srq_ops = {
190*4882a593Smuzhiyun .create_srq = ocrdma_create_srq,
191*4882a593Smuzhiyun .destroy_srq = ocrdma_destroy_srq,
192*4882a593Smuzhiyun .modify_srq = ocrdma_modify_srq,
193*4882a593Smuzhiyun .post_srq_recv = ocrdma_post_srq_recv,
194*4882a593Smuzhiyun .query_srq = ocrdma_query_srq,
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun INIT_RDMA_OBJ_SIZE(ib_srq, ocrdma_srq, ibsrq),
197*4882a593Smuzhiyun };
198*4882a593Smuzhiyun
ocrdma_register_device(struct ocrdma_dev * dev)199*4882a593Smuzhiyun static int ocrdma_register_device(struct ocrdma_dev *dev)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun int ret;
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun ocrdma_get_guid(dev, (u8 *)&dev->ibdev.node_guid);
204*4882a593Smuzhiyun BUILD_BUG_ON(sizeof(OCRDMA_NODE_DESC) > IB_DEVICE_NODE_DESC_MAX);
205*4882a593Smuzhiyun memcpy(dev->ibdev.node_desc, OCRDMA_NODE_DESC,
206*4882a593Smuzhiyun sizeof(OCRDMA_NODE_DESC));
207*4882a593Smuzhiyun dev->ibdev.uverbs_cmd_mask =
208*4882a593Smuzhiyun OCRDMA_UVERBS(GET_CONTEXT) |
209*4882a593Smuzhiyun OCRDMA_UVERBS(QUERY_DEVICE) |
210*4882a593Smuzhiyun OCRDMA_UVERBS(QUERY_PORT) |
211*4882a593Smuzhiyun OCRDMA_UVERBS(ALLOC_PD) |
212*4882a593Smuzhiyun OCRDMA_UVERBS(DEALLOC_PD) |
213*4882a593Smuzhiyun OCRDMA_UVERBS(REG_MR) |
214*4882a593Smuzhiyun OCRDMA_UVERBS(DEREG_MR) |
215*4882a593Smuzhiyun OCRDMA_UVERBS(CREATE_COMP_CHANNEL) |
216*4882a593Smuzhiyun OCRDMA_UVERBS(CREATE_CQ) |
217*4882a593Smuzhiyun OCRDMA_UVERBS(RESIZE_CQ) |
218*4882a593Smuzhiyun OCRDMA_UVERBS(DESTROY_CQ) |
219*4882a593Smuzhiyun OCRDMA_UVERBS(REQ_NOTIFY_CQ) |
220*4882a593Smuzhiyun OCRDMA_UVERBS(CREATE_QP) |
221*4882a593Smuzhiyun OCRDMA_UVERBS(MODIFY_QP) |
222*4882a593Smuzhiyun OCRDMA_UVERBS(QUERY_QP) |
223*4882a593Smuzhiyun OCRDMA_UVERBS(DESTROY_QP) |
224*4882a593Smuzhiyun OCRDMA_UVERBS(POLL_CQ) |
225*4882a593Smuzhiyun OCRDMA_UVERBS(POST_SEND) |
226*4882a593Smuzhiyun OCRDMA_UVERBS(POST_RECV);
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun dev->ibdev.uverbs_cmd_mask |=
229*4882a593Smuzhiyun OCRDMA_UVERBS(CREATE_AH) |
230*4882a593Smuzhiyun OCRDMA_UVERBS(MODIFY_AH) |
231*4882a593Smuzhiyun OCRDMA_UVERBS(QUERY_AH) |
232*4882a593Smuzhiyun OCRDMA_UVERBS(DESTROY_AH);
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun dev->ibdev.node_type = RDMA_NODE_IB_CA;
235*4882a593Smuzhiyun dev->ibdev.phys_port_cnt = 1;
236*4882a593Smuzhiyun dev->ibdev.num_comp_vectors = dev->eq_cnt;
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun /* mandatory to support user space verbs consumer. */
239*4882a593Smuzhiyun dev->ibdev.dev.parent = &dev->nic_info.pdev->dev;
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun ib_set_device_ops(&dev->ibdev, &ocrdma_dev_ops);
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) {
244*4882a593Smuzhiyun dev->ibdev.uverbs_cmd_mask |=
245*4882a593Smuzhiyun OCRDMA_UVERBS(CREATE_SRQ) |
246*4882a593Smuzhiyun OCRDMA_UVERBS(MODIFY_SRQ) |
247*4882a593Smuzhiyun OCRDMA_UVERBS(QUERY_SRQ) |
248*4882a593Smuzhiyun OCRDMA_UVERBS(DESTROY_SRQ) |
249*4882a593Smuzhiyun OCRDMA_UVERBS(POST_SRQ_RECV);
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun ib_set_device_ops(&dev->ibdev, &ocrdma_dev_srq_ops);
252*4882a593Smuzhiyun }
253*4882a593Smuzhiyun rdma_set_device_sysfs_group(&dev->ibdev, &ocrdma_attr_group);
254*4882a593Smuzhiyun ret = ib_device_set_netdev(&dev->ibdev, dev->nic_info.netdev, 1);
255*4882a593Smuzhiyun if (ret)
256*4882a593Smuzhiyun return ret;
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun dma_set_max_seg_size(&dev->nic_info.pdev->dev, UINT_MAX);
259*4882a593Smuzhiyun return ib_register_device(&dev->ibdev, "ocrdma%d",
260*4882a593Smuzhiyun &dev->nic_info.pdev->dev);
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun
ocrdma_alloc_resources(struct ocrdma_dev * dev)263*4882a593Smuzhiyun static int ocrdma_alloc_resources(struct ocrdma_dev *dev)
264*4882a593Smuzhiyun {
265*4882a593Smuzhiyun mutex_init(&dev->dev_lock);
266*4882a593Smuzhiyun dev->cq_tbl = kcalloc(OCRDMA_MAX_CQ, sizeof(struct ocrdma_cq *),
267*4882a593Smuzhiyun GFP_KERNEL);
268*4882a593Smuzhiyun if (!dev->cq_tbl)
269*4882a593Smuzhiyun goto alloc_err;
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun if (dev->attr.max_qp) {
272*4882a593Smuzhiyun dev->qp_tbl = kcalloc(OCRDMA_MAX_QP,
273*4882a593Smuzhiyun sizeof(struct ocrdma_qp *),
274*4882a593Smuzhiyun GFP_KERNEL);
275*4882a593Smuzhiyun if (!dev->qp_tbl)
276*4882a593Smuzhiyun goto alloc_err;
277*4882a593Smuzhiyun }
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun dev->stag_arr = kcalloc(OCRDMA_MAX_STAG, sizeof(u64), GFP_KERNEL);
280*4882a593Smuzhiyun if (dev->stag_arr == NULL)
281*4882a593Smuzhiyun goto alloc_err;
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun ocrdma_alloc_pd_pool(dev);
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun if (!ocrdma_alloc_stats_resources(dev)) {
286*4882a593Smuzhiyun pr_err("%s: stats resource allocation failed\n", __func__);
287*4882a593Smuzhiyun goto alloc_err;
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun spin_lock_init(&dev->av_tbl.lock);
291*4882a593Smuzhiyun spin_lock_init(&dev->flush_q_lock);
292*4882a593Smuzhiyun return 0;
293*4882a593Smuzhiyun alloc_err:
294*4882a593Smuzhiyun pr_err("%s(%d) error.\n", __func__, dev->id);
295*4882a593Smuzhiyun return -ENOMEM;
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun
ocrdma_free_resources(struct ocrdma_dev * dev)298*4882a593Smuzhiyun static void ocrdma_free_resources(struct ocrdma_dev *dev)
299*4882a593Smuzhiyun {
300*4882a593Smuzhiyun ocrdma_release_stats_resources(dev);
301*4882a593Smuzhiyun kfree(dev->stag_arr);
302*4882a593Smuzhiyun kfree(dev->qp_tbl);
303*4882a593Smuzhiyun kfree(dev->cq_tbl);
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun
ocrdma_add(struct be_dev_info * dev_info)306*4882a593Smuzhiyun static struct ocrdma_dev *ocrdma_add(struct be_dev_info *dev_info)
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun int status = 0;
309*4882a593Smuzhiyun u8 lstate = 0;
310*4882a593Smuzhiyun struct ocrdma_dev *dev;
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun dev = ib_alloc_device(ocrdma_dev, ibdev);
313*4882a593Smuzhiyun if (!dev) {
314*4882a593Smuzhiyun pr_err("Unable to allocate ib device\n");
315*4882a593Smuzhiyun return NULL;
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun dev->mbx_cmd = kzalloc(sizeof(struct ocrdma_mqe_emb_cmd), GFP_KERNEL);
319*4882a593Smuzhiyun if (!dev->mbx_cmd)
320*4882a593Smuzhiyun goto init_err;
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun memcpy(&dev->nic_info, dev_info, sizeof(*dev_info));
323*4882a593Smuzhiyun dev->id = PCI_FUNC(dev->nic_info.pdev->devfn);
324*4882a593Smuzhiyun status = ocrdma_init_hw(dev);
325*4882a593Smuzhiyun if (status)
326*4882a593Smuzhiyun goto init_err;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun status = ocrdma_alloc_resources(dev);
329*4882a593Smuzhiyun if (status)
330*4882a593Smuzhiyun goto alloc_err;
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun ocrdma_init_service_level(dev);
333*4882a593Smuzhiyun status = ocrdma_register_device(dev);
334*4882a593Smuzhiyun if (status)
335*4882a593Smuzhiyun goto alloc_err;
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun /* Query Link state and update */
338*4882a593Smuzhiyun status = ocrdma_mbx_get_link_speed(dev, NULL, &lstate);
339*4882a593Smuzhiyun if (!status)
340*4882a593Smuzhiyun ocrdma_update_link_state(dev, lstate);
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun /* Init stats */
343*4882a593Smuzhiyun ocrdma_add_port_stats(dev);
344*4882a593Smuzhiyun /* Interrupt Moderation */
345*4882a593Smuzhiyun INIT_DELAYED_WORK(&dev->eqd_work, ocrdma_eqd_set_task);
346*4882a593Smuzhiyun schedule_delayed_work(&dev->eqd_work, msecs_to_jiffies(1000));
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun pr_info("%s %s: %s \"%s\" port %d\n",
349*4882a593Smuzhiyun dev_name(&dev->nic_info.pdev->dev), hca_name(dev),
350*4882a593Smuzhiyun port_speed_string(dev), dev->model_number,
351*4882a593Smuzhiyun dev->hba_port_num);
352*4882a593Smuzhiyun pr_info("%s ocrdma%d driver loaded successfully\n",
353*4882a593Smuzhiyun dev_name(&dev->nic_info.pdev->dev), dev->id);
354*4882a593Smuzhiyun return dev;
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun alloc_err:
357*4882a593Smuzhiyun ocrdma_free_resources(dev);
358*4882a593Smuzhiyun ocrdma_cleanup_hw(dev);
359*4882a593Smuzhiyun init_err:
360*4882a593Smuzhiyun kfree(dev->mbx_cmd);
361*4882a593Smuzhiyun ib_dealloc_device(&dev->ibdev);
362*4882a593Smuzhiyun pr_err("%s() leaving. ret=%d\n", __func__, status);
363*4882a593Smuzhiyun return NULL;
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun
ocrdma_remove_free(struct ocrdma_dev * dev)366*4882a593Smuzhiyun static void ocrdma_remove_free(struct ocrdma_dev *dev)
367*4882a593Smuzhiyun {
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun kfree(dev->mbx_cmd);
370*4882a593Smuzhiyun ib_dealloc_device(&dev->ibdev);
371*4882a593Smuzhiyun }
372*4882a593Smuzhiyun
ocrdma_remove(struct ocrdma_dev * dev)373*4882a593Smuzhiyun static void ocrdma_remove(struct ocrdma_dev *dev)
374*4882a593Smuzhiyun {
375*4882a593Smuzhiyun /* first unregister with stack to stop all the active traffic
376*4882a593Smuzhiyun * of the registered clients.
377*4882a593Smuzhiyun */
378*4882a593Smuzhiyun cancel_delayed_work_sync(&dev->eqd_work);
379*4882a593Smuzhiyun ib_unregister_device(&dev->ibdev);
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun ocrdma_rem_port_stats(dev);
382*4882a593Smuzhiyun ocrdma_free_resources(dev);
383*4882a593Smuzhiyun ocrdma_cleanup_hw(dev);
384*4882a593Smuzhiyun ocrdma_remove_free(dev);
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun
ocrdma_dispatch_port_active(struct ocrdma_dev * dev)387*4882a593Smuzhiyun static int ocrdma_dispatch_port_active(struct ocrdma_dev *dev)
388*4882a593Smuzhiyun {
389*4882a593Smuzhiyun struct ib_event port_event;
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun port_event.event = IB_EVENT_PORT_ACTIVE;
392*4882a593Smuzhiyun port_event.element.port_num = 1;
393*4882a593Smuzhiyun port_event.device = &dev->ibdev;
394*4882a593Smuzhiyun ib_dispatch_event(&port_event);
395*4882a593Smuzhiyun return 0;
396*4882a593Smuzhiyun }
397*4882a593Smuzhiyun
ocrdma_dispatch_port_error(struct ocrdma_dev * dev)398*4882a593Smuzhiyun static int ocrdma_dispatch_port_error(struct ocrdma_dev *dev)
399*4882a593Smuzhiyun {
400*4882a593Smuzhiyun struct ib_event err_event;
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun err_event.event = IB_EVENT_PORT_ERR;
403*4882a593Smuzhiyun err_event.element.port_num = 1;
404*4882a593Smuzhiyun err_event.device = &dev->ibdev;
405*4882a593Smuzhiyun ib_dispatch_event(&err_event);
406*4882a593Smuzhiyun return 0;
407*4882a593Smuzhiyun }
408*4882a593Smuzhiyun
ocrdma_shutdown(struct ocrdma_dev * dev)409*4882a593Smuzhiyun static void ocrdma_shutdown(struct ocrdma_dev *dev)
410*4882a593Smuzhiyun {
411*4882a593Smuzhiyun ocrdma_dispatch_port_error(dev);
412*4882a593Smuzhiyun ocrdma_remove(dev);
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun /* event handling via NIC driver ensures that all the NIC specific
416*4882a593Smuzhiyun * initialization done before RoCE driver notifies
417*4882a593Smuzhiyun * event to stack.
418*4882a593Smuzhiyun */
ocrdma_event_handler(struct ocrdma_dev * dev,u32 event)419*4882a593Smuzhiyun static void ocrdma_event_handler(struct ocrdma_dev *dev, u32 event)
420*4882a593Smuzhiyun {
421*4882a593Smuzhiyun switch (event) {
422*4882a593Smuzhiyun case BE_DEV_SHUTDOWN:
423*4882a593Smuzhiyun ocrdma_shutdown(dev);
424*4882a593Smuzhiyun break;
425*4882a593Smuzhiyun default:
426*4882a593Smuzhiyun break;
427*4882a593Smuzhiyun }
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun
ocrdma_update_link_state(struct ocrdma_dev * dev,u8 lstate)430*4882a593Smuzhiyun void ocrdma_update_link_state(struct ocrdma_dev *dev, u8 lstate)
431*4882a593Smuzhiyun {
432*4882a593Smuzhiyun if (!(dev->flags & OCRDMA_FLAGS_LINK_STATUS_INIT)) {
433*4882a593Smuzhiyun dev->flags |= OCRDMA_FLAGS_LINK_STATUS_INIT;
434*4882a593Smuzhiyun if (!lstate)
435*4882a593Smuzhiyun return;
436*4882a593Smuzhiyun }
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun if (!lstate)
439*4882a593Smuzhiyun ocrdma_dispatch_port_error(dev);
440*4882a593Smuzhiyun else
441*4882a593Smuzhiyun ocrdma_dispatch_port_active(dev);
442*4882a593Smuzhiyun }
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun static struct ocrdma_driver ocrdma_drv = {
445*4882a593Smuzhiyun .name = "ocrdma_driver",
446*4882a593Smuzhiyun .add = ocrdma_add,
447*4882a593Smuzhiyun .remove = ocrdma_remove,
448*4882a593Smuzhiyun .state_change_handler = ocrdma_event_handler,
449*4882a593Smuzhiyun .be_abi_version = OCRDMA_BE_ROCE_ABI_VERSION,
450*4882a593Smuzhiyun };
451*4882a593Smuzhiyun
ocrdma_init_module(void)452*4882a593Smuzhiyun static int __init ocrdma_init_module(void)
453*4882a593Smuzhiyun {
454*4882a593Smuzhiyun int status;
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun ocrdma_init_debugfs();
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun status = be_roce_register_driver(&ocrdma_drv);
459*4882a593Smuzhiyun if (status)
460*4882a593Smuzhiyun goto err_be_reg;
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun return 0;
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun err_be_reg:
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun return status;
467*4882a593Smuzhiyun }
468*4882a593Smuzhiyun
ocrdma_exit_module(void)469*4882a593Smuzhiyun static void __exit ocrdma_exit_module(void)
470*4882a593Smuzhiyun {
471*4882a593Smuzhiyun be_roce_unregister_driver(&ocrdma_drv);
472*4882a593Smuzhiyun ocrdma_rem_debugfs();
473*4882a593Smuzhiyun }
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun module_init(ocrdma_init_module);
476*4882a593Smuzhiyun module_exit(ocrdma_exit_module);
477