xref: /OK3568_Linux_fs/kernel/drivers/infiniband/hw/mthca/mthca_provider.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (c) 2004 Topspin Communications.  All rights reserved.
3*4882a593Smuzhiyun  * Copyright (c) 2005, 2006 Cisco Systems.  All rights reserved.
4*4882a593Smuzhiyun  * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * This software is available to you under a choice of one of two
7*4882a593Smuzhiyun  * licenses.  You may choose to be licensed under the terms of the GNU
8*4882a593Smuzhiyun  * General Public License (GPL) Version 2, available from the file
9*4882a593Smuzhiyun  * COPYING in the main directory of this source tree, or the
10*4882a593Smuzhiyun  * OpenIB.org BSD license below:
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  *     Redistribution and use in source and binary forms, with or
13*4882a593Smuzhiyun  *     without modification, are permitted provided that the following
14*4882a593Smuzhiyun  *     conditions are met:
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  *      - Redistributions of source code must retain the above
17*4882a593Smuzhiyun  *        copyright notice, this list of conditions and the following
18*4882a593Smuzhiyun  *        disclaimer.
19*4882a593Smuzhiyun  *
20*4882a593Smuzhiyun  *      - Redistributions in binary form must reproduce the above
21*4882a593Smuzhiyun  *        copyright notice, this list of conditions and the following
22*4882a593Smuzhiyun  *        disclaimer in the documentation and/or other materials
23*4882a593Smuzhiyun  *        provided with the distribution.
24*4882a593Smuzhiyun  *
25*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26*4882a593Smuzhiyun  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27*4882a593Smuzhiyun  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28*4882a593Smuzhiyun  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29*4882a593Smuzhiyun  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30*4882a593Smuzhiyun  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31*4882a593Smuzhiyun  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32*4882a593Smuzhiyun  * SOFTWARE.
33*4882a593Smuzhiyun  */
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #ifndef MTHCA_PROVIDER_H
36*4882a593Smuzhiyun #define MTHCA_PROVIDER_H
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #include <rdma/ib_verbs.h>
39*4882a593Smuzhiyun #include <rdma/ib_pack.h>
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun #define MTHCA_MPT_FLAG_ATOMIC        (1 << 14)
42*4882a593Smuzhiyun #define MTHCA_MPT_FLAG_REMOTE_WRITE  (1 << 13)
43*4882a593Smuzhiyun #define MTHCA_MPT_FLAG_REMOTE_READ   (1 << 12)
44*4882a593Smuzhiyun #define MTHCA_MPT_FLAG_LOCAL_WRITE   (1 << 11)
45*4882a593Smuzhiyun #define MTHCA_MPT_FLAG_LOCAL_READ    (1 << 10)
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun struct mthca_buf_list {
48*4882a593Smuzhiyun 	void *buf;
49*4882a593Smuzhiyun 	DEFINE_DMA_UNMAP_ADDR(mapping);
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun union mthca_buf {
53*4882a593Smuzhiyun 	struct mthca_buf_list direct;
54*4882a593Smuzhiyun 	struct mthca_buf_list *page_list;
55*4882a593Smuzhiyun };
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun struct mthca_uar {
58*4882a593Smuzhiyun 	unsigned long pfn;
59*4882a593Smuzhiyun 	int           index;
60*4882a593Smuzhiyun };
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun struct mthca_user_db_table;
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun struct mthca_ucontext {
65*4882a593Smuzhiyun 	struct ib_ucontext          ibucontext;
66*4882a593Smuzhiyun 	struct mthca_uar            uar;
67*4882a593Smuzhiyun 	struct mthca_user_db_table *db_tab;
68*4882a593Smuzhiyun 	int			    reg_mr_warned;
69*4882a593Smuzhiyun };
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun struct mthca_mtt;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun struct mthca_mr {
74*4882a593Smuzhiyun 	struct ib_mr      ibmr;
75*4882a593Smuzhiyun 	struct ib_umem   *umem;
76*4882a593Smuzhiyun 	struct mthca_mtt *mtt;
77*4882a593Smuzhiyun };
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun struct mthca_pd {
80*4882a593Smuzhiyun 	struct ib_pd    ibpd;
81*4882a593Smuzhiyun 	u32             pd_num;
82*4882a593Smuzhiyun 	atomic_t        sqp_count;
83*4882a593Smuzhiyun 	struct mthca_mr ntmr;
84*4882a593Smuzhiyun 	int             privileged;
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun struct mthca_eq {
88*4882a593Smuzhiyun 	struct mthca_dev      *dev;
89*4882a593Smuzhiyun 	int                    eqn;
90*4882a593Smuzhiyun 	u32                    eqn_mask;
91*4882a593Smuzhiyun 	u32                    cons_index;
92*4882a593Smuzhiyun 	u16                    msi_x_vector;
93*4882a593Smuzhiyun 	u16                    msi_x_entry;
94*4882a593Smuzhiyun 	int                    have_irq;
95*4882a593Smuzhiyun 	int                    nent;
96*4882a593Smuzhiyun 	struct mthca_buf_list *page_list;
97*4882a593Smuzhiyun 	struct mthca_mr        mr;
98*4882a593Smuzhiyun 	char		       irq_name[IB_DEVICE_NAME_MAX];
99*4882a593Smuzhiyun };
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun struct mthca_av;
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun enum mthca_ah_type {
104*4882a593Smuzhiyun 	MTHCA_AH_ON_HCA,
105*4882a593Smuzhiyun 	MTHCA_AH_PCI_POOL,
106*4882a593Smuzhiyun 	MTHCA_AH_KMALLOC
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun struct mthca_ah {
110*4882a593Smuzhiyun 	struct ib_ah       ibah;
111*4882a593Smuzhiyun 	enum mthca_ah_type type;
112*4882a593Smuzhiyun 	u32                key;
113*4882a593Smuzhiyun 	struct mthca_av   *av;
114*4882a593Smuzhiyun 	dma_addr_t         avdma;
115*4882a593Smuzhiyun };
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun /*
118*4882a593Smuzhiyun  * Quick description of our CQ/QP locking scheme:
119*4882a593Smuzhiyun  *
120*4882a593Smuzhiyun  * We have one global lock that protects dev->cq/qp_table.  Each
121*4882a593Smuzhiyun  * struct mthca_cq/qp also has its own lock.  An individual qp lock
122*4882a593Smuzhiyun  * may be taken inside of an individual cq lock.  Both cqs attached to
123*4882a593Smuzhiyun  * a qp may be locked, with the cq with the lower cqn locked first.
124*4882a593Smuzhiyun  * No other nesting should be done.
125*4882a593Smuzhiyun  *
126*4882a593Smuzhiyun  * Each struct mthca_cq/qp also has an ref count, protected by the
127*4882a593Smuzhiyun  * corresponding table lock.  The pointer from the cq/qp_table to the
128*4882a593Smuzhiyun  * struct counts as one reference.  This reference also is good for
129*4882a593Smuzhiyun  * access through the consumer API, so modifying the CQ/QP etc doesn't
130*4882a593Smuzhiyun  * need to take another reference.  Access to a QP because of a
131*4882a593Smuzhiyun  * completion being polled does not need a reference either.
132*4882a593Smuzhiyun  *
133*4882a593Smuzhiyun  * Finally, each struct mthca_cq/qp has a wait_queue_head_t for the
134*4882a593Smuzhiyun  * destroy function to sleep on.
135*4882a593Smuzhiyun  *
136*4882a593Smuzhiyun  * This means that access from the consumer API requires nothing but
137*4882a593Smuzhiyun  * taking the struct's lock.
138*4882a593Smuzhiyun  *
139*4882a593Smuzhiyun  * Access because of a completion event should go as follows:
140*4882a593Smuzhiyun  * - lock cq/qp_table and look up struct
141*4882a593Smuzhiyun  * - increment ref count in struct
142*4882a593Smuzhiyun  * - drop cq/qp_table lock
143*4882a593Smuzhiyun  * - lock struct, do your thing, and unlock struct
144*4882a593Smuzhiyun  * - decrement ref count; if zero, wake up waiters
145*4882a593Smuzhiyun  *
146*4882a593Smuzhiyun  * To destroy a CQ/QP, we can do the following:
147*4882a593Smuzhiyun  * - lock cq/qp_table
148*4882a593Smuzhiyun  * - remove pointer and decrement ref count
149*4882a593Smuzhiyun  * - unlock cq/qp_table lock
150*4882a593Smuzhiyun  * - wait_event until ref count is zero
151*4882a593Smuzhiyun  *
152*4882a593Smuzhiyun  * It is the consumer's responsibilty to make sure that no QP
153*4882a593Smuzhiyun  * operations (WQE posting or state modification) are pending when a
154*4882a593Smuzhiyun  * QP is destroyed.  Also, the consumer must make sure that calls to
155*4882a593Smuzhiyun  * qp_modify are serialized.  Similarly, the consumer is responsible
156*4882a593Smuzhiyun  * for ensuring that no CQ resize operations are pending when a CQ
157*4882a593Smuzhiyun  * is destroyed.
158*4882a593Smuzhiyun  *
159*4882a593Smuzhiyun  * Possible optimizations (wait for profile data to see if/where we
160*4882a593Smuzhiyun  * have locks bouncing between CPUs):
161*4882a593Smuzhiyun  * - split cq/qp table lock into n separate (cache-aligned) locks,
162*4882a593Smuzhiyun  *   indexed (say) by the page in the table
163*4882a593Smuzhiyun  * - split QP struct lock into three (one for common info, one for the
164*4882a593Smuzhiyun  *   send queue and one for the receive queue)
165*4882a593Smuzhiyun  */
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun struct mthca_cq_buf {
168*4882a593Smuzhiyun 	union mthca_buf		queue;
169*4882a593Smuzhiyun 	struct mthca_mr		mr;
170*4882a593Smuzhiyun 	int			is_direct;
171*4882a593Smuzhiyun };
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun struct mthca_cq_resize {
174*4882a593Smuzhiyun 	struct mthca_cq_buf	buf;
175*4882a593Smuzhiyun 	int			cqe;
176*4882a593Smuzhiyun 	enum {
177*4882a593Smuzhiyun 		CQ_RESIZE_ALLOC,
178*4882a593Smuzhiyun 		CQ_RESIZE_READY,
179*4882a593Smuzhiyun 		CQ_RESIZE_SWAPPED
180*4882a593Smuzhiyun 	}			state;
181*4882a593Smuzhiyun };
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun struct mthca_cq {
184*4882a593Smuzhiyun 	struct ib_cq		ibcq;
185*4882a593Smuzhiyun 	spinlock_t		lock;
186*4882a593Smuzhiyun 	int			refcount;
187*4882a593Smuzhiyun 	int			cqn;
188*4882a593Smuzhiyun 	u32			cons_index;
189*4882a593Smuzhiyun 	struct mthca_cq_buf	buf;
190*4882a593Smuzhiyun 	struct mthca_cq_resize *resize_buf;
191*4882a593Smuzhiyun 	int			is_kernel;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	/* Next fields are Arbel only */
194*4882a593Smuzhiyun 	int			set_ci_db_index;
195*4882a593Smuzhiyun 	__be32		       *set_ci_db;
196*4882a593Smuzhiyun 	int			arm_db_index;
197*4882a593Smuzhiyun 	__be32		       *arm_db;
198*4882a593Smuzhiyun 	int			arm_sn;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	wait_queue_head_t	wait;
201*4882a593Smuzhiyun 	struct mutex		mutex;
202*4882a593Smuzhiyun };
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun struct mthca_srq {
205*4882a593Smuzhiyun 	struct ib_srq		ibsrq;
206*4882a593Smuzhiyun 	spinlock_t		lock;
207*4882a593Smuzhiyun 	int			refcount;
208*4882a593Smuzhiyun 	int			srqn;
209*4882a593Smuzhiyun 	int			max;
210*4882a593Smuzhiyun 	int			max_gs;
211*4882a593Smuzhiyun 	int			wqe_shift;
212*4882a593Smuzhiyun 	int			first_free;
213*4882a593Smuzhiyun 	int			last_free;
214*4882a593Smuzhiyun 	u16			counter;  /* Arbel only */
215*4882a593Smuzhiyun 	int			db_index; /* Arbel only */
216*4882a593Smuzhiyun 	__be32		       *db;       /* Arbel only */
217*4882a593Smuzhiyun 	void		       *last;
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	int			is_direct;
220*4882a593Smuzhiyun 	u64		       *wrid;
221*4882a593Smuzhiyun 	union mthca_buf		queue;
222*4882a593Smuzhiyun 	struct mthca_mr		mr;
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	wait_queue_head_t	wait;
225*4882a593Smuzhiyun 	struct mutex		mutex;
226*4882a593Smuzhiyun };
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun struct mthca_wq {
229*4882a593Smuzhiyun 	spinlock_t lock;
230*4882a593Smuzhiyun 	int        max;
231*4882a593Smuzhiyun 	unsigned   next_ind;
232*4882a593Smuzhiyun 	unsigned   last_comp;
233*4882a593Smuzhiyun 	unsigned   head;
234*4882a593Smuzhiyun 	unsigned   tail;
235*4882a593Smuzhiyun 	void      *last;
236*4882a593Smuzhiyun 	int        max_gs;
237*4882a593Smuzhiyun 	int        wqe_shift;
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	int        db_index;	/* Arbel only */
240*4882a593Smuzhiyun 	__be32    *db;
241*4882a593Smuzhiyun };
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun struct mthca_sqp {
244*4882a593Smuzhiyun 	int             pkey_index;
245*4882a593Smuzhiyun 	u32             qkey;
246*4882a593Smuzhiyun 	u32             send_psn;
247*4882a593Smuzhiyun 	struct ib_ud_header ud_header;
248*4882a593Smuzhiyun 	int             header_buf_size;
249*4882a593Smuzhiyun 	void           *header_buf;
250*4882a593Smuzhiyun 	dma_addr_t      header_dma;
251*4882a593Smuzhiyun };
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun struct mthca_qp {
254*4882a593Smuzhiyun 	struct ib_qp           ibqp;
255*4882a593Smuzhiyun 	int                    refcount;
256*4882a593Smuzhiyun 	u32                    qpn;
257*4882a593Smuzhiyun 	int                    is_direct;
258*4882a593Smuzhiyun 	u8                     port; /* for SQP and memfree use only */
259*4882a593Smuzhiyun 	u8                     alt_port; /* for memfree use only */
260*4882a593Smuzhiyun 	u8                     transport;
261*4882a593Smuzhiyun 	u8                     state;
262*4882a593Smuzhiyun 	u8                     atomic_rd_en;
263*4882a593Smuzhiyun 	u8                     resp_depth;
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	struct mthca_mr        mr;
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	struct mthca_wq        rq;
268*4882a593Smuzhiyun 	struct mthca_wq        sq;
269*4882a593Smuzhiyun 	enum ib_sig_type       sq_policy;
270*4882a593Smuzhiyun 	int                    send_wqe_offset;
271*4882a593Smuzhiyun 	int                    max_inline_data;
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	u64                   *wrid;
274*4882a593Smuzhiyun 	union mthca_buf	       queue;
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	wait_queue_head_t      wait;
277*4882a593Smuzhiyun 	struct mutex	       mutex;
278*4882a593Smuzhiyun 	struct mthca_sqp *sqp;
279*4882a593Smuzhiyun };
280*4882a593Smuzhiyun 
to_mucontext(struct ib_ucontext * ibucontext)281*4882a593Smuzhiyun static inline struct mthca_ucontext *to_mucontext(struct ib_ucontext *ibucontext)
282*4882a593Smuzhiyun {
283*4882a593Smuzhiyun 	return container_of(ibucontext, struct mthca_ucontext, ibucontext);
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun 
to_mmr(struct ib_mr * ibmr)286*4882a593Smuzhiyun static inline struct mthca_mr *to_mmr(struct ib_mr *ibmr)
287*4882a593Smuzhiyun {
288*4882a593Smuzhiyun 	return container_of(ibmr, struct mthca_mr, ibmr);
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun 
to_mpd(struct ib_pd * ibpd)291*4882a593Smuzhiyun static inline struct mthca_pd *to_mpd(struct ib_pd *ibpd)
292*4882a593Smuzhiyun {
293*4882a593Smuzhiyun 	return container_of(ibpd, struct mthca_pd, ibpd);
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun 
to_mah(struct ib_ah * ibah)296*4882a593Smuzhiyun static inline struct mthca_ah *to_mah(struct ib_ah *ibah)
297*4882a593Smuzhiyun {
298*4882a593Smuzhiyun 	return container_of(ibah, struct mthca_ah, ibah);
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun 
to_mcq(struct ib_cq * ibcq)301*4882a593Smuzhiyun static inline struct mthca_cq *to_mcq(struct ib_cq *ibcq)
302*4882a593Smuzhiyun {
303*4882a593Smuzhiyun 	return container_of(ibcq, struct mthca_cq, ibcq);
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun 
to_msrq(struct ib_srq * ibsrq)306*4882a593Smuzhiyun static inline struct mthca_srq *to_msrq(struct ib_srq *ibsrq)
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun 	return container_of(ibsrq, struct mthca_srq, ibsrq);
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun 
to_mqp(struct ib_qp * ibqp)311*4882a593Smuzhiyun static inline struct mthca_qp *to_mqp(struct ib_qp *ibqp)
312*4882a593Smuzhiyun {
313*4882a593Smuzhiyun 	return container_of(ibqp, struct mthca_qp, ibqp);
314*4882a593Smuzhiyun }
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun #endif /* MTHCA_PROVIDER_H */
317