1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2013-2020, Mellanox Technologies inc. All rights reserved. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef _MLX5_IB_QP_H 7*4882a593Smuzhiyun #define _MLX5_IB_QP_H 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include "mlx5_ib.h" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun int mlx5_init_qp_table(struct mlx5_ib_dev *dev); 12*4882a593Smuzhiyun void mlx5_cleanup_qp_table(struct mlx5_ib_dev *dev); 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun int mlx5_core_create_dct(struct mlx5_ib_dev *dev, struct mlx5_core_dct *qp, 15*4882a593Smuzhiyun u32 *in, int inlen, u32 *out, int outlen); 16*4882a593Smuzhiyun int mlx5_qpc_create_qp(struct mlx5_ib_dev *dev, struct mlx5_core_qp *qp, 17*4882a593Smuzhiyun u32 *in, int inlen, u32 *out); 18*4882a593Smuzhiyun int mlx5_core_qp_modify(struct mlx5_ib_dev *dev, u16 opcode, u32 opt_param_mask, 19*4882a593Smuzhiyun void *qpc, struct mlx5_core_qp *qp, u32 *ece); 20*4882a593Smuzhiyun int mlx5_core_destroy_qp(struct mlx5_ib_dev *dev, struct mlx5_core_qp *qp); 21*4882a593Smuzhiyun int mlx5_core_destroy_dct(struct mlx5_ib_dev *dev, struct mlx5_core_dct *dct); 22*4882a593Smuzhiyun int mlx5_core_qp_query(struct mlx5_ib_dev *dev, struct mlx5_core_qp *qp, 23*4882a593Smuzhiyun u32 *out, int outlen); 24*4882a593Smuzhiyun int mlx5_core_dct_query(struct mlx5_ib_dev *dev, struct mlx5_core_dct *dct, 25*4882a593Smuzhiyun u32 *out, int outlen); 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun int mlx5_core_set_delay_drop(struct mlx5_ib_dev *dev, u32 timeout_usec); 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun int mlx5_core_destroy_rq_tracked(struct mlx5_ib_dev *dev, 30*4882a593Smuzhiyun struct mlx5_core_qp *rq); 31*4882a593Smuzhiyun int mlx5_core_create_sq_tracked(struct mlx5_ib_dev *dev, u32 *in, int inlen, 32*4882a593Smuzhiyun struct mlx5_core_qp *sq); 33*4882a593Smuzhiyun void mlx5_core_destroy_sq_tracked(struct mlx5_ib_dev *dev, 34*4882a593Smuzhiyun struct mlx5_core_qp *sq); 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun int mlx5_core_create_rq_tracked(struct mlx5_ib_dev *dev, u32 *in, int inlen, 37*4882a593Smuzhiyun struct mlx5_core_qp *rq); 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun struct mlx5_core_rsc_common *mlx5_core_res_hold(struct mlx5_ib_dev *dev, 40*4882a593Smuzhiyun int res_num, 41*4882a593Smuzhiyun enum mlx5_res_type res_type); 42*4882a593Smuzhiyun void mlx5_core_res_put(struct mlx5_core_rsc_common *res); 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun int mlx5_core_xrcd_alloc(struct mlx5_ib_dev *dev, u32 *xrcdn); 45*4882a593Smuzhiyun int mlx5_core_xrcd_dealloc(struct mlx5_ib_dev *dev, u32 xrcdn); 46*4882a593Smuzhiyun int mlx5_ib_qp_set_counter(struct ib_qp *qp, struct rdma_counter *counter); 47*4882a593Smuzhiyun #endif /* _MLX5_IB_QP_H */ 48