1*4882a593Smuzhiyun /*******************************************************************************
2*4882a593Smuzhiyun *
3*4882a593Smuzhiyun * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This software is available to you under a choice of one of two
6*4882a593Smuzhiyun * licenses. You may choose to be licensed under the terms of the GNU
7*4882a593Smuzhiyun * General Public License (GPL) Version 2, available from the file
8*4882a593Smuzhiyun * COPYING in the main directory of this source tree, or the
9*4882a593Smuzhiyun * OpenFabrics.org BSD license below:
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or
12*4882a593Smuzhiyun * without modification, are permitted provided that the following
13*4882a593Smuzhiyun * conditions are met:
14*4882a593Smuzhiyun *
15*4882a593Smuzhiyun * - Redistributions of source code must retain the above
16*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
17*4882a593Smuzhiyun * disclaimer.
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun * - Redistributions in binary form must reproduce the above
20*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
21*4882a593Smuzhiyun * disclaimer in the documentation and/or other materials
22*4882a593Smuzhiyun * provided with the distribution.
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26*4882a593Smuzhiyun * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28*4882a593Smuzhiyun * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29*4882a593Smuzhiyun * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30*4882a593Smuzhiyun * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31*4882a593Smuzhiyun * SOFTWARE.
32*4882a593Smuzhiyun *
33*4882a593Smuzhiyun *******************************************************************************/
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #include "i40iw_osdep.h"
36*4882a593Smuzhiyun #include "i40iw_register.h"
37*4882a593Smuzhiyun #include "i40iw_status.h"
38*4882a593Smuzhiyun #include "i40iw_hmc.h"
39*4882a593Smuzhiyun #include "i40iw_d.h"
40*4882a593Smuzhiyun #include "i40iw_type.h"
41*4882a593Smuzhiyun #include "i40iw_p.h"
42*4882a593Smuzhiyun #include "i40iw_vf.h"
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun /**
45*4882a593Smuzhiyun * i40iw_manage_vf_pble_bp - manage vf pble
46*4882a593Smuzhiyun * @cqp: cqp for cqp' sq wqe
47*4882a593Smuzhiyun * @info: pble info
48*4882a593Smuzhiyun * @scratch: pointer for completion
49*4882a593Smuzhiyun * @post_sq: to post and ring
50*4882a593Smuzhiyun */
i40iw_manage_vf_pble_bp(struct i40iw_sc_cqp * cqp,struct i40iw_manage_vf_pble_info * info,u64 scratch,bool post_sq)51*4882a593Smuzhiyun enum i40iw_status_code i40iw_manage_vf_pble_bp(struct i40iw_sc_cqp *cqp,
52*4882a593Smuzhiyun struct i40iw_manage_vf_pble_info *info,
53*4882a593Smuzhiyun u64 scratch,
54*4882a593Smuzhiyun bool post_sq)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun u64 *wqe;
57*4882a593Smuzhiyun u64 temp, header, pd_pl_pba = 0;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
60*4882a593Smuzhiyun if (!wqe)
61*4882a593Smuzhiyun return I40IW_ERR_RING_FULL;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun temp = LS_64(info->pd_entry_cnt, I40IW_CQPSQ_MVPBP_PD_ENTRY_CNT) |
64*4882a593Smuzhiyun LS_64(info->first_pd_index, I40IW_CQPSQ_MVPBP_FIRST_PD_INX) |
65*4882a593Smuzhiyun LS_64(info->sd_index, I40IW_CQPSQ_MVPBP_SD_INX);
66*4882a593Smuzhiyun set_64bit_val(wqe, 16, temp);
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun header = LS_64((info->inv_pd_ent ? 1 : 0), I40IW_CQPSQ_MVPBP_INV_PD_ENT) |
69*4882a593Smuzhiyun LS_64(I40IW_CQP_OP_MANAGE_VF_PBLE_BP, I40IW_CQPSQ_OPCODE) |
70*4882a593Smuzhiyun LS_64(cqp->polarity, I40IW_CQPSQ_WQEVALID);
71*4882a593Smuzhiyun set_64bit_val(wqe, 24, header);
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun pd_pl_pba = LS_64(info->pd_pl_pba >> 3, I40IW_CQPSQ_MVPBP_PD_PLPBA);
74*4882a593Smuzhiyun set_64bit_val(wqe, 32, pd_pl_pba);
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun i40iw_debug_buf(cqp->dev, I40IW_DEBUG_WQE, "MANAGE VF_PBLE_BP WQE", wqe, I40IW_CQP_WQE_SIZE * 8);
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun if (post_sq)
79*4882a593Smuzhiyun i40iw_sc_cqp_post_sq(cqp);
80*4882a593Smuzhiyun return 0;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun const struct i40iw_vf_cqp_ops iw_vf_cqp_ops = {
84*4882a593Smuzhiyun i40iw_manage_vf_pble_bp
85*4882a593Smuzhiyun };
86