1*4882a593Smuzhiyun /******************************************************************************* 2*4882a593Smuzhiyun * 3*4882a593Smuzhiyun * Copyright (c) 2015-2016 Intel Corporation. All rights reserved. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This software is available to you under a choice of one of two 6*4882a593Smuzhiyun * licenses. You may choose to be licensed under the terms of the GNU 7*4882a593Smuzhiyun * General Public License (GPL) Version 2, available from the file 8*4882a593Smuzhiyun * COPYING in the main directory of this source tree, or the 9*4882a593Smuzhiyun * OpenFabrics.org BSD license below: 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or 12*4882a593Smuzhiyun * without modification, are permitted provided that the following 13*4882a593Smuzhiyun * conditions are met: 14*4882a593Smuzhiyun * 15*4882a593Smuzhiyun * - Redistributions of source code must retain the above 16*4882a593Smuzhiyun * copyright notice, this list of conditions and the following 17*4882a593Smuzhiyun * disclaimer. 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * - Redistributions in binary form must reproduce the above 20*4882a593Smuzhiyun * copyright notice, this list of conditions and the following 21*4882a593Smuzhiyun * disclaimer in the documentation and/or other materials 22*4882a593Smuzhiyun * provided with the distribution. 23*4882a593Smuzhiyun * 24*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26*4882a593Smuzhiyun * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28*4882a593Smuzhiyun * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29*4882a593Smuzhiyun * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30*4882a593Smuzhiyun * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31*4882a593Smuzhiyun * SOFTWARE. 32*4882a593Smuzhiyun * 33*4882a593Smuzhiyun *******************************************************************************/ 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #ifndef I40IW_PBLE_H 36*4882a593Smuzhiyun #define I40IW_PBLE_H 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define POOL_SHIFT 6 39*4882a593Smuzhiyun #define PBLE_PER_PAGE 512 40*4882a593Smuzhiyun #define I40IW_HMC_PAGED_BP_SHIFT 12 41*4882a593Smuzhiyun #define PBLE_512_SHIFT 9 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun enum i40iw_pble_level { 44*4882a593Smuzhiyun I40IW_LEVEL_0 = 0, 45*4882a593Smuzhiyun I40IW_LEVEL_1 = 1, 46*4882a593Smuzhiyun I40IW_LEVEL_2 = 2 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun enum i40iw_alloc_type { 50*4882a593Smuzhiyun I40IW_NO_ALLOC = 0, 51*4882a593Smuzhiyun I40IW_DMA_COHERENT = 1, 52*4882a593Smuzhiyun I40IW_VMALLOC = 2 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun struct i40iw_pble_info { 56*4882a593Smuzhiyun unsigned long addr; 57*4882a593Smuzhiyun u32 idx; 58*4882a593Smuzhiyun u32 cnt; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun struct i40iw_pble_level2 { 62*4882a593Smuzhiyun struct i40iw_pble_info root; 63*4882a593Smuzhiyun struct i40iw_pble_info *leaf; 64*4882a593Smuzhiyun u32 leaf_cnt; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun struct i40iw_pble_alloc { 68*4882a593Smuzhiyun u32 total_cnt; 69*4882a593Smuzhiyun enum i40iw_pble_level level; 70*4882a593Smuzhiyun union { 71*4882a593Smuzhiyun struct i40iw_pble_info level1; 72*4882a593Smuzhiyun struct i40iw_pble_level2 level2; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun struct sd_pd_idx { 77*4882a593Smuzhiyun u32 sd_idx; 78*4882a593Smuzhiyun u32 pd_idx; 79*4882a593Smuzhiyun u32 rel_pd_idx; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun struct i40iw_add_page_info { 83*4882a593Smuzhiyun struct i40iw_chunk *chunk; 84*4882a593Smuzhiyun struct i40iw_hmc_sd_entry *sd_entry; 85*4882a593Smuzhiyun struct i40iw_hmc_info *hmc_info; 86*4882a593Smuzhiyun struct sd_pd_idx idx; 87*4882a593Smuzhiyun u32 pages; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun struct i40iw_chunk { 91*4882a593Smuzhiyun struct list_head list; 92*4882a593Smuzhiyun u32 size; 93*4882a593Smuzhiyun void *vaddr; 94*4882a593Smuzhiyun u64 fpm_addr; 95*4882a593Smuzhiyun u32 pg_cnt; 96*4882a593Smuzhiyun dma_addr_t *dmaaddrs; 97*4882a593Smuzhiyun enum i40iw_alloc_type type; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun struct i40iw_pble_pool { 101*4882a593Smuzhiyun struct gen_pool *pool; 102*4882a593Smuzhiyun struct list_head clist; 103*4882a593Smuzhiyun u32 total_pble_alloc; 104*4882a593Smuzhiyun u32 free_pble_cnt; 105*4882a593Smuzhiyun u32 pool_shift; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun struct i40iw_hmc_pble_rsrc { 109*4882a593Smuzhiyun u32 unallocated_pble; 110*4882a593Smuzhiyun u64 fpm_base_addr; 111*4882a593Smuzhiyun u64 next_fpm_addr; 112*4882a593Smuzhiyun struct i40iw_pble_pool pinfo; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun u32 stats_direct_sds; 115*4882a593Smuzhiyun u32 stats_paged_sds; 116*4882a593Smuzhiyun u64 stats_alloc_ok; 117*4882a593Smuzhiyun u64 stats_alloc_fail; 118*4882a593Smuzhiyun u64 stats_alloc_freed; 119*4882a593Smuzhiyun u64 stats_lvl1; 120*4882a593Smuzhiyun u64 stats_lvl2; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun void i40iw_destroy_pble_pool(struct i40iw_sc_dev *dev, struct i40iw_hmc_pble_rsrc *pble_rsrc); 124*4882a593Smuzhiyun enum i40iw_status_code i40iw_hmc_init_pble(struct i40iw_sc_dev *dev, 125*4882a593Smuzhiyun struct i40iw_hmc_pble_rsrc *pble_rsrc); 126*4882a593Smuzhiyun void i40iw_free_pble(struct i40iw_hmc_pble_rsrc *pble_rsrc, struct i40iw_pble_alloc *palloc); 127*4882a593Smuzhiyun enum i40iw_status_code i40iw_get_pble(struct i40iw_sc_dev *dev, 128*4882a593Smuzhiyun struct i40iw_hmc_pble_rsrc *pble_rsrc, 129*4882a593Smuzhiyun struct i40iw_pble_alloc *palloc, 130*4882a593Smuzhiyun u32 pble_cnt); 131*4882a593Smuzhiyun #endif 132