xref: /OK3568_Linux_fs/kernel/drivers/infiniband/hw/i40iw/i40iw.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*******************************************************************************
2*4882a593Smuzhiyun *
3*4882a593Smuzhiyun * Copyright (c) 2015-2016 Intel Corporation.  All rights reserved.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * This software is available to you under a choice of one of two
6*4882a593Smuzhiyun * licenses.  You may choose to be licensed under the terms of the GNU
7*4882a593Smuzhiyun * General Public License (GPL) Version 2, available from the file
8*4882a593Smuzhiyun * COPYING in the main directory of this source tree, or the
9*4882a593Smuzhiyun * OpenFabrics.org BSD license below:
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun *   Redistribution and use in source and binary forms, with or
12*4882a593Smuzhiyun *   without modification, are permitted provided that the following
13*4882a593Smuzhiyun *   conditions are met:
14*4882a593Smuzhiyun *
15*4882a593Smuzhiyun *    - Redistributions of source code must retain the above
16*4882a593Smuzhiyun *	copyright notice, this list of conditions and the following
17*4882a593Smuzhiyun *	disclaimer.
18*4882a593Smuzhiyun *
19*4882a593Smuzhiyun *    - Redistributions in binary form must reproduce the above
20*4882a593Smuzhiyun *	copyright notice, this list of conditions and the following
21*4882a593Smuzhiyun *	disclaimer in the documentation and/or other materials
22*4882a593Smuzhiyun *	provided with the distribution.
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26*4882a593Smuzhiyun * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28*4882a593Smuzhiyun * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29*4882a593Smuzhiyun * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30*4882a593Smuzhiyun * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31*4882a593Smuzhiyun * SOFTWARE.
32*4882a593Smuzhiyun *
33*4882a593Smuzhiyun *******************************************************************************/
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #ifndef I40IW_IW_H
36*4882a593Smuzhiyun #define I40IW_IW_H
37*4882a593Smuzhiyun #include <linux/netdevice.h>
38*4882a593Smuzhiyun #include <linux/inetdevice.h>
39*4882a593Smuzhiyun #include <linux/spinlock.h>
40*4882a593Smuzhiyun #include <linux/kernel.h>
41*4882a593Smuzhiyun #include <linux/delay.h>
42*4882a593Smuzhiyun #include <linux/pci.h>
43*4882a593Smuzhiyun #include <linux/dma-mapping.h>
44*4882a593Smuzhiyun #include <linux/workqueue.h>
45*4882a593Smuzhiyun #include <linux/slab.h>
46*4882a593Smuzhiyun #include <linux/io.h>
47*4882a593Smuzhiyun #include <linux/crc32c.h>
48*4882a593Smuzhiyun #include <linux/net/intel/i40e_client.h>
49*4882a593Smuzhiyun #include <rdma/ib_smi.h>
50*4882a593Smuzhiyun #include <rdma/ib_verbs.h>
51*4882a593Smuzhiyun #include <rdma/ib_pack.h>
52*4882a593Smuzhiyun #include <rdma/rdma_cm.h>
53*4882a593Smuzhiyun #include <rdma/iw_cm.h>
54*4882a593Smuzhiyun #include <crypto/hash.h>
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun #include "i40iw_status.h"
57*4882a593Smuzhiyun #include "i40iw_osdep.h"
58*4882a593Smuzhiyun #include "i40iw_d.h"
59*4882a593Smuzhiyun #include "i40iw_hmc.h"
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun #include "i40iw_type.h"
62*4882a593Smuzhiyun #include "i40iw_p.h"
63*4882a593Smuzhiyun #include <rdma/i40iw-abi.h>
64*4882a593Smuzhiyun #include "i40iw_pble.h"
65*4882a593Smuzhiyun #include "i40iw_verbs.h"
66*4882a593Smuzhiyun #include "i40iw_cm.h"
67*4882a593Smuzhiyun #include "i40iw_user.h"
68*4882a593Smuzhiyun #include "i40iw_puda.h"
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun #define I40IW_FW_VER_DEFAULT 2
71*4882a593Smuzhiyun #define I40IW_HW_VERSION  2
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun #define I40IW_ARP_ADD     1
74*4882a593Smuzhiyun #define I40IW_ARP_DELETE  2
75*4882a593Smuzhiyun #define I40IW_ARP_RESOLVE 3
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun #define I40IW_MACIP_ADD     1
78*4882a593Smuzhiyun #define I40IW_MACIP_DELETE  2
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun #define IW_CCQ_SIZE         (I40IW_CQP_SW_SQSIZE_2048 + 1)
81*4882a593Smuzhiyun #define IW_CEQ_SIZE         2048
82*4882a593Smuzhiyun #define IW_AEQ_SIZE         2048
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun #define RX_BUF_SIZE            (1536 + 8)
85*4882a593Smuzhiyun #define IW_REG0_SIZE           (4 * 1024)
86*4882a593Smuzhiyun #define IW_TX_TIMEOUT          (6 * HZ)
87*4882a593Smuzhiyun #define IW_FIRST_QPN           1
88*4882a593Smuzhiyun #define IW_SW_CONTEXT_ALIGN    1024
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun #define MAX_DPC_ITERATIONS		128
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun #define I40IW_EVENT_TIMEOUT		100000
93*4882a593Smuzhiyun #define I40IW_VCHNL_EVENT_TIMEOUT	100000
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun #define	I40IW_NO_VLAN			0xffff
96*4882a593Smuzhiyun #define	I40IW_NO_QSET			0xffff
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun /* access to mcast filter list */
99*4882a593Smuzhiyun #define IW_ADD_MCAST false
100*4882a593Smuzhiyun #define IW_DEL_MCAST true
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun #define I40IW_DRV_OPT_ENABLE_MPA_VER_0     0x00000001
103*4882a593Smuzhiyun #define I40IW_DRV_OPT_DISABLE_MPA_CRC      0x00000002
104*4882a593Smuzhiyun #define I40IW_DRV_OPT_DISABLE_FIRST_WRITE  0x00000004
105*4882a593Smuzhiyun #define I40IW_DRV_OPT_DISABLE_INTF         0x00000008
106*4882a593Smuzhiyun #define I40IW_DRV_OPT_ENABLE_MSI           0x00000010
107*4882a593Smuzhiyun #define I40IW_DRV_OPT_DUAL_LOGICAL_PORT    0x00000020
108*4882a593Smuzhiyun #define I40IW_DRV_OPT_NO_INLINE_DATA       0x00000080
109*4882a593Smuzhiyun #define I40IW_DRV_OPT_DISABLE_INT_MOD      0x00000100
110*4882a593Smuzhiyun #define I40IW_DRV_OPT_DISABLE_VIRT_WQ      0x00000200
111*4882a593Smuzhiyun #define I40IW_DRV_OPT_ENABLE_PAU           0x00000400
112*4882a593Smuzhiyun #define I40IW_DRV_OPT_MCAST_LOGPORT_MAP    0x00000800
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun #define IW_HMC_OBJ_TYPE_NUM ARRAY_SIZE(iw_hmc_obj_types)
115*4882a593Smuzhiyun #define IW_CFG_FPM_QP_COUNT               32768
116*4882a593Smuzhiyun #define I40IW_MAX_PAGES_PER_FMR           512
117*4882a593Smuzhiyun #define I40IW_MIN_PAGES_PER_FMR           1
118*4882a593Smuzhiyun #define I40IW_CQP_COMPL_RQ_WQE_FLUSHED    2
119*4882a593Smuzhiyun #define I40IW_CQP_COMPL_SQ_WQE_FLUSHED    3
120*4882a593Smuzhiyun #define I40IW_CQP_COMPL_RQ_SQ_WQE_FLUSHED 4
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun struct i40iw_cqp_compl_info {
123*4882a593Smuzhiyun 	u32 op_ret_val;
124*4882a593Smuzhiyun 	u16 maj_err_code;
125*4882a593Smuzhiyun 	u16 min_err_code;
126*4882a593Smuzhiyun 	bool error;
127*4882a593Smuzhiyun 	u8 op_code;
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun #define i40iw_pr_err(fmt, args ...) pr_err("%s: "fmt, __func__, ## args)
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun #define i40iw_pr_info(fmt, args ...) pr_info("%s: " fmt, __func__, ## args)
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun #define i40iw_pr_warn(fmt, args ...) pr_warn("%s: " fmt, __func__, ## args)
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun struct i40iw_cqp_request {
137*4882a593Smuzhiyun 	struct cqp_commands_info info;
138*4882a593Smuzhiyun 	wait_queue_head_t waitq;
139*4882a593Smuzhiyun 	struct list_head list;
140*4882a593Smuzhiyun 	atomic_t refcount;
141*4882a593Smuzhiyun 	void (*callback_fcn)(struct i40iw_cqp_request*, u32);
142*4882a593Smuzhiyun 	void *param;
143*4882a593Smuzhiyun 	struct i40iw_cqp_compl_info compl_info;
144*4882a593Smuzhiyun 	bool waiting;
145*4882a593Smuzhiyun 	bool request_done;
146*4882a593Smuzhiyun 	bool dynamic;
147*4882a593Smuzhiyun };
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun struct i40iw_cqp {
150*4882a593Smuzhiyun 	struct i40iw_sc_cqp sc_cqp;
151*4882a593Smuzhiyun 	spinlock_t req_lock; /*cqp request list */
152*4882a593Smuzhiyun 	wait_queue_head_t waitq;
153*4882a593Smuzhiyun 	struct i40iw_dma_mem sq;
154*4882a593Smuzhiyun 	struct i40iw_dma_mem host_ctx;
155*4882a593Smuzhiyun 	u64 *scratch_array;
156*4882a593Smuzhiyun 	struct i40iw_cqp_request *cqp_requests;
157*4882a593Smuzhiyun 	struct list_head cqp_avail_reqs;
158*4882a593Smuzhiyun 	struct list_head cqp_pending_reqs;
159*4882a593Smuzhiyun };
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun struct i40iw_device;
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun struct i40iw_ccq {
164*4882a593Smuzhiyun 	struct i40iw_sc_cq sc_cq;
165*4882a593Smuzhiyun 	spinlock_t lock; /* ccq control */
166*4882a593Smuzhiyun 	wait_queue_head_t waitq;
167*4882a593Smuzhiyun 	struct i40iw_dma_mem mem_cq;
168*4882a593Smuzhiyun 	struct i40iw_dma_mem shadow_area;
169*4882a593Smuzhiyun };
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun struct i40iw_ceq {
172*4882a593Smuzhiyun 	struct i40iw_sc_ceq sc_ceq;
173*4882a593Smuzhiyun 	struct i40iw_dma_mem mem;
174*4882a593Smuzhiyun 	u32 irq;
175*4882a593Smuzhiyun 	u32 msix_idx;
176*4882a593Smuzhiyun 	struct i40iw_device *iwdev;
177*4882a593Smuzhiyun 	struct tasklet_struct dpc_tasklet;
178*4882a593Smuzhiyun };
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun struct i40iw_aeq {
181*4882a593Smuzhiyun 	struct i40iw_sc_aeq sc_aeq;
182*4882a593Smuzhiyun 	struct i40iw_dma_mem mem;
183*4882a593Smuzhiyun };
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun struct i40iw_arp_entry {
186*4882a593Smuzhiyun 	u32 ip_addr[4];
187*4882a593Smuzhiyun 	u8 mac_addr[ETH_ALEN];
188*4882a593Smuzhiyun };
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun enum init_completion_state {
191*4882a593Smuzhiyun 	INVALID_STATE = 0,
192*4882a593Smuzhiyun 	INITIAL_STATE,
193*4882a593Smuzhiyun 	CQP_CREATED,
194*4882a593Smuzhiyun 	HMC_OBJS_CREATED,
195*4882a593Smuzhiyun 	PBLE_CHUNK_MEM,
196*4882a593Smuzhiyun 	CCQ_CREATED,
197*4882a593Smuzhiyun 	AEQ_CREATED,
198*4882a593Smuzhiyun 	CEQ_CREATED,
199*4882a593Smuzhiyun 	ILQ_CREATED,
200*4882a593Smuzhiyun 	IEQ_CREATED,
201*4882a593Smuzhiyun 	IP_ADDR_REGISTERED,
202*4882a593Smuzhiyun 	RDMA_DEV_REGISTERED
203*4882a593Smuzhiyun };
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun struct i40iw_msix_vector {
206*4882a593Smuzhiyun 	u32 idx;
207*4882a593Smuzhiyun 	u32 irq;
208*4882a593Smuzhiyun 	u32 cpu_affinity;
209*4882a593Smuzhiyun 	u32 ceq_id;
210*4882a593Smuzhiyun 	cpumask_t mask;
211*4882a593Smuzhiyun };
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun struct l2params_work {
214*4882a593Smuzhiyun 	struct work_struct work;
215*4882a593Smuzhiyun 	struct i40iw_device *iwdev;
216*4882a593Smuzhiyun 	struct i40iw_l2params l2params;
217*4882a593Smuzhiyun };
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun #define I40IW_MSIX_TABLE_SIZE   65
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun struct virtchnl_work {
222*4882a593Smuzhiyun 	struct work_struct work;
223*4882a593Smuzhiyun 	union {
224*4882a593Smuzhiyun 		struct i40iw_cqp_request *cqp_request;
225*4882a593Smuzhiyun 		struct i40iw_virtchnl_work_info work_info;
226*4882a593Smuzhiyun 	};
227*4882a593Smuzhiyun };
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun struct i40e_qvlist_info;
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun struct i40iw_device {
232*4882a593Smuzhiyun 	struct i40iw_ib_device *iwibdev;
233*4882a593Smuzhiyun 	struct net_device *netdev;
234*4882a593Smuzhiyun 	wait_queue_head_t vchnl_waitq;
235*4882a593Smuzhiyun 	struct i40iw_sc_dev sc_dev;
236*4882a593Smuzhiyun 	struct i40iw_sc_vsi vsi;
237*4882a593Smuzhiyun 	struct i40iw_handler *hdl;
238*4882a593Smuzhiyun 	struct i40e_info *ldev;
239*4882a593Smuzhiyun 	struct i40e_client *client;
240*4882a593Smuzhiyun 	struct i40iw_hw hw;
241*4882a593Smuzhiyun 	struct i40iw_cm_core cm_core;
242*4882a593Smuzhiyun 	u8 *mem_resources;
243*4882a593Smuzhiyun 	unsigned long *allocated_qps;
244*4882a593Smuzhiyun 	unsigned long *allocated_cqs;
245*4882a593Smuzhiyun 	unsigned long *allocated_mrs;
246*4882a593Smuzhiyun 	unsigned long *allocated_pds;
247*4882a593Smuzhiyun 	unsigned long *allocated_arps;
248*4882a593Smuzhiyun 	struct i40iw_qp **qp_table;
249*4882a593Smuzhiyun 	bool msix_shared;
250*4882a593Smuzhiyun 	u32 msix_count;
251*4882a593Smuzhiyun 	struct i40iw_msix_vector *iw_msixtbl;
252*4882a593Smuzhiyun 	struct i40e_qvlist_info *iw_qvlist;
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	struct i40iw_hmc_pble_rsrc *pble_rsrc;
255*4882a593Smuzhiyun 	struct i40iw_arp_entry *arp_table;
256*4882a593Smuzhiyun 	struct i40iw_cqp cqp;
257*4882a593Smuzhiyun 	struct i40iw_ccq ccq;
258*4882a593Smuzhiyun 	u32 ceqs_count;
259*4882a593Smuzhiyun 	struct i40iw_ceq *ceqlist;
260*4882a593Smuzhiyun 	struct i40iw_aeq aeq;
261*4882a593Smuzhiyun 	u32 arp_table_size;
262*4882a593Smuzhiyun 	u32 next_arp_index;
263*4882a593Smuzhiyun 	spinlock_t resource_lock; /* hw resource access */
264*4882a593Smuzhiyun 	spinlock_t qptable_lock;
265*4882a593Smuzhiyun 	u32 vendor_id;
266*4882a593Smuzhiyun 	u32 vendor_part_id;
267*4882a593Smuzhiyun 	u32 of_device_registered;
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	u32 device_cap_flags;
270*4882a593Smuzhiyun 	unsigned long db_start;
271*4882a593Smuzhiyun 	u8 resource_profile;
272*4882a593Smuzhiyun 	u8 max_rdma_vfs;
273*4882a593Smuzhiyun 	u8 max_enabled_vfs;
274*4882a593Smuzhiyun 	u8 max_sge;
275*4882a593Smuzhiyun 	u8 iw_status;
276*4882a593Smuzhiyun 	u8 send_term_ok;
277*4882a593Smuzhiyun 	bool push_mode;		/* Initialized from parameter passed to driver */
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 	/* x710 specific */
280*4882a593Smuzhiyun 	struct mutex pbl_mutex;
281*4882a593Smuzhiyun 	struct tasklet_struct dpc_tasklet;
282*4882a593Smuzhiyun 	struct workqueue_struct *virtchnl_wq;
283*4882a593Smuzhiyun 	struct virtchnl_work virtchnl_w[I40IW_MAX_PE_ENABLED_VF_COUNT];
284*4882a593Smuzhiyun 	struct i40iw_dma_mem obj_mem;
285*4882a593Smuzhiyun 	struct i40iw_dma_mem obj_next;
286*4882a593Smuzhiyun 	u8 *hmc_info_mem;
287*4882a593Smuzhiyun 	u32 sd_type;
288*4882a593Smuzhiyun 	struct workqueue_struct *param_wq;
289*4882a593Smuzhiyun 	atomic_t params_busy;
290*4882a593Smuzhiyun 	enum init_completion_state init_state;
291*4882a593Smuzhiyun 	u16 mac_ip_table_idx;
292*4882a593Smuzhiyun 	atomic_t vchnl_msgs;
293*4882a593Smuzhiyun 	u32 max_mr;
294*4882a593Smuzhiyun 	u32 max_qp;
295*4882a593Smuzhiyun 	u32 max_cq;
296*4882a593Smuzhiyun 	u32 max_pd;
297*4882a593Smuzhiyun 	u32 next_qp;
298*4882a593Smuzhiyun 	u32 next_cq;
299*4882a593Smuzhiyun 	u32 next_pd;
300*4882a593Smuzhiyun 	u32 max_mr_size;
301*4882a593Smuzhiyun 	u32 max_qp_wr;
302*4882a593Smuzhiyun 	u32 max_cqe;
303*4882a593Smuzhiyun 	u32 mr_stagmask;
304*4882a593Smuzhiyun 	u32 mpa_version;
305*4882a593Smuzhiyun 	bool dcb;
306*4882a593Smuzhiyun 	bool closing;
307*4882a593Smuzhiyun 	bool reset;
308*4882a593Smuzhiyun 	u32 used_pds;
309*4882a593Smuzhiyun 	u32 used_cqs;
310*4882a593Smuzhiyun 	u32 used_mrs;
311*4882a593Smuzhiyun 	u32 used_qps;
312*4882a593Smuzhiyun 	wait_queue_head_t close_wq;
313*4882a593Smuzhiyun 	atomic64_t use_count;
314*4882a593Smuzhiyun };
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun struct i40iw_ib_device {
317*4882a593Smuzhiyun 	struct ib_device ibdev;
318*4882a593Smuzhiyun 	struct i40iw_device *iwdev;
319*4882a593Smuzhiyun };
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun struct i40iw_handler {
322*4882a593Smuzhiyun 	struct list_head list;
323*4882a593Smuzhiyun 	struct i40e_client *client;
324*4882a593Smuzhiyun 	struct i40iw_device device;
325*4882a593Smuzhiyun 	struct i40e_info ldev;
326*4882a593Smuzhiyun };
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun /**
329*4882a593Smuzhiyun  * i40iw_fw_major_ver - get firmware major version
330*4882a593Smuzhiyun  * @dev: iwarp device
331*4882a593Smuzhiyun  **/
i40iw_fw_major_ver(struct i40iw_sc_dev * dev)332*4882a593Smuzhiyun static inline u64 i40iw_fw_major_ver(struct i40iw_sc_dev *dev)
333*4882a593Smuzhiyun {
334*4882a593Smuzhiyun 	return RS_64(dev->feature_info[I40IW_FEATURE_FW_INFO],
335*4882a593Smuzhiyun 		     I40IW_FW_VER_MAJOR);
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun /**
339*4882a593Smuzhiyun  * i40iw_fw_minor_ver - get firmware minor version
340*4882a593Smuzhiyun  * @dev: iwarp device
341*4882a593Smuzhiyun  **/
i40iw_fw_minor_ver(struct i40iw_sc_dev * dev)342*4882a593Smuzhiyun static inline u64 i40iw_fw_minor_ver(struct i40iw_sc_dev *dev)
343*4882a593Smuzhiyun {
344*4882a593Smuzhiyun 	return RS_64(dev->feature_info[I40IW_FEATURE_FW_INFO],
345*4882a593Smuzhiyun 		     I40IW_FW_VER_MINOR);
346*4882a593Smuzhiyun }
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun /**
349*4882a593Smuzhiyun  * to_iwdev - get device
350*4882a593Smuzhiyun  * @ibdev: ib device
351*4882a593Smuzhiyun  **/
to_iwdev(struct ib_device * ibdev)352*4882a593Smuzhiyun static inline struct i40iw_device *to_iwdev(struct ib_device *ibdev)
353*4882a593Smuzhiyun {
354*4882a593Smuzhiyun 	return container_of(ibdev, struct i40iw_ib_device, ibdev)->iwdev;
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun /**
358*4882a593Smuzhiyun  * to_ucontext - get user context
359*4882a593Smuzhiyun  * @ibucontext: ib user context
360*4882a593Smuzhiyun  **/
to_ucontext(struct ib_ucontext * ibucontext)361*4882a593Smuzhiyun static inline struct i40iw_ucontext *to_ucontext(struct ib_ucontext *ibucontext)
362*4882a593Smuzhiyun {
363*4882a593Smuzhiyun 	return container_of(ibucontext, struct i40iw_ucontext, ibucontext);
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun /**
367*4882a593Smuzhiyun  * to_iwpd - get protection domain
368*4882a593Smuzhiyun  * @ibpd: ib pd
369*4882a593Smuzhiyun  **/
to_iwpd(struct ib_pd * ibpd)370*4882a593Smuzhiyun static inline struct i40iw_pd *to_iwpd(struct ib_pd *ibpd)
371*4882a593Smuzhiyun {
372*4882a593Smuzhiyun 	return container_of(ibpd, struct i40iw_pd, ibpd);
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun /**
376*4882a593Smuzhiyun  * to_iwmr - get device memory region
377*4882a593Smuzhiyun  * @ibdev: ib memory region
378*4882a593Smuzhiyun  **/
to_iwmr(struct ib_mr * ibmr)379*4882a593Smuzhiyun static inline struct i40iw_mr *to_iwmr(struct ib_mr *ibmr)
380*4882a593Smuzhiyun {
381*4882a593Smuzhiyun 	return container_of(ibmr, struct i40iw_mr, ibmr);
382*4882a593Smuzhiyun }
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun /**
385*4882a593Smuzhiyun  * to_iwmw - get device memory window
386*4882a593Smuzhiyun  * @ibmw: ib memory window
387*4882a593Smuzhiyun  **/
to_iwmw(struct ib_mw * ibmw)388*4882a593Smuzhiyun static inline struct i40iw_mr *to_iwmw(struct ib_mw *ibmw)
389*4882a593Smuzhiyun {
390*4882a593Smuzhiyun 	return container_of(ibmw, struct i40iw_mr, ibmw);
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun /**
394*4882a593Smuzhiyun  * to_iwcq - get completion queue
395*4882a593Smuzhiyun  * @ibcq: ib cqdevice
396*4882a593Smuzhiyun  **/
to_iwcq(struct ib_cq * ibcq)397*4882a593Smuzhiyun static inline struct i40iw_cq *to_iwcq(struct ib_cq *ibcq)
398*4882a593Smuzhiyun {
399*4882a593Smuzhiyun 	return container_of(ibcq, struct i40iw_cq, ibcq);
400*4882a593Smuzhiyun }
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun /**
403*4882a593Smuzhiyun  * to_iwqp - get device qp
404*4882a593Smuzhiyun  * @ibqp: ib qp
405*4882a593Smuzhiyun  **/
to_iwqp(struct ib_qp * ibqp)406*4882a593Smuzhiyun static inline struct i40iw_qp *to_iwqp(struct ib_qp *ibqp)
407*4882a593Smuzhiyun {
408*4882a593Smuzhiyun 	return container_of(ibqp, struct i40iw_qp, ibqp);
409*4882a593Smuzhiyun }
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun /* i40iw.c */
412*4882a593Smuzhiyun void i40iw_qp_add_ref(struct ib_qp *ibqp);
413*4882a593Smuzhiyun void i40iw_qp_rem_ref(struct ib_qp *ibqp);
414*4882a593Smuzhiyun struct ib_qp *i40iw_get_qp(struct ib_device *, int);
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun void i40iw_flush_wqes(struct i40iw_device *iwdev,
417*4882a593Smuzhiyun 		      struct i40iw_qp *qp);
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun void i40iw_manage_arp_cache(struct i40iw_device *iwdev,
420*4882a593Smuzhiyun 			    unsigned char *mac_addr,
421*4882a593Smuzhiyun 			    u32 *ip_addr,
422*4882a593Smuzhiyun 			    bool ipv4,
423*4882a593Smuzhiyun 			    u32 action);
424*4882a593Smuzhiyun 
425*4882a593Smuzhiyun int i40iw_manage_apbvt(struct i40iw_device *iwdev,
426*4882a593Smuzhiyun 		       u16 accel_local_port,
427*4882a593Smuzhiyun 		       bool add_port);
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun struct i40iw_cqp_request *i40iw_get_cqp_request(struct i40iw_cqp *cqp, bool wait);
430*4882a593Smuzhiyun void i40iw_free_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request);
431*4882a593Smuzhiyun void i40iw_put_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request);
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun /**
434*4882a593Smuzhiyun  * i40iw_alloc_resource - allocate a resource
435*4882a593Smuzhiyun  * @iwdev: device pointer
436*4882a593Smuzhiyun  * @resource_array: resource bit array:
437*4882a593Smuzhiyun  * @max_resources: maximum resource number
438*4882a593Smuzhiyun  * @req_resources_num: Allocated resource number
439*4882a593Smuzhiyun  * @next: next free id
440*4882a593Smuzhiyun  **/
i40iw_alloc_resource(struct i40iw_device * iwdev,unsigned long * resource_array,u32 max_resources,u32 * req_resource_num,u32 * next)441*4882a593Smuzhiyun static inline int i40iw_alloc_resource(struct i40iw_device *iwdev,
442*4882a593Smuzhiyun 				       unsigned long *resource_array,
443*4882a593Smuzhiyun 				       u32 max_resources,
444*4882a593Smuzhiyun 				       u32 *req_resource_num,
445*4882a593Smuzhiyun 				       u32 *next)
446*4882a593Smuzhiyun {
447*4882a593Smuzhiyun 	u32 resource_num;
448*4882a593Smuzhiyun 	unsigned long flags;
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun 	spin_lock_irqsave(&iwdev->resource_lock, flags);
451*4882a593Smuzhiyun 	resource_num = find_next_zero_bit(resource_array, max_resources, *next);
452*4882a593Smuzhiyun 	if (resource_num >= max_resources) {
453*4882a593Smuzhiyun 		resource_num = find_first_zero_bit(resource_array, max_resources);
454*4882a593Smuzhiyun 		if (resource_num >= max_resources) {
455*4882a593Smuzhiyun 			spin_unlock_irqrestore(&iwdev->resource_lock, flags);
456*4882a593Smuzhiyun 			return -EOVERFLOW;
457*4882a593Smuzhiyun 		}
458*4882a593Smuzhiyun 	}
459*4882a593Smuzhiyun 	set_bit(resource_num, resource_array);
460*4882a593Smuzhiyun 	*next = resource_num + 1;
461*4882a593Smuzhiyun 	if (*next == max_resources)
462*4882a593Smuzhiyun 		*next = 0;
463*4882a593Smuzhiyun 	*req_resource_num = resource_num;
464*4882a593Smuzhiyun 	spin_unlock_irqrestore(&iwdev->resource_lock, flags);
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun 	return 0;
467*4882a593Smuzhiyun }
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun /**
470*4882a593Smuzhiyun  * i40iw_is_resource_allocated - detrmine if resource is
471*4882a593Smuzhiyun  * allocated
472*4882a593Smuzhiyun  * @iwdev: device pointer
473*4882a593Smuzhiyun  * @resource_array: resource array for the resource_num
474*4882a593Smuzhiyun  * @resource_num: resource number to check
475*4882a593Smuzhiyun  **/
i40iw_is_resource_allocated(struct i40iw_device * iwdev,unsigned long * resource_array,u32 resource_num)476*4882a593Smuzhiyun static inline bool i40iw_is_resource_allocated(struct i40iw_device *iwdev,
477*4882a593Smuzhiyun 					       unsigned long *resource_array,
478*4882a593Smuzhiyun 					       u32 resource_num)
479*4882a593Smuzhiyun {
480*4882a593Smuzhiyun 	bool bit_is_set;
481*4882a593Smuzhiyun 	unsigned long flags;
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun 	spin_lock_irqsave(&iwdev->resource_lock, flags);
484*4882a593Smuzhiyun 
485*4882a593Smuzhiyun 	bit_is_set = test_bit(resource_num, resource_array);
486*4882a593Smuzhiyun 	spin_unlock_irqrestore(&iwdev->resource_lock, flags);
487*4882a593Smuzhiyun 
488*4882a593Smuzhiyun 	return bit_is_set;
489*4882a593Smuzhiyun }
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun /**
492*4882a593Smuzhiyun  * i40iw_free_resource - free a resource
493*4882a593Smuzhiyun  * @iwdev: device pointer
494*4882a593Smuzhiyun  * @resource_array: resource array for the resource_num
495*4882a593Smuzhiyun  * @resource_num: resource number to free
496*4882a593Smuzhiyun  **/
i40iw_free_resource(struct i40iw_device * iwdev,unsigned long * resource_array,u32 resource_num)497*4882a593Smuzhiyun static inline void i40iw_free_resource(struct i40iw_device *iwdev,
498*4882a593Smuzhiyun 				       unsigned long *resource_array,
499*4882a593Smuzhiyun 				       u32 resource_num)
500*4882a593Smuzhiyun {
501*4882a593Smuzhiyun 	unsigned long flags;
502*4882a593Smuzhiyun 
503*4882a593Smuzhiyun 	spin_lock_irqsave(&iwdev->resource_lock, flags);
504*4882a593Smuzhiyun 	clear_bit(resource_num, resource_array);
505*4882a593Smuzhiyun 	spin_unlock_irqrestore(&iwdev->resource_lock, flags);
506*4882a593Smuzhiyun }
507*4882a593Smuzhiyun 
508*4882a593Smuzhiyun /**
509*4882a593Smuzhiyun  * to_iwhdl - Get the handler from the device pointer
510*4882a593Smuzhiyun  * @iwdev: device pointer
511*4882a593Smuzhiyun  **/
to_iwhdl(struct i40iw_device * iw_dev)512*4882a593Smuzhiyun static inline struct i40iw_handler *to_iwhdl(struct i40iw_device *iw_dev)
513*4882a593Smuzhiyun {
514*4882a593Smuzhiyun 	return container_of(iw_dev, struct i40iw_handler, device);
515*4882a593Smuzhiyun }
516*4882a593Smuzhiyun 
517*4882a593Smuzhiyun struct i40iw_handler *i40iw_find_netdev(struct net_device *netdev);
518*4882a593Smuzhiyun 
519*4882a593Smuzhiyun /**
520*4882a593Smuzhiyun  * iw_init_resources -
521*4882a593Smuzhiyun  */
522*4882a593Smuzhiyun u32 i40iw_initialize_hw_resources(struct i40iw_device *iwdev);
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun int i40iw_register_rdma_device(struct i40iw_device *iwdev);
525*4882a593Smuzhiyun void i40iw_port_ibevent(struct i40iw_device *iwdev);
526*4882a593Smuzhiyun void i40iw_cm_disconn(struct i40iw_qp *iwqp);
527*4882a593Smuzhiyun void i40iw_cm_disconn_worker(void *);
528*4882a593Smuzhiyun int mini_cm_recv_pkt(struct i40iw_cm_core *, struct i40iw_device *,
529*4882a593Smuzhiyun 		     struct sk_buff *);
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun enum i40iw_status_code i40iw_handle_cqp_op(struct i40iw_device *iwdev,
532*4882a593Smuzhiyun 					   struct i40iw_cqp_request *cqp_request);
533*4882a593Smuzhiyun enum i40iw_status_code i40iw_add_mac_addr(struct i40iw_device *iwdev,
534*4882a593Smuzhiyun 					  u8 *mac_addr, u8 *mac_index);
535*4882a593Smuzhiyun int i40iw_modify_qp(struct ib_qp *, struct ib_qp_attr *, int, struct ib_udata *);
536*4882a593Smuzhiyun void i40iw_cq_wq_destroy(struct i40iw_device *iwdev, struct i40iw_sc_cq *cq);
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun void i40iw_cleanup_pending_cqp_op(struct i40iw_device *iwdev);
539*4882a593Smuzhiyun void i40iw_rem_pdusecount(struct i40iw_pd *iwpd, struct i40iw_device *iwdev);
540*4882a593Smuzhiyun void i40iw_add_pdusecount(struct i40iw_pd *iwpd);
541*4882a593Smuzhiyun void i40iw_rem_devusecount(struct i40iw_device *iwdev);
542*4882a593Smuzhiyun void i40iw_add_devusecount(struct i40iw_device *iwdev);
543*4882a593Smuzhiyun void i40iw_hw_modify_qp(struct i40iw_device *iwdev, struct i40iw_qp *iwqp,
544*4882a593Smuzhiyun 			struct i40iw_modify_qp_info *info, bool wait);
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun void i40iw_qp_suspend_resume(struct i40iw_sc_dev *dev,
547*4882a593Smuzhiyun 			     struct i40iw_sc_qp *qp,
548*4882a593Smuzhiyun 			     bool suspend);
549*4882a593Smuzhiyun enum i40iw_status_code i40iw_manage_qhash(struct i40iw_device *iwdev,
550*4882a593Smuzhiyun 					  struct i40iw_cm_info *cminfo,
551*4882a593Smuzhiyun 					  enum i40iw_quad_entry_type etype,
552*4882a593Smuzhiyun 					  enum i40iw_quad_hash_manage_type mtype,
553*4882a593Smuzhiyun 					  void *cmnode,
554*4882a593Smuzhiyun 					  bool wait);
555*4882a593Smuzhiyun void i40iw_receive_ilq(struct i40iw_sc_vsi *vsi, struct i40iw_puda_buf *rbuf);
556*4882a593Smuzhiyun void i40iw_free_sqbuf(struct i40iw_sc_vsi *vsi, void *bufp);
557*4882a593Smuzhiyun void i40iw_free_qp_resources(struct i40iw_qp *iwqp);
558*4882a593Smuzhiyun 
559*4882a593Smuzhiyun enum i40iw_status_code i40iw_obj_aligned_mem(struct i40iw_device *iwdev,
560*4882a593Smuzhiyun 					     struct i40iw_dma_mem *memptr,
561*4882a593Smuzhiyun 					     u32 size, u32 mask);
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun void i40iw_request_reset(struct i40iw_device *iwdev);
564*4882a593Smuzhiyun void i40iw_destroy_rdma_device(struct i40iw_ib_device *iwibdev);
565*4882a593Smuzhiyun int i40iw_setup_cm_core(struct i40iw_device *iwdev);
566*4882a593Smuzhiyun void i40iw_cleanup_cm_core(struct i40iw_cm_core *cm_core);
567*4882a593Smuzhiyun void i40iw_process_ceq(struct i40iw_device *, struct i40iw_ceq *iwceq);
568*4882a593Smuzhiyun void i40iw_process_aeq(struct i40iw_device *);
569*4882a593Smuzhiyun void i40iw_next_iw_state(struct i40iw_qp *iwqp,
570*4882a593Smuzhiyun 			 u8 state, u8 del_hash,
571*4882a593Smuzhiyun 			 u8 term, u8 term_len);
572*4882a593Smuzhiyun int i40iw_send_syn(struct i40iw_cm_node *cm_node, u32 sendack);
573*4882a593Smuzhiyun int i40iw_send_reset(struct i40iw_cm_node *cm_node);
574*4882a593Smuzhiyun struct i40iw_cm_node *i40iw_find_node(struct i40iw_cm_core *cm_core,
575*4882a593Smuzhiyun 				      u16 rem_port,
576*4882a593Smuzhiyun 				      u32 *rem_addr,
577*4882a593Smuzhiyun 				      u16 loc_port,
578*4882a593Smuzhiyun 				      u32 *loc_addr,
579*4882a593Smuzhiyun 				      bool add_refcnt,
580*4882a593Smuzhiyun 				      bool accelerated_list);
581*4882a593Smuzhiyun 
582*4882a593Smuzhiyun enum i40iw_status_code i40iw_hw_flush_wqes(struct i40iw_device *iwdev,
583*4882a593Smuzhiyun 					   struct i40iw_sc_qp *qp,
584*4882a593Smuzhiyun 					   struct i40iw_qp_flush_info *info,
585*4882a593Smuzhiyun 					   bool wait);
586*4882a593Smuzhiyun 
587*4882a593Smuzhiyun void i40iw_gen_ae(struct i40iw_device *iwdev,
588*4882a593Smuzhiyun 		  struct i40iw_sc_qp *qp,
589*4882a593Smuzhiyun 		  struct i40iw_gen_ae_info *info,
590*4882a593Smuzhiyun 		  bool wait);
591*4882a593Smuzhiyun 
592*4882a593Smuzhiyun void i40iw_copy_ip_ntohl(u32 *dst, __be32 *src);
593*4882a593Smuzhiyun struct ib_mr *i40iw_reg_phys_mr(struct ib_pd *ib_pd,
594*4882a593Smuzhiyun 				u64 addr,
595*4882a593Smuzhiyun 				u64 size,
596*4882a593Smuzhiyun 				int acc,
597*4882a593Smuzhiyun 				u64 *iova_start);
598*4882a593Smuzhiyun 
599*4882a593Smuzhiyun int i40iw_inetaddr_event(struct notifier_block *notifier,
600*4882a593Smuzhiyun 			 unsigned long event,
601*4882a593Smuzhiyun 			 void *ptr);
602*4882a593Smuzhiyun int i40iw_inet6addr_event(struct notifier_block *notifier,
603*4882a593Smuzhiyun 			  unsigned long event,
604*4882a593Smuzhiyun 			  void *ptr);
605*4882a593Smuzhiyun int i40iw_net_event(struct notifier_block *notifier,
606*4882a593Smuzhiyun 		    unsigned long event,
607*4882a593Smuzhiyun 		    void *ptr);
608*4882a593Smuzhiyun int i40iw_netdevice_event(struct notifier_block *notifier,
609*4882a593Smuzhiyun 			  unsigned long event,
610*4882a593Smuzhiyun 			  void *ptr);
611*4882a593Smuzhiyun 
612*4882a593Smuzhiyun #endif
613